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5. ANALOG SIGNAL PROCESSING USING

OPERATIONAL AMPLIFIERS

5.4. IDEAL MODEL FOR THE OPERATIONAL AMPLIFIER

Ideal Operational Amplifier (op amp)

(Note: the symbol denotes the infinite gain.)

Assumptions to analyze op amp circuits

1. Infinite Impedance at both inputs. Hence no current is drawn from the input circuits.

0==+II

2. Infinite Gain. As a consequence, the difference between the input voltages must be zero;

otherwise, the output would be infinite.+

=VV

3. Zero Output Impedance. Therefore, the output voltage does not depend on the output

current.

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Usage of op amps

Closed loop configuration: op amp circuits usually include negative feedback from the

output to the negative (inverting) input. The other case is positive feedback from the output

to the positive (noninverting) input. When the gain is G , the output is given by

)( + = VVGVout . For the negative feedback, +=+ GVVG out)1( (since =VVout ). If the

gain is very high, the output follows the positive input. For the positive feedback, however,

+=GVVout when V is connected to the ground. For small changes in the positive input,

the output is easily going to be saturated.

[negative feedback] [positive feedback]

Open loop configuration: when there is no feedback. This configuration results in

considerable instability due to the infinite gain (the output is easily saturated (comparator)).

Typical op amps

- 741, and TL071 (same configuration, FET inputs, and input impedance 10M).

V

+V

outV

+

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5.5. INVERTING AMPIFIER

Configuration

It is constructed by connecting two external resistors to an op amp. Here, the resistor FR

is called the feedback resistor, and forms the feedback loop.

The input voltage is connected to the inverting input. Therefore, this circuit inverts and

amplifies the input voltage.

Analysis

Applying KCL at node C, and utilizing the Assumption 1 that no current can flow into the

inputs of the op amp,outinii = .

From the Assumption 2 that the two inputs are assumed to be shorted, 0=CV . From Ohms Law, RiV inin = , and Foutout RiV = .

Since outin ii = , FinFoutout RiRiV == .

The resulting input-output relationship isR

R

V

V F

in

out= .

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5.6. NONINVERTING AMPLIFIER

Configuration

The input voltage is connected to the noninverting input. Therefore, this circuit amplifies

the input voltage without inverting the signal.

Analysis

From the Assumption 2, the voltage at node C isinV .

The currents through R and FR areR

Vi inin = , and

F

inout

outR

VVi

= .

Applying KCL at node C givesoutin ii = .

The input and output voltage equations are

RiRiV outinin == , and RiRiVRiV outFoutinFoutout +=+= .

The resulting input-output relationship isR

R

Ri

RiRi

V

VF

out

outFout

in

out+=

+= 1 .

The noninverting amplifier has a positive gain greater than or equal to one.

Buffer or follower

If 0=FR and 0=R , inout VV = .

The high input impedance of the op amp effectively isolates the source from the rest of the

circuit.

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5.7. SUMMER

Analysis

Applying KCL at node C givesoutiii =+ 21 .

From the Assumption 2, 0=CV .

From Ohms Law,1

11

R

Vi = ,

2

22

R

Vi = and

F

out

outR

Vi = .

The input-output relationship isF

out

R

V

R

V

R

V=+

2

2

1

1 .

AssumingF

RRR == 21 yields )( 21 VVVout += .

5.8. DIFFERENCE AMPLIFIER

Superposition

The sum of the individual responses is equivalent to the overall response to the multiple

inputs.

When the inputs are dial voltage sources, to analyze the response due to one source, the

other sources are shorted.

When the inputs are current sources, the other sources are open.

Analysis

The first step is to replace2V with a short circuit effectively grounding 2R . As shown in

Fig. 5.15, the result is an inverting amplifier. Therefore, the output due to input 1V is:

11 VR

RV Fout = .

The second step is to replace 1V with a short circuit effectively grounding 1R as shown

in Fig. 5.16a. This circuit is equivalent to the circuit shown in Fig. 5.16b where the input

voltage is

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2

2

3 VRR

RV

F

F

+=

The circuit in Fig. 5.16b is a noninverting amplifier. Therefore the output due to2V is

given by

2

2

32 11 VRR

R

R

RV

R

RV

F

FFFout

+

+=

+= .

From the principle of superposition, the total outputoutV is the sum of the outputs due to

the individual inputs:

2

2

121 1 VRR

R

R

RV

R

RVVV

F

FFFoutoutout

+

++=+= .

When RRR == 21 , the output voltage is an amplified difference of the input voltages:

212 )( VVR

RV F

out = .

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5.9. INSTRUMENT AMPLIFIER

When the input impedance is too low for high output impedance sources, the two input

impedances, i.e.,1R and 2R become different.

Furthermore, if the input signals are very low level and include noise, the difference

amplifier is unable to extract a satisfactory difference signal.

Characteristics of Instrument Amplifier

Very high input impedance.

Large Common Mode Rejection Ratio (CMRR), which is the ratio of the difference mode

gain to the common mode gain. The difference mode gain is the amplification factor for

the difference between the input signals, and the common mode gain is the amplification

factor for the average of the input signals.

Capability to amplify low-level signals in a noisy environment.

Consistent bandwidth over a large range of gains.

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Analysis

The two op amps on the left provide a high impedance amplifier stage where each input is

amplified separately.

The outputs 3V and 4V are supplied to the op amp circuit on the right, which is a

difference amplifier with a potentiometer 5R used to maximize the overall CMRR.

Since the current cannot flow through the inputs of op amps (Assumption 2), it is clear that

the current 1I passes through both feedback resistors 2R and 1R .

2113 RIVV = , 2142 RIVV = , and 1121 RIVV =

If we eliminate 1I and express 3V and 4V in terms of 1V and 2V , the results are

2

1

21

1

23 1 V

R

RV

R

RV

+= , and 2

1

21

1

24 1 V

R

RV

R

RV

++= .

Since the right part is a difference amplifier, the relation is given by

4

533

4353

3

4

)(

)(V

RRR

RRRV

R

RVout

+

++= .

Substituting3V and 4V into the above equation, and assuming 45 RR = yield

412

1

2

3

4 )(21 VVR

R

R

RVout

+= .

For a common mode input,21 VV = , the above equation yields a zero output, however, in

practice, the resistances will never match exactly.

By using a potentiometer for 5R , the mismatch between 5R and 4R can be minimized

to get a maximum CMRR.

The gain can be programmable by changing the external resistor 1R .

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5.10. INTERGRATOR

If the feedback resistor of the inverting op amp is replaced by a capacitor, the result is an

integrator circuit.

The relation between voltage and current for a capacitor:

C

i

dt

dV outout= di

CtV outout )(

1)( =

Since inout ii = and RVi inin /= ,

dVRC

tV inout )(1

)( = .

Improved Integrator with a shunt resistor

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The resistor sR is called a shunt resistor, whose purpose is to limit the low-frequency

gain of the circuit.

This is necessary due to the fact that even a small dc offset at the input would be integrated

over time, eventually saturating the op amp. Note that the scaled integral should be below

the maximum output voltage for the op amp. sR is usually greater than 110R .

5.11. DIFFERENTIOTOR

If the input resistor of the inverting op amp is replaced by a capacitor, the result is a

differentiator circuit.

The relation between voltage and current for a capacitor:C

i

dt

dV inin=

Sinceoutin ii = and RVi outout /= ,

dt

dVRCV inout = .

Note that differentiation is a signal processing method that tends to accentuate the effects

of noise whereas integration smooths signals over time.

5.12. SAMPLE AND HOLD CIRCUIT

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The sample and hold circuit is used extensively in analog to digital conversion, where a

signal value must be stabilized while it is converted to a digital representation.

When the switch S is closed, )()( tVtV inout = .

When the switch S is opened, the capacitor C holds the input voltage corresponding to the

last sampled value, since negligible current is drawn by the follower.

)()( sampledinsampledout tVttV = , where sampledt is the time when the switch was last opened.

5.13. COMPARATOR

The comparator circuit without negative feedback is used to determine whether one signal

is greater than another.

The output of the comparator is given by

+=

refinsat

refinsat

outVVV

VVVV

wheresat

V is the saturation voltage of the comparator, and refV is the reference voltage

to which the input voltage inV is being compared.

5.14. THE REAL OP AMP

A real op amp has finite input impedance and gain. There is very little voltage difference

between the input terminals.

The maximum output voltage is limited by the supply voltage. The maximum voltage

output will be about 1.4 V less than the supply voltage. For example, if a 15 V supply is

being used, the maximum voltage output would be approximately 13.6 V and the minimum

voltage output would be 13.6 V.

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Characteristics of real op amps related to step response

Slew Rate The maximum time rate of change possible for the output voltage: t

VSR

= .

Rise time The time required for the output voltage to go from 10% to 90% of its final

value.

Characteristics of real op amps related to frequency response

A real op amp has a finite bandwidth, which is a function of the gain.

GBP (Gain Bandwidth Product) the product of the open loop gain and the bandwidth at

that gain. This measure is constant over a wide range of frequencies since typical op amps

exhibit a linear log-log relationship between open loop gain and frequency.

As the closed loop gain is increasing, the bandwidth is decreasing.

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EXAMPLE 5.1 Sizing Resistor in OP Amp Circuits

For an ideal op amp, the two circuits would have same gain, -2.

By considering the Output Short Circuit Current (the largest current of the output) in the

figure 5.25 at page 161, the value for a LM741 is typically 25mA.

The output current of the top circuit is A52/ == outout VI , since V102 == inout VV .

This is far above the current sourcing capability of the op amp.

When the larger resistances as shown in the bottom circuit are used, the output current is

5mA, which is well within the op amp specification.

DESIGN EXAMPLE 5.1 Myogenic Control of a Prosthetic Limb.

We would like to design a prosthetic limb, that is, an artificial arm or leg that could be

controlled by the thoughts of the user.

When a muscle is caused to move or twitch, the tiny movement of electrolytes in the

muscles below the skin cause an electric field that induces a small voltage on the surface of

the skin. However, it ranges from microvolts to millivolts and may be mixed with other

biopotential signals.

To sense the small potential, an instrumentation amplifier can be used, which can provide

the high input impedance, high common mode rejection ratio (typically for rejecting 60 Hz

noises), and high gain.

The following figure shows an Electro Myogenic (EMG) detector (CMRR>60 dB, Gain:

125, and Input Impedance: 10M).

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[Instrumentation Amplifier]

To eliminate a motion artifact due to movement of the subject and add further gain to the

system, the 2Hz high-pass filter is used as shown below.

[High-Pass Filter]

A the point B, the EMG signal would look like the following:

This is a high-frequency signal with components between a few Hz and 250 Hz.

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We need to rectify the signal so that specific levels of the signal can be used for control,

and to use a low-pass filter to get the envelope of the high-frequency waveform. We

require a precision rectifier as shown in the following figure, since the signal is very small.

[Precision Rectifier with Low-Pass Filter]

The precision-rectified EMG and the resulting low-pass-filtered signals look like:

The output of the low-pass filter can be used to a binary control signal, one that will be on

when the muscle is contracted and off when relaxed. The output of comparator can then be

input to a power transistor circuit to control the current in a motor.

[Comparator] [Motor Control Circuit using a Power Transistor]

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DESIGN EXAMPLE 5.2 Analog PD Controller Circuits.

The following figure shows the schematic diagram of PD-controller for a DC motor.

Instead of differentiating the value of position sensor, the controller uses tachometer to get

velocity information. The resulting command inputinV to the motor can be calculated as

&& DdDdin KKKKV == )()(

whered denotes the desired angular position input, and

& are the actual sensed

angular position and velocity, and K and DD KKK = are the position and velocity gains.

[Closed loop system with PD-control]

The analog controller circuit implementing the block diagram of Fig. 2 is shown in Fig. 4,

which consists of one inverting amplifier with unit gain, one summer with variable gain,

and two buffers.

+

_

_

+

+

_

100k

_

+

1k

+5V

FunctionGeneratoror Power

Supply

ServoAmp

Tach

+

_

Pot

100k

1k

1k

K=10k

KD=10k

Motor

Vref+

VT Vw

Vd

+

[Analog PD controller circuit with op amplifiers]

K Motor Tacho Pot

KD

+

+

&

d

inV

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DESIGN EXAMPLE 5.3 Analog PID Controller Circuits.

Find out the output of the following circuit where V1 and V2 are the input voltages

(R1=R2=R3=Rf).

How can you use this circuit to control a DC motor with only a rotary potentiometer? Draw

the diagram of the total system.

(HW #5) Design Example 5.3, and in the exercise, 2, 6, 7, 10, 11 (by Feb. 15).