CARBON NANOTUBES: DEVICE PHYSICS, RF CIRCUITS,

SURFACE SCIENCE, AND NANOTECHNOLOGY

A DISSERTATION

SUBMITTED TO THE DEPARTMENT OF ELECTRICAL ENGINEERING

AND THE COMMITTEE ON GRADUATE STUDIES

OF STANFORD UNIVERSITY

IN PARTIAL FULFILLMENT OF THE REQUIREMENTS

FOR THE DEGREE OF

DOCTOR OF PHILOSOPHY

Deji Akinwande

November 2009

http://creativecommons.org/licenses/by-nc/3.0/us/

This dissertation is online at: http://purl.stanford.edu/hk621tj0645

© 2010 by Deji A Akinwande. All Rights Reserved.

Re-distributed by Stanford University under license with the author.

This work is licensed under a Creative Commons Attribution-Noncommercial 3.0 United States License.

ii

I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Philip Wong, Primary Adviser

I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Robert Dutton

I certify that I have read this dissertation and that, in my opinion, it is fully adequatein scope and quality as a dissertation for the degree of Doctor of Philosophy.

Yoshio Nishi

Approved for the Stanford University Committee on Graduate Studies.

Patricia J. Gumport, Vice Provost Graduate Education

This signature page was generated electronically upon submission of this dissertation in electronic format. An original signed hard copy of the signature page is on file inUniversity Archives.

iii

iv

Abstract

In this dissertation, we report on our research to advance the understanding and

development of carbon nanotubes into a functional nanotechnology that will enable

novel applications and products. Our research approach is interdisciplinary in nature

involving progress on many fronts including material synthesis, device physics and

compact modeling, circuits, and monolithic integration with silicon substrates for

optimum performance and integration. Specifically, this dissertation reports new

results advancing the science and technology of carbon nanotubes including: i)

analytical development of the physics of CNTs providing direct insight into the

electro-physical properties, ii) experimentally-verified analytical current-voltage and

capacitance-voltage characteristics of CNTs facilitating circuit design and analysis, iii)

elucidation of the material science of nanotube synthesis enabling large-scale

synthesis of aligned growth, and iv) monolithic integration of CNTs and CMOS for

hybrid nanotechnology for future nanoelectronics.

v

Acknowledgement

The great scientist Isaac Newton remarked that he had seen farther only

because he stood on the shoulders of giants. In my case, I have completed this

marathon with satisfaction only because I was coached by the very best trainers. In

this light, the role of my primary trainer and thesis supervisor Professor H.-S. Philip

Wong in supporting and refining my research ideas and publications cannot be

overstated. It is the ideal dream of many to define the research directions of personal

interest, and have the freedom to pursue such defined scholarship at their pleasure and

discretion of time, pace, and place without any worries of research funding. I was very

fortunate to realize this dream courtesy of a blank check from Prof. Wong.

Similarly Professor Yoshio Nishi has played a profound role in enabling not

only my research but also those of my nanotube colleagues that came after me by

granting me unfettered access to the 4” carbon nanotube furnace in his lab starting

from the autumn of 2006. In the beginning, it was very difficult to grow nanotubes by

the CVD method. With great persistence over time, that nanotube furnace has now

produced some of the finest results in the field.

Professor Bob Dutton has been in some way my unofficial mentor providing

me with a global perspective and critique of my nanotube research from time to time

thereby inadvertently forcing me to have a much clearer vision of the big picture.

Additionally, his advice and perspective on academic careers were invaluable in my

successful job search.

Stanford University boasts some of the best teachers and intellectual thinkers.

I have been very fortunate to have touched the cloak of these teachers and increased

vi

my intelligence by several tens of dB. The most influential ones in my intellectual

development and education were Professors Jim Plummer (device fabrication), Brad

Osgood (Fourier transform), Tom Lee (RF circuits), Boris Murmann (circuit design),

and Hari Manoharan (solid-state physics). My deep gratitude to them and all my other

teachers for essentially teaching me how to think analytically.

No complex device research is possible without a supporting cast of staff

members. Dr. Jim McVittie has always been very generous with his time and broadly

helpful in many areas ranging from plasmas to vacuum systems of which I had no

prior training. I am also indebted to the staff of the Stanford nanofabrication facility

(SNF) and Stanford nanocharacterization laboratory (SNL). Key SNF staff members

include James Conway (E-beam), Paul Jerabak (retired), and Mahnaz Mansourpour

(Litho). SNL staff members include Chuck Hitzman (XPS), and Bob Jones (SEM). I

also want to thank Tom Carver (iron evaporation) and Pauline Prathers (wire bonding)

of Ginzton lab for their routine assistance and excellence.

Several funding agencies have played a direct role in supporting my graduate

education and research. My personal thanks goes out to my fellowship partners

including Ford foundation, Alfred P. Sloan foundation, and the Stanford future-faculty

DARE fellowship. Dr. Lozano of the School of Engineering was instrumental in

helping me secure both the Ford and Alfred P. Sloan fellowships. Research was

supported in part by the Focus Center Research Program (FENA and C2S2), and the

Toshiba Corporation.

Lastly, I acknowledge my colleagues in the nanotube club for free exchange of

stimulating ideas and extended collaboration. The club members include Gael Close,

Cara Beasley, Nishant Patil, Albert Lin, Lan Wei, Helen Chen, Jiale Liang, Arash

Hazeghi, and Jerry Zhang. Personal thanks also extend to Yuan Zhang and Sangbum

Kim who have been my Yes men on every request I ask of them.

I have truly enjoyed my time at Stanford, the beauty and cool of the campus,

the lovely artwork in CIS, and the long walks across the quad. Recreational activities

such as seminars, Ginzton happy hours and cromem study breaks, soccer, horse-back

riding, and music made my living experience very memorable.

vii

Dedicated To My Beloveth:

- Rythmm, David, and the blessed clan of gentle hearts

- Mommy and Daddy, the unspoken words carry the most weight

viii

Contents

Chapter 1 : Introduction..................................................................................................1

1.1 Brief Introduction to Carbon Nanotubes ................................................................................1

1.2 Applications of Carbon Nanotubes.........................................................................................2

1.3 Description of Chapters..........................................................................................................6

Chapter 2 : Physical and Electronic Structure................................................................7

2.1 Chirality: A Concept to Describe Nanotubes .........................................................................9

2.2 The Carbon Nanotube Lattice ..............................................................................................11

2.3 Carbon Nanotube Brillouin Zone .........................................................................................19

2.4 Tight-Binding Dispersion of Chiral CNTs ...........................................................................21

2.5 Band Structure of Armchair Nanotubes ...............................................................................23

2.6 Band Structure of Zigzag Nanotubes and the Derivation of the Bandgap............................26

2.7 Conclusion............................................................................................................................30

Chapter 3 : Device Physics...........................................................................................31

3.1 Preface..................................................................................................................................31

3.2 An Analytic Derivation of the Density of States, Effective Mass and Carrier Density for

Achiral Carbon Nanotubes..............................................................................................................32

3.2.1 Introduction.................................................................................................................32

3.2.2 Density of States .........................................................................................................34

3.2.3 Group Velocity and Effective mass ............................................................................41

3.2.4 Carrier Density............................................................................................................43

3.2.5 Conclusion ..................................................................................................................51

3.3 Analytical Ballistic Theory of Carbon Nanotube Transistors: Experimental Validation,

Device Physics, Parameter Extraction, and Performance Projection ..............................................55

3.3.1 Introduction.................................................................................................................56

3.3.2 Analytical Ballistic Theory .........................................................................................57

3.3.3 Analytical Surface Potential .......................................................................................61

ix

3.3.4 Experimental Validation and Device Physics .............................................................62

3.3.5 Parameter Extraction and Performance Projection .....................................................68

3.3.6 Conclusion ..................................................................................................................75

3.4 References ............................................................................................................................77

Chapter 4 : RF Analog Circuits ....................................................................................82

4.1 Preface..................................................................................................................................82

4.2 Analysis of the Frequency Response of Carbon Nanotube Transistors................................83

4.2.1 Introduction.................................................................................................................83

4.2.2 Overview of Prior RF Characterization ......................................................................84

4.2.3 CNFET Transfer Function (S21)..................................................................................85

4.2.4 Effect of Pad Capacitance ...........................................................................................94

4.2.5 Design Guidelines and Layout Issues for High Frequency CNFET ...........................95

4.2.6 Conclusion ................................................................................................................102

4.3 Carbon Nanotube Quantum Capacitance for Non-Linear Terahertz Circuits.....................103

4.3.1 Introduction...............................................................................................................103

4.3.2 CNT Capacitor Circuit Model...................................................................................104

4.3.3 Quantum Capacitor Analog Circuits.........................................................................109

4.3.4 Conclusion ................................................................................................................117

4.4 References ..........................................................................................................................118

Chapter 5 : Material Synthesis and Surface Science ..................................................121

5.1 Preface................................................................................................................................121

5.2 Introduction ........................................................................................................................123

5.3 Experimental Methods........................................................................................................124

5.4 Results and Discussion .......................................................................................................126

5.4.1 Surface Physics .........................................................................................................128

5.4.2 Surface Chemistry.....................................................................................................130

5.4.3 Illustrative Surface Science Model and Full Wafer Synthesis ..................................137

5.5 Conclusion..........................................................................................................................140

5.6 References ..........................................................................................................................141

Chapter 6 : Silicon – CNT Hybrid Nanotechnology ..................................................144

6.1 Preface................................................................................................................................144

6.2 Introduction ........................................................................................................................146

6.3 Hybrid Monolithic Chip .....................................................................................................149

6.4 Conclusion..........................................................................................................................155

6.5 References ..........................................................................................................................156

Closing Remarks ........................................................................................................158

x

7.1 Research Contributions ......................................................................................................158

7.2 List of Publications.............................................................................................................159

7.3 Future Work .......................................................................................................................162

xi

Figures

Figure 1.1: Growth in CNT articles in the publications of the major scientific societies. .........................3

Figure 1.2: United States patents issued and patent applications containing the phrase carbon nanotubes

in the patent abstract. ..............................................................................................................5

Figure 2.1: Illustration of the two families of carbon nanotubes. ..............................................................8

Figure 2.2: Example of a chiral object.....................................................................................................10

Figure 2.3: The three types of single-wall CNTs.....................................................................................12

Figure 2.4: An illustration to describe the construction of a CNT from graphene. .................................14

Figure 2.5: Brillouin zone of a (3,3) armchair CNT (shaded rectangle)..................................................20

Figure 2.6: Band structures for a) (10,4) and b) (10,5) nanotubes within ±±±±3eV......................................24

Figure 2.7: Band structure for the (8,8) armchair nanotube. ...................................................................25

Figure 2.8: Band structures for a) (12,0) and b) (13,0) carbon nanotubes. ..............................................27

Figure 2.9: The bandgap of semiconducting carbon nanotubes calculated using Eq. (23) (solid line)

compared to exact NNTB computation showing good agreement........................................29

Figure 3.1: An illustrative energy bandstructure of a semiconducting CNT. ..........................................37

Figure 3.2: The effective mass of the first conduction band....................................................................44

Figure 3.3: Illustrative plot of the DOS and Fermi-Dirac distribution at equilibrium. ............................47

Figure 3.4: The semiconducting zigzag CNT intrinsic carrier density. ...................................................49

Figure 3.5: The semiconducting zigzag CNT carrier density. .................................................................50

Figure 3.6: CNFET devices covered in this work illustrated with an n-type...........................................59

Figure 3.7: a) Two subband E-k dispersion of a CNT.............................................................................60

Figure 3.8: Experimental results and analytical (Eq. (4)) predictions for a ballistic 50nm p-type CNFET

(device identical to Figure 3.6b). ..........................................................................................63

Figure 3.9: Illustration of DOPS in a ballistic (n-type) CNFET..............................................................64

Figure 3.10: Improved agreement between experiment and analytical ballistic theory...........................66

Figure 3.11: VT exactly computed from ABT model (Table 3.1, Eq. (3))...............................................69

Figure 3.12: Deep subthreshold current and linear fit for extracting the CNT bandgap..........................71

Figure 3.13: Performance assessment for ballistic CNFET for logic applications. .................................73

xii

Figure 3.14: ABT model calculations for key analog metrics for a 50nm CNFET. ................................74

Figure 4.1: CNFET simplified small signal common-source model. ......................................................86

Figure 4.2: Illustrated Bode plots of four possible CNFETs frequency response. ..................................93

Figure 4.3: Representative layouts of a carbon nanotube transistor. .......................................................97

Figure 4.4: Frequency response of the gain of common-source CNFETs plotted for several values of n.

Gate width (We) is 5µm.........................................................................................................99

Figure 4.5: f-3dB of the common-source CNFET (with n=1000) plotted as a function of the gate

width/finger for the same dimensions as in Table 4.3.........................................................101

Figure 4.6: Optimum device geometry for CNT quantum capacitance circuits. ...................................106

Figure 4.7: Two-port circuit models for a CNT quantum capacitance device.......................................107

Figure 4.8: Measured NLC capacitance (including the quantum, Cq, and geometric, Cg, contributions) vs

top-gate voltage of a CNT device with source/drain shorted [26]. .....................................110

Figure 4.9: Proposed carbon nanotube quantum capacitance frequency doubler circuit. ......................114

Figure 4.10: Proposed carbon nanotube quantum capacitance frequency mixer circuit........................116

Figure 5.1: Images and device data from initial CNT synthesis. ...........................................................127

Figure 5.2: AFM surface scans of iron catalyst on single-crystal quartz...............................................129

Figure 5.3: a) XPS survey scan after sub-monolayer Fe evaporation on quartz sample........................131

Figure 5.4: a) Si 2p XPS core level spectra after sub-monolayer Fe evaporation. ................................133

Figure 5.5: XPS comparison of initial and optimized pretreatment procedures. ...................................136

Figure 5.6: A proposed illustrative model of the catalytic surface physics and chemistry during the

catalyst pretreatment procedure. .........................................................................................138

Figure 5.7: SEM images of CNT grown on full 4” quartz wafer...........................................................139

Figure 6.1: The distribution of aligning semiconducting nanotubes (sCNTs), and metallic nanotubes

(mCNTs) to lithographic defined source and drain pads. ...................................................148

Figure 6.2: a) Cross-section of a silicon nMOS with an integrated CNFET. ........................................150

Figure 6.3: DC electrical characteristics of CNT and nMOS transistors. ..............................................152

Figure 6.4: AC characteristics of nMOS-CNT integrated cascode amplifier. .......................................154

xiii

Tables

Table 2.1: Table of parameters and associated equations for carbon nanotubes .....................................17

Table 2.2: Table of specific values for selected carbon nanotubes..........................................................18

Table 3.1: ABT metrics and new extraction techniques ..........................................................................70

Table 4.1: Gain and output power for a range of transconductances.......................................................90

Table 4.2: S21 (-3dB) frequencies for a range of tbot ................................................................................96

Table 4.3: Capacitances per finger for design example.........................................................................100

1

1 Chapter 1

INTRODUCTION

1.1 Brief Introduction to Carbon Nanotubes

Carbon nanotubes (CNTs) are arguably the most fascinating new crystalline

material discovered in the past twenty years. The basic properties fueling the intense

research and economic interest are its ability to conduct electrical and thermal current

efficiently. In this respect, carbon nanotubes have been demonstrated to be the one of

the best electrical and thermal conductors known to man. Furthermore, its one-

dimensional (1D) nature with all the carbon atoms exposed on the surface makes it a

natural candidate for sensor applications.

The complete elucidation of the physical structure of carbon nanotubes is

widely credited to Sumio Iijima who in 1991 (and later in 1993) reported high-

resolution detailed electron microscope images of carbon nanotubes. Shortly thereafter,

theoretical work by several groups determined that CNTs intrinsically have unique and

diverse properties including diameter-tunable electrical, optical, and thermal

properties. Since then, subsequent research in the fundamental understanding and

potential applications of carbon nanotubes have risen substantially over the past two

decades as is evident in Figure 1.1, which is a graph of the publication growth of CNT

related articles.

Historically, much of the momentum driving the explosive growth of research

on nanotubes has been for transistor applications for very large-scale integrated

(VLSI) circuit technology. This was largely motivated by the experimental

observation of ballistic electron transport over relatively long lengths in carbon

2

nanotubes plus its higher current density and projected faster speed compared to

silicon transistors. However, we argue that carbon nanotubes still been relatively new

on the scene deserve to be studied for their own sake as well, for a variety of reasons,

including a necessary need to learn new paradigms about what nature offers in one-

dimensions (1D), and the potential for new applications beyond the reach of

conventional semiconductors. Hence, a comprehensive understanding of carbon

nanotubes is clearly of broad significance and interest that transcends the historical

motivation.

As a basic introduction, there are two families of carbon nanotubes (CNTs);

single-wall carbon nanotubes and multi-wall carbon nanotubes. A single-wall carbon

nanotube is a hollow cylindrical structure of carbon atoms with a diameter that ranges

from about 0.5nm-5nm and lengths of the order of micrometers to centimeters. A

multi-wall carbon nanotube (MWCNT) is similar in structure to the single-wall CNT

but has multiple nested or concentric walls with the spacing between walls comparable

to the interlayer spacing in graphite, approximately 0.34nm. Due to their large length

to diameter ratio, carbon nanotubes are considered (1D) nanomaterials which lead to

unique electronic properties unobservable in larger solid-state materials.

1.2 Applications of Carbon Nanotubes

In contemporary fundamental and applied science research, the potential

applications and the perceived broader impact are undoubtedly the primary drivers for

expanding the research enterprise. This has certainly been the case for nanotube

research. The unique unprecedented properties of carbon nanotubes such as its perfect

tubular structure, outstanding electrical and thermal conductance, tunable optical

properties, and superior mechanical strength and toughness have generated great

excitement leading to the pursuit of both fundamental insights of the beauty of nature

in reduced-dimensions of condensed matter, and the novel applications and

technological breakthroughs that can be developed.

3

0

100

200

300

400

500

600

700

1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008

Year

nu

mb

er

of a

rtic

les

IEEE

ACS

AIP/APS

Figure 1.1: Growth in CNT articles in the publications of the major scientific societies.

IEEE and ACS represents the Institute of Electrical and Electronics Engineer and

American Chemical Society respectively. Also, AIP/APS represents the American

Institute of Physics and American Physical Society respectively.

4

In essence, the exploration of nanotubes and other nanomaterials is to learn about their

nature and their interaction with fields and matter that will allow us to design and

synthesize carbon nanotubes (CNTs) devices for next generation transformative

products. This endeavor has brought together many parties across several boundaries

of knowledge, from nanomedicine to nanoscience to nanotechnology. In short, it plays

a part in just about any discipline that has a nano prefix.

To put carbon nanotubes in some broader perspective; over the last decade,

nanotube applied research and development in academic and industrial labs across the

world have enjoyed a substantial increase reflecting a rise in the deeper understanding

of the material. Figure 1.2 which shows the increase in carbon nanotube patent

applications and patents issued in the United States is an indicator of the growing

effort to employ nanotubes in innovative applications. Invariably, many of the

applications of CNTs take advantage of its inherent nano-scale dimension, large

surface to volume ratio, and unique combination of electrical, optical, thermal and

structural properties. Some of the major applications include:

i. Field-effect transistors on conventional or flexible substrates for high-

performance electronics

ii. Sensors for real-time high-resolution monitoring of chemical and biological

molecules

iii. Nano-electromechanical systems for physical sensing or scanning probe

microscopy

iv. Field emission electron sources for display and imaging technology

v. Reinforced composites with engineered physical properties

vi. Hydrogen storage for low-emissions energy-efficient vehicles.

In the course of this dissertation, we addressed a variety of topics leading to a

greater understanding of carbon nanotubes especially for electronic applications and a

clearer direction of how to realize a hybrid nanotechnology that integrates carbon

nanotubes for arbitrary applications.

5

0

50

100

150

200

250

300

350

2000 2001 2002 2003 2004 2005 2006 2007 2008

Year

U.S

. P

ate

nts

Applications

Issued

Figure 1.2: United States patents issued and patent applications containing the phrase

carbon nanotubes in the patent abstract.

6

1.3 Description of Chapters

In the present work, our research has focused on elucidating the solid-state

physics, transistor device physics, material synthesis, and analog circuit properties of

carbon nanotubes. In addition, we developed a silicon-nanotube nanotechnology.

These are topics that cross many boundaries of knowledge including applied physics,

material science, and electrical engineering.

Chapter 2 provides a basic introduction to the physical and electronic structure

of CNTs. Chapter 3 explores in detail the device physics and charge transport

concluding with a ballistic model of nanotube field-effect transistors. Chapter 4

presents a small-signal model of CNT transistors for RF applications, and discusses

potential non-linear circuits exploiting the CNT quantum capacitance. Chapter 5

reports on the material synthesis of perfectly-aligned CNTs on quartz substrates. And

we conclude by demonstrating a hybrid nanotechnology which is based on the

integration of CNTs with conventional silicon technology in Chapter 6. A summary of

the dissertation contribution and some important challenges for future work regarding

CNTs are enumerated in Chapter 7.

7

2 Chapter 2

INTRODUCTION

Carbon nanotubes (CNTs) are arguably the most fascinating new crystalline

material discovered in the past twenty years. The basic properties fueling the intense

research and economic interest are its ability to conduct electrical and thermal current

efficiently. In this respect, carbon nanotubes have been demonstrated to be the one of

the best electrical and thermal conductors known to man. Furthermore, its one-

dimensional (1D) nature with all the carbon atoms exposed on the surface makes it a

natural candidate for sensor applications.

There are two families of carbon nanotubes (CNTs), single-wall carbon

nanotubes and multi-wall carbon nanotubes as shown in Figure 2.1. A single-wall

carbon nanotube is a hollow cylindrical structure of carbon atoms with a diameter that

ranges from about 0.5nm-5nm and lengths of the order of micrometers to centimeters.

A multi-wall carbon nanotube (MWCNT) is similar in structure to the single-wall

CNT but has multiple nested or concentric walls with the spacing between walls

comparable to the interlayer spacing in graphite, approximately 0.34nm. The ends of a

CNT are often capped with a hemisphere of the buckyball structure.

We begin this chapter by introducing the concept of chirality which is the main

idea used to describe the physical and electronic structure of CNTs. Then the physical

structure of CNTs is elucidated conceptually as a folding operation of the graphene

sheet resulting in three distinct configurations of single-wall carbon nanotubes. The

chapter concludes by examining the electronic band structure of carbon nanotubes.

8

Figure 2.1: Illustration of the two families of carbon nanotubes.

a) An ideal single-wall CNT with an hemispherical cap at both ends, and b) a multi-

wall CNT. In general, carbon nanotubes are much longer than depicted here, and the

MWCNTs can have up to several dozen walls.

a)

b)

9

2.1 Chirality: A Concept to Describe Nanotubes

Chirality is the key concept used to identify and describe the different

configurations of CNTs and their resulting electronic band structure. Since the concept

of chirality is of fundamental importance and often unfamiliar to engineers, let us take

a moment to introduce the concept of chirality before discussing how it is applied to

describe CNT structure. The term chirality is derived from the Greek term for hand

and it is used to describe the reflection symmetry between an object and its mirror

image.1 Formally, a chiral object is an object that is not super-imposable on its mirror

image, and conversely, an achiral object is an object that is super-imposable on its

mirror image. At this point, a visual illustration is often invaluable in making these

definitions vividly clear. For example, consider the left hand; its mirror image is the

right hand and we find that it is not possible to super-impose the two hands or images

such that all the features coincide precisely as illustrated in Figure 2.2. Therefore, the

human hand is a chiral object. Now, consider a circle as another example, its mirror

image is also an identical circle which super-imposes precisely on top of the original

image. Therefore, a circle is an achiral object. In a general usage, chirality is invoked

to highlight the presence or lack of mirror symmetry that provides intuition about

understanding phenomena.

Understanding the concept of chirality is essential because it is used to classify

the physical and electronic structure of CNTs. The carbon nanotubes that are super-

imposable on their mirror image are classified as achiral CNTs, and all other

nanotubes that are not super-imposable are classified as chiral CNTs. Moreover,

achiral CNTs are further classified as armchair CNTs or zigzag CNTs depending on

the geometry of the nanotube circular cross-section.

1 Care must be taken when discussing the mirror image of an object as it relates to chirality. For the example of the left hand, the plane containing the hand should be normal to the mirror.

10

Figure 2.2: Example of a chiral object.

a) The left hand and its mirror image (right hand). b) It is not possible to super-impose

the left hand on the right hand; therefore the human hand is chiral.

11

To briefly summarize, there are three types of single-wall carbon nanotubes

which are chiral CNTs, armchair CNTs, and zigzag CNTs of which the latter two are

achiral and their symmetry often makes them easier to explore and gain broad insight.

The three types of single-wall CNTs and their associated geometrical cross-sections

are shown in Figure 2.3.

2.2 The Carbon Nanotube Lattice

We introduced the concept of chirality to classify the different types of carbon

nanotubes in the previous section but it was not at all clear why CNTs arrange to form

a chiral or an achiral geometry. Fortunately, it is actually fairly easy to understand the

origin of the different types of CNTs by considering that a carbon nanotube results

from folding or wrapping of a graphene sheet. To see how the folding operation works,

we start from the direct lattice of graphene and then define a mathematical

construction which folds graphene’s lattice into a carbon nanotube. Moreover, this

mathematical folding construction directly leads to a precise determination of the

primitive lattice of carbon nanotubes, which is required information in order to derive

the CNT band structure. It is very important to keep in mind that the folding of

graphene to form a carbon nanotube is simply a convenient conceptual idea to study

the basic properties of CNTs. In actuality, CNTs naturally grow as a cylindrical

structure often with the aid of a catalyst which does not involve folding of graphene in

any physical sense.

Figure 2.4a shows the honeycomb lattice of graphene and the primitive lattice

vectors a1 and a2, defined on a plane with unit vectors x and y .

=

2,

23

1aa

a ,

−=

2,

23

2aa

a (1)

where a is the underlying Bravais lattice constant, ccaa −= 3 =2.46Å, and ac-c is the

carbon-carbon bond length (~1.42Å). Also a1 ⋅ a1 = a2 ⋅ a2 = a2, a1 ⋅ a2 =a

2/2, and the

angle between a1 and a2 is 60°.

12

Figure 2.3: The three types of single-wall CNTs.

a) A chiral CNT, b) an armchair CNT, and c) a zigzag CNT. The cross-sections of the

latter two illustrations have been highlighted by the bold lines showing the armchair

and zigzag character respectively.

13

With reference to Figure 2.4a, a single-wall carbon nanotube can be

conceptually conceived by considering folding the dashed line containing primitive

lattice points A and C with the dashed line containing primitive lattice points B and D

such that points A coincide with B, and C with D to form the nanotube shown in

Figure 2.4b. The carbon nanotube is characterized by three geometrical parameters,

the chiral vector Ch, the translation vector T, and the chiral angle θ as shown in Figure

2.4a. The chiral vector is the geometrical parameter that uniquely defines a CNT, and

|Ch|=Ch is the CNT circumference. Ch is defined as the vector connecting any two

primitive lattice points of graphene such that when folded into a nanotube these two

points are coincidental or indistinguishable. For the particular exercise of Figure 2.4,

the chiral vector is the vector from point A to B, Ch =3a1+3a2 = (3, 3). In general,

( )mnmnh ,21 =+= aaC , (n, m are positive integers, nm ≤≤0 ) (2)

and the resulting carbon nanotube is described as an (n, m) CNT.

Important observations regarding the type of CNT can be deduced directly

from the values of the chiral vector. Notice that the (3,3) CNT of Figure 2.4 leads to

an armchair nanotube. By extension, all (n,n) CNTs are armchair nanotubes. The case

when Ch is purely the along the direction of a1, (Ch = (n,0)) can be visually seen (from

the cross-section along the chiral vector) to result in zigzag nanotubes. All other (n,m)

CNTs leads to chiral nanotubes. The diameter (dt) of a carbon nanotube is derived

from its circumference Ch.

πππ

22 mnmnaCd

hhht

++=

⋅==

CC (3)

Notably, different chiralities can produce the same nanotube diameter, and as a result,

the diameter is not a unique parameter for characterizing carbon nanotubes. For

example, a (19,0) and a (16,5) nanotubes both have exactly the same diameter of

1.49nm. The equivalence of the diameter among dissimilar nanotubes has important

implications for the electronic properties.

14

x

y

a1

a2

T(1,-1) T

3a1 3a2

Figure 2.4: An illustration to describe the construction of a CNT from graphene.

a) Wrapping or folding the dashed line containing points A and C to the dashed line

containing points B and D results in the (3,3) armchair carbon nanotube in b) with

θ=30°. The CNT primitive unit cell is the cylinder formed by wrapping line AC onto

BD and is also highlighted in b).

15

This equivalence is employed later to show that the electronic properties of

CNTs are more strongly dependent on their diameter than on chirality. That is,

nanotubes with different chiralities but the same diameter have more or less the same

electronic properties. A case is point is the bandgap of nanotubes which is strongly

diameter dependent with little or no chirality dependence (see § 2.6).

The other two geometrical parameters (T and θ) can be derived from the chiral

vector. For instance, the chiral angle is the angle between the chiral vector and the

primitive lattice vector a1.

221

1

2

2

|||| mnmn

mnCos

h

h

++

+=

⋅=

a

a

C

Cθ (4)

The chiral angle can be viewed as describing the tilt angle of the hexagons relative to

the tubular axis. Due to the six-fold hexagonal symmetry of the honeycomb lattice,

unique values of the chiral angle are restricted to °≤≤ 300 θ . For the particular

exercise of Figure 2.4, θ =30°. In general, all armchair nanotubes have a chiral angle

of 30°, and for all zigzag nanotubes, θ =0°.

In order to determine the primitive unit cell of the CNT, we need to consider the

translation vector which defines the periodicity of the lattice along the tubular axis.

Geometrically, T is the smallest graphene lattice vector perpendicular to Ch. As can be

seen from Figure 2.4, T = (1,-1) for all armchair nanotubes. Similarly, the translation

vector for all zigzag nanotubes can be visually deduced to be T = (1,-2). More broadly,

the translation vector can be computed from the orthogonality condition Ch ⋅ T =0. Let

T = t1 a1+ t2 a2, where t1 and t2 are integers. Therefore,

0)2()2( 21 =+++=⋅ nmtmnth TC (5)

Determining the acceptable solution for t1 and t2 requires a subtle interplay involving

mathematical analysis and visual insight. There are two orthogonal directions (±90°)

relating T to Ch, and solving for either direction leads to an equivalent solution for the

translation vector. Let’s restrict the direction to the +90° as shown in Figure 2.4a.

Then according to the orientation definition of the lattice vectors a1 and a2, t1 must be

a positive integer and t2 must be a negative integer for T to be +90° with respect to Ch.

16

With this visual insight, one set of integers that satisfy Eq. (5) is (t1,t2) = (2m+n,-2n-m).

However, deeper thinking reveals that there are several set of integers that are also

solutions of Eq. (5). For instance, consider an (8, 2) CNT, (t1,t2) = (12,-18) is a

solution, but so are (t1,t2) = (12,-18)/2, (t1,t2) = (12,-18)/3, and (t1,t2) = (12,-18)/6. The

actual acceptable solution that leads to the shortest translation vector is (t1,t2) = (12,-

18)/6 = (2,-3), where the factor of 6 is the greatest common divisor of 12 and 18.

Hence, the acceptable solution for Eq. (5) is

+−

+==

dd g

mn

g

nmtt

2,

2),( 21T (6)

where gd is the greatest common divisor of 2m+n and 2n+m. The length of the

translation vector is

d

t

d

h

g

d

g

CT

π33=== |T| (7)

The chiral and translation vectors define the primitive unit cell of the carbon

nanotube which is a cylinder with diameter dt and length T. Some auxiliary results that

are useful to compute include the surface area of the CNT unit cell, the number of

hexagons per unit cell, and the number of carbon atoms per unit cell. The surface area

of the CNT primitive unit cell is the area of the rectangle defined by the Ch and T

vectors, | Ch × T |. The number of hexagons per unit cell (N) is the surface area divided

by the area of one hexagon.

d

h

d

h

ga

C

g

mnmnN

2

222

21

2)(2|

||=

++=

×

×=

aa|

TC (8)

This simplifies to N=2n for both armchair and zigzag nanotubes. Since there are two

carbon atoms per hexagon, there are a total of 2N carbon atoms in each CNT unit cell.

A summary of the geometric parameters and associated equations for carbon

nanotubes are listed in Table 2.1. Specific values of the geometric parameters for

selected nanotubes ranging in diameter from 1nm to 3nm are shown in Table 2.2.

17

Table 2.1: Table of parameters and associated equations for carbon nanotubes

),(21 mnmnh =+= aaC ),( nnh =C )0,(nh =C

22|| mnmnaC hh ++== C naCh 3= anCh =

22 mnmna

d t ++=π

3π

and t =

π

and t =

222

2

mnmn

mnCos

++

+=θ o30=θ o0=θ

2122

aadd g

mn

g

nm +−

+=T 21 aa −=T 21 2aa −=T

d

h

g

CT

3|== T| aT =

)2,2( mnnmgcdg d ++≡ ng d 3= ng d =

3aT =

d

h

ga

CN

2

22= nN 2= nN 2=

Note: The primitive basis vectors a1 and a2 are defined according to Eq. (1). cCNT

stands for chiral CNTs, aCNT for armchair nanotubes, and zCNT for zigzag nanotubes.

18

Table 2.2: Table of specific values for selected carbon nanotubes

Note: The bandgap (Eg) is computed from the tight-binding band structure of carbon

nanotubes which is discussed in § 2.4 and§ 2.6.

19

2.3 Carbon Nanotube Brillouin Zone

The electronic or band structure of carbon nanotubes is derived from the

Brillouin zone of graphene which is essentially the Fourier reciprocal of the direct

lattice. The folding of the direct lattice of graphene to form a nanotube manifests

electronically in that the band structure of CNTs are one-dimensional (1D) line-cuts of

the Brillouin zone of graphene. Figure 2.5a shows the Brillouin zone of a (3,3) CNT

overlaid on the Brillouin zone of graphene. The lines which represent the band

structure of the carbon nanotube are basically (1D) cuts of graphene’s reciprocal

lattice.

The Brillouin zone of carbon nanotubes is described by two important vectors

Ka and Kc. Ka is the reciprocal lattice vector along the nanotube axis, and Kc is along

the circumferential direction, both given in terms of the reciprocal lattice basis vectors

of graphene (b1, b2),

=

aa

ππ 2,

3

21b ,

−=

aa

ππ 2,

3

22b (9)

Employing the expressions for Ch, T, and N in Table 2.1, the wave vectors can be

algebraically derived.

)(1

21 bb nmN

−=aK (10)

)(1

2112 bb ttN

+−=cK (11)

The length of the reciprocal lattice wave vectors are inversely proportional to the CNT

lattice dimensions, i.e., |Ka| =2π/T, and |Kc| =2π/Ch. In the theory of CNTs, Ka is

considered to take on continuous values because it relates to the length of the CNT

which is ideally infinitely long. On the other hand, Kc exists as discrete quantities

because it reflects the physical (and quantum) confinement along the circumferential

direction.

20

a3

4π

x

y

Figure 2.5: Brillouin zone of a (3,3) armchair CNT (shaded rectangle).

The CNT Brillouin zone is overlaid on the reciprocal lattice of graphene. The numbers

refer to j=0,1,..,5 for a total of N=6 1D bands in the CNT Brillouin zone. j is a line or

subband index. The central hexagon is the first Brillouin zone of graphene, and the

high-symmetry points (Γ, M and K) of graphene’s Brillouin zone are also indicated. b)

The high-symmetry points of a line representing a CNT 1D band is illustrated.

21

It is customary to define a general wave vector (k) which describes the location

of any point on the discretized Brillouin zone of carbon nanotubes. This general

Brillouin zone wave vector is what will be used to compute the allowed energies in the

band structure of carbon nanotubes and is given by

<<−=+=

Tk

TNjj

Tk

ππ

π- and ,1,...,1,0 ,

/2 c

aK

Kk (12)

where k is a continuous wave vector that describes the continuous points along the

axial direction, and j is a discrete variable that indexes each line cut as shown in

Figure 2.5a. In summary, each value of j corresponds to a line or 1D band with wave

vectors (k) ranging from -π/T to +π/T. This is one of the most important properties of

the CNT Brillouin zone.

Additional results obtained from the study of the CNT Brillouin zone reveals

that 1/3 of all carbon nanotubes are metallic while the remaining 2/3 are

semiconducting. The metallic nanotubes include all armchair chiralities. This insight is

derived geometrically by investigating which nanotubes has lines that intersect the K-

point (or Fermi energy) of graphene. This can be formally stated mathematically by

requiring that the angle between jKc and ΓK vector be the chiral angle.

2222 3

)2(2||

2||

mnmna

mnCos

mnmna

jj

++

+=ΓΚ≡

++=

πθ

πc

K (13)

which is satisfied only when j=(2n+m)/3. This leads to the celebrated condition that a

carbon nanotube is metallic if (2n+m) or equivalently (n-m) is an integer multiple of 3

or zero,2 otherwise the CNT is semiconducting.

2.4 Tight-Binding Dispersion of Chiral CNTs

The band structure of carbon nanotubes can be determined from the nearest

neighbor tight-binding (NNTB) energy dispersion of graphene. This is sometimes

2 j=(2n+m)/3 is equivalent to j=((n-m)/3)+((n+2m)/3) which results in an integer value for j when n-m is a multiple of 3.

22

referred to as zone-folding because the energy bands of CNTs are line cuts or cross-

sections of the bands of graphene. It follows that the entire Brillouin zone of CNTs

can be folded into the first Brillouin zone of graphene. The zone-folding technique is a

powerful yet simple method to determine the electronic properties of carbon nanotubes

and the performance of CNT devices. However, the zone-folding and NNTB method

is limited as it does not account for several phenomena which are particularly

pronounced for small diameter (dt<1nm) nanotubes and high energy excitations. As

such, the NNTB band structure is primarily useful for CNTs with dt>1nm operating at

low energies,3 which fortunately covers the majority of electronic and sensor

applications of carbon nanotubes.

It is now timely to introduce the high symmetry points of CNTs to aid us in

discussing its band properties. High symmetry points are specific functions of

geometry. In the case of graphene, the Brillouin zone has an hexagonal geometry and

there are three points of symmetry: Γ, M and K (see Figure 2.5a). For carbon

nanotubes, the Brillouin zone is composed of N lines. By convention, the high

symmetry points of a line are the center and end of the line which are labeled Γ and X

respectively. It follows that each line will have a Γ-point and two X-points (see Figure

2.5b).

The band structure of carbon nanotubes can be computed by inserting the

allowed wave vectors into the energy dispersion relation for graphene. The tight-

binding energy (E) dispersion relation of graphene is:

)2

(cos4)2

cos()2

3cos(41)( 2

yyx ka

ka

ka

E ++±=± γk (14)

where the (+) and (-) signs refer to the conduction and valence bands respectively, and

γ ~3.1eV will be employed unless otherwise stated. k will now refer to the CNT

arbitrary Brillouin zone wave vector given by Eq. (12), and can be rewritten in terms

of its x and y components as ykxk yx ˆˆ +=k where

3 The phrase low energies refers to energies not far away from the Fermi energy.

23

3

333

2

)()(32

h

hx

C

mnkaCmnajk

−++=

π (15)

22

)(2)(3

h

hy

C

mnajCmnakk

−++=

π (16)

In general, for any (n,m) CNT, there will be N valence bands (E≤0) and N conduction

bands (E≥0). Figure 2.6 shows the band structures for (10,4) metallic and (10,5)

semiconducting chiral carbon nanotubes. The Fermi energy (EF) is by convention

defined to be 0eV. The semiconducting (10,5) CNT has a bandgap (Eg) ~0.86eV at the

Γ-point. We will show later in § 2.6 that the bandgap is inversely proportional to the

diameter, Eg ~0.9 (nm.eV)/dt, where dt is in nanometers.

In the subsequent sections, we will explore the band structure of the highly

symmetric achiral nanotubes to elucidate general properties of metallic and

semiconducting CNTs.

2.5 Band Structure of Armchair Nanotubes

The Brillouin zone wave vector (Eq. (12)) for armchair CNTs expressed in the

x and y coordinates is ykxanj ˆˆ)3/2( += πk . Substituting into Eq. (14) yields the

energy dispersion (Eac) for armchair nanotubes.

)- and ,12,...,1,0( ,)2

(cos4)2

cos()cos(41),( 2

ak

anj

kaka

n

jkjEac

πππγ <<−=++±= (17)

The band structure for an (8,8) armchair nanotube is shown in Figure 2.7, revealing an

energy degeneracy at ka=±2π/3, where the valence band touches the conduction band.

In general, the energy degeneracy at 0eV is common to all armchair CNTs and hence

armchair CNTs are metallic. Additionally, the lowest and highest energy subbands of

the valence and conduction bands are non-degenerate at arbitrary k-values with all

other subbands having a two-fold degeneracy. Noticeably, all the subbands have a

large degeneracy of 2n at the zone edge (ka=±π) corresponding to Eac=±γ.

24

Tπ

Tπ−

Tπ

Tπ−

-pi/T 0 pi/T

Figure 2.6: Band structures for a) (10,4) and b) (10,5) nanotubes within ±3eV.

The CNT diameters are 0.98nm and 1.04nm respectively. The metallic CNT shows a

band degeneracy at 0eV and k=±2π/3T. The semiconducting CNT has a bandgap of

~0.86eV.

25

-pi/T 0 pi/T-9

-6

-3

0

3

6

9

aπ−

aπ

Figure 2.7: Band structure for the (8,8) armchair nanotube.

The dispersion contains 16 1D subbands in the valence and conduction bands each.

For all armchair CNTs, the valence band touches the conduction band at ka=±2π/3

which explains their metallic properties. The thin lines are for the non-degenerate

subbands while the thick lines are for doubly degenerate subbands.

26

2.6 Band Structure of Zigzag Nanotubes and the

Derivation of the Bandgap

Zigzag carbon nanotubes are perhaps the most attractive type of nanotube to

explore because of the presence of either metallic or semiconducting behavior. They

also possess high symmetry leading to simple analytical expressions for many of the

solid state properties. The energy dispersion of zigzag CNTs can be obtained from the

Brillouin zone wave vector (Eq. (12)) which reduces to

yan

nkajx

an

nkaj ˆ2

32ˆ232 +

+−

=ππ

k (18)

Substituting into Eq. (14) yields the energy dispersion (Ezz) for zigzag nanotubes.

)33

- and ,12,...,1,0(,)(cos4)cos()2

3cos(41),( 2

ak

anj

n

j

n

jkakjE zz

ππππγ <<−=++±= (19)

The band structure for the metallic (12,0) and semiconducting (13,0) nanotubes are

shown in Figure 2.8. In general, when n is a multiple of 3, the zigzag CNT is metallic,

otherwise it is semiconducting. The lowest subbands have a two-fold degeneracy for

both metallic and semiconducting zigzag nanotubes.

In semiconductor theory, the bandgap (Eg) is of fundamental importance in

determining its solid state properties and also electronic transport in device

applications. The band index for the first subband (j1) for semiconducting zigzag

nanotubes is 2n/3 rounded to the nearest integer, which expressed mathematically is

31

32

32

round1 +≈

= n

nj (20)

where round(·) is a function that converts its argument to the nearest integer, and the

right-hand side expression is a linear approximation to the staircase-like round

function.

27

-pi/T 0 pi/T-9

6

3

0

3

6

9

Energy (eV)

a3π

a3π−

-9

-6

-3

0

3

6

9

Energy (eV)

a3π

a3π−

Figure 2.8: Band structures for a) (12,0) and b) (13,0) carbon nanotubes.

The (12,0) CNT is metallic while the (13,0) CNT is semiconducting due to the

bandgap at k=0. The thin lines indicate non-degenerate subbands while the thick lines

are for doubly degenerate subbands.

28

The linear approximation is actually exact for semiconducting zigzag nanotubes when

n-1 is an integer multiple of 3. Substituting the linear approximation for j into Eq. (19),

the bandgap for semiconducting zigzag CNTs is

++≈

nEg 33

2cos212

ππγ (21)

For relatively large n, π/3n is a small perturbation around 2π/3; therefore, a 1st-order

Taylor series expansion about 2π/3 in the cosine argument leads to

nn

nEg

32

3

2

3

22

πγ

πππγ =

−

+≈ (22)

The chiral index is related to the CNT diameter as shown in Table 2.1 for zCNT

thereby simplifying Eq. (22) to

t

ccg

d

aE −≈ γ2 (23)

which is the frequently employed bandgap-diameter relation for carbon nanotubes.

Numerically, Eg (eV)~0.9/dt(nm), a useful formula for quickly estimating a

nanotube’s bandgap in eV. Figure 2.9 demonstrates the accuracy of Eq. (23)

compared to exact NNTB bandgap computation. The figure includes the bandgaps of

all semiconducting carbon nanotubes with chiral indices ranging from (7,0) to (29,28).

Remarkably, even though Eq. (23) was derived for zigzag semiconducting

CNTs, it is equally accurate in estimating the bandgaps of arbitrary chiral nanotubes.

This case in point serves to illustrate the utility of the highly symmetric zigzag

nanotubes as an excellent vehicle for exploring the general properties of arbitrary

chiral nanotubes. It also illustrates that the bandgap of semiconducting nanotubes are

primarily dependent on the CNT diameter and not its specific chirality.

29

0.5 1 1.5 2 2.5 3 3.5 40.2

0.6

1

1.4

1.8

∝

Figure 2.9: The bandgap of semiconducting carbon nanotubes calculated using Eq.

(23) (solid line) compared to exact NNTB computation showing good agreement.

This plot includes all semiconducting CNTs with chiral indices ranging from (7,0) to

(29,28). The bandgap predictions for nanotubes with diameters<1nm should be

considered crude estimates only because the NNTB computation is inaccurate for sub-

nm CNTs due to curvature effects.

30

2.7 Conclusion

The physical and electronic structure of carbon nanotubes has been elucidated in

this chapter. Carbon nanotubes are classified based on the symmetry of its physical

structure resulting in armchair, zigzag, and chiral nanotubes, where the armchair and

zigzag types enjoy a higher symmetry than chiral nanotubes. The high symmetry of

achiral nanotubes is of practical convenience particularly for analysis and insight due

to the simple expressions for the energy dispersions. Fundamentally, carbon nanotubes

can be understood as a folding or wrapping of a graphene sheet. As such, both its

physical and electronic properties are derived from graphene. Invariably, a good

understanding of the physical and electronic structure of graphene is required in order

to fully appreciate the behavior of electrons in carbon nanotubes.

Electronically, carbon nanotubes can be either metallic or semiconducting, and

this diversity makes CNTs very attractive for a wide variety of applications including

interconnects, transistors, and sensors. The electronic structure of nanotubes has been

understood mostly from a relatively simple nearest-neighbor tight binding model

which has so far proved to be particularly useful in describing the low energy behavior

of charge carriers in nanotube devices with diameters greater than about 1nm. A key

property of the band structure is the horizontal and vertical mirror symmetry. The

vertical mirror symmetry also known as electron-hole symmetry holds within low

energy excitation. The analytical expression of the dispersion of electrons in

nanotubes is the foundation for much of the working theory of nanotube electronic

properties and device behavior.

31

3 Chapter 3

DEVICE PHYSICS

3.1 Preface

The device physics of a material is essential in elucidating the properties of the

material and assessing its potential for a variety of applications. Carbon nanotubes

(CNTs) been quasi one-dimensional materials represents a different paradigm than

bulk solids including a diameter dependent bandgap, weak electron-phonon coupling

leading to ballistic transport over relatively long lengths (mean free path~1um), and

high-current density. The relatively long mean free path makes metallic nanotubes

ideally attractive as interconnects in integrated circuits, while the ballistic transport

and high-current density suggests that semiconducting nanotubes will offer superior

transistor performance compared to silicon field-effect transistors (FETs).

Our objective was to study the fundamental solid-state physics of CNTs

starting from the density of states and derive expressions for many of the important

electronic properties ultimately leading to the development of an analytical theory for

ballistic transport in carbon nanotube FETs. Such an analytical ballistic theory is of

the utmost importance if carbon nanotube FETs are to become ubiquitous in future

integrated circuits because it enables compact/spice modeling, and the routine design

of circuits which are basic parts of the ecosystem of any semiconductor technology.

All the work was conceived and performed by the author with Jiale Liang

collaborating on the surface potential calculations in §3.3.3, and Soogine Chong

simulating the ITRS CMOS data used in Figure 3.14.

32

3.2 An Analytic Derivation of the Density of States,

Effective Mass and Carrier Density for Achiral

Carbon Nanotubes

(Reproduced with permission from D. Akinwande, Y. Nishi, and H.-S. P. Wong, “An Analytic

Derivation of the Density of States, Effective Mass and Carrier Density for Achiral Carbon Nanotubes”,

IEEE Trans. Elect. Devices, vol. 55, 2008)

Deji Akinwande, Yoshio Nishi, and H.-S. Philip Wong

CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF ELECTRICAL

ENGINEERING

STANFORD UNIVERSITY, STANFORD, CA, 94305, USA

Abstract: An analytical electron density of states for zigzag and armchair single-wall

carbon nanotubes are derived in this paper. The derivation originates from the tight-

binding energy dispersion relation for carbon nanotubes and reveals the essential

physics such as periodic van Hove singularities and its dependence on chirality. The

density of states derivation is exact and contains no additional approximations or

assumptions except those inherent in the nearest neighbor tight-binding model. In

addition, we derive analytical expressions for the group velocity, effective mass and

non-degenerate equilibrium carrier density.

3.2.1 Introduction

The electron density of states (DOS) of a crystalline solid is fundamental to

describing the electrical, optical, thermal, and mechanical properties of the solid [1].

Carbon nanotubes (CNTs) are one of the most exciting quasi one-dimensional (1D)

solids that exhibit fascinating electrical, optical and mechanical properties such as

33

high current density, large mechanical stiffness, and field emission characteristics [2-

4].

The DOS needed to explore the many properties of CNTs are currently

typically determined theoretically using one of two techniques. One technique

numerically computes the DOS from the tight-binding energy dispersion relation [2, 5],

and the other uses the approximate analytical (so-called) universal DOS [6]. The

former technique is necessary for quantitative accuracy especially since no equivalent

analytical DOS expression has been reported in the literature and moreover, the tight-

binding model is scaleable to include more neighbors. The latter scales out the

chirality dependence and is reportedly useful for estimates within 1eV of the Fermi

energy for any CNT [6]. Other approximate DOS equations that are functionally

correct have been previously published and provide good qualitative insight on the

CNT DOS dependency on energy [7, 8].

In this letter, we derive an exact analytical DOS for achiral CNTs from the

nearest neighbor tight-binding (NNTB) energy dispersion. The analytical DOS

explicitly reveals the essential physics such as van-Hove singularities (vHs), its

periodicity with respect to band index, and its dependence on chirality. In addition, the

results derived in this letter for achiral semiconducting and metallic CNTs are

generally applicable to the chiral equivalent of the same type with similar diameters

for energies within the vicinity of the Fermi energy. This similarity in the DOS and

electrical properties between achiral and chiral CNTs of similar diameter has been

observed experimentally and in numerical studies [6, 9-11]. Therefore, the analytical

DOS derived in this letter is useful for gaining insight into the device physics without

resorting to numerical calculations as we show (for example) in the subsequent

derivation of the effective mass and carrier density.

Furthermore, the analytical carrier density will find widespread use in

determining basic transport in CNT devices operating in equilibrium or quasi-

equilibrium without having to perform extensive time consuming numerical

simulations. It can also be utilized in the development of fast compact models for

circuit simulation.

34

3.2.2 Density of States

In this section, we derive the DOS of zigzag and armchair carbon nanotubes

and related properties. The 1D NNTB energy dispersion relation for zigzag (n,0) and

armchair (n,n) CNTs with band index q are respectively [2, 5],

n

q

n

qaKqKE ozz

ππγ 2cos4cos

2

3cos41),( ++±= (1)

2cos4cos

2cos41),( 2 aK

n

qaKqKE oac ++±=

πγ (2)

where q is an integer that ranges from 1 to 2n. γo is the nearest neighbor overlap

energy nominally between 2.5 and 3.2 eV, K is the reciprocal lattice wavevector, and a

is the graphene Bravais lattice constant (~2.46Å). The negative and positive prefix are

the band structures for the π (valence) and π* (conduction) bands respectively. The

intrinsic Fermi energy is 0 eV.

The simple NNTB energy dispersions do not include the effects of nanotube

curvature which has been computed to be significant for small CNTs with sub-1nm

diameters [12]. Additionally, the overlap parameter (s in [2]) which reportedly has a

near zero value has been set to zero in [2, 5] for simplicity to arrive at (1) and (2). As a

result of the simplifications intrinsic to the NNTB model, its primary use is for

accurately predicting the lowest sub-bands of CNTs with diameters greater than 1nm

which covers most electronic and semiconductor applications.

A. Zigzag Carbon Nanotubes

For clarity, we shall first derive the DOS for zigzag tubes. We consider an

infinitely long CNT for analytical simplicity. Moreover, published calculations

suggest little departure in the electronic structure for CNTs as short as sub-10 nm [13-

15]. For an infinitely long CNT, the DOS (normalized per unit length) can be

expressed as

35

∑=

=n

q

qEgEDOS2

1

),()( (3a)

where E

K

K

EqEg

∂

∂=

∂

∂=

−

ππ

11),(

1

(3b)

We solve the right hand equation directly because ∂K/∂E leaves an expression which

is a function of E. The wavevector for a zigzag CNT is

−−±= − )

2cos(23)sec(

41

cos3

2),(

2

21

n

qE

n

q

aqEK

o

zz

π

γ

π (4)

Differentiating with respect to energy, computing (3b) and organizing the resulting

denominator, the qth DOS restricted to the irreducible Brillouin zone (BZ) (half of the

first BZ) is,

))((

||

3

4),(

222

21

2 EEEE

E

aqEg

vhvh

zz

−−=

π

α (5)

for Ecb ≤ E ≤ Ect for the conduction band, and Evb ≤ E ≤ Evt for the valence band. Ecb

and Ect are the bottom and top of the conduction band respectively, and Evb and Evt are

the bottom and top of the valence band respectively. The zone degeneracy (α)

accounts for the contribution from the other half of the first BZ. Specifically, α=1 if

E=energy at BZ center (Γ point in the CNT reciprocal space), and α=2 otherwise. Evh1

and Evh2 are the zigzag vHs energies which define the energy space where the DOS is

finite and real.

|)cos(21|1

+±=

n

qE ovh

πγ (6a)

|)cos(21|2

−±=

n

qE ovh

πγ (6b)

The energies of the vHs are chirality dependent and periodic with period 2n

which is expected since there are identically 2n 1D bands in the CNT BZ. Evh1 is

located at the Γ point, and Evh2 is located in the second BZ. Several workers have

previously examined the properties of the vHs and their dependence on diameter and

chirality indirectly through computation [16, 17]; in (6), we show their explicit

36

analytical dependence. These two singularities generally reflect the two

minima/maxima present in a periodic sinusoid. In the case of a CNT, it is the quasi-

sinusoidal energy dispersion that leads to the vHs.

In order to deduce an equation for the bottom and top of the bands, another

energy definition is required.

)(cos41 2

n

qE oXBZ

πγ +±= (7)

EXBZ is the energy at the boundary of the first BZ (X point in the CNT reciprocal

space). This is calculated by setting K=π/a√3 in (1). For clarity, an illustrative graph of

a CNT bandstructure is shown in Figure 3.1, indicating the Γ and X points. Depending

on the sub-band, the bottom or top of the band are either at the Γ point or the X point.

Therefore,

vtXBZvhcb EEEE −== ),min( 1 (8a)

vbXBZvhct EEEE −== ),max( 1 (8a)

where min and max are the minimum and maximum of their arguments respectively.

The total number of states between E and E+dE is the definite integral of (3a)

dEE

E

n

qvhvh

vhvhzz

EEEE

EEE

adEEDOS

+

=

−∑

−−

−−= |

))((2

2tan

3

2)(

2

1 222

21

2

22

21

21

π

α (9)

37

-4

-3

-2

-1

0

1

2

3

4

E (

eV

)

Figure 3.1: An illustrative energy bandstructure of a semiconducting CNT.

Shown in the irreducible Brillouin zone (half of the 1st BZ) indicating the important

symmetry points, Γ and X. In this case, the bandstructure is for a (19,0) CNT and only

the first two sub-bands in the conduction, and valence bands are shown for clarity.

Γ X K (wavevector)

38

For metallic zigzag CNTs (n is a multiple of 3), the bands degenerate with the Fermi

energy are dispersionless and one Fermi band index is qF=2n/3 (located at K=0), with

a four-fold energy degeneracy. Therefore, the DOS at the Fermi energy for all metallic

zigzag CNTs is

119102~3

8)( −−= eVmx

aEDOS

o

Fzzπγ

(10)

which corroborates the result reported by Saito et. al. [2].

B. Some Properties of Zigzag DOS

It is worthwhile to examine some important features of the DOS analytically,

in order to gain intuition and understanding of the electro-physical properties of

carbon nanotubes. We derive three important results including the energy difference

between the first and second sub-bands, the energy bandwidth between the top and

bottom of the band for the first sub-band, and the dependence of the bandgap on the

diameter of the nanotube. The derivation focuses exclusively on the conduction band;

however, the results apply equally to the valence band due to electron-hole symmetry

[18].

First we re-derive the widely known relationship between the bandgap and

diameter for semiconducting zigzag CNTs directly from the DOS (a derivation based

on Taylor series expansion of the dispersion has been previously reported in [7]). An

expression for the minimum or first band index (q1) is,

3

1

3

2

3

21 +≈

= n

nroundq (11)

where round is a function that converts its argument to the nearest integer, and the

right hand expression in (11) is a linear approximation to the staircase round function.

The linear approximation is actually exact at some points because such points are

periodically coincident with the staircase round function. For reference, the exact

NNTB bandgap from (6a) is shown in (12a), and a first approximation of the bandgap

(Eg) obtained by substituting (11) for q in (12a) is shown in (12b).

|)cos(21|2

+=

n

qE og

πγ (12a)

39

|)33

2cos(212|

++≈

nE og

ππγ (12b)

For relatively large n, π/3n is a small perturbation around 2π/3; therefore a first-order

Taylor series expansion of (12) centered at 2π/3 in the cosine argument is sufficiently

accurate. As a result,

t

ccooog

d

a

nn

nE γ

πγ

πππγ 2

32

3

2

3

22 ==

−

+≈ (13)

where the relation dt = accn√3/π has been employed, and acc is the CNT carbon-carbon

length (~1.42Å).

Secondly, we derive the energy difference between the bottoms of the first and

second sub-bands. This energy difference is of value in later sections when

considering the number of sub-bands that contribute to carrier density and electrical

transport in CNTs. The bottom of the second sub-band (Ecb(q2)) is

|)cos(21|)()( 2212

+==

n

qqEqE ovhcb

πγ (14)

Using (11), q2 ~ q1-1=2n/3-1, and performing a Taylor series expansion of (14) similar

to that for (12b), the second sub-band can be simplified to

gocb En

qE =≈3

2)( 2π

γ (15)

Therefore, the energy difference (E∆12) is

2)()( 1212

g

cbcb

EqEqEE =−=∆ (16)

And lastly, we derive the relationship between the top and bottom of the conduction

band which we term the BZ energy bandwidth (EBZB). This energy bandwidth will

prove to be important in later calculations for the carrier density.

)()()( 111 qEqEqE cbctBZB −= (17)

By means of (6a) and (7) for the bottom and top respectively, and (11) for q1, and a

similar Taylor series expansion as discussed above, the BZ bandwidth is simplified to:

40

oooBZBnn

qE γγππ

γ 4.12632

12)( 1 =≈

−+≈ (18)

which is a good approximation for n as small as 13 (diameter ~1nm).

C. Armchair Carbon Nanotubes

Following the same procedure as the zigzag carbon nanotube, the DOS from

the qth sub-band for an armchair CNT restricted to the irreducible BZ is,

+−−

−−−

=

22

12

12

122

12 )()()(

||4),(

cvhcvhvh

ac

AEEAEEEE

E

aqEg

π

α (19)

for Ecb ≤ E ≤ Ect for the conduction band, and Evb ≤ E ≤ Evt for the valence band. Evh1

is an armchair vHs, and Ac1 and Ac2 are armchair energy parameters.

|sin|1n

qE ovh

πγ±= (20a)

−±= )cos(452

n

qE ovh

πγ (20b)

+−= )cos(21

n

qA oc

πγ (20b)

+= )cos(22

n

qA oc

πγ (20c)

where Evh2 is another armchair vHs that is not explicit in the (19). It is necessary to

calculate the energy at the BZ boundaries to determine the bottom and top of the bands.

The Γ point energy is computed by setting K=0 in (2), and the X point energy by

setting K=π/a.

+±=Γ )cos(45

n

qE oBZ

πγ (21a)

oXBZE γ±= (21b)

41

For armchair CNTs the bottom of the conduction band could be either within the BZ

or at the X point depending on the band index q, and the top of the band is the

maximum between the Γ and X points.

vbBZoct EEE −== Γ ),max(γ (22a)

vtvhcb EEE −== 1 n-floor(n/2)≤q≤n+floor(n/2) (22b)

vtocb EE −== γ n-floor(n/2)>q>n+floor(n/2) (22c)

where floor rounds its argument to the lowest integer.

There are a total of three vHs for armchair CNTs (equations (20a, 20b, 21a),

which are the poles of (19)). Evh1 oscillates between ±γo and can be considered the low

energy armchair singularities. The absolute value of the other two van Hove energies

are always ≥ γo and can be thought of as high energy singularities. The specific

functional form of the van Hove energies for armchair CNTs are different from that of

zigzag CNTs and it maybe possible to exploit this difference to uniquely determine the

chirality of carbon nanotubes from experimental DOS measurements or other

properties that reflect the DOS such as quantum capacitance [18]. However, the

perfect periodicity of the vHs (assumed in this paper) is noticeably broken at high

energies where the NNTB model is least accurate [5, 17].

Since all armchair CNTs are metallic (even with curvature effects included [2]),

the DOS at the Fermi energy is of great significance. One Fermi band index is qF=n

(located at K=±2π/3a), with a two-fold energy degeneracy. The calculated armchair

Fermi DOS is identical to the metallic zigzag DOS (10), further confirming the

general conclusion that all metallic CNTs have the same Fermi DOS.

3.2.3 Group Velocity and Effective mass

The electron group velocity is

),(

1|),(|

1

qEgE

KqEv

π

α

hh=

∂

∂=

−

(23)

42

where ћ is the reduced Plank’s constant. The DOS should be replaced with gzz or gac

for zigzag or armchair CNTs respectively. α is necessary in the numerator of (23) to

normalize for the zone degeneracy. Using (10) and normalizing for the sub-band

degeneracy, the Fermi velocity for a zigzag metallic CNT is ~9.6x105 m/s [19].

Similarly, armchair CNTs have the same Fermi velocity as above due to the

underlying symmetry of graphene’s Fermi pockets.

The electron (or hole) effective mass is a widely used concept in

semiconductor physics and have been shown to be useful for modeling and studying

the low energy electrical transport in CNTs [20, 21]. Instead of the standard formula

m*=ћ2/(∂2E/∂K2) which is a function of K, we derive it explicitly as a function of

energy and reuse the results above for the DOS. Equating the particle force to the

wave force, the effective mass (m*) is

11

),(*−

∂

∂

∂

∂

∂

∂=

∂

∂

∂

∂=

∂

∂=

K

E

EE

K

v

E

E

K

v

KqEm

gg hhhh (24)

where vg is the group velocity taken from the first part of (23). Substituting the DOS

for the energy gradients, a general equation for m* for a 1D band is

122

),(1

),(),(*

−

∂

∂=

qEgEqEgqEm πh (25)

Plugging in (5) and performing the necessary differentiation and simplifications

including normalizing for the zone degeneracy, the zigzag CNT m* is

( )422

21

3

2

2

3

16),(*

EEE

E

aqEm

vhvh −=

h (26)

which is generally not constant. Of great interest is the effective mass for the first sub-

band where Evh2≈Evh1+2γo and Evh1=Eg/2 for the conduction band. The resulting

effective mass for the lowest sub-band is

( )422

3

2

2

116)4(3

256),(*

EEE

E

aqEm

ogg −+=

γ

h (27)

where E≥Ecb=Eg/2. At the band minimum (E=Ecb), m* simplifies to

43

( )go

g

o

cbE

E

aqEm

+=

γγ 23

4),(*

2

2

1h (28)

For the 1.5nm (19,0) CNT which has been considered to be optimum for transport [4,

22], m*=0.053mo (γo=2.7eV, Eg~0.51eV, mo is rest mass) which is in good agreement

to an estimate of 0.058mo derived from a parabolic approximation to the (19,0) energy

dispersion [20]. A plot of the effective mass for several zigzag CNTs are shown in

Figure 3.2.

3.2.4 Carrier Density

The carrier density is an important thermodynamic concept useful for

determining the equilibrium and quasi-equilibrium properties such as electrostatics

and transport in semiconductors [23]. We derive the equilibrium electron carrier

density for semiconducting zigzag carbon nanotubes directly from the density of states

and Fermi-Dirac distribution. Due to symmetry of the band-structure, the hole carrier

density will be identical to electron carrier density. Subsequently, we quantify the

accuracy of the analytical equations with comparison to numerical results.

A. Carrier Density Calculation

The electron carrier density (n) per sub-band is the total number of occupied

states in the sub-band

∫=

top

bot

E

E

zz dEqEgEFDqn ),()()( (29)

where Etop and Ebot are the top and bottom of the sub-band respectively. For the lowest

sub-bands Etop and Ebot are equal to EXBZ and Evh1 respectively (we show later, that only

the lowest sub-bands contribute to carrier density). FD(E) is the Fermi-Dirac

distribution

kT

EE F

e

EFD−

+

=

1

1)( (30)

and EF is the Fermi energy, k is Boltzmann’s constant and T is the temperature.

44

0 0.05 0.1 0.15 0.2 0.25 0.30

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Effe

ctiv

e m

ass (

m*/

mo)

Energy (eV)

d=2nm

d=1.5nm

d=1nm

Figure 3.2: The effective mass of the first conduction band.

Plotted for 1nm (13,0), 1.5nm (19,0), and 2nm (25,0) carbon nanotubes. γo=2.7eV.

The energies have been normalized such that the band minimum is at 0eV.

45

To our best knowledge, (29) does not have an exact analytical solution. However,

under certain assumptions and approximations, an analytical solution is accessible. We

first make two approximations to simplify the integral.

1. The top of the band (Ect) is much greater than the bottom of the band (Ecb), and

due to the rapidly decaying Fermi tail, there is negligible error taking the upper

limit of the integral to infinity. This approximation is justified by inspection of

(18).

2. Using similar reason as above, the rapidly decaying Fermi tail implies that only

states with energies close to the band bottom contribute to the carrier density,

as a result, the relevant energies can be considered much smaller than the top

of the band. Mathematically speaking, Evh22-E2≈ Evh2

2 in (5) for gzz.

A graphical illustration of the DOS and FD distribution are shown in Figure 3.3. These

approximations simplify the carrier density integral to:

∫∫∞

−

∞

−−+

=−

+

=1 2

2

1

12

12

2 )1(1

1

3

4

)(1

1

3

4)( dt

t

t

eEa

EdE

EE

E

eEa

qnFzzt

vh

vh

vhEvhkT

FEEvh π

α

π

α (31)

where we have made some substitutions for simplicity (t=E/Evh1, z=Evh1/kT, zF=EF/kT).

However, this simplified integral does not have a closed form analytical

solution. Consequently, we make the so called non-degenerate assumption which

states that the Fermi energy is 3kT below the band bottom (EF ≤ Ecb-3kT), therefore the

Fermi-Dirac can be approximated by a Maxwell-Boltzmann distribution [23]. The

resulting integral equation

∫∞

−

−=

12

2

1

)1(3

4)( dt

t

tee

Ea

Eqn ztkT

E

vh

vhF

π

α (32)

has an integrand that has the form of a modified Bessel function of the 2nd kind. This

function is illustrated in Figure 3.3c. The integral has a solution (available in standard

mathematical handbooks [24])

)(3

4)( 1

12

1

kT

EKe

Ea

Eqn vhkT

E

vh

vhF

π

α= (33)

46

where K1(z) is the modified Bessel function of the 2nd kind of order one. K1(z) does

not have a closed form solution; however K1/2(z) and K3/2(z) (orders ½ and ³/2

respectively) have closed form solutions. A closed form approximation for K1(z) can

be obtained by taking the average of K1/2(z) and K3/2(z).

zez

zK −=2

)(2/1π (34a)

zezz

zK −+= )1(2

)(32/3

π (34b)

zez

z

zKzKzK −+

=+

≈2

)21(

22

)()()(

32/32/1

1π (34c)

Therefore, the carrier density for the qth sub-band is

kT

EE

vhvh

vhvhF

eE

kT

aE

kTEqn

1

12

1

322

)(−

+=

πα (35)

and the total electron carrier density (n) is a summation over all sub-bands. However,

because the 1D sub-bands are discretely spaced and the tail of the Fermi-Dirac

distribution is exponentially decaying, only the first sub-band contributes appreciably

to the total electron carrier density for the non-degenerate case [25]. A quantitative

justification for the one band approximation is presented in Appendix A. As a result,

the total electron carrier density is approximately the first sub-band contribution times

the band degeneracy which is two for zigzag CNTs.

kT

EE

c

vhF

eNqnn

1

2)(2 1

−

=≈ (36a)

12

1

322

vhvh

vhc

E

kT

aE

kTEN

πα

+= (36b)

where Nc is the effective density of states for the conduction band.

47

Energ

y

DOS (arb. units) 0 0.5 1

Fermi-Dirac (FD)

DOS*FD (arb. units)

Figure 3.3: Illustrative plot of the DOS and Fermi-Dirac distribution at equilibrium.

(a) Conduction and Valence band DOS. (b) FD for electrons (solid) and holes (dashed).

(c) DOS multiplied by the FD (has the form of a modified Bessel function of the 2nd

kind) showing that essentially only the first sub-band contributes to carrier density.

48

Eqn. (36) can be further simplified by substituting Evh2≈Evh1+2γo and Evh1=Eg/2.

kT

EE

c

gF

eNn 2

2

2−

= (37a)

gog

g

cE

kT

E

kTE

aN

πγα

344

+

+= (37b)

The intrinsic electron carrier density (EF=0) is

kT

E

ci

g

eNn 22−

= (38)

Finally, the electron carrier density can be expressed in terms of the intrinsic carrier

density.

kT

E

i

F

enn = (39)

Likewise, the hole carrier density (p) can be expressed as

kT

E

i

F

enp

−

= (40)

Equations (36)-(40) have essentially the same form as for 3D bulk

semiconductors [23]. Interestingly, the form of the carrier density and its dependence

on bandgap, temperature, and Fermi energy can be deduced simply by dimensional

scaling of the 3D bulk carrier density, specifically by scaling the effective density of

states (also known as the partition function in statistical mechanics [26]) from 3D to

1D as we show in Appendix B.

B. Accuracy of Analytical Carrier Density

The accuracy of the analytical non-degenerate carrier density calculation

compared to numeric nearest neighbor tight-binding simulations shows good

agreement as plotted in Figure 3.4 and Figure 3.5. Specifically, the comparison is

documented as the temperature, Fermi energy, and diameter vary over their practical

values. For the intrinsic case, the |error| is less than 0.6% using (33), and less than

5.5% using (36) for diameters within 1nm to 3nm. The error grows slightly to a

maximum of ~3.5% when the Fermi level is 3kT below the conduction band.

49

150 200 250 300 350 400 450 500

10-4

10-2

100

102

104

106

Intr

insic

Ca

rrie

r D

en

sity

(n i)

[1/c

m]

T (K)

d=1nm

d=1.5nm

d=2nm

d=3nm

Figure 3.4: The semiconducting zigzag CNT intrinsic carrier density.

Calculated using (33) with subband degeneracy of two. Compared with NNTB

simulations, the maximum |error| <0.6% for temperatures from 100°C to 500°C. Using

(36) instead of (33), the maximum error is 1.3% for d=1nm, 2.3% for d=1.5nm, 3.7%

for d=2nm, and 5.2% for d=3nm. The additional small error results from

approximating the modified Bessel function.

50

2 3 4 5 6 7 8

103

104

105

Ca

rrie

r D

en

sity (

n)

[1/c

m]

(Ecb

-EF)/kT

d=1nm

d=1.5nm

d=2nm

d=3nm

2 3 4 5 6 7 8

0

1

2

3

4

5

6

7

8

9

err

or

(%)

(Ecb

-EF)/kT

d=1nm

d=1.5nm

d=2nm

d=3nm

Figure 3.5: The semiconducting zigzag CNT carrier density.

Calculated using (33) versus the Fermi Level (top graph) at room temperature. The

bottom graph shows the error compared with the NNTB simulations. Within the non-

degenerate range (Ecb-EF>3kT), the maximum error is <3.5%. Using (36) in place of

(33), the maximum error is <6% for Ecb-EF>3kT.

51

A question of interest is: what is the intrinsic carrier density of CNTs

compared to bulk semiconductors? If the carrier densities of Figure 3.4 are normalized

to the nanotube cylindrical volume, a ~1.5nm zigzag CNT (bandgap is approximately

half of silicon) at room temperature has ni~7x1015/cm3, which is 5 orders of magnitude

larger than silicon, and two orders larger than germanium. However, the range of

which the carrier density of CNTs can be varied in practice is not well understood at

the moment and requires further research.

3.2.5 Conclusion

In conclusion we have derived an analytical density of states for achiral carbon

nanotubes based on the tight-binding dispersion. The DOS results for semiconducting

zigzag CNTs is applicable to semiconducting chiral CNTs with similar diameters at

least in the vicinity of the Fermi level. The same extension holds between the achiral

and chiral metallic CNTs. Furthermore, the analytical DOS offers insight into the

behavior of CNTs and will promote better compact modeling of CNT devices with

faster simulations at the circuit level compared to numerical tight-binding or first

principle schemes.

Additionally, the effective mass and equilibrium carrier densities were derived

from the DOS. This will enable an accurate analytical description of transport and

electrostatics in non-degenerate CNT devices and will conceivably be the starting

point of hand analysis and design of CNT circuits.

Acknowledgement

The authors would like to thank James Fodor and Professor Jing Guo for useful

suggestions. This work is supported in part by the Focus Center Research Program

(FENA and C2S2). Additional support from the Ford foundation and the Alfred P.

Sloan foundation are much appreciated by one of the authors (D.A).

Appendix A

JUSTIFICATION FOR ONE-BAND APPROXIMATION

52

The relative contribution of the second sub-band to the non-degenerate carrier

density is discussed in this appendix. For example, consider the second sub-band

electron carrier density normalized to the first sub-band,

kT

qEE

kT

qEE

c

c

vhF

vhF

e

e

qN

qN

qn

qn)(

)(

1

2

1

2

11

21

)(

)(

)(

)(−

−

= (A.1)

From (36b) the ratio of the effective density of states is

)(

)(

)(

)(

)(2

)(2

)(

)(

21

11

22

12

11

21

1

2

qE

qE

qE

qE

kTqE

kTqE

qN

qN

vh

vh

vh

vh

vh

vh

c

c

+

+= (A.2)

Substituting for the van-Hove energies following the technique developed in part B of

§3.2.2, Evh2(q)≈Evh1(q)+2γo, Evh1(q2)≈2Evh1(q1), and Evh1=Eg/2, the ratio simplifies to

)2(

)4(

)(22

)2(

)(

)(

1

2

og

og

g

g

c

c

E

E

kTE

kTE

qN

qN

γ

γ

+

+

+

+= (A.3)

Further approximations such as Eg<<2γo (for diameters down to ~1nm), and kT<< Eg

(for temperatures up to air breakdown temperature ~600C [27, 28], and diameters up

to 3nm) reduces the ratio to a constant.

2)(

)(

1

2 ≈qN

qN

c

c (A.4)

The key observation is that the effective DOS are approximately equal and certainly

within the same order of magnitude. The Fermi energy cancels out in the exponential

ratio and making the necessary simplifications, the relative contribution of the second

sub-band is,

kT

Eg

eqn

qn 2

1

2 2)(

)(−

≈ (A.5)

Quantitatively, this implies that for temperatures up to 500°C and diameters up

to 3nm (Eg~0.26eV), the second sub-band contribution is about an order of magnitude

less than the first sub-band carrier density (~0.07 smaller). For more practical

semiconducting CNTs with diameters of ~1.5nm operating at room temperature, the

second sub-band contribution is about four orders of magnitude less. Higher sub-band

53

carrier density contribution will be even much less than the second sub-band,

consequently, they can be ignored for non-degenerate carbon nanotubes.

Appendix B

THERMODYNAMIC DERIVATION OF CNT CARRIER DENSITY

Dimensional scaling of the carrier density of 3D bulk semiconductors of the

zinc blende lattice can reproduce the functional form of the carrier density for a

semiconducting 1D solid such as carbon nanotubes. Consider the non-degenerate

electron carrier density for a general 3D bulk semiconductor such as silicon.

kT

EE

DcD

cF

eNn

−

= 3,3 (B.1)

2/32/333

2/3

23

3, )()(2

2 kTmAh

kTmN DD

DDc =

=

π (B.2)

where Nc,3D is the electron effective density of states for the 3D semiconductor, m3D is

the effective mass, and A3D is a general constant of no specific importance in this

discussion.

In statistical mechanics, the effective density of states is a type of partition

function, an important quantity that encodes the statistical properties of a system in

thermodynamic equilibrium [26]. The relevant properties it encodes in the context of

carrier density are the bandstructure (vis-à-vis the effective mass) and temperature.

The power of three in (B.2) comes from the three dimensions of space in bulk

materials. For 1D materials the power of three reduces to one.

2/12/111, )()( kTmN DDc ∝ (B.3)

Equation (25) can be substituted for the effective mass for semiconducting CNTs.

( ) o

g

go

g

D

E

E

Em

γγ 221 ∝+

∝ (B.4)

where Eg is assumed to be much less than 2γo, a valid approximation for CNTs with

diameters down to ~1nm (Eg~0.7eV). The 1D effective density of states can now be

expressed as,

54

kTEAN gDDc 11, = (B.5)

A1D is a constant appropriate for 1D semiconductors.

The exponential term in n3D contains no dimensional information and

accordingly, carries over to the 1D case. Finally, the thermodynamically scaled 1D

non-degenerate electron carrier density is,

kT

EE

DckT

EE

DcD

vhFcF

eNeNn

1

1,1,1

−−

== (B.6)

Comparison with the derived quantities in §3.2.4 ((36) repeated here for

clarity)

12

1

12

1

322

322

vhvh

vh

vhvh

vhc

E

kT

aE

E

E

kT

aE

kTEN

π

α

πα ≈

+= (B.7)

Substituting Evh2≈Evh1+2γo and Evh1=Eg/2, and realizing that practical bandgaps are

much smaller than 4γo, the preceding equation simplifies to

kTEAkTE

EaN g

g

og

c ≈+

=πγ

α

3)4(4 (B.8a)

kT

EE

c

vhF

eNn

1

2−

= (B.8b)

where A is a constant.

We conclude that the derived quantities (B.8) are functionally identical to the

thermodynamically scaled quantities.

55

3.3 Analytical Ballistic Theory of Carbon Nanotube

Transistors: Experimental Validation, Device Physics,

Parameter Extraction, and Performance Projection

(Reproduced with permission from D. Akinwande, J. Liang, S. Chong, Y. Nishi, and H.-S. P. Wong,

“Analytical Ballistic Theory of Carbon Nanotube Transistors: Experimental Validation, Device Physics,

Parameter Extraction, and Performance Projection”, Journal of Applied Physics, vol. 104, 2008)

Deji Akinwande, Jiale Liang, Soogine Chong, Yoshio Nishi, and H.-S. Philip Wong

CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF ELECTRICAL

ENGINEERING

STANFORD UNIVERSITY, STANFORD, CA, 94305, USA

Abstract: We have developed a fully analytical ballistic theory of carbon nanotube

field effect transistors enabled by the development of an analytical surface potential

capturing the temperature dependence and gate and quantum capacitance

electrostatics. The analytical ballistic theory is compared to the experimental results

of a ballistic transistor with good agreement. The validated analytical theory enables

intuitive circuit design, provides techniques for parameter extraction of the bandgap

and surface potential, and elucidates on the device physics of drain optical phonon

scattering and its role in reducing the linear conductance and intrinsic gain of the

transistor. Furthermore, a threshold voltage definition is proposed reflecting the

bandgap-diameter dependence. Projections for key analog and digital performance

are discussed.

56

3.3.1 Introduction

Carbon nanotubes (CNTs) are fascinating tubular cylindrical arrangement of

carbon atoms with diameters (dCNT) on the order of 1 to 5nm [29]. These quasi one-

dimensional solids are being actively explored for a variety of applications including

interconnects [30, 31] and transistors for electronics, optics, and sensors, [32-34]

either on monolithic substrates or integrated with conventional silicon technology for

hybrid applications [35-37]. In order to obtain maximum electrical performance for

large scale integration, ballistic carbon nanotube field effect transistors (CNFETs)

shorter than the mean free path (mfp) of acoustic phonons (~0.5um) are currently the

most attractive semiconducting nano-devices [21, 25, 33]. Much of the progress in

widely advancing a semiconductor depends on the ability to routinely predict its

performance accurately and rapidly. Furthermore, an analytical theory is required in

order to design circuits intuitively by examining key physical parameters that

determine performance. Up till now, this has been challenging for CNFETs since the

accurate models are numerical requiring a self-consistent quantum mechanical

formalism that is usually time consuming [7]. For example, the device simulation data

provided by [33] (shown in Fig. 5a) required ~7.5hours on a 3GHz computer, while

the computing time for typical analytical models are below one second. Previously

reported CNFET analytical ballistic theories were not fully analytical because an

iterative numerical scheme was required to solve for the surface or chemical potential

[21, 38-40].

In this article, we develop a fully analytical ballistic theory (ABT) for the

current-voltage (I-V) of CNFETs enabled by an analytical surface potential (φs), which

captures the essential dependence on temperature, and oxide and quantum

capacitances. The analytical ballistic theory is compared to experimental data [33]

with remarkably strong agreement, and leads to clear insights and device physics such

as: 1) a simple electrical method to extract the CNT bandgap (Eg), 2) elucidation of the

role of drain optical phonon scattering (DOPS) in reducing the CNFET conductance in

the linear region. Further studies of the validated ABT leads to a series of results

including a proposed threshold voltage (VT) definition for an intrinsic CNFET that is

57

not based on carrier inversion, showing a simple ~1/dCNT relation, and the derivation

of a set of analytical analog and digital performance metrics. This work is a significant

advancement over prior CNT ABT models [21, 38-41] due to the fully analytical

surface potential, the introduced concept of DOPs, the derivation of a set of analytical

analog and digital performance metrics, and the demonstrated experimental

validation. The ABT results developed in this article applies to all ballistic CNFETs

and enables compact modeling for circuit design and simulation [39-41], as well as

qualitative and quantitative insight to the device physics.

3.3.2 Analytical Ballistic Theory

In practical intrinsic CNFETs with metal or doped Ohmic contacts (Figure 3.6),

only the lowest two subbands contribute to current [25, 42], resulting in the two

subband approximation for the current of a ballistic CNFET which is the net flux of

forward (positive velocity) and backward (negative velocity) traveling carriers [21].

The I-V is developed here for an n-type transistor, where the contribution of holes are

considered negligible.

[ ]∫∞

−

+−−=

secbE

DFFD eVEEFEEFEMEvEgdEeIϕ

),(),()()()(

[ ]∫∞

−

−−

secbE

DFF eVEEFEEFEMEvEgdEeϕ2

),(),()()()( (1)

where the former (latter) is the contribution from the 1st (2nd) subband. F(·) is the

Fermi-Dirac distribution, EF is the Fermi level defined at the source, and the drain

Fermi level is lowered by the drain voltage (VD). Ecb(=Eg/2) and Ecb2 are the bottom of

the first and second subbands respectively, and the effect of φs is to shift the bands as

illustrated in Figure 3.7a. g(E) and v(E) are the density of states and group velocity per

subband respectively, with v(E)=2/(hg(E)). h is the Planck’s constant, e is the

electrical charge constant, and M is the subband degeneracy (M=2). Simplifying for

v(E) and M in Eq. (1) results in

[ ] [ ]∫∫∞

−

∞

−

−−+−−=

secbE

DFF

secbE

DFFD eVEEFEEFdEh

eeVEEFEEFdE

h

eI

ϕϕ 2

),(),(4

),(),(4 (2)

which yields:

58

+

++

+

+=

−−−

−−

−−−

−−

kT

secbEDeVFE

kT

secbEFE

qkT

secbEDeVFE

kT

secbEFE

q

D

e

e

eR

kT

e

e

eR

kTI

)2(

)2(

)(

)(

1

1ln

1

1ln

ϕ

ϕ

ϕ

ϕ

(3)

kT is the thermal energy, Rq is the quantum resistance (Rq=h/4e2≈6.45kΩ), and

kT/eRq~4µA. Eq. (3) is the essential analytical I-V for a ballistic CNFET as a function

of the terminal voltages, material properties, and temperature. For convenience, the

source Fermi level is considered the reference potential (EF=0).

At low operating energies (where contribution of the 2nd subband is negligible),

Eq. (3) can be further reduced to the first subband ballistic current.

+−+=

−−−

)1ln()1ln( 2

22

2

2

kT

gEDeVse

kT

gEse

qD ee

eR

kTI

ϕϕ

(4)

The latter term (backward carriers) is significant in the linear region and the

former term (forward carriers) determines the saturation current (ION). We can

calculate a rough estimate for the maximum ION achievable from the first subband by

reasonably assuming the maximum eφs~1.5Ecb. In this case, the maximum ION from

the 1st subband ~12uA-36uA for dCNT from 3nm to 1nm respectively at room

temperature. The explicit gate voltage (VG) and gate capacitance dependence is

captured in the surface potential which is developed analytically in the next section.

The analytical ballistic current developed here does not include electron-electron

interactions which have been shown to be inconsequential by Maslov and Stone for an

ideal Luttinger liquid ballistic wire [43]. For a p-type CNFET, Eq. (3) or (4) is

modified by reversing the polarity of φs, and VD.

59

Figure 3.6: CNFET devices covered in this work illustrated with an n-type.

a) A top-gated CNFET with doped CNT ohmic contacts and its band diagram. Ecb is

the bottom of the conduction band, and Evt is the top of the valence band. b) A self-

aligned CNFET with Ohmic metallic contacts, and its band diagram (k=15, tox=8nm

for the experimental and analytical CNFET in this work).

60

Figure 3.7: a) Two subband E-k dispersion of a CNT.

Ecb2 is the band minima for the 2nd subband. The effect of VG is to shift the bands with

respect to EF and induce φs. b) Analytical φs (s=1.41V-1 & t=0.76) compared to self-

consistent computation showing good agreement (typical peak error <5%).

61

3.3.3 Analytical Surface Potential

The CNT surface potential is controlled by the gate voltage through a

capacitive divider network consisting of the gate oxide capacitance (Cox) and the

quantum capacitance (Cq) [18, 44, 45]. Specifically, φs determines the directional

charge carriers in the CNT channel.

Gsq

ox

oxs V

CC

C

2

)(ϕϕ

+

= (5)

where Cq/2 is the quantum capacitance per carrier direction, and VG is the actual gate

voltage under flat band conditions. In general, VG=VG′-VFB, where VG′ is the external

gate voltage, and VFB is the flat band voltage which depends on the work function

difference as usual. Cq depends on φs exponentially [46, 47], hence Eq. (5) is

transcendental and is typically solved for φs numerically in a self-consistent manner.

To aid in deducing an approximate analytical form for φs, we investigate the

quantum and semi-classical limits. At low gate voltages, the CNFET is in the quantum

capacitance limit (Cq<<Cox), and φs≈VG, with unity slope. At higher gate voltages,

both capacitances are comparable (semi-classical limit) and the slope becomes non-

linear and less than unity. Based on this insight, we propose a suitable analytical form

for the surface potential (after our recent work [46])

+−

+−−=

tVsH

tVsV GGG

s

||1

1||

111

ϕ (6)

where H(·) is the Heaviside unit step function, and s and t are bandgap, Cox and

temperature dependent parameters which we derive in the Appendix. Eq. (6) compared

to self-consistent computation shows good agreement with peak errors typically less

than 5% (Figure 3.7b). A more rigorous mathematical analysis of φs provided in the

Appendix reveals that Eq. (6) is actually the first order Taylor approximation of Eq.

(5) in the semi-classical limit.

62

3.3.4 Experimental Validation and Device Physics

The value of analytical theories depends on how successful the theory predicts

experimental observations. Employing an experimental ballistic p-CNFET previously

reported by Javey [33], we compare Eq. (4) showing only good agreement in the

saturation region (Figure 3.8). The analytical parameters used are identical to the

values reported for the experimental CNFET (dCNT=1.7nm, Eg=0.5eV, and device

geometry shown in Figure 3.6b), including a parasitic source/drain metal resistance of

~2kΩ each, which is close to the reported estimate of ~1.7kΩ. The flatband voltage

was not reported for the experimental CNFET, but VFB=0.28V was found most useful

in reproducing the measurements. In the linear region, the analytical theory (Eq. (3) or

(4)) significantly overestimates the current and conductance. We propose that the

reduced conductance of the experimental CNFET in the linear region is due to drain

optical phonon scattering (DOPS) which is explained graphically in Figure 3.9.

63

Figure 3.8: Experimental results and analytical (Eq. (4)) predictions for a ballistic

50nm p-type CNFET (device identical to Figure 3.6b).

s=1.6V-1, t=0.82 for the analytical φs. Agreement is good in the active region, but

weak in the linear region due to the DOPS effect. Experimental results courtesy of

[33].

64

Figure 3.9: Illustration of DOPS in a ballistic (n-type) CNFET.

a) At low VD, the length of the triangle well (l1) is comparable to the mfp of optical

phonon scattering (lop~10nm), thereby reducing ID. At higher VD, the well is

sharpened with a vanishing effect on ID. This device physics can be captured by a

(DOPS) parameter (α) which accounts for the reduced ballistic current.

65

In brief, at low drain bias (linear region), the length of the high energy

triangular quantum well at the drain contact is comparable to the mfp of optical

phonon scattering resulting in carrier scattering and a reduced current. At higher drain

bias (saturation region), the triangular well is sharpened with a length smaller than the

optical phonon mfp thereby having a vanishing effect on the current. These concepts

have been previously alluded to by Natori [48] and Guo [49] but not incorporated into

the ABT.

We introduce a DOPS parameter (0<α≤1) to modify the effective drain voltage

in Eq. (4) since optical phonon scattering at the drain contact implies a localized

resistance and therefore, the effective VD on the ballistic CNT channel is decreased.

+−+=

−−−

)1ln()1ln( 2

22

2

2

kT

gEDVese

kT

gEse

qD ee

eR

kTI

αϕϕ

(7)

The DOPS corrected ballistic current (Eq. (7)) is primarily justified by the remarkably

strong agreement with the experimental data in all major regions of transistor

operation (sub-threshold, linear, and saturation) as shown in Figure 3.10. Detailed self-

consistent quantum mechanical simulations reported by Guo [33] for the experimental

device are included in Figure 3.10a for reference, demonstrating the strength of the

simple ABT in accurately reproducing the experimental and self-consistent simulation

results. Furthermore, analytical results based on the approximation that Cq≈quantum

capacitance for metallic CNTs (Cq,metallic~300aF/um) are included in Figure 3.10b

showing gross errors in all regions except the linear region. The errors particularly in

the active and subthreshold regions render the approximation (sometimes employed in

compact modeling) of little value in accurate modeling or performance benchmarking

of CNFETs.

66

Figure 3.10: Improved agreement between experiment and analytical ballistic theory.

a) ID-VDS including the DOPS parameter (α=0.5) leads to an improved agreement

between analytical theory (Eq. (7)), and experimental results and quantum mechanical

simulations. b) Likewise ID-VGS also results in strong agreement with experimental

data in active, linear and subthreshold regions. The dashed line (VD=-0.1V) is the

analytical predictions if Cq≈Cq,metallic is assumed as is sometimes employed in compact

modeling, which leads to gross errors in all regions except the linear region.

67

To provide clarity in the use of the term ‘ballistic transport’ in transistors, we

make two distinctions. 1) AP-ballistic transport defined as transport with no acoustic

phonon scattering but possibly optical phonon scattering (α<1), and 2) OP-ballistic

transport (or fully ballistic transport) defined as transport with no optical phonon nor

acoustic phonon scattering (α=1). Further research is warranted to investigate how

the DOPS parameter scales with the device dimensions with the potential that the

results of such investigations might lead to optimizing the device structure to minimize

the DOPS effect.

The threshold voltage for intrinsic CNFETs has been vague from the outset

because of a lack of carrier inversion as is the case in conventional doped

semiconductors. We propose a definition for VT that is universally applicable to all

CNFETs and extractable from measurements (same definition previously proposed by

Wong [50] for thin oxide FETs). The proposed VT is the VGS for which ∂gm/∂VGS is a

maximum, where gm is the transconductance (∂ID/∂VGS). This mathematical definition

is similar to the physical definition used for conventional MOSFETs but avoids

extraction ambiguities related to short channel effects. In the quantum capacitance

limit (φs=VG), the analytical VT for n-CNFET is

−+≈

+

)24(121

ln 22 kT

DVe

kT

DVe

kT

DVegE

T eeekTV

ααα

(8)

where the approximation is due to the neglect of exponentials with negative arguments

in the intermediate equations which have a negligible effect compared to exponentials

with positive arguments. A 1st-order Taylor series of Eq. (8) yields VT=(½e)Eg+offset,

revealing that VT is linear with bandgap and hence inversely proportional to dCNT

(since Eg~1/dCNT) [42]. This is confirmed in Figure 3.11 for the VT computed exactly

from the ABT model for a ballistic 50nm n-CNFET, and compared to a simple

VT~(½)dCNT relation showing good agreement. It is worthwhile to note that the 50nm

CNFET (after Figure 3.6b) is operating in the semi-classical limit, showing that Eq.

(8) though derived for the quantum capacitance limit is also useful for accurately

estimating VT when Cq is comparable to Cox.

68

A suite of relevant analytical equations for the ballistic CNFET including

saturation and sub-threshold current, gm, and gds are provided in Table 3.1.

3.3.5 Parameter Extraction and Performance Projection

The bandgap which is a fundamental material property of semiconductors can

be extracted from experimental measurements using the analytical ballistic equation.

Specifically, with knowledge of VFB, Eg can be accurately extracted from the ballistic

ID-VGS in deep subthreshold with VDS→VDD (see Table 3.1, Eq. (8)). This opens up an

electrical technique in applied physics for measuring the temperature and diameter

dependent Eg. Using this technique, the extracted Eg~0.494eV as shown in Figure 3.12

for Javey’s experimental CNFET, in close agreement to the reported 0.5eV [33]. The

close agreement between the extracted Eg and the reported Eg for the experimental

device also serves to justify the value of VFB (=0.28V). Alternatively, with knowledge

of Eg, the flatband voltage can be extracted.

Likewise, with knowledge of Eg, the surface potential can be extracted from

ION, and ∂φs/∂VGS extracted from gm as VDS→VDD (see Table 3.1, Eq. (1) and Eq. (5)

respectively). Furthermore, the DOPS parameter, α, can be extracted directly from gds

(see Table 3.1, Eq. (7)). In principle, with knowledge of just the CNT diameter,

temperature, and device geometry, the ballistic I-V reveals the pertinent device

physics of the CNFET (i.e., all the relevant device parameters are extractable from

measurements).

69

Figure 3.11: VT exactly computed from ABT model (Table 3.1, Eq. (3)).

For a ballistic 50nm n-type CNFET (derived from Figure 3.6b), showing weak

dependence on drain voltage, and a simple ~1/dCNT relation.

70

Table 3.1: ABT metrics and new extraction techniques

−≈

−−−

kT

gEDSeVGSeV

kT

gEGSeV

q

sth eeeR

kTI 2

22

2

2 α

gFBGSsth

qEVVeI

kT

eRkT −−= )(2)ln(2

qds

Rg

α=0

GS

s

qkT

gEse

kT

gEDSeVsemVR

ee

g∂

∂

+

−

+

=−−−

ϕϕαϕ

1

1

1

1

1

2

2

2

22

)1ln( 2

2

kT

gEse

qON e

eR

kTI

−

+≈

ϕ

imumV

gwhenVV

GS

mTGS max, =

∂

∂=

Comments/Conditions

ON current in

saturation region

Sub-threshold current showing VGS and VDS

dependence. Ideal slope is 60mV/decade at 300K

Analytical

transconductance

Analytical channel

conductance

Accurate analytical VT in the quantum capacitance

limit (φs=VGS)

New technique to extract α from measured gds (VDS→0,VGS→VDD)

New technique to extract Eg

from measured Isth for nonzero VFB (VDS→VDD)

Proposed definition for VT

for intrinsic CNFETs

Analytical equations for ballistic n-type CNFET

)]24(121

ln[ 22 kT

DeV

kT

DeV

kT

DeVgE

T eeekTV

ααα

−+≈

+

12

22

)1( −

−+

+= kT

seDSeVgE

q

ds eR

g

ϕαα

#

(1)

(2)

(3)

(4)

(5)

(6)

(7)

(8)

71

Figure 3.12: Deep subthreshold current and linear fit for extracting the CNT bandgap.

The device is the experimental p-CNFET (see Table 3.1, Eq. (8) for n-CNFET). The

intercept=2eVFB-Eg, with VFB=0.28V (model value used in Figure 3.8 and Figure 3.10)

yields Eg~0.494eV, in good agreement with the reported CNT Eg of ~0.5eV in [33].

The departure from the dashed line is a result of the CNFET gradually turning ON.

72

Much of the excitement about CNFETs is their potential performance

advantages over silicon transistors. The performance metrics chosen here are

independent of CNT density in the channel unless otherwise stated explicitly. To aid

in assessing performance, key digital and analog performance metrics of a ballistic n-

CNFET (device structure similar to Javey’s experimental p-CNFET) are estimated.

The primary digital metric is the intrinsic CV/I delay which is shown in Figure 3.13a

indicating that 10nm gate length (Lg) CNFET satisfies the high performance (HP)

international technology roadmap for semiconductors (ITRS) [51] 25nm logic node

(Lg=10nm) using double-gate MOSFETs. The CNFET high-k gate dielectric is 4nm

thick with an equivalent oxide thickness (EOT) of ~1nm which is identical to the

electrical EOT for 25nm ITRS HP logic for a fair comparison. Further scaling of the

CNT channel length reduces the capacitances linearly but has a negligible effect on the

ballistic current resulting in an overall linear reduction of the intrinsic delay. However,

parasitic capacitances have to be negligible in order to enjoy the intrinsic performance

[52-54]. Also the ON/OFF current ratio (ION/IOFF) and ION are shown in Figure 3.13b

conveying that CNFETs with dCNT~1-3nm can satisfy both the ION and ION/IOFF ITRS

roadmap, however flatband voltage engineering maybe required to realize ION/IOFF and

arrays of CNTs simultaneously needed to meet the desired ION. For example, to meet

the ION for 25nm ITRS, a 1.5nm CNFET (VFB=0V) needs ~40CNTs/um. The ABT

model does not include ambipolar conduction which can degrade the ION/IOFF. To

mitigate ambipolor effects, source/drain engineering can be employed to achieve the

desired unipolar behaviour [55].

The primary analog metrics are gm, gm/ID, and gm/gds (intrinsic gain), which are

shown in Figure 3.14 for a 50nm ballistic n-CNFET. A peak gm of ~50uS/CNT is

achievable in moderate saturation, and the CNFET is more efficient in terms of gm/ID

when compared to the simulated ITRS transistor with a similar gate length as shown in

Figure 3.14b. The effect of DOPS is evident in Figure 3.14c showing a much degraded

intrinsic gain which nonetheless, outperforms the highest gm/gds comparable CMOS

[56]. It is imperative that DOPS has to be mitigated (e.g. by drain contact engineering)

for maximum analog performance.

73

Figure 3.13: Performance assessment for ballistic CNFET for logic applications.

a) Intrinsic delay of a 10nm CNFET at a fixed VG-VT=0.2V to ensure saturation

(VDD=0.8V, I=ION, C is a series combination of oxide and quantum capacitances). The

delay is weakly dependent on diameter, and satisfies 25nm ITRS HP logic node

(Lg=10nm). b) ABT model (Eq. (7)) for ION and ION/IOFF (VDD=0.8V, α=1), and also

showing the ITRS low operating power (LOP) ION/IOFF for the same VDD. The ITRS

LOP was chosen for b) because of its more stringent ION/IOFF requirement compared to

the ITRS HP technology.

74

Figure 3.14: ABT model calculations for key analog metrics for a 50nm CNFET.

a) transconductance (VD=0.5V). b) gm efficiency (VD=VG, α=1) showing a profile

similar to a comparable ITRS CMOS but larger by up to a factor of ~2, and identical

to an ideal BJT in subthreshold. c) Intrinsic gain metric (dCNT=1.5nm, VD=0.5V)

showing significant degradation with drain optical phonon scattering, and also

included for reference is the highest reported intrinsic gain for 32nm CMOS

technology (the reported device had an Lg=60nm) from [56], and the simulated gain

from the comparable ITRS CMOS device.

75

3.3.6 Conclusion

We have developed an analytical ballistic theory for carbon nanotube field

effect transistors showing good agreement with state of the art experimental data. The

strong agreement was achieved without including electron-electron interactions

indicating that one electron excitations dominate the ballistic transport. The developed

ABT leads to clear insights and techniques such as Eg and φs extraction from the I-V,

and a simple ~1/dCNT relation for VT. The role of DOPS in reducing the linear

conductance and the intrinsic gain has also been elucidated. These results are

immediately applicable for the applied physics and compact modeling of CNT devices.

In addition, the validated ballistic equations will aid in the CNT device and

circuit design enabling the selection of optimum diameter and device geometry

tailored to the desired application.

Acknowledgements

We thank Prof. Ali Javey (University of California, Berkeley) for the experimental

results and Prof. Jing Guo (University of Florida) for the quantum mechanical

simulations (both reported in [33]). This work is supported in part by the Focus Center

Research Program (FENA and C2S2). S.C is additionally supported by the Samsung

Fellowship, and J.L is additionally supported by Gerald L. Pearson Memorial

Fellowship. D.A is additionally supported by the Ford foundation and the Stanford

DARE graduate fellowships.

Appendix

SERIES DERIVATION FOR THE S AND T PARAMETERS OF THE ANALYTICAL SURFACE

POTENTIAL

In this appendix we solve Eq. (5) analytically for the surface potential by

means of a 1st-order Taylor series expansion resulting in an analytical form that

justifies Eq. (6). This leads to identification of the temperature, Cox, and diameter

76

dependent s and t parameters in terms of the Taylor series coefficients. For the 1st-

subband, Cq is given analytically by [46]

x

kTeAkT

eNeC

kT

gEsekTsegE

kT

gEsekTkTsegE

oq 2

2)2(

)22)(2(

2)2(

)222)(2(

22

+

=−+−

−+−−

βϕβαϕ

βϕβαϕ

−+−+

−+−

)2(2)2(

)22)(2(

sgkT

gEsekTsegE

eEkTkTAkTe ϕββα

βϕβαϕ

(A1)

where No is the effective density of states [42]. A, α, and β are empirical constants in

the analytical CNT carrier density theory determined to be 0.63, 0.88, 2.41x10-3

respectively [46, 47], with an average error <10% for dCNT~1-3nm and temperature

~300K±100K when comparing Eq. (A1) to numerical tight-binding computation for

Cq. A more comprehensive derivation and discussion is provided in reference [46].

The 1st-order Taylor series of Eq. (5) about φs= mEg is

Gss VSS )( 10 ϕϕ −≈ (A2)

with S0 and S1 being the 0th-order and 1st-order series coefficients respectively, which

are analytical but not explicitly written here because they are lengthy and can be easily

derived by the interested reader. It is important to emphasize that S0 and S1 explicitly

depend on Cox, bandgap, temperature, and m. Ideally if Cq was linear and symmetric

about eφs= 0.5Ecb then m would be ~0.25/e, however, because Cq is quasi-linear and

generally not symmetric, a value of m~0.30/e-0.33/e was found to give the best

agreement with self-consistent computation, with a weak dependence on dCNT and

temperature. Finally, simplifying Eq. (A2) yields the analytical φs.

00

1 1

SV

S

S

V

G

Gs

+

≈ϕ (A3)

which is identical to Eq. (6) in the semi-classical region, with s=S1/S0 V-1 and t=1/S0.

77

The step function in Eq. (6) is simply employed as a convenient mathematical

tool to merge the solutions of the surface potential in the quantum capacitance and

semi-classical limits of operation.

3.4 References

[1] N. W. Ashcroft and N. D. Mermin, Solid State Physics. New York,: Holt Rinehart and Winston,

1976.

[2] R. Saito, G. Dresselhaus, and M. S. Dresselhaus, Physical properties of carbon nanotubes.

London: Imperial College Press, 1998.

[3] W. B. Choi, D. S. Chung, J. H. Kang, H. Y. Kim, Y. W. Jin, I. T. Han, Y. H. Lee, J. E. Jung, N.

S. Lee, G. S. Park, and J. M. Kim, "Fully sealed, high-brightness carbon-nanotube field-

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82

4 Chapter 4

RF ANALOG CIRCUITS

4.1 Preface

One of the promising applications of carbon nanotubes (CNT) is for high-

frequency high-performance analog circuits at radio frequencies (RF) to optical

frequencies. This promise is based on the intrinsic transit frequency of CNT transistors

which is estimated to be in the vicinity of 1THz. Additionally, some of the unique

properties of CNTs such as the voltage-dependent quantum capacitance make them

especially attractive for novel non-linear analog circuits which form the backbone of

signal sources which are the heart of communication systems. However, realizing

CNT circuits that operate at RF and beyond will only be possible if the otherwise

undesirable parasitic elements that exist in any circuit geometry are taken into

consideration and minimized.

This work provides an analysis of nanotube analog circuits operating at high-

frequencies. This includes the performance analysis of nanotube RF amplifiers in the

presence of parasitic capacitances. In this light, design guidelines are provided to

minimize the effects of parasitics and optimize performance. In addition, the

description of a novel quantum capacitance based multiplier is elucidated showing that

it is possible to obtain THz signal generation circuits with carbon nanotubes using

existing fabrication techniques on insulating substrates.

All the work was conceived and performed by the author. Gael Close provided

very fruitful exchange of ideas which led to an optimum nanotube transistor geometry

shown in Figure 4.3c.

83

4.2 Analysis of the Frequency Response of Carbon

Nanotube Transistors

(Reproduced with permission from D. Akinwande, G. F. Close, and H.-S. P. Wong, “Analysis of the

Frequency Response of Carbon Nanotube Transistors”, IEEE Trans. Nanotech., vol. 5, 2006)

Deji Akinwande, Gael F. Close, and H.-S. Philip Wong

CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF ELECTRICAL

ENGINEERING

STANFORD UNIVERSITY, STANFORD, CA, 94305, USA

Abstract: The characterizations of carbon nanotube transistors at high frequencies

have so far been hindered by large parasitic and extrinsic capacitances. In this paper,

we present a quantitative analysis of the limitations imposed by probe pad parasitics

on single wall carbon nanotube transistor characterization at GHz frequencies. Our

analysis reveals the various kinds of frequency responses that can be expected to be

measured. Furthermore, we present design guidelines and a suitable device layout to

achieve gain and bandwidth at GHz frequencies.

4.2.1 Introduction

Carbon nanotube field effect transistors (CNFETs) have been extensively

characterized at DC [1-5], with emphasis on performance metrics such as the I-V

transfer curve, maximum on-current’s and minimum off-current’s, transconductance,

and subthreshold slope. Much of this attention has been motivated by the near ballistic

conduction, and high current and transconductance density of carbon nanotube (CNT)

transistors [1].

However, due to parasitic loading issues, the intrinsic high frequency

performance of CNFETs has yet to be successfully measured above a few GHz [6-11].

84

It has become necessary to understand the frequency response of CNFETs that is

achievable with current CNTs and the effect of parasitic capacitances on the measured

frequency response in order for RF CNFET research to move forward as a viable high

frequency technology.

In this paper, we provide a brief overview of the published frequency response

of CNFETs available in the literature up till now. We examine the various kinds of

frequency profiles of CNFETs that can be expected to be measured. In addition, we

present a quantitative analysis that shows the limitations imposed by probe pad

parasitic capacitance at RF. Finally, we discuss CNFET device layout issues for

improved frequency response. We will use the f-3dB as a practical figure of merit to

quantify the bandwidth of CNFETs. The f-3dB is defined as the frequency at which the

low frequency gain (S21, defined in later section) drops by -3dB.

4.2.2 Overview of Prior RF Characterization

CNFETs are very small devices with diameters on the order of a few

nanometers and lengths of tens of nanometers [1]. The CNT devices are often

contacted with metallic pads for on-wafer probing and characterization. These probe

pads can also serve as bonding pads for connection to off-chip circuits. Due to the

large size of the probe pads relative to the CNT device, the parasitic capacitance of the

pads can dominate the measured frequency response and inhibit measurement of the

intrinsic response of CNT transistors.

Several attempts to measure the RF response of CNTs operating as transistors,

rectifiers, and resistors have been reported in the literature [6-11]. Singh et al. reported

large-signal frequency measurements on CNFETs that were limited by gate and drain

pad overlap capacitance to a maximum of 200 MHz [6, 7]. Frank and Appenzeller

used RF to DC rectification to infer the frequency response of CNT transistors [8].

The maximum frequency they observed was limited to 580 MHz due to probe pads

and measurement setup limitations. Using a similar idea as [8] and with smaller probe

pads, Rosenblatt et al. used CNFETs as rectifiers up to GHz frequencies [9]. They

observed rectification behavior up to 50 GHz, though the measured output signal was

rolling off with frequency after a few GHz due to measurement setup and probe pads.

85

Small signal s-parameter measurements up to 10 GHz were reported by Huo et

al. on a CNT bundle consisting of semiconducting and metallic nanotubes [10]. The

actual response of the CNT bundle is observable up to about 500 MHz, and afterwards

a correction technique is used to subtract the effects of the probe pad capacitances and

infer the frequency response to 10 GHz. Due to the fact that the CNT bundle consisted

of metallic and semiconducting tubes and the absence of a description of their

correction technique, it is not clear what the frequency response of the device will be

if the device consists of semiconducting nanotubes only.

Even conceptually fundamental experiments with CNT resistors have faced

difficulty at RF. Li et al. attempted measurements of CNT resistance at 2.6 GHz [11]

with no conclusive data. In all of the above work involving CNFETs, no small-signal

voltage gain has been demonstrated yet due to the low output current of a single

carbon nanotube.

4.2.3 CNFET Transfer Function (S21)

A. CNFET Small-Signal Model

To understand the frequency response of CNFETs, we employ a bilateral

small-signal model including probe pad capacitances, terminal capacitances and the

voltage controlled current source.

The probe pads are usually laid out in a coplanar ground-signal-ground (GSG)

arrangement or in a signal-ground (SG) arrangement to facilitate on-wafer RF

measurements [12]. For CNT devices, the probe pads often sit on a dielectric layer

(SiO2) which is supported by a heavily doped silicon or high-resistivity substrate to

minimize substrate losses. A schematic of a CNFET with SG probe pads and the

simplified small signal model are shown in Figure 4.1.

86

Figure 4.1: CNFET simplified small signal common-source model.

(a) schematic of CNFET with SG probe pads. (b) simplified small signal model. Cgs,

and Cds, are the small signal capacitances (intrinsic+extrinsic). ro is the small signal

output resistance. Cgd is the gate to drain capacitance and it is basically the (extrinsic)

overlap capacitance (Cov) between the gate and source/drain electrodes. All the

electrodes are assumed to have negligible electrode resistance.

87

The pad parasitics consist of two capacitors to ground and a feed forward

capacitor (Cff) between input and output probe pads. Cpad represents the shunt parallel-

plate capacitance through the bottom oxide for a heavily doped substrate, or the

capacitance through the bottom oxide and substrate for a high resistivity substrate. Ct

represents the small fringing capacitance from signal pad to topside ground pad, and

will be neglected in the following analysis because the associated spacing between

signal and ground pad is much larger for Ct than for Cpad at least for heavily doped

substrates. For insulating substrates, both capacitances may need to be retained for

accurate analysis.

B. S21 Derivation

For an analysis of the transfer function of the CNFET in common-source mode

as shown in Figure 4.1, we use the 2-port S-parameter method [13], which is a

conventional technique at high frequencies. Port 1 is the gate to source terminal, and

port 2 is the drain to source terminal. To make the analysis tractable, we will use the

variable Cgs,tot to denote the total capacitance between gate and source, which includes

parasitic (probe pads), extrinsic (overlap) and intrinsic gate to source capacitances.

Likewise for Cds,tot. The Cgd,tot would comprise the intrinsic and extrinsic (overlap)

capacitance contributions plus the parasitic feed forward capacitance Cff. Assuming

the intrinsic gate to drain capacitance ≈ 0 as in conventional solid state FETs (in active

region), and a negligible Cff (we will return to this at the end), Cgd,tot=Cgd=Cov. The

overlap capacitance Cov models both the capacitance that results from direct overlap of

gate and source/drain electrodes and the fringe capacitance between the electrodes

even when there is no direct overlap between electrodes such as in self-aligned

processes [2].

The forward transfer function in a constant impedance system or S214 is defined

as the ratio of the output signal to the forward traveling input signal.

4The S21 derived in this paper is for the unmatched CNFET. For the purpose of achieving gain and bandwidth, it is not necessary to match to Z0. However, for most commercial applications (which is not the case for CNFETs at this stage in its research), matching would be required.

88

++==

1

gs

gs

2

1

221

V

V

V

V

V

VS (1)

where Vgs is the total voltage between the gate and source, and is the sum of the

incident and reflected waves.

)1( 11 Γ+= +VVgs (2)

Γ1 is the reflection coefficient at port 1. To calculate Γ1, it is necessary to determine

the input impedance of the network, which is simply the parallel combination of the

impedance due to Cgs,tot and the Miller impedance [14]. The Miller impedance (ZM) is

)1(

1

11)1(

)(1

0

0

,00

,0

ZgjwC

Zg

CjwZZgjwC

CCjwZZ

mgd

m

totds

mgd

totdsgd

M+

≈

+++

++= (3)

where w is the angular frequency of the signal, and Z0 is the characteristic impedance

of the incident signal which is typically 50 Ω. The full Miller impedance is

approximated to first order by a simple capacitance (Cgd[1+gmZ0]) which is often

referred to as the Miller capacitance in analog circuit theory. This approximation has

been verified to be valid for the frequencies of interest in this paper, that is, the -3dB

cutoff frequency of the circuit transfer function.

The input impedance (Z1) is approximately the parallel sum of two

capacitances and Γ1 can be expressed as

])1([1

])1([1

0,0

0,0

01

011

gdmtotgs

gdmtotgs

CZgCjwZ

CZgCjwZ

ZZ

ZZ

+++

++−=

+

−≈Γ (4)

Vgs can now be solved for in terms of circuit elements.

+

+++= 1

0,0 ])1([1

2V

CZgCjwZV

gdmtotgs

gs (5)

To solve for V2 we make the simplification that the load resistance is essentially the

characteristic impedance (Z0<< ro) presented by a network (s-parameter) analyzer.

gs

totdsgd

m

gd

m VCCjwZ

g

Cjw

ZgV)(1

1

,002

++

−

−≈ (6)

89

Substituting (5) and (6) into (1), S21 is computed as,

)](1][)1((1[

12

S,00,0

0

21totdsgdgdmtotgs

m

gd

m

CCjwZCZgCjwZ

g

CjwZg

+++++

−−

≈ (7)

Further simplification can be made by noting that the maximum gm reported to

date for a near-ballistic CNFET is 240 µS [2], which means gmZ0 is at least about two

orders of magnitude less than 1 for present CNFETs in a 50Ω system. Therefore,

|)](1)][(1[

12

||S|,0,0

0

21gdtotdsgdtotgs

m

gd

m

CCjwZCCjwZ

g

CjwZg

++++

−

≈ (8)

The neglect of gmZ0 in the denominator of (7) is justified since CNFETs will continue

to have low absolute transconductance until the fabrication challenge of placing

sufficiently large numbers of tubes in parallel is resolved (this issue is discussed in a

later section).

C. Low Frequency S21 Behavior [w→0]

The low frequency |S21| is approximately 2Z0gm. Next, we examine the range

of achievable S21. In the literature gm has ranged from <1 µS to about 240 µS for

Javey’s CNFET which has multiple gate fingers [2]. The gate bias voltage has often

been on the order of a volt or less. If we define small-signal input5 as 10 mV or less,

we can calculate the maximum input power to be -30 dBm. The maximum small-

signal output power is simply:

dBdBmP |S|30 212 +−= (9)

5 10mV is a rather high value for small-signal CNT excitations. However, it is a useful number because it provides a sort of maximum value to use for analysis.

90

Table 4.1: Gain and output power for a range of transconductances

gm |S21|dB *P2 (dBm)

1 µS -80 -110

10 µS -60 -90

100 µS -40 -70

240 µS -32.4 -62.4

* Small-signal input power is set to -30 dBm.

91

The values of |S21| and P2 for the experimentally achieved range of gm are listed

in Table 4.1. It is important to observe that CNFETs in common-source mode will

ordinarily provide no gain for the CNT transistors that have been reported in the

literature so far. To increase the voltage gain, many CNTs have to be placed in parallel

to get more current and a higher overall gm. Alternatively, narrow-band impedance

transforming networks [14] such as resonant circuits and transformers can be used to

boost gain. However, in this paper, we examine only the intrinsic performance

achievable with CNFETs in 50Ω systems.

Additionally, for gm’s less than 10µS, the output power will be close to or in

the noise-floor of widely used network analyzers or obscured by parasitic feed forward

paths between the input and output ports.

D. S21 Pole and Zero Analysis

Different frequency profiles can be obtained from (8) depending on the relative

weight of all the capacitances involved. To aid in identifying the possible profiles, we

perform a pole/zero analysis [15] on the S21. There is one zero frequency and two pole

frequencies that make up the transfer function. The zero frequency is

gd

mz

C

gf

π2

1= (9)

and the two pole frequencies are

)(2

1

,01

gdtotgs

pCCZ

f+

=π

(10)

)(2

1

,02

gdtotds

pCCZ

f+

=π

(11)

These three frequencies represent discrete frequencies where the S21 response changes

noticeably.

The Bode plots of four possible frequency profiles are illustrated in Figure 4.2.

In conventional solid-state amplifiers, the first pole frequency is typically the -3dB

frequency (if it is a dominant pole), and often implies a monotonic decline in the

frequency response from low frequencies up until f-3dB. For CNFETs, the -3dB

92

frequency may not imply such a monotonic response due to the zero that may be

significant and can occur before the first pole frequency. Comparing fp2 against fp1,

gdtotds

gdtotgs

p

p

CC

CC

f

f

+

+=

,

,

1

2 (12)

we conclude that fp2 ≥ fp1 since Cgs,tot ≥ Cds,tot. In the same way, comparing fz against

fp1,

+=

gd

gdtotgs

m

p

z

C

CCZg

f

f ,0

1

(13)

we observe that the zero frequency can be less than the pole frequency which is almost

never the case for conventional solid-state common-source amplifiers, except for very

narrow transistor (<< 1µm) . The reality that the zero frequency can be less than the

pole frequency of CNFETs is fundamentally due to the lack of intrinsic RF gain

(gmZ0) for current CNFETs, i.e., gmZ0<<1. Indeed Singh et al. observed this feed-

forward zero in their measurements [6, 7].

Furthermore if we compare the transit frequency (ft=gm/[2π(Cgs+Cgd]) to the

pole frequency, we have

+

+=

gdgs

gdtotgs

m

p

t

CC

CCZg

f

f ,0

1

(14)

which leads to the surprising observation that the transit frequency can be less than the

first pole frequency due to the lack of intrinsic gain for present CNFETs. For analog

RF transistors, ft is often interpreted as the upper limit on the realizable f-3dB bandwidth.

For a transistor with no gain (essentially an attenuator), the transit frequency (though

well defined as the unity current gain frequency) may not be as meaningful a figure of

merit for RF CNFET amplifiers in 50Ω systems, since f-3dB bandwidths greater than ft

is achievable for the specific case of gmZ0<<1.

93

Figure 4.2: Illustrated Bode plots of four possible CNFETs frequency response.

(a) The first pole occurs before the zero. (b) The two poles are (approximately)

degenerate and occur before the zero. (c) The zero occurs before the poles. (d) Same

as in (c) but the two poles are (approximately) degenerate.

94

4.2.4 Effect of Pad Capacitance

Many published measurements of CNFETs have been limited by pad

capacitances [8-10]. This is the case when Cgd is negligible leading to a response

similar to Figure 4.2b, and the resulting S21 is

]1][1[

2

,0,0

021

totdstotgs

m

CjwZCjwZ

ZgS

++

−≈ (15)

However, it has not yet been determined nor reported in the literature what the value

of Cds,tot is for CNFETs. Nevertheless, it is reasonable to take Cgs,tot as the upper bound

on Cds,tot (i.e., Cds,tot ≤ Cgs,tot) as in conventional transistors. This assumption is

certainly true when the pad capacitance dominates the input and output capacitance.

With this simplification, S21 can be reduced to

|]1[|

2||

2,0

021

totgs

m

CjwZ

ZgS

+≈ (16)

Cgs can approximately be written as

ov

top

cnttopo

cntQgs Cdt

llCC +

++≈

− )/21(cosh

21

επε (17)

where lcnt and d are the length and diameter of the CNT respectively, and εtop and ttop

are the dielectric constant and thickness of the top oxide (or high-k dielectric)

respectively. εo is the permittivity of air. The first and second terms models the

quantum (CQ=0.4 fF/µm) and electrostatic capacitance respectively [16]. The third

term is the overlap or fringe capacitance and is best determined by electrostatic

simulation in order to get the most accurate values.

It is useful to compute a practical range of values for the -3dB frequency of

(16). For thin bottom oxides (tbot≤1µm), Cpad typically dominates the input and output

capacitances of a single CNFET. The -3dB frequency is

pad

dBCZ

f0

31.0

≥− (18)

95

The inequality arises due to the upper bound placed on Cds,tot in the preceding analysis.

Cpad can be calculated using the parallel-plate approximation since the width and

length of probe pads are often much greater than the bottom oxide thickness.

bot

botopad

t

AC

εε= (19)

where A is the area of the pad, and εbot (3.9) is the oxide dielectric constant of SiO2. A

widely used CASCADE® recommended general purpose pad size is 100 µm x 100 µm

with a 150 µm pitch [17]. The bottom oxide thickness has ranged from about 10nm to

about 1µm for CNFETs that have so far been reported in literature. For these range of

values, the calculated pad capacitances and -3dB frequencies are listed in Table 4.2.

Above the pole frequency, the signal rolls off approximately -12dB/octave. If

CASCADE recommended minimum probe pad sizes of 25 x 35 µm are used, the pole

frequencies in Table 4.2 will theoretically increase by a maximum factor of 11.4.

However, that increase may not fully materialize in reality because the assumption of

negligible Cgd may no longer be valid.

It is clear from Table 4.2 that very thick oxides (or high resistivity substrates)

can enable measurements of CNFETs with f-3dB bandwidths in the GHz range even

with the probe pad parasitic capacitance included provided that Cgd is negligible.

4.2.5 Design Guidelines and Layout Issues for High Frequency CNFET

In order to characterize CNFET with gain up to a certain frequency, we can use

as design variables the oxide thickness, probe pad dimensions, length of tubes, and

number of gate fingers (n) of the CNFET. A practical device layout for RF

applications is shown in Figure 4.3c. Cgs, Cgd, and gm are assumed to scale

proportionally with the number of fingers, and the substrate is heavily doped.

96

Table 4.2: S21 (-3dB) frequencies for a range of tbot

tbot Cpad f-3dB

10 nm 34.5 pF 58 MHz

100 nm 3.45 pF 580 MHz

1 µm 345 fF 5.8 GHz

97

ga

ted

rain

source

source

gate

dra

in

ga

te

so

urc

e

S D

G

Top oxide

SiO2

Low-loss or Insulating

substrate

CNT a)

b)

d)

c)

Figure 4.3: Representative layouts of a carbon nanotube transistor.

a) Cross-section of a self-aligned CNFET. b) Top view of a conventional CNFET [2]

with SG electrode arrangement showing three fingers. c) Top view of the proposed

improved CNFET with GSG electrode arrangement and a zoomed-in version showing

four fingers. An extra metal layer is needed to seperate the source and drain electrodes.

d) A 3-D view of the CNFET showing just one finger. Wg,eff determines the

transconductance while We determines the gate overlap capacitances. We→Wg,eff to

minimize overlap capacitance.

98

This layout has the advantage of providing multiple gate fingers and a high

transconductance, and is a slightly modified version of [2]. Compared to [2], the gate

width per finger of the improved layout must be kept to a minimum because any extra

width beyond the effective gate control width (Wg,eff in Figure 4.3c) adds no further

transconductance but increases the gate overlap or fringe capacitance therefore

reducing the bandwidth of the device. Unlike conventional transistors, gm for CNFETs

does not scale with gate width beyond Wg,eff.

A frequency plot of |S21| from (7) as a function of the number of fingers is

shown in Figure 4.4, using a transconductance of 30µS/tube [2], and the values listed

in Table 4.3. It is evident from the plots that CNFETs with gain may have bandwidths

in the low GHz frequencies. Also, an important observation is that hundreds of gate

fingers are needed in order for the CNFET to possess gain in a 50 Ω system.

Table 4.3 reveals that the intrinsic capacitances/finger (quantum and electrostatic gate

to source values) of the nanotube itself are negligible compared to the extrinsic and

parasitic capacitances. This is a consequence of the fact that the gate electrode width

(5µm) for the conventional layouts (e.g. in [2]) is three orders of magnitude larger than

the CNT diameter (3nm) leading to relatively large extrinsic overlap capacitance. This

has been the case so far for published CNFETs largely due to the ease of fabricating

micrometer wide gate widths.

For this set of dimensions, switching to a high resistivity silicon substrate does

not have a significant influence on the -3dB bandwidth because for low n, the zero due

to Cgd dominates the response and for large n, the pole due to the total gate to source

overlap capacitance dominates. These capacitances are independent of the substrate.

If nanometer scale gate width/finger is used (e.g. in the improved layout, Figure 4.3c

with We≈Wg,eff), the overlap capacitances between the gate and electrodes would drop

significantly and the measurable bandwidth would increase appreciably. Figure 4.5

shows the bandwidth for n=1000 and for the same set of dimensions as in Figure 4.4

but with the gate width/finger swept from 10nm to 10µm.

99

107

108

109

1010

1011

S2

1 (

dB

)

Frequency (Hz)

n=1000

n=1

n=10

n=50

n=100

-60

-50

-40

-30

-20

-10

0

10

n=500

Figure 4.4: Frequency response of the gain of common-source CNFETs plotted for

several values of n. Gate width (We) is 5µm.

100

Table 4.3: Capacitances per finger for design example

Parameter Description Value*

Cov Gate-Source overlap

capacitance

1 fF

Cgd Gate-Drain overlap

capacitance

1 fF

Cgs,Q Gate-Source

quantum capacitance

0.02 fF

Cgs,ES Gate-Source

electrostatic

capacitance

0.016 fF

* The dimensions used are Wpad=50µm, lcnt=50nm, tbot=2µm, We=5µm, εtop=15,

ttop=8nm, and d=3nm. The gate overlap capacitance was determined by electrostatic

simulation to be 0.2fF/µm using a device geometry similar to [2].

101

101

102

103

104

8

9

f-3

dB

(H

z)

Gate width/finger (nm)

n=1000

10

10

10

10

10

11

Figure 4.5: f-3dB of the common-source CNFET (with n=1000) plotted as a function of

the gate width/finger for the same dimensions as in Table 4.3.

102

The transconductance and the capacitance values in Table 4.3 are taken to be

the same with the exception of the gate overlap capacitance which scales in proportion

to the gate width (We). For this set of dimensions, the -3dB bandwidth scales linearly

as the gate width/finger reduces from 10µm to 1µm and quasi-linearly between 1µm

and 100nm due to the growing impact of the pad capacitance. Below 100nm, Cpad is

the dominant contributor to Cgs,tot and the bandwidth becomes roughly independent of

gate width/finger.

In general, two factors can be identified as responsible for limiting the

improvement in bandwidth that can be measured as the gate width/finger is scaled

down. One is the parasitic feed-forward capacitance (Cff in Figure 4.1a) between the

input and output probe pads which appear in parallel with Cgd and hence sets a

minimum limit on the gate to drain capacitance. Another factor is Cpad which

contributes two poles to the frequency response and limits the bandwidth even if the

gate to source/drain overlap and feed forward capacitances are eliminated altogether.

4.2.6 Conclusion

We have analytically examined the various frequency profiles that can be

expected from current state of the art CNFETs. Our analysis shows the effects of

probe pad and overlap capacitances on the measurable -3dB bandwidth of carbon

nanotube FETs.

The potential of CNTs as a viable RF transistor technology will depend on

demonstration of CNFETs with gain at GHz frequencies. For this to be achieved,

many nanotubes would have to be fabricated precisely in parallel, which is currently a

matter of active research. Moreover, techniques to minimize the gate overlap

capacitance will have to be explored so as to achieve GHz bandwidths.

Acknowledgments

Many thanks to Professors Hongjie Dai and Boris Murmann at Stanford University for

useful discussions. This work is supported in part by the Powell Foundation and the

FENA MARCO Focus Center Research Program.

103

4.3 Carbon Nanotube Quantum Capacitance for Non-

Linear Terahertz Circuits

(Reproduced with permission from D. Akinwande, Y. Nishi, and H.-S. P. Wong, “Carbon Nanotube

Quantum Capacitance for Non-Linear Terahertz Circuits”, IEEE Trans. Nanotech., vol. 8, 2009)

Deji Akinwande, Yoshio Nishi, and H.-S. Philip Wong

CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF ELECTRICAL

ENGINEERING

STANFORD UNIVERSITY, STANFORD, CA, 94305, USA

Abstract: Analog circuit applications of the non-linear carbon nanotube quantum

capacitance such as frequency doublers and mixers are proposed. We present a

balanced circuit implementation and derive the transconductance conversion gain for

the non-linear carbon nanotube quantum capacitor circuit. The balanced topology

results in robust circuit performance that is insensitive to extrinsic capacitances and

parasitic resistances and is immune to the resistance of metallic nanotubes that may

be in the channel. The ballistic quantum capacitance is useful up to several terahertz,

making it suitable for low-noise THz sources. Additionally, the fundamental bandwidth

and performance limitations imposed by the quantum conductance and inductance are

discussed.

4.3.1 Introduction

Carbon nanotubes (CNTs) are tubular cylindrical arrangement of carbon atoms

with diameters on the order of 1 to 5 nm [18]. They have characteristic quantum

features such as finite density of states and van-Hove singularities due to the unique

physics of one-dimensional solids. These quantum features are real and measurable

and manifest in electrical circuits as quantum conductance, quantum capacitance and

the kinetic inductance [16, 19, 20]. The impact of the quantum conductance and

104

capacitance on electronic circuits continues to enjoy increasing understanding and as

such have been included in comprehensive, compact, and RF models of CNT

transistors [21-25]. Recent measurements of the quantum capacitance have confirmed

theoretical predictions [26, 27] and raised interesting questions as to what kind of

circuits in analog, digital, and memory systems could utilize the rich features of the

quantum capacitance for original and existing applications. One important circuit

function is to use the non-linear property of the quantum capacitance for terahertz

(THz) frequency multipliers and sources with applications ranging from

communications to security [28].

In this paper, we present the first analytic exploration and circuit simulations of

non-linear circuits exploiting the CNT quantum capacitance such as frequency

multipliers and mixers including parasitic effects. Previous work had reported mixing

with CNT transistors, taking advantage of the non-linearity inherent in a classical

square-law transistor [9]. Here, our focus is on using the novel quantum capacitance

directly and we present a circuit model, practical circuit implementations, and

discussion of the performance metrics and bandwidth limitation imposed by the finite

quantum conductance and kinetic inductance. When operating in the ballistic region,

the CNT dissipates no energy in the channel, hence generates no thermal noise,

resulting in intrinsically low-noise multipliers. Sustained exploration of the quantum

capacitance for circuit applications is a fruitful path for advancing CNTs as a state of

the art nano-electronic device.

4.3.2 CNT Capacitor Circuit Model

In linear capacitors, the charge is linear with voltage resulting in a constant

capacitance. The semiconducting CNT quantum capacitance is a non-linear capacitor

(NLC) which essentially reflects the CNT density of states [20], in contrast to a

MOSCAP or classical diode varactor which is due to a dynamic geometric capacitance.

As such, NLCs are naturally useful for a variety of non-linear circuits [14, 29]

including varactors, and frequency multipliers.

The CNT NLC is electrically visible and measurable in the standard top-gated

transistor geometry [26] illustrated in Figure 4.6, where ideally the CNT device will be

105

embedded in an integrated circuit and avoid direct exposure to the large parasitic

capacitances of probing or bonding pads. Additionally, the source and drain are

shorted together to form a two-terminal device which we henceforth call the CNT

NLC device for clarity in the rest of this work. For sufficient current drive and

performance at high frequencies, the NLC device will contain a dense array of

perfectly aligned identical semiconducting nanotubes of the order of a 100 CNTs/µm,

which is about four times greater than current state of the art peak densities grown on

crystalline quartz substrates [30]. It is quite fortunate that perfectly aligned arrays of

CNTs (Figure 4.6b) grow naturally on quartz substrates, which is the substrate of

choice for low-loss, temperature stable GHz and THz integrated circuits [31].

An equivalent circuit model of the CNT NLC device (shown in Figure 4.6) is a

lumped RLC model consisting of a voltage dependent capacitor (or varactor), a fixed

geometric capacitance, the kinetic inductance, series resistors and extrinsic

capacitances as shown in Figure 4.7a. For the case of a thick insulating substrate, the

substrate capacitances are negligible since the electric fields from the source/drain

electrodes are significantly screened by the gate electrodes and vice-versa due to their

relatively closer proximity. The screening effect simplifies the model by neglecting

the substrate capacitances as shown in Figure 4.7b. For clarity of discussion, we call

the model in Figure 4.7b the screened RLC model, and that of Figure 4.7a the

unscreened RLC model. We discuss quantitatively in §4.3.3 that the electrode to

substrate capacitance of the same order as the NLC has a negligible effect on circuit

performance.

106

Figure 4.6: Optimum device geometry for CNT quantum capacitance circuits.

(a) A top-gate CNT device cross-section with an intrinsic channel, useful for non-

linear analog circuits. The thin high-k dielectric enhances the contribution of the

quantum capacitance to the total gate capacitance, and the CNT extension regions are

heavily doped to minimize the contact resistance. Also, the substrate is insulating and

thick to minimize substrate capacitances. (b) On the bottom left is a top view of (a)

with dense aligned identical CNTs which are needed in the device to maximize the

current drive and performance at high frequencies. The gate (G), source (S), and drain

(D) are of nanoscale dimensions to reduce coupling capacitances, and the source and

drain are shorted together to make a two-terminal device. (c) Scanning electron image

of aligned arrays of nanotubes grown on quartz substrates.

107

Cg

Cq

Rg

Rc

Re

2Cgs

Cg_sub

2Cs_sub

Lk

Intrinsic

CNT model

Cg

Cq

Rg

Rc

Re

2CgsLk

a) b)

Figure 4.7: Two-port circuit models for a CNT quantum capacitance device.

(a) A lumped circuit model for the CNT NLC device including the quantum, Cq, and

geometric, Cg, capacitances, the contact (Rc), and the kinetic inductance (Lk) which are

the intrinsic contributions to the model. The extrinsic and parasitic components

include, the gate resistance (Rg), the source/drain interconnect resistance (Re), the gate

to source capacitance (Cgs), the gate to substrate capacitance (Cg_sub), and the source to

substrate capacitance (Cs_sub). For thick insulating substrates, the substrate

capacitances are negligible due to screening effects resulting in the simplified screened

RLC model shown in (b).

108

The goal of this work is to explore the non-linear analog circuit applications of

nanotubes NLC, and estimate the performance metrics. For that purpose, it is

worthwhile to briefly discuss the contact resistance (Rc) and kinetic inductance (Lk) of

the nanotube extensions. In the ideal case of a defect free CNT that is shorter than the

mean free path (typically >0.5µm) [32], the contact resistance approaches the ballistic

value of Rq/2, where Rq=6.5kΩ and the factor of two is due to the shorting of the

source and drain electrodes. An additional benefit of the shorting is that any metallic

CNT in the array is automatically shorted and its resistance becomes irrelevant.

Moreover, as long as the ratio of semiconducting to metallic CNTs is large enough,

the constant quantum capacitance of metallic CNTs contributes negligibly to the total

Cq. In the ballistic limit, the CNT generates no thermal noise since Rq is not an Ohmic

resistance but a fundamental quantum resistance [33], which is needed in the model to

account for the time constant associated with Cq and Lk, governed by the energy time

uncertainty relations [34]. In a non-ballistic CNT device, the electrical performance

and noise will degrade accordingly.

The value of the kinetic inductance for semiconducting CNTs is currently a

matter of research and generally non-constant. However, it is reasonable to expect the

inductance to be of the same order as that of a metallic CNT, which is ~3.2nH/µm.

Since the intrinsic CNT model is capacitive at frequencies below the self resonant

frequency (wSRF=(LkCNLC)-1/2, where CNLC=Cq||Cg), the precise variation of the kinetic

inductance is not that important at lower frequencies. As a result, we use a constant

value of 3.2nH/µm for Lk and this allows us to estimate the maximum frequency where

the screened RLC model is valid. At frequencies beyond wSRF, the precise value of the

inductance and its variation with gate voltage will have to be taken into account.

The critical element for non-linear analog circuit applications is the quantum

capacitance, and moreover the series combination of Cq and Cg generally retains the

non-linear property of Cq. In this work we use measured data for the NLC (CNLC) to

represent practically achievable values for the CNT capacitance leading to reasonable

estimates for circuit performance. Figure 4.8 shows the measured CNLC vs. Vg (gate

voltage) of a semiconducting CNT reflecting the quantum capacitance [26], which is

109

generally non-analytical. However, for small-signals where the gate voltage is suitably

restricted, it is possible to describe the C-V by simple analytical equations. An

example of a linear C-V approximation of the first sub-band is shown superimposed

on Figure 4.8. The linear C-V leads to a charge density that depends quadratically on

voltage. It is worthwhile to note that this linear C-V region is the most suitable for

non-linear analog circuits. At high gate voltages, the capacitance saturates to the

geometric capacitance. The linear C-V is also potentially useful for voltage controlled

oscillators (VCO), and favorable in varactor tuned phase locked loop circuits.

4.3.3 Quantum Capacitor Analog Circuits

In this section we explore the use of the quantum capacitor for two specific

non-linear analog circuits, one is the frequency doubler and the other is the mixer. For

hand analysis which requires simplicity, we calculate analytically the ideal

performance for the CNT NLC device ignoring all resistors, the kinetic inductance,

and the extrinsic Cgs of the screened RLC model (Figure 4.7b). Afterwards, we

simulate actual circuit implementations including the non-idealities. Because the NLC

dominates the circuit dynamics, the agreement between simulation and hand analysis

is strong.

There are two intrinsic time constants or poles of importance in the screened

RLC model impacting circuit performance dramatically. For simplicity of notation, we

will use the radial frequency (w) and actual frequency (f) interchangeably, where

w=f/(2п). One pole is the self resonant frequency, fSRF. Using a value of ~30aF/µm for

CNLC (center of the linear C-V region of Figure 4.8), and 3.2nH/µm for Lk, fSRF ~0.52

THz µm. The other pole is due to the RC time constant defined as fRC=(2пRcCNLC)-1

~1.6 THz µm with ballistic values of 3.25KΩ for the contact resistance. For a 100nm

channel length which is the CNT length used in this work, fSRF ~5.2 THz and fRC ~16

THz. Shorter lengths result in even higher poles, which indicate that the CNT NLC

device offers larger bandwidth compared to conventional solid-state Schottky barrier

diodes [28, 35].

110

0

10

20

30

40

50

60

70

80

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0

Vtg

Cto

t (a

F/u

m)

Measured Data [Ilani et at.]

Linear Fit

Figure 4.8: Measured NLC capacitance (including the quantum, Cq, and geometric, Cg,

contributions) vs top-gate voltage of a CNT device with source/drain shorted [26].

For convenience the C-V has been horizontally re-centered such that the bottom is at

0V. The linear fit has a slope m=122aF/Vµm, and intercept Co=-26aF/µm.

111

For frequencies much less than the dominant pole, the screened RLC model can be

approximated by the single non-linear capacitor (CNLC) for hand analysis with

negligible error, which greatly reduces the circuit’s differential equations to an

algebraic analysis.

In the linear region, the non-linear capacitor (CNLC) is

ogNLC CtmVtC +≈ )()( (1)

where m is the slope of the linearized C-V curve, and Co is the offset. The dynamic

gate current is:

dt

tdVC

dt

tdVmdVC

dt

d

dt

dQti

g

o

g

gNLCg

)()(

2

1)(

2

+=∫== (2)

The first term leads to interesting non-linear behavior because of the quadratic

dependence on voltage, while the latter term is the classical displacement current.

A. Quantum Capacitor Frequency Doublers

Frequency doublers are circuits that double the input frequency. Consider an

input sinusoid

DCog VwtVtV += )sin()( (3)

where VDC is required to bias the device at the center of the linear region, and Vo is the

amplitude. The gate current per nanotube is

)cos()()2sin(2

)( 2wtwVCmVwtmV

wti ooDCog ++= (4)

The first term is the desired doubled signal and the latter term is the feed-through and

is typically cancelled by using balanced circuits [14, 29]. For N identical CNTs, the

total gate current is Nig(t). For maximum current, the capacitor should be fully driven,

i.e., Vo should swing over the entire linear range of the C-V. The primary figure of

merit (FOM) is the transconductance conversion gain or loss (Gc) which is the

magnitude ratio of the doubled output signal to the input signal.

o

g

g

c mVw

wV

wiG

2|)(|

|)2(|== (5)

For maximum conversion gain, the device would ideally have a large slope (m)

and be operated at high narrowband frequencies with the maximum voltage swing. It

112

is useful to define a quantum transconductance conversion gain (Gq), which occurs in

the quantum limit when CNLC≈ Cq, and EF≈ eVg, where EF is the CNT Fermi energy or

chemical potential and e is the electronic charge. The quantum limit is approached

when Cg >> Cq,peak, where Cq,peak at room temperature is of the same order as the

metallic CNT quantum capacitance (~0.3fF/µm [20]). Practically, this could be

achieved with a 3nm thick TiO2 gate dielectric (εr≈80), resulting in Cg≈2fF/µm for a

1.5nm wide CNT. In the quantum limit, Gq can be considered a FOM that provides

design intuition and is an upper bound on the achievable gain. For this case, m in (1)

can be obtained by using the quantum capacitance equation derived in [27].

)cosh(4

)( 22

kT

eVe

kT

NeCVC

gkT

E

cqgNLC

g−

=≈ (6)

where Nc is the effective density of states in units of 1/meter, kT is the thermal energy,

and Eg is the bandgap energy . The C-V slope is

)()tanh(| DCqDC

q

g

q

V VCkT

e

kT

eVC

kT

e

V

Cm

DC≈=

∂

∂= (7)

where the hyperbolic tangent has been approximated as unity for almost all practical

values of its argument since VDC will typically be hundreds of millivolts and several

times greater than kT (e.g tanh(>2)>0.96). The input signal amplitude must always be

a fraction of the bandgap, eVo=αEg, where α is less than one. Therefore, from (5)

)(2 DCq

g

q VCkT

EwG α= (8)

which shows that circuit performance is explicitly related to the normalized band gap.

Furthermore, the dependence of (8) on the quantum capacitance provides insight on

the gain and bandwidth product (Gq fSRF) in the quantum limit (assuming the self

resonant frequency is the dominant pole),

k

g

k

qg

SRFqLkT

E

L

C

kT

EwfG

π

α

πα

84<= (9)

The inequality arises by noting that w<wSRF/2. Eqn. (9) reveals that the largest gain

bandwidth is obtained with the largest ratio of Eg/Lk.

A practical implementation of a frequency doubler utilizing a CNT NLC is

shown in Figure 4.9. This circuit is widely known as a balanced circuit, [14, 29]

113

because the differential and common mode output currents can be separated and

routed differently. In the specific output connection of Figure 4.9, the common-mode

(desired) output currents are coherently routed to the output load (RL) while the

differential mode (unwanted) currents cancel. For an input oscillating at 500GHz, and

the output at 1THz, the simulated output power of -51.9dBm compares very well with

the estimate of -52.3dBm using (5). The power conversion loss (input power-output

power) is -13.9dB. The CNLC slope and intercept are 12.2aF/V and -2.6aF per nanotube

respectively (from Figure 4.8). The density of identical CNTs used in the balanced

circuit is 100 CNTs/µm and the NLC device width is 100nm yielding a total of 10

CNTs/device.

It is worthwhile to discuss the values of the extrinsic capacitance Cgs and the

parasitic resistances Re and Rg used in Figure 4.9. Due to the balanced topology of the

circuit, the currents flowing through Cgs is out of phase (differential mode) and

therefore cancels at the output load. As a result, the effect of Cgs is negligible and we

chose a value that is equal to the average CNLC for convenience. However,

transformers are not perfect in practice; therefore there will be some residual Cgs

current at the load. The magnitude of this current will depend on the degree of

imbalance in the transformer and the value of Cgs. For this reason it is typical to

include a bandpass filter to further suppress undesired signals. Likewise, the parasitic

resistances have negligible effect on the output signal because their practical values

are typically orders of magnitude smaller than the CNT contact resistance. In the

circuit simulation, Re and Rg are set to 10Ω each, a reasonable value for small footprint

nanoscale dimensions.

114

1 2 30 4

-2

0

2

-4

4

1 20 3

-90

-70

-110

-50

Figure 4.9: Proposed carbon nanotube quantum capacitance frequency doubler circuit.

(a) Schematic of a balanced frequency doubler utilizing a 0.1µm long CNT quantum

capacitor. The non-linear admittance (Ycnt) represents the screened RLC model of

Figure 4.7b. L1 (24pH), L2 (1.6nH), and C1 (2.9fF) are for resonant matching to the

source (Rsrc=50Ω). The center tapped balun is an ideal 1:1 transformer and RL is the

50Ω load. CNLC is given by (1) with parameters m=12.2aF/V and Co=-2.6aF at

VDC=0.47V. The source (Vsrc) oscillates at 500GHz with an amplitude Vo=0.2V. (b)

Agilent ADS™ harmonic balance simulated waveform. The insert is the output

spectrum with -51.9dBm at 1THz, and total Gc=80.2uS. The finite harmonics above

1THz are due to the contact resistance and kinetic inductance.

115

Furthermore, the substrate capacitance Cs_sub of the unscreened RLC model

also has negligible effect on the conversion gain provided its frequency pole (fs_sub) is

much larger than the operating frequency. As a rule of thumb, a good circuit design

would require the pole frequency to be much larger than the dominant circuit

frequency pole, for example fs_sub≥10fSRF ≈50THz. This results in an (open circuit time

constant) estimate of Cs_sub≈30aF≈10CNLC(VDC). This value of substrate capacitance

leads to less than 3% reduction in Gc. Similar values of Cg_sub≈10CNLC(VDC) causes

about 10% drop in the conversion gain.

B. Quantum Capacitance Frequency Mixers

The purpose of a frequency mixer is to take two inputs at different frequencies

and output two signals that are the arithmetic sum and difference of the input

frequencies. For an input that consists of the information carrier frequency (wc) and

the local oscillator (wlo, wlo>wc),

DCloloccg VtwVtwVtV ++= )sin()sin()( (10)

the output current computed from (2) is the sum of currents from the fundamental

oscillations, the second harmonic oscillations, and the oscillations arising from mixing.

The first two terms are undesired and cancelled by using a balanced circuit [14]. The

mixing current (imx) is:

])sin()()sin()[(2

)( twwwwtwwwwVmV

ti clocloloclocloc

mx −−−++= (11)

The upper sideband and lower sideband conversion gains are respectively,

loloc

cg

locmxusb mV

ww

wV

wwiG

2

)(

|)(|

|)(| +=

+= (12a)

loclo

cg

clomxlsb mV

ww

wV

wwiG

2

)(

|)(|

|)(| −=

−= (12b)

For most applications only one of the two output frequencies is selected. To obtain

maximum conversion gain, the same considerations mentioned above for frequency

doublers hold as expressed in (8) and (9). Figure 4.10a is a schematic of a double

balanced mixer, utilizing the CNT quantum capacitance.

116

0.5 1.0 1.5 2.0 2.50.0 3.0

-125

-100

-75

-150

-50

Freq. (THz)

Power (dBm)

RL

out

Ycnt

Vlo

Rsrc

Ycnt

Ycnt

Ycnt

Vc

-Vc

C1

L2L1

-Vlo

Rsrc

C1

L2L1

a)

b)

Figure 4.10: Proposed carbon nanotube quantum capacitance frequency mixer circuit.

(a) Schematic of a double balanced upconverter frequency mixer utilizing a 0.1µm

long CNT quantum capacitor. The non-linear admittance (Ycnt) represents the screened

RLC model of Figure 4.7b. CNLC is given by (1) with parameters m=12.2aF/V and

Co=-2.6aF at VDC=0.47V which is coupled to Vc. The two input local oscillators are

driven differentially at 500GHz (|Vlo|=200mV), and likewise for the two input carrier

sources at 10GHz (|Vc|=50mV). The differential inputs are necessary to provide

rejection for undesired output currents. The center tapped baluns are ideal 1:1

transformers, and the 50Ω input matching network (L1, C1, L2) have identical values

as in Figure 4.9. (b) Agilent ADS™ harmonic balance simulated output spectrum in

good agreement with analytical estimates from (5) for the desired mixer output at

490GHz and 510GHz. The undesired harmonics and spurs (<-40dBc) are due to the

contact resistance and kinetic inductance.

117

The carrier oscillates at 10GHz, the local oscillator is at 500GHz, and the two

mixer output signals are at 490GHz and 510GHz. The CNLC slope and intercept are

12.2aF/V and -2.6aF per tube respectively (from Figure 4.8) for a channel length of

0.1µm. The density of identical CNTs used in the circuit is 100 CNTs/µm and the

NLC device width is 100nm yielding a total of 10 CNTs per device.

The output spectrum of the mixer obtained by harmonic balance simulation is

shown in Figure 4.10b. The simulated output power of about -58dBm is within 0.5dB

of the estimate from (12). The effects of the parasitic capacitances and resistances

discussed for the doubler circuit also hold for the mixer circuit with negligible effect

on output spectrum for operating frequencies much less than the poles of the parasitic

capacitances.

4.3.4 Conclusion

Non-linear circuits such as frequency doublers and mixers exploiting the

quantum capacitance of carbon nanotubes have been analyzed, showing good

agreement with circuit simulations based on a measured CNT quantum capacitor

device. The CNT non-linear circuits show robust transconductance conversion gain

that is immune to extrinsic capacitances and parasitic resistances. The functionality of

the proposed CNT circuits is achievable with current technology involving aligned

nanotube arrays on quartz substrates. The main potential of quantum capacitor non-

linear devices is the high achievable bandwidths in the THz range, and the vanishing

thermal noise under ballistic transport, making them ideally suitable for THz sources.

As a result, it is expected that the CNT quantum capacitor will be a future

nanoelectronic alternative to solid state diode multipliers.

Acknowledgements

The authors would like to thank Dr. Shahal Ilani and Prof. Paul McCuen (Cornell

University) for providing CNT quantum capacitance data [26]. This work is supported

in part by the Focus Center Research Program (FENA and C2S2). Additional support

118

from the Ford foundation and the Alfred P. Sloan foundation are much appreciated by

D. A.

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[3] J. Chen, C. Klinke, A. Afzali, and P. Avouris, "Self-aligned carbon nanotube transistors with

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[12] Cascade Microtech Application Note, "Introduction to Bipolar GHz Measurement Techniques"

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[15] A. S. Sedra and K. C. Smith, Microelectronic circuits, 5th ed.: Oxford University Press, 2004.

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[16] P. J. Burke, "An RF circuit model for carbon nanotubes," IEEE Trans. on Nanotechnology, vol.

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[17] Cascade Microtech Application Note, "Mechanical Layout Rules for Infinity Probes".

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[19] S. Luryi, "Quantum capacitance devices," Applied Physics Letters, vol. 52, pp. 501-503, 1988.

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modeling," Journal of Applied Physics, vol. 96, pp. 5180-5184, 2004.

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[22] J. Guo, A. Javey, H. Dai, and M. Lundstrom, "Performance analysis and design optimization

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[23] D. Akinwande, G. F. Close, and H.-S. P. Wong, "Analysis of the Frequency Response of

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[24] L. C. Castro, D. L. John, D. L. Pulfrey, M. A. P. M. Pourfath, A. A. G. A. Gehring, and H. A.

K. H. Kosina, "Method for predicting f/sub T/ for carbon nanotube FETs," IEEE Trans. on

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[25] K. Natori, Y. Kimura, and T. Shimizu, "Characteristics of a carbon nanotube field-effect

transistor analyzed as a ballistic nanowire field-effect transistor," Journal of Applied Physics,

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[26] S. Ilani, L. A. K. Donev, M. Kindermann, and P. L. McEuen, "Measurement of the quantum

capacitance of interacting electrons in carbon nanotubes," Nature Physics, vol. 2, pp. 687-691,

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[27] D. Akinwande, Y. Nishi, and H.-S. P. Wong, "Analytical Model of Carbon Nanotube

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terahertz window with integrated diode circuits," IEEE Journal of Solid-State Circuits, vol. 40,

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121

5 Chapter 5

MATERIAL SYNTHESIS AND SURFACE SCIENCE

5.1 Preface

It is self-evident that for any new material to be widely utilized in a broad

variety of applications, it must undoubtedly be relatively easy to manufacture at a

high-quality and with a reasonable idea of its as-made properties. This requirement

applies to carbon nanotubes (CNTs) as well; plus the additionally need for synthesis of

high-density parallel arrays of nanotubes. High-density arrays of identical or similar

nanotubes are essential for high-current and high-performance digital and analog CNT

electronics.

In this light, this work explores the surface science of catalyst dynamics to

elucidate the role that the catalyst treatment, the catalyst-substrate interaction, and the

process conditions play in the synthesis of carbon nanotubes. The obtained insight

paved the way for the synthesis of dense arrays of nanotubes with average and peak

densities of ~5 CNTs/um and ~30 CNTs/um respectively. In addition, the obtained

understanding of the surface science gained from spectroscopy and other experimental

methods was condensed into an illustrative model which explains the surface physics

and surface chemistry of catalyst-surface evolution leading to the growth of CNTs.

All the work was conceived and performed by the author with Nishant Patil

and Albert Lin collaborating on the full-scale wafer growth of dense horizontally

aligned carbon nanotubes shown in Figure 5.7.

122

Surface Science of Catalyst Dynamics for Aligned Carbon

Nanotube Synthesis on a Full-Scale Quartz Wafer

(Reproduced with permission from D. Akinwande, N. Patil, A. Lin, Y. Nishi, and H.-S. P. Wong,

“Surface Science of Catalyst Dynamics for Aligned Carbon Nanotube Synthesis on a Full-Scale Quartz

Wafer”, Journal of Physical Chemistry C, vol. 113, 2009)

Deji Akinwande, Nishant Patil, Albert Lin, Yoshio Nishi, and H.-S. Philip Wong

CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF ELECTRICAL

ENGINEERING

STANFORD UNIVERSITY, STANFORD, CA, 94305, USA

Abstract: The surface chemistry and physics of evaporated metallic iron catalysts on

crystalline quartz substrates is elucidated via detailed microscopy and spectroscopy

for the purpose of synthesizing dense aligned carbon nanotube (CNT) arrays. It was

found that the as-evaporated sub-monolayer iron was predominantly an oxidized

nanoporous film at room temperature in air. Subsequently, at high temperatures

(~865°C), hydrogen gas appears to play an important role in de-wetting of the surface

in a short duration and facilitating discrete iron nanoparticle formation which is

critical for the growth of self-aligned individual single-wall CNTs by catalytic

chemical vapor deposition. Additionally, residual carbon contamination of the surface

in the high vacuum evaporator was identified and mitigated by an improved surface

pretreatment resulting in dense CNT synthesis at a wafer-scale. This work provides

detailed understanding of the physical chemistry of the catalytic surface and

represents a step forward in repeatable synthesis of dense aligned CNT arrays

uniformly at a large wafer scale.

123

5.2 Introduction

The growth of long aligned carbon nanotubes (CNTs) on arbitrary wafer sizes

is highly desirable for large scale integrated sensors and nanoelectronics [1-3]. While

there exists some methods to align CNTs in-situ during growth, the most attractive in

terms of alignment accuracy and resulting CNT density is the catalytic chemical vapor

deposition (CVD) process on crystalline quartz or sapphire substrates [2, 4]. However,

preserving the CNT density on arbitrary wafer sizes with repeatable and uniform

density dispersion has been challenging. Furthermore, it is highly desirable to

significantly increase the state-of-the-art average density of aligned CNTs from

current estimates of 5-10 CNTs/um [2, 5] in order to satisfy high performance

nanoelectronic requirements and minimize device size [6-8]. As a result, it has become

necessary to understand the surface science of catalyst dynamics as a first step towards

optimizing the catalyst and surface pretreatment for dense perfectly aligned CNTs

uniformly dispersed at the wafer scale.

In this paper, a systematic investigation employing both microscopy and

spectroscopy at various stages of the synthesis procedure is undertaken to elucidate the

surface physics and chemistry of evaporated metal catalysts on crystalline quartz

substrates. It is resolved that the as-evaporated sub-monolayer iron exists as an

oxidized nanoporous film at room temperature, with a surface roughness of ~1.7Å

correlating with the 2±0.5Å estimate from the in-situ crystal monitor in the evaporator.

It is important to form isolated catalyst nanoparticles to obtain individual growth of

aligned CNTs [9, 10]. This was previously achieved by a long anneal in air at 900°C

for 1.5hrs [5]. We found that the formation of isolated nanoparticles can be similarly

achieved with an H2 anneal (~865°C) in a much shorter duration (~6mins) at sub-

atmospheric pressures. Therefore, hydrogen appears to play a critical role in

promoting rapid de-wetting of the nanoporous film, resulting in a dispersed array of

discrete catalyst nanoparticles. The time savings significantly increases the throughput

of synthesizing aligned CNTs which is an important consideration for high-volume

applications. Also, high-resolution x-ray photoelectron spectroscopy (XPS) reveals

that the nanoparticles are anchored to the substrate by an interfacial layer of iron

124

silicide which would favor a CNT root growth mode [11]. In-situ temperature

dependent XPS suggests that the as-evaporated oxidized iron transitions to metallic

iron at increasing temperatures consistent with the thermodynamic phase diagram of

oxidized iron [12]. It is concluded that at the growth temperature (using the synthesis

procedure outlined in the ‘experimental methods’ section), the nanoparticle is most

likely predominantly metallic iron which serves as the catalyst for the CVD synthesis

of CNTs.

In addition, unintentional amorphous carbon deposition onto the quartz surface

from an oil-based mechanical pump used during the pumping cycles of the high-

vacuum evaporator was identified and observed to contaminate the catalytic surface

which is detrimental to the yield, uniformity, and very likely the repeatability of

carbon nanotube growth employing iron catalysts for methane CVD. From XPS

studies, the contamination of the surface most likely occurs by the formation of Fe-C

chemical states. An improved surface pretreatment involving extended calcination and

reduction at high temperatures was found useful in desorbing carbon from Fe-C

species and mitigating the effects of amorphous carbon contamination. These results

emphasizes that nanoscopic understanding of the physical chemistry of the catalytic

surface, and knowledge of deposition systems and chambers [13] are similarly

important factors in achieving high density, repeatable and uniformly dispersed self-

aligned CNTs on a full quartz wafer.

5.3 Experimental Methods

A. CNT Synthesis.

Stable temperature (ST) cut single-crystal quartz wafers were annealed in O2 at

900°C for 8hrs in an atmospheric pressure furnace in order to heal the surface of

defects [5]. A sub-monolayer of iron (>99.95% purity) was evaporated at a pressure of

~10-7 Torr at a rate of ~0.2Å/sec for a total thickness of ~2Å as measured by the in-

situ precision crystal monitor in the mechanically pumped planetary electron-beam

evaporator (planetary rotation is ~30 revolutions/minute). The design of the evaporator

125

includes a cold trap to minimize hydrocarbons from back-streaming from the oil-based

pump into the deposition chamber. The carbon nanotube synthesis procedure consists

of two steps: a surface pretreatment step, and a growth step. The pretreatment begins

with a calcination of the sample in synthesized air (20% : 80%, O2 : Ar) for ~30mins at

550°C (will be termed initial calcination) in a CVD hot-wall horizontal furnace.

Afterwards, the furnace is pumped down to a base pressure of ~25mTorr and the

temperature is ramped up to ~865°C in Argon at a flow-rate of 1000sccm, followed by

an H2 anneal for 6mins at a flow-rate of 120sccm and a pressure of ~140Torr. The

growth results are not overly sensitive to the anneal time, for example, we find an H2

anneal of 10mins yields similar results. The CNT growth step commences with the co-

flow of H2/CH4 at a flow-rate of 120sccm/1100sccm and a sub-atmospheric pressure

of ~320-340 Torr for nominally 15mins at ~865°C. Subsequently, the furnace was

typically cooled to room temperature.

The surface properties were investigated at different stages of the surface

pretreatment step to shed light on the behavior of the catalyst film on the quartz

surface. In order to mitigate the detrimental effects of amorphous carbon deposition on

the sample surface during evaporation, an improved surface pretreatment is employed

to achieve the full-wafer results discussed in section 3.3. The improved surface

pretreatment involves an extended calcination to 625°C, followed by H2 anneal as the

temperature ramps up to 865°C.

Slight departures from this prescribed synthesis procedure also results in the

growth of carbon nanotubes as shown in the supporting information. In general,

optimization of the synthesis procedure is required for different surface pretreatment

in order to obtain the best results.

B. CNT Characterization.

Samples were characterized using a FEI XL30 Sirion thermal field emission

scanning electron microscope (SEM) with acceleration energies of ~1-5 KeV, a Veeco

Multimode atomic force microscope (AFM) operated in tapping mode at room

temperature, a PHI 5000 VersaProbe XPS system for measurements at room

126

temperature, and a Surface Science Instruments S-Probe XPS system for in-situ

temperature dependent measurements. Binding energy (BE) assignment and envelope

deconvolutions of the spectra were accomplished using the PHI MultiPak spectral

software. Both XPS chambers were maintained in ultra-high vacuum (UHV base

pressure < 4x10-10 Torr), and charge compensation (electron and ion beams) was

employed in the VersaProbe system to prevent accumulation of charge on the

insulating quartz substrate. Electrical measurements were done in a Cascade attoguard

probe station at room temperature in air.

5.4 Results and Discussion

The single-wall carbon nanotubes obtained with the synthesis procedure on

small quartz samples (<1cm2) with pre-patterned iron stripes are shown in Figure 5.1a-

b. These CNTs obtained using the initial calcination step are very well aligned with

average densities of ~5-10 CNTs/um and local densities as high as 30 CNTs/um in

agreement with previously reported results [5, 14]. The mean nanotube diameter

determined from AFM measurements of a large number of CNTs is ~1.2nm with a

standard deviation of ~0.3nm [15]. Figure 5.1c-d show the SEM image of a device

fabricated for two-port electrical measurements and the measured resistance

respectively, confirming that the CNTs are electrically active. The low-energy

resistance follows the expected Landauer model [16] and is predominantly due to the

electrical contribution of the metallic CNTs (the precise ratio of metallic to

semiconducting CNTs is not known for the specific synthesis procedure). Figure 5.1e

is the SEM image of initial growth results obtained on a 4” quartz substrate with good

alignment but low average densities (~0.1-0.3 CNTs/um).

The difficulty in reproducing the CNT densities obtained on small sample sizes

motivated a detailed systematic investigation of the surface science in order to

understand the catalytic surface and optimize the surface pretreatment for higher

densities on arbitrary wafer sizes.

127

20um100nm

20um

1

10

100

1000

0.01 0.1 1 1020um

e)

a) b)

d) c)

Figure 5.1: Images and device data from initial CNT synthesis.

a) SEM image of aligned single-wall CNTs grown on a small sample with average

densities of 5-10 CNTs/um. b) High-resolution AFM scan showing peak densities of

~30 CNTs/um. c) SEM image of a patterned CNT device for resistance measurements.

d) Resistance vs. length showing a constant-then-linear dependence on length. e)

Initial results of CNTs grown on a full 4” quartz wafer with poor densities of ~0.1-0.3

CNTs/um.

128

5.4.1 Surface Physics

Atomic force microscopy was used to elucidate the physical evolution of the

catalytic surface throughout the surface pretreatment process as shown in Figure 5.2.

The annealed crystalline blank quartz substrate initially has negligible texture as seen

in Figure 5.2a. After sub-monolayer iron evaporation, the surface reveals a disordered

nanoporous film with a root-mean-square (rms) roughness of ~1.7Å (Figure 5.2b). The

surface roughness is in good agreement with the evaporators’ in-situ thickness crystal

monitor measurement of 2±0.5Å, indicating that the surface roughness reflects the

evaporated thickness of sub-monolayer films. Calcination of the quartz sample and

temperature ramp-up in Argon to ~865°C improves the texture revealing a

polycrystalline nanoporous film (pore size ~ 8-14 nm) with an rms roughness of ~2.3Å

(Figure 5.2c).

Subsequent H2 anneal for ~6mins results in de-wetting of the surface leading to

a dispersed array of isolated nanoparticles with heights of ~3-4nm as shown in Figure

5.2d-f. The specific identity of the catalyst nanoparticles (either iron or iron oxide)

will be addressed in §5.4.2. A previously published surface pretreatment procedure for

aligned CNT growth employed a 900°C anneal for 1.5hrs in air to form isolated

nanoparticles [5]. The presence of H2 at low pressures (~140Torr) clearly appears to

rapidly facilitate isolated particle formation most likely by reducing the surface energy

for de-wetting and enhancing particle diffusion in a timescale that is an order of

magnitude shorter compared to the previous work [5]. Based on the AFM

investigation, it is concluded that the physical effect of the surface pretreatment is to

form a dispersed array of catalytic nanoparticles from an initial nanoporous film.

Further efforts are being devoted to more precisely understand the role of low-pressure

H2 in expediting particle formation.

129

Figure 5.2: AFM surface scans of iron catalyst on single-crystal quartz.

a) Blank quartz with negligible surface roughness (after 900°C O2 anneal). b) After

sub-monolayer Fe evaporation (surface roughness of nanoporous film ~1.7Å). c) After

calcination and Argon anneal to ~865°C (roughness ~1.7Å). d) After H2 anneal at

865°C for 6mins showing a dispersed array of isolated nanoparticles. e) A zoom-in

scan for section analysis (black horizontal line) to determine particle height which is

shown to be ~3-4nm in f). The scale bar is 100nm.

130

5.4.2 Surface Chemistry

In order to gain a clear knowledge of the identity of the chemical species

present on the catalytic surface, a detailed systematic XPS investigation was

conducted at different stages of the surface pretreatment procedure. Figure 5.3a shows

the XPS survey scan after Fe evaporation showing the expected peaks corresponding

to iron, silicon, and oxygen peaks from the quartz substrate. Also present on the

surface was carbon which was not intentionally deposited and represents

contamination. The origin of this carbon was not initially known, perhaps coming

from the ambient environment, the evaporation chamber, or the high temperature

anneal furnace. To determine the source of the carbon contamination, a controlled

experiment was performed between two samples. A sample labeled ‘blank’ is an

annealed quartz sample without Fe evaporated, while another labeled ‘controlled’ was

co-processed identically to the former but subsequently placed in the evaporation

chamber. The chamber was pumped down to base pressure, however no Fe was

evaporated. Both samples were housed in the same sample holder at all times and

experienced the same environment except when the controlled sample was placed in

the evaporator.

It is concluded from the XPS comparison (Figure 5.3b) that the excess carbon

originates from the evaporator which uses an oil-based mechanical pump. The process

of unintentional carbon deposition most likely involves residual back-streaming of

hydrocarbons from the pump oil into the evaporation chamber, and subsequently

adsorbing onto the sample surface. This is a stochastic process that is uncontrolled and

generally varies with evaporation.

131

Binding Energy (eV)

Binding Energy (eV)

Intensity (arb. units)

controlled

sample

blank

sample

8

3

Intensity (arb. units)

a)

b)

Figure 5.3: a) XPS survey scan after sub-monolayer Fe evaporation on quartz sample.

The elemental peaks have been assigned as shown. The presence of carbon on the

surface is unintentional. b) XPS investigation between a ‘blank’ sample (no Fe

evaporated) and a ‘controlled’ sample (with Fe evaporated) revealing that the

unintentional carbon originates from the evaporation chamber.

132

The next question regards addressing the role of carbon on the surface, and the

interaction between the Fe catalyst and the substrate. Figure 5.4a is the Si 2p core level

stacked spectra taken after different stages of the pretreatment procedure. At room

temperature, the observed predominant peak is due to SiO2 (the quartz substrate) with

a smaller peak on the right shoulder corresponding to the expected negative shift due

to Fe-Si interactions and in agreement with previous XPS studies of sub-monolayer

interactions between Fe and Si [17, 18]. At higher temperatures the intensity of the Fe-

Si increases and becomes the main observed peak after 865°C pretreatment which is

interpreted as the formation of an interfacial layer [19], stabilizing and anchoring the

nanoporous iron film to the substrate [11]. Physically, the interfacial layer represents

Fe nanoparticles partially embedded in the substrate, a view supported by reported

transmission electron microscopy studies on the structure of Fe particles on oxidized

substrates [20, 21]. Additionally, it is worthwhile to note the absence of a SiC peak

which has a characteristic BE ~100eV [22], indicating that the unintentional carbon is

not reacting with Si in a detectable amount at the relevant temperatures of interest in

this work.

Figure 5.4b is the core level XPS spectrum at the binding energies

characteristic of C 1s. The envelope has been deconvolved into four peaks using a

Gaussian-Lorentzian distribution with a ‘goodness of fit’ parameter Χ2<0.5 indicating

a good fit [23]. The four peaks have been assigned to the most likely carbon species

based on the characteristic binding energy of elemental C (BE~284.5eV) [22] and the

positive (negative) energy shifts associated with the more (less) electronegative carbon

species. The spectrum was taken after 865°C H2 anneal of the sub-monolayer

evaporated Fe on crystalline quartz (the spectrum taken immediately after Fe

evaporation which is not shown was very similar). Noticeable is a strong peak due to

Fe-C (reported BE of ~282.6eV) [24] which has been previously observed to form

from evaporated sub-monolayer carbon on iron at room temperature [25]. The strong

Fe-C peaks suggest that the unwanted amorphous carbon contaminates the surface by

carbidization of iron which is interpreted as detrimental to the efficiency of the metal

catalyst for single-wall CNT growth using methane CVD.

133

Figure 5.4: a) Si 2p XPS core level spectra after sub-monolayer Fe evaporation.

i-25°C, ii-after 550°C calcination, iii-after 865°C Ar anneal, iv-after 865°C H2 anneal.

A negative chemical shift is observed at the high temperatures implying the formation

of an iron silicide interfacial layer. b) C 1s core level spectrum after 865°C H2 anneal.

The spectrum has been deconvolved into four peaks. The prominent Fe-C peak

indicates that the unintentional carbon results in carbidization of Fe. c) XPS spectra

for the Fe 2p1 and 2p3 core levels. The intensity ratio in d) shows a transition from

oxidized Fe to metallic Fe at high temperature. The intensity ratios for Fe2O3 and

metallic Fe have been included as a reference.

134

The spectra in Figure 5.4c address the issue of determining the chemical state

of the nanoparticles. Are the particles predominantly oxidized iron or metallic iron

preceding CNT growth? The sample was placed in the ultra-high vacuum XPS

chamber and high-resolution scans were taken in-situ at three different temperatures to

study the chemical evolution of the catalyst. While the temperature dependent spectra

were taken in UHV conditions, and the actual pretreatment conditions are at sub-

atmospheric pressures, it is expected that the results obtained in UHV generally apply

to the actual conditions particularly at the highest temperature. This is because the

presence of inert argon gas in the actual pretreatment is not likely to play a role in

changing the chemical nature of the catalyst. The XPS intensity ratio (Fe 2p3 peak

normalized to the Fe 2p1 peak) shown in Figure 5.4d is a useful method to distinguish

between metallic iron and its oxidized states [22, 26].

The ratio shows a transition from oxidized iron at room temperature to metallic

iron at higher temperatures consistent with the vanishing solubility of oxygen in solid

iron from the phase diagram of iron-oxygen systems [12]. At the pre-growth

temperature of ~865°C, an extrapolation of the intensity ratio concludes that the

nanoparticles exist mostly as metallic Fe. This is certainly the most plausible chemical

state for Fe during the actual H2 reduction pretreatment step, and the conclusion is

supported by an experimental study of the complete reduction of oxidized iron in a

reducing gas at 850°C [27]. The catalytic nanoparticle is active in its metallic state [28,

29]. However, carbidized iron has a similar intensity ratio as metallic iron, therefore it

is likely the two species are present on the surface just before CNT growth. One specie

is the desired Fe nanoparticle which is an efficient catalyst, and the other is the carbon

contaminated Fe.

It is worthwhile to clarify the role of carbidized iron during CNT growth.

Detailed time-dependent transmission electron microscopy (TEM), x-ray diffraction,

and in-situ XPS studies have shown that iron carbide (predominantly in the Fe3C

phase) forms during the initial phase of CNT growth [11, 28, 30]. However, the

catalytic nanoparticle was metallic Fe preceding the CNT growth step. The premature

formation of carbidized iron during catalyst preparation (before CNT growth begins)

135

is what has been elucidated in this section, and it has been interpreted as degrading

catalytic efficiency. The exact nature of the Fe-C interaction (possibilities include iron

carbide compounds and/or Fe combined with organic groups) during the catalyst

pretreatment could not be determined from XPS because the possible Fe-C

interactions have very similar energy shifts. Additionally, the precise process of how

carbidization during catalyst pretreatment degrades the catalyst is yet unclear and

warrants further studies possibly using environmental TEM and in-situ time-resolved

XPS [28].

To mitigate the effects of carbon contamination, an improved surface

pretreatment (discussed in §5.3) was employed and the resulting spectra shown in

Figure 5.5b. The Fe core level spectra for the initial pretreatment procedure are shown

in Figure 5.5a. The peak at room temperature is assigned to Fe-C species which forms

in the UHV evaporator as the carbon contaminants interact with the evaporated Fe.

After calcination, the peaks due to the more electronegative oxidized iron species

(binding energies typically ~710.4-711 eV) [22, 26, 31] become visible as a result of

the higher oxidation activity at ~550°C. After H2 anneal, the oxidized iron is reduced

to metallic iron. However, the metallic iron re-oxidizes when exposed to air as the

sample is retrieved from the anneal furnace for insertion into the XPS chamber, which

explains the presence of oxidized iron in the XPS spectrum. The improved surface

pretreatment procedure which includes a higher temperature calcination step is more

effective (than the original procedure) in reversing Fe-C interaction (Figure 5.5b). This

occurs by the decomposition of the metastable carbidized iron at the higher calcination

temperature (a previously observed effect) [27] and the increased oxidation activity. A

longer H2 reduction step (~12mins) was subsequently employed to compensate for the

increased oxidation. The improved pretreatment procedure gave consistently higher

CNT yield (~5-10 CNTs/um) at the wafer scale.

136

Norm

alized Intensity

Norm

alized Intensity

Norm

alized Intensity

Figure 5.5: XPS comparison of initial and optimized pretreatment procedures.

a) Fe XPS core level spectra of the initial pretreatment procedure (after sub-monolayer

iron evaporation). i-25°C, ii-after 550°C calcination, iii-ramp up to 865°C and H2

anneal. The insert is a magnification of the Fe 2p3 peak (709-713 eV) showing the

presence of Fe-C species at room temperature (BE~710eV). At higher temperatures

the peaks due to the more electronegative oxidized iron species becomes visible. b)

Comparison between the Fe 2p3 spectrum of the initial pretreatment procedure and the

improved pretreatment procedure. The improved pretreatment procedure has a

decreased presence of Fe-C groups.

137

5.4.3 Illustrative Surface Science Model and Full Wafer Synthesis

A proposed model of the physical chemistry of the surface dynamics during

catalyst pretreatment is illustrated in Figure 5.6 (in the absence of surface

contamination). In brief, the as-evaporated sub-monolayer iron is a disordered

nanoporous film that is readily oxidized when exposed to the ambient environment.

Subsequent calcination and anneal serves to form an interfacial layer of iron silicide

which anchors the film to the substrate. Also, the crystalline structure of the

nanoporous film is improved and a growing fraction of the film is metallic iron.

During high temperature H2 reduction, de-wetting of the film occurs leading to a

dispersed array of isolated catalytic Fe nanoparticles.

Utilizing the improved surface pretreatment in the catalyst preparation (to

mitigate contamination) improved the density and uniformity of well-aligned carbon

nanotubes grown on full quartz wafers as demonstrated in Figure 5.7. The CNT

density and uniformity were reproducible on several quartz wafers processed in series

using the improved synthesis.

138

Figure 5.6: A proposed illustrative model of the catalytic surface physics and

chemistry during the catalyst pretreatment procedure.

At the outset of CNT growth, the catalyst is in the form of metallic iron nanoparticles

anchored to the substrate by an interfacial silicide. The precise stoichiometry of the

chemical states is not known.

139

T

C

F

L R

T

C

F

L R

T

C

F

L R

Top Center

FlatLeft Right

2um

Figure 5.7: SEM images of CNT grown on full 4” quartz wafer.

The growth was achieved using the improved synthesis procedure with significantly

higher density compared to the initial results of Figure 5.1f, and uniform density

dispersion across the wafer. Scale bar is 50um unless otherwise noted.

140

5.5 Conclusion

The surface chemistry and physics of the dynamics of evaporated iron catalysts

during surface pretreatment has been elucidated for the purpose of gaining

understanding of the surface science, and growth of well-aligned carbon nanotubes on

crystalline quartz substrates. It was found that the as-evaporated sub-monolayer iron

was predominantly an oxidized nanoporous film at room temperature in air. A

subsequent surface pretreatment procedure converted the oxidized nanoporous film to

a dispersed array of discrete metallic iron nanoparticles which served as the catalyst

for high density aligned CNT growth on a full-scale wafer. Moreover, contamination

of the surface during sample processing using oil-based vacuum systems was found to

be detrimental for high-density growth of CNTs. For optimum growth results, care has

to be taken to design a surface pretreatment procedure that mitigates contamination or

employ non-oil based vacuum systems.

This work represents a step forward in understanding the physical chemistry of

the catalytic surface, and synthesis of uniformly dispersed dense aligned CNT arrays.

Further work involves determining the maximum density of aligned CNTs achievable

from crystalline quartz substrates, which is a current question of interest in the

material synthesis of carbon nanotubes.

Acknowledgments

This work was supported in part by the Focus Center Research program (FENA and

C2S2), a Stanford graduate fellowship (N.P.), and Ford foundation and Stanford

DARE graduate fellowships (D.A). Extended discussions with Cara Beasley, Tom

Carver, Chuck Hitzman, and Dr. Jim McVittie were fruitful for this work. The CNT

processing and characterization were performed at National Science Foundation

supported facilities (Stanford Nanofabrication Facility and Stanford

Nanocharacterization Laboratory).

141

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144

6 Chapter 6

SILICON-CNT NANOTECHNOLOGY

6.1 Preface

It has gradually become clear in the course of the past five years that

integrating carbon nanotubes with conventional very large scale integrated (VLSI)

technology such as silicon (Si) is the least disruptive and most attractive technology

entry option for nanotubes in contrast to the alternative which would be an all CNT

stand-alone nanotechnology. Integrating nanotubes with silicon VLSI leverages all the

benefits of a mature well-understood technology with the added advantages that CNTs

offer in terms of high-performance electronics. Furthermore, nanotubes can provide

added functionality such as molecular sensing which when integrated on a Si VLSI

chip for peripheral electronics enables practical sensor products.

For this purpose, monolithic integration of carbon nanotubes with commercial

silicon VLSI technology was demonstrated for the first time. A post-silicon fabrication

process was developed to place nanotubes at defined locations on a VLSI chip and

subsequently interconnected to silicon integrated circuits. The vehicle circuit

employed for the demonstration was a cascode amplifier consisting of a silicon

transistor connected to a carbon nanotube transistor showing operation in the MHz

range.

All the work was conceived and performed by the author in collaboration with

Shinichi Yasuda, Bipul Paul, Gael Close, Shinobu Fujita, and H.-S. Philip Wong. The

author designed the CMOS circuit, developed the process for integrating nanotubes

with Si-CMOS and did all the fabrication and experimental work.

145

Monolithic Integration of CMOS VLSI and CNT for Hybrid

Nanotechnology Applications

(Reproduced with permission from D. Akinwande, S. Yasuda, B. Paul, S. Fujita, G. Close, and H.-S. P.

Wong, “Monolithic Integration of CMOS VLSI and CNT for Hybrid Nanotechnology Applications”,

IEEE Trans. Nanotech., vol. 7, 2008)

Deji Akinwande1, Shinichi Yasuda2, Bipul Paul2, Shinobu Fujita2, Gael Close1, and

H.-S. Philip Wong1

1CENTER FOR INTEGRATED SYSTEMS AND DEPARTMENT OF

ELECTRICAL ENGINEERING, STANFORD UNIVERSITY, STANFORD, CA,

94305, USA 2ADVANCED LSI TECHNOLOGY LABORATORY, TOSHIBA CORPORATION,

KAWASAKI, JAPAN

Abstract: We integrate carbon nanotube (CNT) fabrication with standard commercial

CMOS VLSI fabrication on a single substrate suitable for emerging hybrid

nanotechnology applications. This co-integration combines the inherent advantages of

CMOS and CNTs. These emerging applications include CNT optical, biological,

chemical, and gas sensors that require complex CMOS electronics for sensor control,

calibration, and signal processing. We demonstrate the successful co-integration on a

single chip with a vehicle circuit; a two transistor cascode megahertz amplifier

utilizing both silicon nMOS and CNT transistors with a total power consumption of

62.5µW.

146

6.2 Introduction

Single wall carbon nanotubes are continually been explored for a wide variety

of applications including electronics, optics, and sensing. The electronic and optical

applications exploit the metallic and semiconducting properties of CNTs for use as

interconnects, transistors, and optical devices [1-4]. Sensing applications take

advantage of the easy access to all the carbon atoms at the surface of the nanotube, and

the ability to functionalize the surface to interact with specific bio-chemical species

[5-7]. Despite the promising uses of CNTs and recent progress including the synthesis

of perfectly aligned dense nanotubes [8], and the use of chemical sorting techniques to

achieve monodispersed chirality [9, 10], the fabrication of CNTs (with controlled

chirality and predictable performance) at a very large-scale integration (VLSI) with

the necessary portfolio of devices (transistors, diodes, resistors, capacitors, etc) on a

single substrate has not been achieved. In the meantime, significant progress in CNT

applications can be made by augmenting CNT devices with standard VLSI circuits to

form a post CMOS-CNT monolithic integrated circuit (CCMIC) process. The CMOS

circuits can provide regulated power supplies, load capacitors and other peripheral

devices for high performance CNT field effect transistors (CNFETs).

Likewise, CMOS VLSI can supply advanced signal processing electronics and

analog to digital conversion of CNT sensor output for robust and optimum sensor

performance [11]. Additionally, CNT nano-electromechanical devices are been

explored as switches in integrated CMOS memory and logic circuits to minimize

power dissipation in nanoscale VLSI [12]. The variety of existing and proposed

applications of co-integration suggest that the application space employing monolithic

integration of CNT and CMOS is likely to continue expanding as CNT synthesis

becomes more mature.

There has been prior success integrating MOSFETs and CNT devices on a

single chip. Tseng et al. reported an nMOS decoder circuit useful for device

characterization of CNT arrays grown by catalytic chemical vapor deposition (CCVD)

[13]. Likewise, Lin et al. fabricated an inverter by integrating an nMOS and a p-type

CNFET with a shared polysilicon gate [14]. In both works, the nMOS and the CNFET

147

were fabricated in-situ in a custom laboratory process that did not include

complementary transistors and other VLSI devices. Additionally, monolithic high

temperature CCVD synthesis is not compatible with standard CMOS processing

which requires precise control of thermal cycles, impurity profiles, and utilizes low

temperature (<400°C) metallic interconnects.

In this work, we report a CCMIC post-CMOS process that integrates CNTs

using dielectrophoresis (DEP) [15] on top of a standard commercial 0.25µm VLSI

technology. The fundamental advantage of this technique is that the VLSI fabrication

and CNT processing are independent, that is, the CMOS can be fabricated in a

scaleable VLSI foundry with the advantages of cost, flexibility and predictable

performance. Single-wall or multi-wall carbon nanotube suspensions are dispersed on

the topmost layer of a planarized VLSI chip or wafer at room temperature (details of

the DEP dispersion technique are provided in [16]). In brief, a dichlorobenzene

suspension of single-wall CNTs obtained from Helix materials containing an unknown

mixture of semiconducting and metallic CNTs (diameter~1.3nm, purity~90%) are

dispersed on a wafer using a 500kHz, 8V continuous wave. The yield of aligning

CNTs between lithographically defined source and drain pads is 91% based on

electrical continuity measurements of three hundred devices fabricated in a laboratory

cleanroom for yield characterization purposes.

Further electrical measurements on the aligned CNTs reveal that 40% are

purely semiconducting, with ~43% containing both semiconducting and metallic

nanotubes, and some devices containing purely metallic CNTs (~17%) as shown in

Figure 6.1. It is possible to refine the nanotube suspensions by using density

differentiation [9] or aromatic polymer [10] solution based techniques to obtain purely

semiconducting CNTs. Though relatively nascent and the subject of ongoing

laboratory research, these solution based techniques are very promising and make

dielectrophoresis quite attractive for future hybrid monolithic integration of CMOS

and CNTs. It is conceivable in the future that a custom cleanroom-compatible DEP

equipment can be made to automate placement of a moderate amount of

monodispersed nanotubes on a VLSI wafer.

148

0

5

10

15

20

25

30

sCNTs sCNTs+mCNTs mCNTs

Co

un

ts

Figure 6.1: The distribution of aligning semiconducting nanotubes (sCNTs), and

metallic nanotubes (mCNTs) to lithographic defined source and drain pads.

The yield of aligning to back-gated CNFETs using the dielectrophoresis procedure is:

purely sCNTs ~40%, purely mCNTs ~17%, and devices containing both mCNTs and

sCNTs are ~43%. The sCNTs were determined from the ON/OFF current ratio which

was typically > 103. The mCNTs show no gate control, and devices containing both

have a current ratio <102.

149

6.3 Hybrid Monolithic Chip

The CCMIC process is demonstrated with an integrated two transistor

megahertz amplifier employing both a silicon nMOS and a CNT transistor. The chip

fabrication consisted of two parts, the first part being the standard VLSI fabrication

and the second is the CNT integration. The VLSI fabrication was done in a standard

tsmc 0.25µm silicon foundry with a portfolio consisting of complementary transistors,

diodes, passive devices, and three metal layers. The second metal of the three metal

stack was used as a backgate for CNT transistors. The intermetal dielectric (IMD2 in

Figure 6.2a which is a 1um SiO2 served as the backgate oxide. Since the CNFET

current scales weakly with gate oxide thickness due to the inverse logarithmic

dependence between gate capacitance and oxide thickness [2, 17], considerable gate

control and current is possible even for a thick oxide. Using the existing IMD as gate

oxide is a reasonable compromise between simplicity of integration and performance.

The passivation layer above the topmost metal had large openings in order to

gain access to the underlying CMOS devices for subsequent connection to nanotubes.

The wafer was diced afterwards into 5x5 mm2 chips for post processing to integrate

CNTs. Handling and processing small chips is very difficult, as a result, the 5x5 mm2

chips were mounted on top of a blank 4” carrier wafer with epoxy for automated full-

wafer processing.

150

Figure 6.2: a) Cross-section of a silicon nMOS with an integrated CNFET.

The foundry process is a three layer process including an interlayer dielectric (ILD)

and two inter-metal dielectrics (IMD). Access to the nMOS transistors and underlying

VLSI devices are provided by vias to the topmost metal. The CNT integration consists

of a three mask post-processing involving alignment of CNT arrays using DEP, source

and drain palladium (Pd) evaporation, and etching to make isolated CNT transistors

within the array. Metal2 in the foundry process is used as a backgate (BG) for the

CNFETs. b) Photograph of the completed CCMIC chip showing three columns where

arrays of CNFETs are located and used as cascode transistor amplifiers. c) A zoomed

view of the dashed region in b) showing an nMOS connected to three fingers of CNTs.

d) A scanning electron microscope image of a CNT aligned to gold DEP electrodes.

151

The CNT integration (shown in Figure 6.2) is a three mask optical lithography

(OPL) fabrication process. The first mask is for the deposition of metallic pads used

for DEP and also to define the fifteen active area or sites where CNTs are

subsequently aligned simultaneously by shared DEP pads. The second mask defines

the palladium source and drain electrodes for good contact to the CNTs and to prevent

the nanotubes from moving during further processing, as well as defining the

interconnects between CNT devices and the underlying CMOS devices. The final

mask is for selective etching of the shared metallic pads used for DEP in order to

make isolated CNT transistors. Each isolated CNT transistor typically has ~1-3

nanotubes bridging the gap between the source and drain with a channel length of

~2um. Having multiple nanotubes that are all semiconducting is beneficial for

increased current and transconductance (gm) since the total gm is the sum of the gm of

each individual tube in the CNFET.

However, the presence of a metallic nanotube in the CNFET is detrimental for

the DC and AC performance. The metallic nanotube draws current without providing

any transconductance leading to an inefficient transistor with higher DC power

dissipation. At AC frequencies, the metallic nanotubes act to shunt the small signal

output resistance of the CNFET, thereby reducing the voltage gain of the combined

cascode transistor. For optimum performance, it is imperative that metallic nanotubes

be avoided or removed [18], which is still a matter of ongoing research. Additionally,

palladium was used in this work for near ohmic contact to the CNTs [19]. A poor

contact leads to high Schottky barriers at the source and drain, reducing the injection

velocity, current and transconductance, and hence must be mitigated for optimum

circuit performance.

152

-2.0E-06

-1.6E-06

-1.2E-06

-8.0E-07

-4.0E-07

0.0E+00

-1.5 -1 -0.5 0

VDS (V)

I DS (

uA

)

VGS=-1.5V

VGS=-1V

a) 0

-0.4

-0.8

-1.2

-1.6

-2.0

1.E-10

1.E-09

1.E-08

1.E-07

1.E-06

1.E-05

-1.5 -1 -0.5 0

VGS (V)

-ID

S (

A)

VDS=-1.5V

b)

S~110mV/dec

10-5

10-6

10-7

10-8

10-9

10-10

0.0E+00

1.0E-04

2.0E-04

3.0E-04

4.0E-04

5.0E-04

6.0E-04

7.0E-04

0 0.5 1 1.5 2 2.5

VDS (V)

I DS (

uA

)

700

600

500

400

300

200

100

0

VGS=1.25V

VGS=1V

VGS=0.75V

0

1

2

3

4

Figure 6.3: DC electrical characteristics of CNT and nMOS transistors.

a) Drain current (IDS) vs. drain voltage (VDS) of a p-type CNFET as the gate voltage

(VGS) steps in -0.5V increments from 0V to -1.5V. b) IDS vs. VGS of the same CNFET

with VDS=-1.5V. ON/OFF ratio is ~104, S~110mV/dec, and extracted peak gm~1uA/V.

c) nMOS IDS vs. VDS characteristics with VGS in steps of 0.125V from 0.5V to 1.25V.

The nMOS channel length is 0.25um with a 4um width. d) Statistics for the ON/OFF

current ratio for the NMOS-CNT cascode transistors evaluated at a common bias

(VDD=2.5V).

c) d)

a) b)

153

In this letter, we discuss the nMOS-CNT cascode transistor operating as an

amplifier which is used as a vehicle to demonstrate the hybrid monolithic integrated

technology. Figure 6.3 shows the DC electrical data of a CNT and a typical nMOS

transistor with overall good characteristics. The CNT had a drain current ON/OFF

ratio of ~104, and a subthreshold slope (S) of about 110mV/decade typical of back-

gated CNFETs. The small signal peak transconductance (gm) was ~1uA/V with an

output resistance (rout) of 5MΩ at VD=-1.5V. Figure 6.3d shows the statistics for the

ON/OFF current ratio for the limited number of working NMOS-CNT cascode

transistors. A more comprehensive set of statistics was not feasible due to the small

number of devices on the space-limited CMOS chip.

The CCMIC chip was subsequently packaged and mounted on a printed circuit

board (PCB) where on-board input and output bias-tees routed DC supply voltages

and AC signals to the nMOS-CNT cascode amplifier. The cascode amplifier operated

as a 12dB band-pass amplifier at ~2.2 MHz. Figure 6.4 shows the circuit schematic

and AC amplifier gain. The bandwidth is limited by the load capacitance of the

external test circuit, and the AC performance of the CMOS-CNT cascode is less than

that of an all CMOS cascode because of the higher CMOS transconductance. However,

the purpose of integrating CNT with CMOS is to take advantage of the unique benefits

of carbon nanotubes. For example, the CMOS-CNT cascode amplifier could

potentially be used as a low-power sensor circuit, where the AC gain and center

frequency vary in response to chemical or gas induced changes in the resistance of the

exposed CNT.

154

-6

-2

2

6

10

14

1.7 1.9 2.1 2.3 2.5

Frequency (MHz)

Ga

in (

dB

)

Figure 6.4: AC characteristics of nMOS-CNT integrated cascode amplifier.

a) The oscilloscope trace showing the input/output waveforms. The signals are at

2.2MHz with the output ~12 dB greater than the input. b) The gain vs. frequency of

the cascode amplifier using the circuit elements in c). The bandpass response is due to

the inductor capacitor external load network at the output of the test circuit. c)

Schematic of the printed circuit board (PCB) test circuit and the simplified input

source and oscilloscope load networks; all denoted by dashed boxes. The input source

operated with VS=10mV and RS=50Ω. The scope provided CL=12pf and RL=1MΩ

load. The PCB components were Ci=Co=1uF, Li=1mH, and Ld=150uH. The amplifier

consumed 62.5µW from 2.5V Vdd, and a drain current of 25µA.

c)

b) a)

155

6.4 Conclusion

The hybrid technology of integrating CMOS with CNTs is a very new area of

applied research, and this work represents the first monolithic co-integration of single

wall CNTs on a standard commercial CMOS process. However, much more sustained

research is required to evaluate the feasibility of a hybrid monolithic process for a

wide variety of existing and future applications. In this work, we have demonstrated a

CCMIC process by integrating carbon nanotubes on top of a commercial VLSI

substrate using the dielectrophoretic effect. An integrated nMOS-CNT cascode

amplifier worked successfully as a vehicle circuit at ~2.2MHz with a gain of 12dB.

The technique is scaleable down to the latest nanoscale VLSI technology.

Moreover, the hybrid integration is also scaleable to integrate multi-wall CNTs,

nanowires, and other one dimensional tubular structures [16]. Further work involves

improving the yield of semiconducting CNTs and exploring novel applications that

can take advantage of a monolithic CMOS-CNT co-integration.

Acknowledgments

The CNT post-processing and fabrication were completed at the Stanford

Nanofabrication Facility, an NSF supported facility. This work was supported in part

by the Toshiba Corporation, and the Focus Center Research Program (FENA and

C2S2). G.C was additionally supported by an Intel Graduate Fellowship, and D.A was

additionally supported by a Ford Foundation and Alfred P. Sloan graduate fellowships.

156

6.5 References

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and copper interconnects for gigascale integration (GSI)," IEEE Electron Device Letters, vol.

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[3] D. Akinwande, G. F. Close, and H.-S. P. Wong, "Analysis of the Frequency Response of

Carbon Nanotube Transistors," IEEE Trans. on Nanotech., vol. 5, pp. 599-605, 2006.

[4] C. Kocabas, H.-S. Kim, T. Banks, J. A. Rogers, A. A. Pesetski, J. E. Baumgardner, S. V.

Krishnaswamy, and H. Zhang, "Radio frequency analog electronics based on carbon nanotube

transistors," PNAS, vol. 105, pp. 1405-1409, February 5, 2008 2008.

[5] E. S. Snow, F. K. Perkins, E. J. Houser, S. C. Badescu, and T. L. Reinecke, "Chemical

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Large Arrays of Multiplex Functionalized Carbon Nanotube Sensors for Highly Sensitive and

Selective Molecular Detection," Nano Letters, vol. 3, pp. 347-351, 2003.

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carbon nanotubes," Nature Nanotech., vol. 2, pp. 230-236, 2007.

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60-65, 2006.

[10] A. Nish, J.-Y. Hwang, J. Doig, and R. J. Nicholas, "Highly selective dispersion of single-

walled carbon nanotubes using aromatic polymers," Nature Nanotech., vol. 2, pp. 640-646,

2007.

[11] T. S. Cho, K.-J. Lee, J. Kong, and A. Chandrakasan, "Low Power Carbon Nanotube Chemical

Sensor System," in IEEE Custom Integrated Circuits Conf., 2007.

[12] R. S. Chakraborty, S. Narasimhan, and S. Bhunia, "Hybridization of CMOS With CNT-Based

Nano-Electromechanical Switch for Low Leakage and Robust Circuit Design," IEEE

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2480-2488, 2007.

[13] Y. C. Tseng, P. Xuan, A. Javey, R. Malloy, Q. Wang, J. Bokor, and H. Dai, "Monolithic

Integration of Carbon Nanotube Devices with Silicon MOS Technology," Nano Letters, vol. 4,

pp. 123-127, 2004.

[14] H. Lin, Y. W. Park, and S. Tiwari, "A Compact Single-Walled Carbon Nanotube Transistor

Integrated with a Silicon MOSFET Using a Single Common Gate," in Mater. Res. Symp.

Proc., 2007, pp. 963, 0963-Q14-04.

[15] C. Chen, D. Xu, E. S. kong, and Y. Zhang, "Multichannel Carbon-Nanotube FETs and

Complementary Logic Gates With Nanowelded Contacts," IEEE Electron Device Letters, vol.

27, pp. 852-855, 2006.

[16] G. Close and H.-S. P. Wong, "Fabrication and Characterization of Carbon Nanotube

Interconnects," in IEEE IEDM Tech. Dig., 2007, pp. 203-206.

[17] S. Heinze, M. Radosavljevic, J. Tersoff, and P. Avouris, "Unexpected scaling of the

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[18] J. Deng, N. Patil, K. Ryu, A. Badmaev, C. Zhou, S. Mitra, and H.-S. P. Wong, "Carbon

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158

7 Closing Remarks

7.1 Research Contributions

The focus of my dissertation has been on the science, technology, and

applications of carbon nanotubes. I conceived, defined and performed a series of

original studies that crossed the boundaries from material synthesis, device physics,

circuits, and nanotechnology. The broad range of original studies have led to several

significant results including:

i- Analytical development of the physics of CNTs providing insight and basic

understanding of the electro-physical properties.

ii- Experimentally verified analytical current-voltage and capacitance-voltage

characteristics of CNT transistors facilitating rapid circuit design and analysis

for the first time.

iii- Elucidation of the material science of nanotube synthesis which enabled the

first demonstration of high-quality manufacturing of perfectly-aligned CNT

arrays for VLSI integrated circuits.

iv- Monolithic integration of CNTs and CMOS with demonstrated CMOS-CNT

analog & digital circuits for future nanoelectronics.

159

7.2 List of Publications

The journal and conference publications resulting from my doctoral dissertation are

listed below.

Journal Publications

1. D. Akinwande, N. Patil, A. Lin, Y. Nishi, and H.-S. P. Wong, "Surface

Science of Catalyst Dynamics for Aligned Carbon Nanotube Synthesis on a

Full-Scale Quartz Wafer," Journal of Physical Chemistry. C, vol. 113, pp.

8002-8008, 2009.

2. D. Akinwande, J. Liang, S. Chong, Y. Nishi, and H.-S. P. Wong, "Analytical

Ballistic Theory of Carbon Nanotube Transistors: Experimental Validation,

New Device Physics, Parameter Extraction, and Performance Projection,"

Journal of Applied Physics, vol. 104, pp. 124514, 2008.

3. D. Akinwande, Y. Nishi, and H.-S. P. Wong, "Carbon Nanotube Quantum

Capacitance for Non-Linear Terahertz Circuits," IEEE Trans. on

Nanotechnology, vol. 8, pp. 31-36, 2009.

4. D. Akinwande, S. Yasuda, B. Paul, S. Fujita, G. Close, and H.-S. P. Wong,

"Monolithic Integration of CMOS VLSI and Carbon Nanotubes for Hybrid

Nanotechnology Applications," IEEE Trans. on Nanotechnology, vol. 7, pp.

636-639, 2008.

5. J. Liang, D. Akinwande, and H.-S. P. Wong, "Carrier Density and Quantum

Capacitance for Semiconduting Carbon Nanotubes," Journal of Applied

Physics, vol. 104, pp. 064515, 2008.

6. D. Akinwande, Y. Nishi, and H.-S. P. Wong, "An Analytical Derivation of the

Density of States, Effective Mass and Carrier Density of Achiral Carbon

Nanotubes," IEEE Trans. on Electron Devices, vol. 55, pp. 289-297, 2008.

7. D. Akinwande and H.-S. P. Wong, "A Composite Circuit Model for NDR

Devices in Random Access Memory Cells," IEEE Transactions on Electron

Devices, vol. 54, pp. 776-783, 2007.

160

8. D. Akinwande, G. F. Close, and H.-S. P. Wong, "Analysis of the Frequency

Response of Carbon Nanotube Transistors," IEEE Trans. on Nanotechnology,

vol. 5, pp. 599-605, 2006.

Conference Publications

1. X. Chen, K.-J. Lee, D. Akinwande, G. F. Close, S. Yasuda, B. Paul, S. Fujita,

J. Kong, and H.-S. P. Wong, "High-Speed Graphene Interconnects

Monolithically Integrated with CMOS Ring Oscillators Operating at 1.3GHz,"

in IEDM Technical Digest: IEEE, 2009, paper 23.6.

2. D. Akinwande, J. Liang, and H.-S. P. Wong, "The Device Physics of

Experimentally Validated Analytical Theory of Transport in Ballistic Carbon

Nanotube Transistors," in American Physical Society APS Meeting, abstract

#A36.001, 2009.

3. X. Chen, D. Akinwande, and H.-S. P. Wong, "Contact Resistance, Electrical

Breakdown and Temperature-Dependent Conductance of Multi-Wall Carbon

Nanotubes," in American Physical Society APS Meeting, abstract #C1.152,

2009.

4. D. Akinwande, S. Yasuda, B. Paul, S. Fujita, G. Close, and H.-S. P. Wong,

"Monolithic Integration of CMOS VLSI and CNT for Hybrid Nanotechnology

Applications," in European Solid State Device Research Conference, 2008. pp.

91-94.

5. D. Akinwande, Ada Poon, Teresa Meng, H.-S. P. Wong, “Adventures with

Carbon Nanotubes: 3D Inductors, Capacitors & Antennas, and THz ICs",

DARPA/Army Workshop, ARL, Maryland, August 2008.

6. D. Akinwande, J. Liang, and H.-S. P. Wong, "Analytical Degenerate Carrier

Density and Quantum Capacitance for Semiconducting Carbon Nanotubes," in

Device Research Conference Digest: IEEE, 2008, pp. 117-118.

161

7. S. Yasuda, D. Akinwande, G. F. Close, H. S. P. Wong, B. C. Paul, and S.

Fujita, "Fault-Tolerant Circuit for Carbon Nanotube Transistors with Si-CMOS

Hybrid Circuitry," in IEEE Conf. on Nanotechnology, 2008. pp. 684-687.

8. D. Akinwande, N. Patil, A. Lin, Y. Nishi, and H.-S. P. Wong, "Full Scale

Wafer Growth of Perfectly Aligned Carbon Nanotubes and Aligned Growth

Characterization," in Mater. Res. Symp. Spring Meeting, San Francisco, CA,

2008.

9. D. Akinwande, Y. Nishi, and H.-S. P. Wong, "Analytical Model of Carbon

Nanotube Electrostatics: Density of States, Effective Mass, Carrier Density,

and Quantum Capacitance," in IEDM Technical Digest: IEEE, 2007, pp. 753-

756.

162

7.3 Future Work

We do not attempt to predict the future here, only to highlight some of the

most significant challenges facing the routine employment of carbon nanotubes in

practical applications. It is notable that much progress has been made in advancing the

understanding and applications of carbon nanotubes over the past 15yrs and

particularly in the past 10yrs. Nonetheless, there are still significant obstacles that

must be overcome for carbon nanotubes to be a mainstream technology for devices,

circuits, sensors, and future novel applications. The major challenge at the moment is

the controlled growth of high-quality carbon nanotubes of specific properties. For

instance, specific chirality growth of high-quality nanotubes will immediately

revolutionize the field and accelerate the deployment and commercialization of carbon

nanotechnology. Additionally, improvements in the density of aligned nanotubes to a

value of ~100 CNTs/um (20x greater than current average densities of 5 CNTs/um)

will bring nanotube transistors much closer to reality in future VLSI technology.

An area of CNT research that has yet to lift-off is the experimental

demonstration of high-performance nanotube circuits operating at GHz frequencies

and beyond. Important circuits for communication systems such as oscillators,

amplifiers, and mixers using ballistic carbon nanotubes is expected to bring to light the

potential advantages nanotubes offer compared to silicon-based circuits. Advances in

CNT circuits will undoubtedly benefit a range of applications of growing importance

including sensor electronics, flexible electronics, and bioelectronics.

Even if all these advancements are realized, it is still most likely that carbon

nanotube and silicon technologies will have to co-exist in an agreeable manner to

leverage the synergies that both technologies can offer. As a result, the continued

development of a hybrid nanotechnology employing conventional (mature) silicon

electronics combined with the high-functionality of nanotube devices promises to be a

very rewarding path for the next revolution involving wafer-scale intelligent systems

for healthcare, energy, communications and automation.