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bxxxxxQuiz and Discussion Day
ENGR xD52Eric VanWyk
Fall 2012
Today
• Quiz
• Article Discussion
• Feedback Discussion
• Lab Planning
• Project Discussion
Quiz
• Closed Books, Closed Notes, Closed Internet
• You can use MARS (but it is likely a waste of time)
• 30 minutes
• Email to [email protected]– [Quiz0] YourName
Discussion of Article
• What surprised you in the article?
• What do you want to learn more about?
• Do you think the P4 was treated fairly?
Feedback Discussion
• On Average, Hours are about right– But they bunch up too much– Should I provide finer grained deadline chunking?
• Some are spending way too much time on CA– Poor group communication– Failure to seek help
Final Lab Sequence
• Create a fully functional CPU– Your choice of MIPs or Other– Your Choice of Single, Multi, Pipelined
• Test CPU– Functionally, not Manufacturing Defect– With actual Fabric Timings
• Write IQ math library for your CPU– In assembly, and then assembled to Machine Code
• Final Report– Write a Marketing Brief advertising Rev 1– Internal Doc: Planned enhancements for Rev 2
Final Lab Sequence
• This is a very aggressive lab– But I love you, and you love Comp Arch
• For Monday, create project plans for hypothetical project lengths:– 2 weeks, 4 weeks, 8 weeks, 6 months– Red / Yellow / Green feature lists
• The only way to get 100% is to do 100% of it perfectly
– Unanswered Questions & Research Schedule– Division of labor
• Actual Names and Dates assigned
Final Project Sequence
• What makes a good project?– Uses what we’ve learned in CA so far– Continues with your personal interests– Is achievable within time allotted
• What makes a bad Project?– Is boring and/or lame– Is rigidly scoped (either over- or under-scoped)– Is unrelated to CA
Example Potentially Fun Projects• Process Sound / Make Music on an FPGA• Make a game on an FPGA• Implement DCPU-16 from 0x10c• Neural Networks• RFID• LEGO Turing Machine / Mechanical Computer• “Big Math” Co-processor: SVD, Physics, Crypto• Fix the K’Nex computer• Make a Clock w/ Lights n’Stuff• GPU• Make a Compiler / Scheduler / Complex Data Objects in Assembly• Write an Attack (Buffer Overflow?)• FPGA based Pocket Calculator• Faster Functional Units (ALU, etc)• Minecraft!• Multi-Core MIPs
Key Point: Flexible Deliverables
• Enumerate, Prioritize, Nest your deliverables
• Implement the DCPU-16 from 0x10^c– Runs a specific program with limited instructions– Runs all opcodes
– In Modelsim– On an FPGA– On an FPGA as a co-processor
Planning Keys
• What do you do when stuff happens?– Give possible faults with mitigations
• Ex: The FPGA is too small to fit our code– Convert more behavioral code to structural– Purchase a larger FPGA (schedule?)– Run in simulation only– Reduce feature set to fit
Initial Project Proposal
• Project Name• Team Members• 1-3 paragraphs description of project• Red / Yellow / Green Feature sets• 2 potential things that can go wrong, with mitigations• What are your two next steps?
• 1-2 Pages Total• Due Thursday