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8/19/2019 Building a 1462 Hz Function Generator
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Building a 1462 Hz Function Generator
Greg Solis-Reyes
#250771462
!ursday "a Session
!ursday$ %o&e'er 12 1015
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Purpose
!e +ur+ose o, t!is la is to uild a ,unction generator !ic! oscillates at a s+eci,ic
,re.uency$ in t!is case 1462 Hz/
!e ,unction generator s!ould generate 4 out+ut a&es$ all o, !ic! oscillate at 1462 Hz/
!e ,irst a&e is a 20 ea-to-+ea s.uare a&e/ !e second a&e is a 5 ea-to-
+ea triangle a&e/ !e t!ird a&e is a sine a&e/ !e last a&e is a 10 ea-to-+ea sine
a&e/
!e +ur+ose o, t!is la is also to learn !o to design a circuit3 ,ro' c!oosing t!e
co'+onents$ to testing a +rototy+e$ to designing a B$ and testing t!e ,inal result/ !is +roect
s!ould e a uni.ue and ecellent learning e+erience/
Theory (Pre-Lab)
!e ,irst a&e ill e +roduced y a 'ulti&irator circuit it! s+eci,ic resistor and
ca+acitor &alues t!e 81 loc9/ !e second a&e ill e +roduced y an integrator circuit!ic! taes in+uts s.uare a&e ,ro' t!e 81 loc and out+uts a triangle a&e t!e 82 loc9/
!e t!ird a&e ill e +roduced y anot!er integrator circuit !ic! in+uts t!e triangle a&e
,ro' t!e 82 loc and out+uts a sine a&e t!e 8: loc9/ ;n eteen t!e 82 and 8: locs
t!ere is a 100nF ca+acitor to loc t!e
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T =1
1462≅ RC
6.84∗10−4= RC !oose = 47nF9
R=6.84 ¿10
−4s
47∗10−9 F =14553Ω
!e last tas as to si'ulate t!e circuit using t!e ?icro-a+ so,tare/ !e circuit !ad to
e di&ided into to +arts/ !e ,irst +art as t!e 81 and 82 locs !ic! generate t!e ,irst and
second out+ut a&es$ res+ecti&ely$ in t!e 'anner descried ao&e/ !e second +art as t!e 8:
and 84 locs it! an ideal triangle a&e source as t!e in+ut ,or t!e 8: loc/ !e second +art
generated t!e t!ird and ,ourt! out+ut a&es$ as descried ao&e/ !e o+ a'+s ere si'ulated
using t!e "?:4: o+-a'+ !ic! is si'ilar to t!e "0@2 o+-a'+ !ic! ill actually e used to
construct t!e circuit in t!e la/ !e resulting ,unctional si'ulations and circuits are included
elo/
Figure 1. U1 and U2 Block Circui !iagra"
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Figure 2. U1 and U2 Block Transien #nalysis
Figure $. U$ and U% Block Circui !iagra"
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Figure %. U$ and U% Transien #nalysis
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Fro' t!e ?icro-a+ si'ulation ,or t!e 8: and 84 loc$ t!e ,inal resistor &alues ,or t!e
a'+li,ier circuit ere calculated/
10V
.680V ≅12 xGain !ere,ore c!oose 10> and 120> resistors ,or R1 and R2$
res+ecti&ely9
Procedure (Bread Board Tesing)
o test t!e designed circuit$ t!e ,olloing +rocedure s!ould e ,olloed in t!e electrical
la/
First set u+ t!e connections on t!e la read oard as outlined in t!e diagra' elo/
Figure &. 'hole Proec Circui Breadboard Connecions
Note) Since t!e eact &alues calculated in t!e re-la ,or t!e ca+acitor and inductor
&alues are not a&ailale in t!e la$ t!e closest a&ailale &alues ere c!osen and are s!on in t!e
ao&e diagra'/
Note) ;n t!e la t!e "0@2 A+ ('+ ill e used$ !ic! !as connections as s!on elo/
Figure . TL*+2 ,p #"p
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%et$ connect a 12
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%et$ turn on t!e oscillosco+e s!on ao&e9$ and attac! t!e C41 in+ut ire to t!e ,irst
out+ut ire as s!on in t!e diagra'$ and t!e C42 in+ut ire to t!e second out+ut ire as s!on
on t!e diagra'/ onnect t!e ground alligator cli+s ,or eac! in+ut o, t!e oscillosco+e to t!e
ground node on t!e readoard/ !e oscillosco+e s!ould no dis+lay t!e +redicted a&e,or's
it! as descried ao&e/ 8se t!e 'easure'ent tool ,or t!e oscillosco+e to 'easure t!e ,re.uency
and a'+litude o, eac! a&e,or'$ and record t!ese &alues in t!e tale elo Test Results- Bread board 9/ Re+eat t!e ao&e +rocedure ,or t!e t!ird and ,ourt! out+ut ires connecting C41 to t!e
:rd out+ut ire and C42 to t!e 4t! out+ut ire9$ as s!on on t!e diagra'/ Record t!e &alues in
t!e tale elo/
;, t!ere are any signi,icant errors$ analyze t!e circuit care,ully$ ,i any issues$ and try to
get t!e circuit to or as e+ected/
Procedure (PCB Board Tesing)
First$ solder t!e a++ro+riate co'+onents onto t!e +rinted B Board/ !e B oard is
s!on elo$ in 'irror i'age/
Figure 5. PBC Board
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%et$ connect t!e 12
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Note) Aut+ut 1 on to+$ Aut+ut 2 on t!e otto'
Figure 11. U$ an U% Block 6esuls
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Note) Aut+ut 4 on to+ H19$ out+ut : on t!e otto' H29
Test Results – PCB Board
,upu 'ire 'ire 1 'ire 2 'ire $ 'ire %
Fre8uency (in
4er9)#"pliude (in
:ols)
Sketches for PCB Board Testing
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!iscussion
!e discre+ancies 'easured it! res+ect to t!e calculated ,re.uency and a'+litude
&alues and t!e ,re.uency and a'+litude &alues 'easured in t!e la are 'ostly due to t!e resistors
c!osen in t!e la not eing t!e eact &alues !ic! ere calculated/ (lso$ all resistors and
ca+acitors used in t!e la !a&e so'e error$ so t!at error ill also a,,ect t!e ,inal out+ut
a&e,or'/ ?ost co'+onents used in t!e la !a&e at least 10 error9/
!e discre+ancies seen eteen t!e la a&e,or's and t!e si'ulated a&e,or'soccurred ,or t!e sa'e reasons as stated ao&e/ ;n t!e ?icro-a+ si'ulations$ all co'+onents are
treated as ideal$ !ile in t!e real la t!is is not t!e case/
!e discre+ancies eteen t!e results in "a 7 and "a 10 are due to t!e ires in "a 7
eing 'ore resisti&e t!an t!e +rinted ires in t!e B in "a 10/ Since t!e ires used to test t!e
readoard !a&e 'ore internal resistance t!an t!e +rinted ires$ t!is a,,ected t!e 'easured
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&alues/ !e B circuit is 'ore ideal t!an t!e readoard +rototy+e circuit$ so t!e &alues
'easured in "a 10 are closer to t!e +redicted ideal &alues/
Conclusion
;n "a 7$ t!e +rototy+e did eactly !at it as su++osed to$ out+utting t!e 4 e+ected
a&e,or's$ agreeing closely it! t!e calculated and si'ulated &alues/ !e +roect oecti&es
ere ac!ie&ed ,or t!e +rototy+e oard/
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