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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech. CSE. I.Sem II Year I Sem P C II Year II Sem P C S.No. Subject P C S.No. Subject P C 1 Managerial Economics and Financial Analysis 4 4 1 Software Engineering 4 4 2 Probability & Statistics 4 4 2 Principles of Programming Languages 4 4 3 Mathematical Foundations of Computer Science and Engineering 4 4 3 Object Oriented Programming through Java 4 4 4 Digital Logic Design 4 4 4 Computer Organization 4 4 5 Electronic Engineering 4 4 5 Data Base Management Systems 4 4 6 Data Structures 4 4 6 Formal Languages and Automata Theory 4 4 7 Electronic Engineering Lab 3 2 7 Object Oriented Programming Lab 3 2 8 Data Structures Lab 3 2 8 Data Base Management Systems Lab 3 2 9 Professional Communicational skills 2 0 9 Professional Communicational skills 2 2 Total Credits 28 Total Credits 30 ww.jntuworld.com www.jntuworld.com www.jwjobs.n QIS COLLEGE OF ENGINEERING & TECHNOLOGY :: ONGOLE http://www.qiscet.edu.in

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Page 1: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem

II Year I Sem P C II Year II Sem P C

S.No. Subject P C S.No. Subject P C

1 Managerial Economics and

Financial Analysis

4 4

1 Software Engineering 4 4

2 Probability & Statistics 4 4

2 Principles of Programming Languages 4 4

3 Mathematical Foundations of

Computer Science and

Engineering

4 4

3 Object Oriented Programming through Java4 4

4 Digital Logic Design 4 4

4 Computer Organization 4 4

5 Electronic Engineering 4 4

5 Data Base Management Systems 4 4

6 Data Structures 4 4

6 Formal Languages and Automata Theory 4 4

7 Electronic Engineering Lab 3 2

7 Object Oriented Programming Lab 3 2

8 Data Structures Lab 3 2

8 Data Base Management Systems Lab 3 2

9 Professional Communicational

skills

2 0

9 Professional Communicational skills 2 2

Total Credits 28 Total Credits 30

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QISCET

Page 2: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.1Managerial Economics and Financial Analysis

Unit I

Introduction to Managerial Economics:

Introduction to Managerial Economics & Demand Analysis: Definition of Managerial Economics,

Characteristics and Scope – Managerial Economics and its relation with other subjects- Basic economic tools

in Managerial Economics

Demand Analysis: Meaning- Demand distinctions- Demand determinants- Law of Demand and its

exceptions.

Unit-II

Elasticity of Demand & Demand Forecasting: Definition -Types of Elasticity of demand - Measurement of

price elasticity of demand: Total outlay method, Point method and Arc method- Significance of Elasticity

of Demand.

Demand Forecasting: Meaning - Factors governing demand forecasting - Methods of demand forecasting

(survey of buyers’ Intentions, Delphi method, Collective opinion, Analysis of Time series and Trend

projections, Economic Indicators, Controlled experiments and Judgmental approach) - Forecasting demand

for new products- Criteria of a good forecasting method.

Unit-III

Theory of Production and Cost Analysis: Production Function- Isoquants and Isocosts, MRTS, Law of

variable proportions- Law of returns to scale- Least Cost Combination of Inputs, Cobb-Douglas Production

function - Economies of Scale.

Cost Analysis: Cost concepts, Opportunity cost, Fixed Vs Variable costs, Explicit costs Vs. Implicit costs,

Out of pocket costs vs. Imputed costs.-Determination of Break-Even Point (simple problems) - Managerial

Significance and limitations of BEP.

UNIT-IV

Introduction to Markets, Managerial Theories of the Firm & Pricing Policies: Market structures: Types

of competition, Features of Perfect Competition, Monopoly and Monopolistic Competition. Price-Output

Determination under Perfect Competition, Monopoly, Monopolistic Competition and Oligopoly Managerial

theories of the firm - Marris and Williamson’s models.

Pricing Policies: Methods of Pricing-Marginal Cost Pricing, Limit Pricing, Market Skimming Pricing,

Penetration Pricing, Bundling Pricing, and Peak Load Pricing. Internet Pricing Models: Flat rate pricing,

Usage sensitive pricing, Transaction based pricing, Priority pricing, charging on the basis of social cost,

Precedence model, Smart market mechanism model.

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Page 3: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem

Unit V

Types of Industrial Organization & Introduction to business cycles: Characteristic features of Industrial

organization, Features and evaluation of Sole Proprietorship, Partnership, Joint Stock Company, State/Public

Enterprises and their types.

Introduction to business cycles: Meaning-Phases of business cycles- Features of business cycles.

Unit VI

Introduction to Financial Accounting: Introduction to Double-entry system, Journal, Ledger, Trial Balance-

Final Accounts (with simple adjustments)- Limitations of Financial Statements.

Unit VII

Interpretation and analysis of Financial Statement: Ratio Analysis – Liquidity ratios, Profitability ratios

and solvency ratios – Preparation of changes in working capital statement and fund flow statement.

Unit VIII

Capital and Capital Budgeting: Meaning of capital budgeting, Need for capital budgeting – Capital

budgeting decisions (Examples of capital budgeting) - Methods of Capital Budgeting: Payback Method,

Accounting Rate of Return (ARR), IRR and Net Present Value Method (simple problems)

Text Books:

1. J.V.Prabhakar Rao: Managerial Economics and Financial Analysis, Maruthi Publications, 2011

2. N. Appa Rao. & P. Vijaya Kumar: ‘Managerial Economics and Financial Analysis’, Cengage

Publications, New Delhi, 2011

References:

1. A R Aryasri - Managerial Economics and Financial Analysis, TMH 2011

2. Suma damodaran- Managerial Economics, Oxford 2011

3. S.A. Siddiqui & A.S. Siddiqui, Mangerial Economice and Financial Analysis, New Age International

Publishers, 2011.

***

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.2 PROBABILITY AND STATISTICS

UNIT-I

Probability: Sample space and events – Probability – The axioms of probability – Some Elementary theorems

- Conditional probability – Baye’s theorem.

UNIT-II

Random variables – Discrete and continuous distributions - Distribution function.

UNIT-III

Binomial, Poisson, normal distribution – related properties. Moment generating function, Moments of

standard distributions – properties.

UNIT-IV

Population and samples. Sampling distribution of mean (with known and unknown variance), proportion,

variances. - Sampling distribution of sums and differences. Point and interval estimators for means,

variances, proportions.

UNIT-V

Statistical Hypothesis – Errors of Type I and Type II errors and calculation. One tail, two-tail tests. Testing

hypothesis concerning means, proportions and their differences using Z-test.

UNIT-VI

Tests of hypothesis using Student’s t-test, F-test and2

χ test.. Test of independence of attributes - ANOVA

for one-way and two-way classified data.

UNIT-VII

Statistical Quality Control methods – Methods for preparing control charts – Problems using x-bar, p, R

charts and attribute charts – Simple Correlation and Regression.

UNIT-VIII

Queuing Theory: Pure Birth and Death Process M/M/1 Model and Simple Problems.

TEXT BOOK

1. Probability and Statistics for Engineers, Miller and John E. Freund, Prentice Hall of India.

2. Probability and Statistics, D. K. Murugeson & P. Guru Swamy, Anuradha Publishers.

REFERENCE

1. Probability, Statistics and Random processes. T. Veerrajan, Tata Mc.Graw Hill, India.

2. Probability, Statistics and Queuing theory applications for Computer Sciences 2 ed, Trivedi, John

Wiley.

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Page 5: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.3 MATHEMATICAL FOUNDATIONS FOR COMPUTER SCIENCE & ENGINEERING

UNIT I:Mathematical Logic :

Propositional Calculus: Statements and Notations, Connectives, Truth Tables, Tautologies, Equivalence of Formulas,

Duality law, Tautological Implications, Normal Forms, Theory of Inference for Statement Calculus, Consistency of

Premises, Indirect Method of Proof.

Predicate calculus: Predicative Logic, Statement Functions, Variables and Quantifiers, Free & Bound Variables,

Inference theory for predicate calculus.

UNIT II :Number Theory & Induction: Properties of integers, Division Theorem, The Greatest Common Divisor, Euclidean Algorithm, Least Common

Multiple, Testing for Prime Numbers, The Fundamental Theorem of Arithmetic, Modular Arithmetic ( Fermat’s

Theorem and Euler ‘s Theorem)

Mathematical Induction: Principle of Mathematical Induction,exercises

UNIT III:Set Theory: Introduction, Operations on Binary Sets, Principle of Inclusion and Exclusion

Relations: Properties of Binary Relations, Relation Matrix and Digraph, Operations on Relations, Partition and

Covering, Transitive Closure, Equivalence, Compatibility and Partial Ordering Relations, Hasse Diagrams.

Functions: Bijective Functions, Composition of Functions, Inverse Functions, Permutation Functions, Recursive

Functions

UNIT IV:Graph Theory: Basic Concepts of Graphs, Sub graphs, Matrix Representation of Graphs: Adjacency Matrices, Incidence Matrices,

Isomorphic Graphs, Paths and Circuits, Eulerian and Hamiltonian Graphs, Multigraphs, (Problems and Theorems

without proofs)

UNIT V:Graph Theory II: Planar Graphs, Euler’s Formula, Graph Colouring and Covering, Chromatic Number,( Problems and Theorems without

proofs)

Trees, Directed trees, Binary Trees, Decision Trees,

Spanning Trees: Properties, Algorithms for Spanning trees and Minimum Spanning Tree.

UNIT VI: Algebraic Structures:

Lattice: Properties, Lattices as Algebraic Systems,

Algebraic Systems with one Binary Operation, Properties of Binary operations, Semi groups and Monoids:

Homomorphism of Semi groups and Monoids, Groups: Abelian Group, Cosets, Subgroups ( Definitions and

Examples of all Structures)

Algebraic Systems with two Binary Operations: Rings

UNIT VII: Combinatorics: Basic of Counting, Permutations, Derangements, Permutations with Repetition of Objects, Circular Permutations,

Restricted Permutations, Combinations, Restricted Combinations, Pigeonhole Principle and its Application.

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

Binomial Theorem, Binomial and Multinomial Coefficients, Generating Functions of Permutations and Combinations,

The Principles of Inclusion – Exclusion.

UNIT VIII: Recurrence Relation:

Generating Function of Sequences, Partial Fractions, Calculating Coefficient of Generating Functions

Recurrence Relations, Formulation as Recurrence Relations, Solving linear homogeneous recurrence Relations by

substitution, generating functions and The Method of Characteristic Roots.

Solving Inhomogeneous Recurrence Relations

TEXT BOOKS :

1. Discrete Mathematical Structures with Applications to Computer Science, Tremblay, Manohar, TMH

2. Discrete Mathematics for Computer Scientists & Mathematicians, 2/e, Mott, Kandel, Baker, PHI

REFERENCE BOOKS:

1. Discrete Mathematics, S.Santha, Cengage

2. Discrete Mathematics with Applications, Thomas Koshy, Elsevier

3. Discrete Mathematics,2/e, JK Sharma ,Macmillan

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Page 7: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.4 DIGITAL LOGIC DESIGN

UNIT I : Number Systems:

Binary, Octal, Decimal, Hexadecimal Number Systems. Conversion Of Numbers from One Radix to another Radix , r’s

Complement and (r-1)’s Complement Subtraction Of Unsigned Numbers, Problems, Signed Binary Numbers, Weighted

and Non-weighted codes

UNIT II: Logic Gates and Boolean Algebra:

Basic Gates: NOT, AND, OR, Boolean Theorems, Complement, Duality principal, Universal Gates, Ex-OR and Ex-

NOR Gates, SOP,POS, Minimizations Of Logic Functions using Boolean Theorems, Multilevel Realization Of Logic

Functions using Universal Gates. Parity Checking, Generating Circuits. Introduction to Verilog HDL and Verilog

programming for minimized logic functions.

UNIT III: Gate - Level Minimization: Karnaugh Map Method (K-Map): Minimization Of Boolean Functions Using 4 Variable , 5 and 6 Variable Maps, POS

and SOP Simplifications with Don’t Care Conditions using K-Map. Verilog Programs for Simplified Expressions.

UNIT IV: Combinational Arithmetic Logic Circuits:

Design Of Half Adder, Full Adder, Half Subtractor, Full Subtractor, Ripple Adders and Subtractors, Ripple

Adder/Subtractor Using Ones and Twos Complement Method. Serial Adder, Carry Look Ahead Adder, Binary

Multiplier. Verilog Programming for above Circuits.

UNIT V: Combinational Logic Circuits: Design of Decoders, Encoders, Multiplexers, Demultiplexers, Higher Order Demultiplexers and Multiplexers,

Realization Of Boolean Functions Using Decoders and Multiplexers, Priority Encoders, Code Converters, Magnitude

Comparator. Verilog Programming for above Circuits.

UNIT VI:Programmable Logic Devices:

PLA, PAL, PROM. Realization of Switching Functions Using PROM, PAL and PLA. Comparison of PLA, PAL and

PROM. Programming Tables of PLA, PAL and PROM.

UNIT VII: Introduction to Sequential Logic Circuits:

Classification, Basic Sequential Logic Circuits: Latch and Flip-Flop, RS- Latch using NAND and NOR Gates and their

Truth Tables. RS, JK, T and D Flip Flops, Truth Tables and Excitation Tables, Conversion of Flip Flops. Flip Flops

With Asynchronous Inputs (Preset and Clear). Verilog Programming for above Circuits.

UNIT VIII:Registers and Counters:

Design of Registers, Buffer Register, Control Buffer Registers, Bidirectional Shift Registers, Universal Shift Register,

Design of Ripple Counters, Synchronous Counters and Variable Modulus Counters, Ring Counter, Johnson Counter.

Verilog Programming for above Circuits.

TEXT BOOKS :

1. Digital Design ,4/e, M.Morris Mano, Michael D Ciletti, PEA

2. Fundamentals of Logic Design, 5/e, Roth, Cengage

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

REFERENCE BOOKS:

1. Switching and Finite Automata Theory,3/e,Kohavi, Jha, Cambridge.

2. Digital Logic Design, Leach, Malvino, Saha,TMH

3. Verilog HDL primer, Jaya Bhaskar, PEA

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.5. ELECTRONIC ENGINEERING

UNIT I:Review of P & N type semiconductors: Insulators, Semi conductors, and Metals classification using Energy Band Diagrams, Mobility and Conductivity,

Electrons and holes in Intrinsic Semi conductors, Extrinsic Semi Conductor, (P and N Type semiconductor)

Junction Diode Characteristics and Special Diodes: Open circuited P N Junction, Forward and Reverse Bias, Current components in PN Diode, Diode Equation, Volt-

Ampere Characteristic (Qualitative treatment only), Temperature Dependence on V – I characteristic, Step Graded

Junction, Diffusion Capacitance and Diode Resistance (Static and Dynamic), Energy Band Diagram of PN Diode.

UNIT II: Special Diodes : Special Diodes: Avalanche and Zener Break Down, Zener Characteristics, Tunnel Diode, Characteristics, Varactor

Diode, LED, PIN Diode, Photo Diode

Rectifiers and Filters :

Half wave rectifier, ripple factor, full wave rectifier(with and without transformer), Harmonic components in a rectifier

circuit, Inductor filter, Capacitor filter, Simple circuit of a regulator using zener diode.

UNIT III:Transistor Characteristics: Junction transistor, Transistor current components, Transistor as an amplifier, Characteristics of Transistor in Common

Base and Common Emitter Configurations, Photo Transistor, Typical transistor junction voltage values

FET Characteristics:

JFET characteristics (Qualitative discussion), Small signal model of JFET, MOSFET characteristics (Enhancement and

depletion mode), Symbols of MOSFET, Introduction to SCR and UJT and their characteristics

UNIT IV: Biasing and Thermal Stabilization : Transistor Biasing and Thermal Stabilization: Operating point, Basic Stability, Collector to Base Bias, Self Bias,

Stabilization against variations in VBE,, and β for the self bias circuit, Stabilization factors, Bias Compensation,

Thermistor and Sensitor compensation, Compensation against variation in VBE, Ico,, Thermal runaway, Thermal

stability

UNIT V:Small signal low frequency Transistor models & Single stage amplifiers:

Two port devices and the Hybrid model, Transistor Hybrid model, Determination of h-parameters from characteristics,

Analysis of a Transistor Amplifier circuit using h- parameters, Comparison of Transistor Amplifier configurations,

Miller’s Theorem

Simplified Common Emitter hybrid model, Common emitter amplifier with emitter resistance, Emitter follower,

cascaded transistor amplifiers

FET small signal model, Low frequency common source and common drain amplifiers, FET as Voltage Variable

Resistor, Biasing the FET

UNIT VI:Feedback Amplifiers and Oscillators: Classification of Amplifiers, Feedback concept, Transfer Gain with feedback, General characteristics of negative

feedback amplifiers, Effect of Feedback on input and output Resistances, Voltage series, voltage shunt, current series,

and current shunt feedback amplifiers with discrete components circuits (Analysis is not required)

Conditions for oscillations. RC-phase shift oscillator with Transistor and FET, Hartley and Colpitts oscillators, Wein

bridge oscillator

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

UNIT VII:Power Amplifiers:

Class A large signal Amplifiers, Second harmonic Distortions, Higher order harmonic Distortion, Transformer Coupled

Audio power amplifier, Efficiency, Push-pull amplifiers, Class B Amplifiers, Class AB operation, Efficiency of Class B

Amplifier

UNIT VIII:Tuned Amplifiers:

Introduction, Q-Factor, Small Signal Tuned Amplifier ; Capacitance single tuned amplifier, Double Tuned Amplifiers,

Staggered tuned amplifiers

TEXT BOOKS :

1. Electronic Devices and Circuits , J. Millman, C.C. Halkias, TMH

2. Electronic Devices and Circuits, K Satya Prasad, VGS

REFERENCE BOOKS:

1. Integrated Electronics , 2009, Jacob Millman, Chritos C. Halkies, TMH

2. Electronic Devices and Circuits ,2/e, Salivahanan, N.Suressh Kumar, A. Vallavaraj, TMH

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.6. DATA STRUCTURES

UNIT I: Recursion and Linear Search: Preliminaries of algorithm, Algorithm analysis and complexity,Recursion: Definition, Design Methodology and

Implementation of recursive algorithms, Linear and binary recursion, recursive algorithms for factorial function, GCD

computation, Fibonacci sequence, Towers of Hanoi, Tail recursion

List Searches using Linear Search, Binary Search, Fibonacci Search, Analyzing search algorithms.

UNIT II: Sorting Techniques:

Basic concepts, Sorting by : insertion (Insertion sort), selection (heap sort), exchange (bubble sort, quick sort),

distribution (radix sort ) and merging (merge sort ) Algorithms.

UNIT III:Stacks and Queues: Basic Stack Operations, Representation of a Stack using Arrays, Stack Applications: Reversing list, Factorial

Calculation, In-fix- to postfix Transformation, Evaluating Arithmetic Expressions.

Queues: Basic Queues Operations, Representation of a Queue using array, Implementation of Queue Operations

using Stack, Applications of Queues-Round robin Algorithm, Enqueue, Dequeue, Circular Queues, Priority Queues.

UNIT IV: Linked Lists:

Introduction, single linked list, representation of a linked list in memory, Operations on a single linked list, merging two single linked lists into one list, Reversing a single linked list, applications of single linked list to

represent polynomial expressions and sparse matrix manipulation, Advantages and disadvantages of single linked list,

Circular linked list, Double linked list

UNIT V:Trees: Basic tree concepts, Binary Trees: Properties, Representation of Binary Trees using arrays and linked lists, operations

on a Binary tree , Binary Tree Traversals, Creation of binary tree from in-order and pre(post)order traversals, Tree

Travels using stack, Threaded Binary Trees.

UNIT VI: Advanced concepts of Trees: Binary search tree, Basic concepts, BST operations:insertion, deletion, balanced binary trees

AVL Search Trees basic concepts , operations:insertion ,deletion.

m-way search trees operations: insertion ,deletion,

B Trees, operations: insertion , deletion

UNIT VII:Graphs:

Basic concepts, Representations of Graphs: using Linked list and adjacency matrix, Graph algorithms

Graph Traversals (BFS & DFS), applications: Dijkstra’s shortest path, Transitive closure, Minimum Spanning Tree

using Prim’s Algorithm, warshall’s Algorithm.

Unit VIII: Sets: Definition, Representation of Sets using Linked list, operations of sets using linked lists, application of sets- Information

storage using bit strings

Abstract Data Type Introduction to abstraction, Model for an Abstract Data Type, ADT Operations, ADT Data

Structure, ADT Implementation of array, Linked list and stack.

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

TEXT BOOKS:

1. Data Structures, 2/e, Richard F, Gilberg , Forouzan, Cengage

2. Data Structures and Algorithms, 2008, G.A.V.Pai, TMH

REFERENCE BOOKS:

1. Data Structure with C, Seymour Lipschutz, TMH

2. Classic Data Structures, 2/e, Debasis ,Samanta,PHI,2009

3. Fundamentals of Data Structure in C, 2/e, Horowitz,Sahni, Anderson Freed,University Prees

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w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.7 Electronic Engineering Lab

PART A : (Only for viva voce Examination)

ELECTRONIC WORKSHOP PRACTICE ( in 6 lab sessions) :

1. Identification, Specifications, Testing of R, L, C Components (Colour Codes), Potentiometers, Coils, Gang

Condensers, Relays, Bread Boards.

2. Identification, Specifications and Testing of Active Devices, Diodes, BJTs, Lowpower JFETs, LEDs, LCDs, SCR,

UJT, Linear and Digital ICs.

3. Soldering practice – Simple Circuits using active and passive components.

4. Study and operation of

• Multimeters (Analog and Digital)

• Function Generator

• Regulated Power Supplies

. Study and Operation of CRO.

PART B : (For Laboratory examination – Minimum of 10 experiments)

1. PN Junction diode characteristics A. Forward bias B. Reverse bias.( cut-in voltage & Resistance

calculations)

2. Zener diode characteristics and Zener as a regulator

3. Transistor CB characteristics (Input and Output) & h Parameter calculations

4. Transistor CE characteristics (Input and Output) & h Parameter calculations

5. Rectifier without filters (Full wave & Half wave)

6. Rectifier with filters (Full wave & Half wave)

7. FET characteristics

8. SCR Charecteristics

9. UJT Charectristics

10. CE Amplifier

11. CC Amplifier (Emitter Follower).

12. Single stage R-C coupled Amplifier.

13. RC Phase Shift Oscillator using Transistors

14. Class A Power Amplifier (Transformer less)

15. Wien Bridge Oscillator

16. RC Phase Shift Oscillator

PART C:

Equipment required for Laboratories:

1. Regulated Power supplies (RPS) - 0-30v

2. CROs - 0-20M Hz.

3. Function Generators - 0-1 M Hz.

4. Multimeters

5. Decade Resitance Boxes/Rheostats

6. Decade Capacitance Boxes

7. Micro Ammeters (Analog or Digital) - 0-20 µA, 0-50µA, 0-100µA, 0-200µA

8. Voltmeters (Analog or Digital) - 0-50V, 0-100V, 0-250V

9. Electronic Components - Resistors, Capacitors, BJTs,

LCDs,SCRs, UJTs, FETs, LEDs,

MOSFETs,diodes,transistors

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Page 14: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

2.1.8 DATA STRUCTURES LAB

Exercise 1:

Write recursive programme which computes the nth Fibonacci number, for appropriate values of n.

Analyze behavior of the programme Obtain the frequency count of the statement for various values of n.

Exercise 2:

Write recursive programme for the following

a) Write recursive C programe for calculation of Factorial of an integer

b) Write recursive C programe for calculation of GCD (n, m)

c) Write recursive C programe for Towers of Hanoi : N disks are to be transferred from peg S to peg D with Peg I

as the intermediate peg.

Exercise 3:

a) Write C programs that use both recursive and non recursive functions to perform Linear search for a Key value

in a given list.

b) Write C programs that use both recursive and non recursive functions to perform Binary search for a Key value

in a given list.

c) Write C programs that use both recursive and non recursive functions to perform Fibonacci search for a Key

value in a given list.

Exercise 4:

a) Write C programs that implement Bubble sort, to sort a given list of integers in ascending order

b) Write C programs that implement Quick sort, to sort a given list of integers in ascending order

c) Write C programs that implement Insertion sort,to sort a given list of integers in ascending order

Exercise 5:

Write C programs that implement heap sort, to sort a given list of integers in ascending order

d) Write C programs that implement radix sort, to sort a given list of integers in ascending order

e) Write C programs that implement merge sort, to sort a given list of integers in ascending order

Exercise 6:

a) Write C programs that implement stack (its operations) using arrays

b) Write C programs that implement stack (its operations) using Linked list

Exercise 7:

a) Write a C program that uses Stack operations to Convert infix expression into postfix expression

a) Write C programs that implement Queue (its operations) using arrays.

b) Write C programs that implement Queue (its operations) using linked lists

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Page 15: B.Tech CSE -II YEAR.R10 Students 1qiscet.edu.in/docs-pdf/R10_B.Tech._II_Year_I_Semester.pdf · 2016-07-28 · w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA II B.Tech

w.e.f.2010 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, KAKINADA

II B.Tech. CSE. I.Sem.

Exercise 8:

a) Write a C program that uses functions to create a singly linked list

b) Write a C program that uses functions to perform insertion operation on a singly linked list

c) Write a C program that uses functions to perform deletion operation on a singly linked list

Exercise 9:

d) Adding two large integers which are represented in linked list fashion.

e) Write a C programme to reverse elements of a single linked list.

f) Write a C programme to store a polynomial expression in memory using linked list

g) Write a C programme to representation the given Sparse matrix using arrays.

h) Write a C programme to representation the given Sparse matrix using linked list

Exercise10:

a) Write a C program to Create a Binary Tree of integers

b) Write a recursive C program, for Traversing a binary tree in preorder, inorder and postorder.

c) Write a non recursive C program, for Traversing a binary tree in preorder, inorder and postorder.

d) Program to check balance property of a tree.

Exercise 11:

a) Write a C program to Create a BST

b) Write a C programme to insert a note into a BST.

c) Write a C programme to delete a note from a BST.

Exercise 12:

a) Write a C programme to compute the shortest path of a graph using Dijkstra’s algorithm

b) Write a C programme to find the minimum spanning tree using Warshall’s Algorithm

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