Accelerator Architectures:High-Level Modeling of Specialization

[Brodersen and Meng, 2002]

16 Encryption

17 Hearing Aid

18 FIR for disk read

19 MPEG Encoder

20 802.11 Baseband

• – 

• – 

• – 

0 200 400 600 800 1000 1200Execution Time (uS)

0

20

40

60

80

100

120

140

Pow

er(m

W)

HLS

0 200 400 600 800 1000 1200Execution Time (uS)

0

20

40

60

80

100

120

140

Pow

er(m

W)

ALADDINHLS

          

• • 

– – – 

• – 

• – – – 

• – 

 

 

 

 

• 

• – – 

• – – – – 

 

 

 

 

• 

• 

• – – 

CPU

DMA Engine

Scratchpad

TLB

DRAM

LLC

CacheCache

Acc Datapath

– 

0 200 400 600 800 1000 1200Execution Time (uS)

0

20

40

60

80

100

120

140

Pow

er(m

W)

ALADDINHLS

– 

100

W)

20

40

60Po

Harvard Robobee Brain SoC

“Datacenter Tax” prime candidates for

specialization

<bool_expression>

• – – 

• 

–