Blind Stick VOICE

8/19/2019 Blind Stick VOICE

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$ater sense is simp!y a two cond&ctin. wire when sense a water then act

a&tomatica!!y and prod&ce a so&nd from the contro!!er#

54MOT4 S4NSO5# In the remote sensor we attach one infra red eye with

the circ&it# This eye is a specia! fre9&ency decoder eye# $e &se this eye in

t#% recei%er# This eye is respond a sma!! si.na! when any remote of :; " ht8

prod&ce a si.na!# $ith the he!p of this eye we catch a :; "'t8 si.na! and

then proceed to the microcontro!!er circ&it#

0ny !ind person wanted to !ocate his !ind stic" then first of a!! he press

the remote in a!! direction# If the stic" is in the room then eye respond with

the so&nd &88er


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In this project there is two option# 4ither we prod&ce a eep so&nd or we

prod&ce a h&man so&nd# For the eep so&nd we connect one &88er with the

project# 0nd for the h&man so&nd we m&st record the so&nd in the any %oice

processor# 'ere we &se 025 );// %oice processor# $ith the he!p of this

processor we record and .enerate ( different so&nd at a time one y one#

In the apr );// there is one condenser mi"e# $ith the he!p of this mi"e and

switch circ&it we record the so&nd and then reprod&ce this so&nd from the

spea"er when sensor I0 acti%ate#

DI6IT0L


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prediction## On the other hand 025 );// sin.!e chip %oice recorder and

p!ayac" de%ice from 0p!&s inte.rated circ&its ma"es &se of a proprietary

ana!o.&e stora.e techni9&e imp!emented &sin. f!ash non?%o!atic memory

process in which each ce!! is capa!e of storin. &p to >*; %o!ta.e !e%e!s#

This techno!o.y ena!es the 025);// to reprod&ce %oice si.na!s in the

nat&ra! form# The 025 );// is a .ood stand !one %oice recorder or p!ayac"

ic with non %o!ati!e stora.e and p!ayac" capai!ity fro :> to ;/ seconds# It

can record and p!ay m&!tip!e messa.e at random or in se9&entia! mode# The

&ser can se!ect samp!e rates with conse9&ent 9&a!ity and recordin. time

trade off# Microphone amp!ifier- a&tomatic .ain contro! @ 06C A circ&its-

interna! antia!iashin. fi!ter- inte.rated o&tp&t amp!ifier and messa.e

mana.ement are some of the feat&res of the 025 );//# Comp!ete chip

mana.ement is accomp!ished thro&.h the de%ice contro! and messa.e

contro! !oc"s# + A to 0nain @ pin >/A %ia an e1terna! Dc !oc"in. capacitor C+#

a ias si.na! is app!ied to the microphone and to sa%e power d&rin.

p!ayac"- the .ro&nd ret&rn of this ias networ" can e connected to the

norma!!y open side of the record switch# Both Mic#in and Mic#5ef @ pins

+( and +)A m&st e co&p!ed to the microphone networ" thro&.h capacitors#


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5ecordin. si.na! from the e1terna! so&rce can a!so e fed direct!y into the

chip &sin. 0na?In @ pin >/A- &t the connection etween anain @ pin >/A and

0naAo&t @ pin >+A is sti!! re9&ired for p!ayac"# 0n interna! anti?a!iasin.

fi!ter a&tomatica!!y adj&sts its response accordin. to the samp!in. fre9&ency

se!ected# Then the si.na! is processed into the memory array thro&.h a

comination of the samp!e and ho!d circ&its and ana!o.&e readwrite circ&it#

The incomin. %oice si.na!s are samp!ed and the instantaneo&s %o!ta.e

samp!es are stored in the non?%o!atic f!ash memory ce!!s in the ( it inary

encoded format# D&rin. p!ayac"- the stored si.na!s are retri%ed from the

memory- smoothed to form a contin&o&s si.na! !e%e! at the spea"er termina!s

S2 and S2? @ pins +E and +* respecti%e!yA is at ao&t +>mw power into +;

ohm impedence# The o&tp&t from pin +E @ spA is f&rther amp!ified y the

!ow power amp!ifier &sin. LM:(; @ IC>A as shown in the fi.&re# The

recorded messa.e is reprod&ced into spea"er LS+# an interna! osci!!aot

pro%ides samp!in. c!oc" to the 025 );//# the fre9&ency od the osci!!ator

and samp!in. rate depend on the %a!&e of resistor 5+> connected across the

OSC5 @ pin A of the chip and the .ro&nd#

Be!ow ta!e show the samp!in. fre9&ency correspondin. to different resistor

%a!&es- as we!! as the res&!tin. inp&t andwidth and d&ration of recordin.#


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'i.her samp!in. rates impro%e the %oice andwidth re9&irement and th&s

red&ce the d&ration !ower samp!in. rates &se fewer memory ce!!s and

effecti%e!y increase the recordin. p!ayac" d&ration of the de%ice# The 5C

networ" @ comprisin. resistor 5) and capacitor C> connected A at pin +)

sets the 06C attac" time# @ the attac" time is defined as the de!ay present

efore the 06C circ&it e.ins to adj&st .ainA

M4SS064 M0N064M4NT7 The 025);// chip s&pports the fo!!owin.

messa.e modes#

+# 5andom access mode with >- E-( messa.e within the tota! recordin.

time#

># Tape mode with two option7 a&to rewind and norma! operation#

The modes are defined y pins >E- >* and ) as shown as ta!e + and cannot

e mi1ed# 0n important feat&re of the apr);// chip is indication of chan.es

in the de%ice stat&s thro&.h eeps s&perimposed on the de%ice o&tp&t7 for

e1amp!e- the start of recordin. is indicated y a eep- so the person can now

start spea"in. into the microphone# This feat&re is ena!ed y ma"in. pin

++ hi.h


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64N450L F=NCTION0L D4SC5I2TION#

On power &p- pin >: is p&!!ed !ow thro&.h resistor 5 to ena!e the de%ice

for operation# To..!in. this pin y switch S) a!so resets se%era! messa.e

mana.ement feat&res# 2in no > is p&!!ed !ow to ena!e recordin. and it is

p&!!ed hi.h for p!ayac"# To start recordin. p!ayac" switch the

appropriate tri..er pin as descried in the circ&it# 6!owin. of the !ed

indicates that the de%ice is &sy and no commands can e c&rrent!y

accepted# The !ed is dri%en y 2N2 transistor T+ which is connected to pin

+/ of the chip# L4D> indicates recordin. in each indi%id&a! memory

se.ment G it is dri%en y pin >> thro&.h transistor#


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COM2ON4NTS =S4D7


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IC ()S*+ CONT5OLL45

025 );//


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+/ K O'M @*A

+ K O'M @*A

EK A

+// K @A

E/ O'M @*A

EK @:A

>>/ K @+A

C5YST0L +> Mht8

> 2F @>A 2I4C4 65O=ND4D F5OM T'4 C5YST0L TO 54D=C4

NOIS4#

#/+ @>A $IT' T'4 COND4NS45 MIK4 CI5C=IT

'O$ S4NSO5 $O5KS#


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How to control sensorsWhat is a voltage divider?

Yo& are .oin. to find o&t &t donHt e in too m&ch of a h&rry# $or" thro&.h the Chapter

and a!!ow the e1p!anation to de%e!op#

The dia.ram e!ow shows a light dependent resistor- or LDR - to.ether with its circ&it

symo!7

The !i.ht?sensiti%e part of the LD5 is a wa%y trac" of

The essentia! circ&it of a %o!ta.e di%ider- a!so ca!!ed a potential divider- is7


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$hat happens if one of the resistors in the %o!ta.e di%ider is rep!aced y an LD5 In the

circ&it e!ow- Rtop is a +/ resistor- and an LD5 is &sed as R ottom 7

S&ppose the LD5 has a resistance of *// - /#* - in ri.ht !i.ht- and >// in theshade @these %a!&es are reasona!eA#

$hen the LD5 is in the !i.ht- V o&t wi!! e7


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In the shade- V o&t wi!! e7

In other words- this circ&it .i%es a LO$ %o!ta.e when the LD5 is in the !i.ht- and a

'I6' %o!ta.e when the LD5 is in the shade# The %o!ta.e di%ider circ&it .i%es an o&tp&t

Temperature sensors

0 temperat&re?sensiti%e resistor is are se%era! different types7


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'ow co&!d yo& ma"e a sensor circ&it to detect temperat&res !ess than EJC to warn

motorists that there may e ice on the road Yo& want 'I6'7


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part of < across them# 0 s&ita!e circ&it for &se with a ) < s&pp!y is7

The E a %o!ta.e di%ider which pro%ides +#; < across the microphone# So&nd wa%es.enerate sma!! chan.es in %o!ta.e- &s&a!!y in the ran.e +/?>/ m


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Signals from switches

$hen a switch is &sed to pro%ide an inp&t to a circ&it- pressin. the switch &s&a!!y.enerates a %o!ta.e si.na!# It is the

The pull down resistor in the first circ&it when the switch is pressed# 0 resistor %a!&e of

0s yo& can see- the switch has

or. ////h


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o&r pro.ram is to e written on the //// !ocation- eca&se when the ic is

reset then a&to reset circ&it force the contro!!er to mo%e the pro.ram

co&nter on //// !ocation - so o&r first command is to e written on the

////h !ocation#

sjmp main

o&r ne1t command is sjmp main# It means that j&mp to the main f&nction

a&tomatica!!y# Main f&nction is start from the //:/h !ocation# O&r ne1t

pro.ram is start from the //:/ h !ocation#

or. //:/h

main7

jn p+#/-water

jn p+#+-fa!!in.

jn p+#>-fire

jn p+#:-!i.ht

jn p+#E-inter

jn p+#*-reset


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O&r first wor" of this stic" is to e monitor the a!! the sensor,s if there is any

interr&ption from water- heat !i.ht or any thin. then j&mp to specify !ocation

a&tomatica!!y

3 for the water sensor we &se two meta!!ic p!ate &nder the stic" - when water

to&ches on this stic" then &88er is on and at this time we set a co&nter on

on!& for one &88er- so &88er rin.s for on!y one time and stop

a&tomatica!!y# B&t if there is contin&eo&s water sensin. then &88er is switch

on re.&!ar!y#

water7

mo% r/-/+

aca!! &88er

aca!! &88er is a specia! f&nction- on this f&nction we switch on the &88er

a&tomatica!!y#

fa!!in.7

mo% r/-/>


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aca!! &88er

on the fa!!in. sensor we &se one merc&ry sensor# In the merc&ry sensor we

&se two meta!!ic sensor and with merc&ry inside - when stic" fa!! on the

road then meta!!ic p!ates join to.ether and at this time &88er is on- In the

fa!!in. mode we ca!! the &88er si.na! for > timer#

fire7

mo% r/-/:

aca!! &88er

fire sensor7 in the fire sensor we we &se one thermistor with transistor

circ&it# $ith NTC thermistor# $hen we heat the thermistor then thermistor

%a!&e is to e decreased and circ&it acti%ate and &88er is on# Note that for

a!! the sensor,s we &se ne.ati%e inp&t to the microcontro!!er# $hen

microcontro!!er is on reset position then a!! the pins are .oes hi.h and we

pro.ram the microcontro!!er for ne.ati%e !o.ic# So that from a!! the sensors

we pro%ide a ne.ati%e inp&t to the microcontro!!er#

!i.ht7

mo% r/-/E


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aca!! &88er

sjmp main

In the !i.ht sensor we &se !dr as a main sensor# $hen !i.ht fa!! on the !dr

then !dr shows a !ow resistance and d&e to that transistor pro%ide a ne.ati%e

si.na! to the contro!!er# In the !i.ht %ersion we pro%ide a E time &88er

so&nd#

inter7

mo% r/-/*

aca!! &88er

!jmp main

In the interr&ption mode we &se one infra red !ed and photodiode in pair# If

there is any oject in the front of the stic" then infra red !i.ht is ref!ected

from the oject and d&e to that photodiode .ets a ne.ati%e si.na! on the

contro!!er# $hen contro!!er sense a ne.ati%e si.na! on the pin then processor

pro%ide a fi%e time &88er so&nd#

&88er7


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'O$ S4NSO5 $O5KS

Basic of microcontro!!er#

WELCOME TO THE WORLD OF THE

MICROCONTROLLER !

Loo" aro&nd# Notice the smart inte!!i.ent systems Be it the T#


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=n!i"e the microprocessor- the micro contro!!er can e considered to e a

tr&e Comp&ter on a chip#

In addition to the %ario&s feat&res !i"e the 0L=- 2C- S2 and re.isters fo&nd

on a microprocessor- the micro contro!!er a!so incorporates feat&res !i"e the

5OM- 50M- 2orts- timers- c!oc" circ&its- co&nters- reset f&nctions etc#

$hi!e the microprocessor is more a .enera!?p&rpose de%ice- &sed for read-

write and ca!c&!ations on data- the micro contro!!er- in addition to the ao%e

f&nctions a!so contro!s the en%ironment#


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(/*+ micro contro!!er

The "#$%

The (/*+ de%e!oped and !a&nched in the ear!y (/Qs- is one of the most

pop&!ar micro contro!!er in &se today# It has a reasona!y !ar.e amo&nt of

&i!t in 5OM and 50M# In addition it has the ai!ity to access e1terna!

memory#

The .eneric term Q(1*+Q is &sed to define the de%ice# The %a!&e of 1 definin.

the "ind of 5OM- i#e# 1R/- indicates none- 1R:- indicates mas" 5OM- 1R-indicates 425OM and 1R) indicates 4425OM or F!ash#

& note on ROM

The ear!y (/*+- name!y the (/:+ was desi.ned witho&t any 5OM# This

de%ice co&!d r&n on!y with e1terna! memory connected to it# S&se9&ent

de%e!opments !ead to the de%e!opment of the 25OM or the pro.ramma!e

5OM# This type had the disad%anta.e of ein. hi.h!y &nre!ia!e#

The ne1t in !ine- was the 425OM or 4rasa!e 2ro.ramma!e 5OM# These

de%ices &sed &!tra%io!et !i.ht erasa!e memory ce!!s# Th&s a pro.ram co&!d

e !oaded- tested and erased &sin. &!tra %io!et rays# 0 new pro.ram co&!d

then e !oaded a.ain#

0n impro%ed 425OM was the 4425OM or the e!ectrica!!y erasa!e 25OM#


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This does not re9&ire &!tra %io!et rays- and memory can e c!eared &sin.

circ&its within the chip itse!f#

Fina!!y there is the FL0S'- which is an impro%ement o%er the 4425OM#

$hi!e the terms 4425OM and f!ash are sometimes &sed interchan.ea!y-

the difference !ies in the fact that f!ash erases the comp!ete memory at one

stro"e- and not act on the indi%id&a! ce!!s# This res&!ts in red&cin. the time

for eras&re#

Di''erent (icrocontrollers in (ar)et!

• 2IC One of the famo&s microcontro!!ers &sed in the ind&stries# It is

ased on 5ISC 0rchitect&re which ma"es the microcontro!!er process faster than

other microcontro!!er#

• INT4L These are the first to man&fact&re microcontro!!ers# These are not

as sophisticated other microcontro!!ers &t sti!! the easiest one to !earn#

• 0TM4L 0tme!,s 0/ years# There are !ots of oo"s

and st&dy materia!s are readi!y a%ai!a!e for (/*+#


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Derivatives

The est thin. done y Inte! is to .i%e the desi.ns of the (/*+ microcontro!!er toe%eryone# So it is not the fact that Inte! is the on!y man&fact&re for the (/*+ there more

than >/ man&fact&res- with each of minim&m >/ mode!s# Litera!!y there are h&ndreds ofmode!s of (/*+ microcontro!!er a%ai!a!e in mar"et to choose# Some of the major

man&fact&res of (/*+ are

0tme!

2hi!ips

*hilips

The 2hi!ipss (/*+ deri%ati%es has more n&mer of feat&res than in anymicrocontro!!er# The costs of the 2hi!ips microcontro!!ers are hi.her than the 0tme!,swhich ma"es &s to choose 0tme! more often than 2hi!ips

Dallas

Da!!as has made many re%o!&tions in the semicond&ctor mar"et# Da!!as,s (/*+

deri%ati%e is the fastest one in the mar"et# It wor"s : times as fast as a (/*+ can process#

B&t we are &na!e to .et more in India#

&t(el

These peop!e were the one to master the f!ash de%ices# They are the cheapest

microcontro!!er a%ai!a!e in the mar"et# 0tme!,s e%en introd&ced a >/pin %ariant of (/*+named >/*+# The 0tme!,s (/*+ deri%ati%es can e .ot in India !ess than / r&pees# There

are !ots of cheap pro.rammers a%ai!a!e in India for 0tme!# So it is a!ways .ood for

st&dents to stic" with (/*+ when yo& !earn a new microcontro!!er#


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+

&rchitecture

0rchitect&re is m&st to !earn eca&se efore !earnin. new machine it is necessary to !earn

the capai!ities of the machine# This is some thin. !i"e efore !earnin. ao&t the car yo&cannot ecome a .ood dri%er# The architect&re of the (/*+ is .i%en e!ow#


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The (/*+ doesn,t ha%e any specia! feat&re than other microcontro!!er# The on!y feat&re is

that it is easy to !earn# 0rchitect&re ma"es &s to "now ao&t the hardware feat&res of the

microcontro!!er# The feat&res of the (/*+ are

EK Bytes of F!ash Memory

+>( 1 (?Bit Interna! 50M F&!!y Static Operation7 + M'8 to >E M'8

:> 2ro.ramma!e IO Lines

Two +;?Bit TimerCo&nters

Si1 Interr&pt So&rces @* :* instr&ctions# Some of the important re.isters and their f&nctions are

Let,s now mo%e on to a practica! e1amp!e# $e sha!! wor" on a simp!e

practica! app!ication and &sin. the e1amp!e as a ase- sha!! e1p!ore the

%ario&s feat&res of the (/*+ microcontro!!er#

Consider an e!ectric circ&it as fo!!ows-

The positi%e side @%eA of the attery is connected to one side of a switch#

The other side of the switch is connected to a &! or L4D @Li.ht 4mittin.

DiodeA# The &! is then connected to a resistor- and the other end of the

resistor is connected to the ne.ati%e @?%eA side of the attery#


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a standard n&mer of cyc!es to e1ec&te# The cyc!e co&!d e one or more in

n&mer#

'ow is this time then ca!c&!ated

The speed with which a microcontro!!er e1ec&tes instr&ctions is determined

y what is "nown as the crysta! speed# 0 crysta! is a component connected

e1terna!!y to the microcontro!!er# The crysta! has different %a!&es- and some

of the &sed %a!&es are ;M'- +/M'- and ++#/*) M'8 etc#

Th&s a +/M' crysta! wo&!d p&!se at the rate of +/-///-/// times per

second#

The time is ca!c&!ated &sin. the form&!a

No of cyc!es per second R Crysta! fre9&ency in ' +>#

For a +/M' crysta! the n&mer of cyc!es wo&!d e-

+/-///-///+>R(:::::#::::: cyc!es#

This means that in one second- the microcontro!!er wo&!d e1ec&te

(:::::#::::: cyc!es#


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re.ister "nown as the B, re.ister- which is &sed e1c!&si%e!y for

m&!tip!ication and di%ision#

Th&s an (?it notation wo&!d indicate that the ma1im&m %a!&e that can e

inp&t into these re.isters is ++++++++,# 2&88!ed

The %a!&e is not decima! +++- ++-+++P It represents a inary n&mer- ha%in.

an e9&i%a!ent %a!&e of FF, in 'e1adecima! and a %a!&e of >** in decima!#

$e sha!! read in more detai! on the different n&merin. systems name!y the

Binary and 'e1adecima! system in o&r ne1t mod&!e#

5! 67 on-chip ROM

Once yo& ha%e written o&t the instr&ctions for the microcontro!!er- where doyo& p&t these instr&ctions

O%io&s!y yo& wo&!d !i"e these instr&ctions to e safe- and not .et de!eted

or chan.ed d&rin. e1ec&tion# 'ence yo& wo&!d !oad it into the 5OM,

The si8e of the pro.ram yo& write is o&nd to %ary dependin. on the

app!ication- and the n&mer of !ines# The (/*+ microcontro!!er .i%es yo&

space to !oad &p to EK of pro.ram si8e into the interna! 5OM#

EK- that,s a!! $e!! j&st wait# Yo& wo&!d e s&rprised at the amo&nt of st&ff

yo& can !oad in this EK of space#

Of co&rse yo& co&!d a!ways e1tend the space y connectin. to ;EK of

e1terna! 5OM if re9&ired#

8! %5" .9tes on-chip R&M

This is the space pro%ided for e1ec&tin. the pro.ram in terms of mo%in.

data- storin. data etc#

6! 85 I:O lines! 0Four- " .it ports; la.eled *#; *%; *5; *84

In o&r &! e1amp!e- we &sed the notation p+#/# This means it 8ero of port

one# One it contro!s one &!#


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Th&s port one wo&!d ha%e ( its# There are a tota! of fo&r ports named p/-

p+- p>- p:- .i%in. a tota! of :> !ines# These !ines can e &sed oth as inp&t or

o&tp&t#

$! Two %< .it ti(ers : counters!

0 microcontro!!er norma!!y e1ec&tes one instr&ction at a time# 'owe%er

certain app!ications wo&!d re9&ire that some e%ent has to e trac"ed

independent of the main pro.ram#

The man&fact&rers ha%e pro%ided a so!&tion- y pro%idin. two timers# These

timers e1ec&te in the ac".ro&nd independent of the main pro.ram# Once

the re9&ired time has een reached- @rememer the time ca!c&!ations

descried ao%eA- they can tri..er a ranch in the main pro.ram#

These timers can a!so e &sed as co&nters- so that they can co&nt the n&mer

of e%ents- and on reachin. the re9&ired co&nt- can ca&se a ranch in the main

pro.ram#

The (/*+ microcontro!!er is capa!e of comm&nicatin. with e1terna! de%ices

!i"e the 2C etc# 'ere data is sent in the form of ytes- at predefined speeds-

a!so "nown as a&d rates#

The transmission is seria!- in the sense- one .it at a ti(e

=! $- interrupt sources with two priorit9 levels 0Two e,ternal and three

internal4

D&rin. the disc&ssion on the timers- we had indicated that the timers can

tri..er a ranch in the main pro.ram# 'owe%er- what wo&!d we do in case

we wo&!d !i"e the microcontro!!er to ta"e the ranch- and then ret&rn ac" tothe main pro.ram- witho&t ha%in. to constant!y chec" whether the re9&ired

time co&nt has een reached

This is where the interr&pts come into p!ay# These can e set to either the

timers- or to some e1terna! e%ents# $hene%er the ac".ro&nd pro.ram has

reached the re9&ired criteria in terms of time or co&nt or an e1terna! e%ent-


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the ranch is ta"en- and on comp!etion of the ranch- the contro! ret&rns to

the main pro.ram#

2riority !e%e!s indicate which interr&pt is more important- and needs to e

e1ec&ted first in case two interr&pts occ&r at the same time#

"! On-chip cloc) oscillator!

This represents the osci!!ator circ&its within the microcontro!!er# Th&s the

hardware is red&ced to j&st simp!y connectin. an e1terna! crysta!- to achie%e

the re9&ired p&!sin. rate#

PIN FUNCTION OF IC 89C51.

1 Supply pin of this ic is pin no 40. Normall !" appl a 5 #olt r"$%lat"& &c po!"r s%ppl to this pin. For this p%rpos" "ith"r !" %s" st"p &o!n

transform"r po!"r s%ppl or !" %s" 9 #olt 'att"r !ith (805 r"$%lator.

) Ground pin of this ic is pin no )0. Pin no )0 is normall conn"ct"& to th" $ro%n& pin * normall n"$ati#" point of th" po!"r s%ppl.

+ XTAL is conn"ct"& to th" pin no 18 an& pin no 19 of this ic. Th" ,%art- crstal oscillator conn"ct"& to T/1 an& T/) PIN. Th"s" pins also n""&s

t!o capacitors of +0 pf #al%". On" si&" of "ach capacitor is conn"ct"& to

crstal an& oth"r pis is conn"ct"& to th" $ro%n& point. Normall !" conn"ct a

1) 2- or 11.059) 2- crstal !ith this ic.. 3%t !" %s" crstal %pto )0 2- to this pins

4 RESET PIN.. Pin no 9 is th" r"s"t pin of this ic.. It is an acti#" hi$h pin. Onapplin$ a hi$h p%ls" to this pin th" micro controll"r !ill r"s"t an& t"rminat"all acti#iti"s. This is oft"n r"f"rr"& to as a po!"r on r"s"t. Th" hi$h p%ls" m%st

'" hi$h for a minim%m of ) machin" ccl"s '"for" it is allo!"& to $o lo!.

5. !RT" Port 0 occ%pi"s a total of 8 pins. in no #$ to pin no #%. It can '"%s"& for inp%t or o%tp%t. " conn"ct all th" pins of th" port 0 !ith th" p%ll%p

r"sistor *10 6 ohm7 "t"rnall. This is &%" to fact that port 0 is an op"n &rain

mo&". It is %st li6" a op"n coll"ctor transistor.

:. !RT&. / th" ports in micrcontroll"r is 8 'it !i&" pin no & to pin no ''"ca%s" it is a 8 'it controll"r. /ll th" main r"$ist"r an& sfr all is mainl 8 'it

!i&". Port 1 is also occ%pi"s a 8 pins. 3%t th"r" is no n""& of p%ll %p r"sistor

in this port. Upon r"s"t port 1 act as a inp%t port. Upon r"s"t all th" ports act as a inp%t port


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(. !RT$( port ) also ha#" a 8 pins. It can '" %s"& as a inp%t or o%tp%t. Th"r"is no n""& of an p%ll %p r"sistor to this pin (

*ORT 8# 2ort: occ&pies a totoa! ( pins from pin no +/ to pin no +# It can

e &sed as inp&t or o&tp&t# 2ort : does not re9&ire any p&!! &p resistor# Thesame as port + and port># 2ort : is confi.&red as an o&tp&t port on reset# 2ort

: has the additiona! f&nction of pro%idin. some important si.na!s s&ch as

interr&pts# 2ort : a!so &se for seria! comm&nication#

ALE /; is an o%tp%t pin an& is acti#" hi$h. h"n conn"ctin$ an 80+1 to "t"rnal m"mor port 0 pro#i&"s 'oth a&&r"ss an& &ata. In oth"r !or&s th" 80+1 m%ltipl""s

a&&r"ss an& &ata thro%$h port 0 to sa#" pins. Th" /; pin is %s"& for &"m%ltipl"in$ th"a&&r"ss an& &ata ' conn"ctin$ to th" ic (4ls+(+ chip.

SE)( P


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SE*+AL ,-)*T+!) REG+STER . S,R/ ADDRESSES(

/CC /CCUU/TOR 0;02

3 3 R;>I


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S+)GLE 0+T +)STR-*T+!)S(

SET0 0+T ;T IF 3IT 1

1)0 0+T2 TARGET DUP TO T/R>;T IF 3IT 0

10* 0+T2TARGET DUP TO T/R>;T IF 3IT 1 ET2;N C;/R T2; 3IT

3!4 +)STR-*T+!)S

OV instr%ction simpl cop th" &ata from on" location to anoth"r location

3!4 D2S

Cop th" &ata from* T2ROU>2 OV

3!4 A25$#6 ?ir"ct loa& th" #al%" of )+h in /

3!4 R"25&$h &ir"ct loa& th" #al%" of 1)h in R0

3!4 R725",%6 oa& th" F9 #al%" in th" R"$ist"r R5

ADD +)STR-*T+!)S .

/?? instr%ctions a&&s th" so%rc" 't" to th" acc%m%lator * /7 an& plac" th" r"s%lt in th"

/cc%m%lator.


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3!4 A2 5$76

ADD A258$6 3A this instr%ctions !" a&& th" #al%" 4)h in /cc%m%lator

* 4)2G )527

ADDA2R# 3 this instr%ctions !" mo#" th" &ata from r"$ist"r r+ to

acc%m%lator an& th"n a&& th" cont"nts of th" r"$ist"r into

acc%m%lator .


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1* TARGET

DUP TO T2; T/R>;T IF CA F/> 1

1)* TARGET

DUP TO T2; T/R>;T /??R; I< 0

INTR/CTION REL&TED TO >/M*

WITH &CC/M/L&TOR

1: TARGET

DUP TO T/R>;T IF / 0

1): TARGET

DUP IF /CCUU/TOR I< NOT H;RO

This instr%ctions %mps if r"$ist" / has a #al%" oth"r than -"ro

+)STR-*T+!)S RELATED T! T6E R!TATE

RL A

ROT/T; ;FT T2; /CCUU/TOR

3A this instr%ctions !" rotat" th" 'its of / l"ft. Th" 'its rotat"& o%t of / ar"

rotat"& 'ac6 into / at th" opposit" "n&

RR A


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3 this instr%ction !" rotat" th" cont"nts of th" acc%m%lator from ri$ht to

l"ft from


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POP FRO


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DE* 09TE

This instr%ctions s%'tracts 1 from th" 't" op"ran&. Not" that CA is

%nchan$"&

?;C /

?;C Rn

?;C ?IR;CT

/RIT2/TIC INbyte

This p"rform a lo$ical /N? op"ration

This p"rforms a lo$ical /N? on th" op"ran&s 'it ' 'it storin$ th" r"s%lt in

th" &"stination. Notic" that 'oth th" so%rc" an& &"stination #al%"s ar" 't"

si-" onl

J

D+4 A0

This instr%ctions &i#i&"s a 't" acc%m%lator ' th" 't" in r"$ist"r 3. It is

ass%m"& that 'oth r"$ist"r / an& 3 contain an %nsi$n"& 't". /ft"r th"

&i#ision th" ,%oti"nt !ill '" in r"$ist"r / an& th" r"main&"r in r"$ist"r 3.

TMOD @ TIM45 MOD4 A 546IST45


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Both timer is the ()c*+ share the one re.ister TMOD# E LSB it for the timer / and E

MSB for the timer +#

In each case !ower > its set the mode of the timer

=pper two its set the operations#

60T47 6atin. contro! when set# Timerco&nter is ena!ed on!y whi!e the INT

pin is hi.h and the T51 contro! pin is set# $hen c!eared- the timer is ena!ed whene%er

the T51 contro! it is set

CT 7 Timer or co&nter se!ected c!eared for timer operation @ inp&t from interna!

system c!oc"A

M+ Mode it +

M/ Mode it /

M+ M/ MOD4 O2450TIN6 MOD4

/ / / +: BIT TIM45MOD4

/ + + +; BIT TIM45 MOD4

+ / > ( BIT 0=TO 54LO0D

+ + : S2LIT TIM45 MOD4

2S$ @ 25O650M ST0T=S $O5DA

CY 2S$# C055Y FL06

0C 2S$#; 0=ILI05Y C055Y


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F/ 2S$#* 0


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0A-D RATE *!3AR+S+!) ,!R S3!D ? " A)D S3!D ?&

TH% 0 DECIM&L4 HE@ MOD A# MOD A%

-8 FD B


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INT455=2T 25IO5ITY 546IST45

If the it is /- the correspondin. interr&pt has a !ower priority and if the it is + the

correspondin. interr&pt has a hi.her priority

I2# NOT IM2L4M4NT4D- 54S45


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SCON7 S45I0L 2O5T CONT5OL 546IST45 - BIT 0DD54SS0BL4

SCON

SM/ 7 SCON# Seria! 2ort mode specifier

SM+ 7 SCON#; Seria! 2ort mode specifier

SM> 7 SCON#*

54N 7 SCON#E Setc!eared y the software to 4na!edisa!e reception

TB( 7 SCON#: The )th it that wi!! e transmitted in modes > and :- Setc!eared

By software

5B( 7 SCON#> In modes > U:- is the )th data it that was recei%ed# In mode +-

If SM> R /- 5B( is the stop it that was recei%ed# In mode /5B( is not &sed

T+ 7 SCON#+ Transmit interr&pt f!a.# Set y hardware at the end of the (th it

Time in mode /- or at the e.innin. of the stop it in the other Modes# M&st e c!eared y software

5+ SCON#/ 5ecei%e interr&pt f!a.# Set y hardware at the end of the (th itTime in mode /- or ha!fway thro&.h the stop it time in the other

Modes# M&st e c!eared y the software#


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TCON TIMER CO/NTER CONTROL RE?ITER

This is a it addressa!e

TF+ TCON# Timer + o%erf!ow f!a.# Set y hardware when the TimerCo&nter +

O%erf!ows# C!eared y hardware as processor

T5+ TCON#; Timer + r&n contro! it# Setc!eared y software to t&rn Timer

Co&nter + Onoff

TF/ TCON#* Timer / o%erf!ow f!a.# Set y hardware when the timerco&nter /

O%erf!ows# C!eared y hardware as processor

T5/ TCON#E Timer / r&n contro! it# Setc!eared y software to t&rn timer

Co&nter / onoff#

I4+ TCON#: 41terna! interr&pt + ed.e f!a.

ITI TCON#> Interr&pt + type contro! it

I4/ TCON#+ 41terna! interr&pt / ed.e

IT/ TCON#/ Interr&pt / type contro! it#

? (/*+ Instr&ction Set

&rith(etic Operations

Mnemonic Description Si8e Cyc!es

0DD 0-5n 0dd re.ister to 0cc&m&!ator @0CCA# + +

0DD 0-direct 0dd direct yte to 0CC# > +

0DD 0-V5i 0dd indirect 50M to 0CC # + +

0DD 0-data 0dd immediate data to 0CC # > +

0DDC 0-5n 0dd re.ister to 0CC with carry # + +

0DDC 0-direct 0dd direct yte to 0CC with carry# > +

0DDC 0-V5i 0dd indirect 50M to 0CC with carry# + +


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0DDC 0-data 0dd immediate data to 0CC with carry# > +

S=BB 0-5n S&tract re.ister from 0CC with orrow# + +

S=BB 0-direct S&tract direct yte from 0CC with orrow > +

S=BB 0-V5i S&tract indirect 50M from 0CC with orrow# + +

S=BB 0-data S&tract immediate data from 0CC with orrow# > +

INC 0 Increment 0CC# + +

INC 5n Increment re.ister# + +

INC direct Increment direct yte# > +

INC V5i Increment indirect 50M# + +

D4C 0 Decrement 0CC# + +

D4C 5n Decrement re.ister# + +

D4C direct Decrement direct yte# > +

D4C V5i Decrement indirect 50M# + +

INC D2T5 Increment data pointer# + >

M=L 0B M&!tip!y 0 and B 5es&!t7 0 W? !ow yte- B W? hi.h yte# + E

DI< 0B Di%ide 0 y B 5es&!t7 0 W? who!e part- B W? remainder# + E

D0 0 Decima! adj&st 0CC# + +

Lo.ica! Operations


0NL 0-5n 0ND 5e.ister to 0CC# + +

0NL 0-direct 0ND direct yte to 0CC# > +

0NL 0-V5i 0ND indirect 50M to 0CC# + +


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0NL 0-data 0ND immediate data to 0CC# > +

0NL direct-0 0ND 0CC to direct yte# > +

0NL direct-data 0ND immediate data to direct yte# : >

O5L 0-5n O5 5e.ister to 0CC# + +

O5L 0-direct O5 direct yte to 0CC# > +

O5L 0-V5i O5 indirect 50M to 0CC# + +

O5L 0-data O5 immediate data to 0CC# > +

O5L direct-0 O5 0CC to direct yte# > +

O5L direct-data O5 immediate data to direct yte# :

>

5L 0-5n 41c!&si%e O5 5e.ister to 0CC# + +

5L 0-direct 41c!&si%e O5 direct yte to 0CC# > +

5L 0-V5i 41c!&si%e O5 indirect 50M to 0CC# + +

5L 0-data 41c!&si%e O5 immediate data to 0CC# > +

5L direct-0 41c!&si%e O5 0CC to direct yte# > +

5L direct-data O5 immediate data to direct yte# : >

CL5 0 C!ear 0CC @set a!! its to 8eroA# + +

C2L 0 Comp!iment 0CC# + +

5L 0 5otate 0CC !eft# + +

5LC 0 5otate 0CC !eft thro&.h carry# + +

55 0 5otate 0CC ri.ht# + +

55C 0 5otate 0CC ri.ht thro&.h carry# + +

S$02 0 Swap ni!es within 0CC# + +


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Data Transfer


MO< 0-5n Mo%e re.ister to 0CC# + +

MO< 0-direct Mo%e direct yte to 0CC#> +

MO< 0-V5i Mo%e indirect 50M to 0CC# + +

MO< 0-data Mo%e immediate data to 0CC# > +

MO< 5n-0 Mo%e 0CC to re.ister# + +

MO< 5n-direct Mo%e direct yte to re.ister# > >

MO< 5n-data Mo%e immediate data to re.ister# > +

MO< direct-0 Mo%e 0CC to direct yte# > +

MO< direct-5n Mo%e re.ister to direct yte# > >

MO< direct-direct Mo%e direct yte to direct yte# : >

MO< direct-V5i Mo%e indirect 50M to direct yte# > >

MO< direct-data Mo%e immediate data to direct yte# : >

MO< V5i-0 Mo%e 0CC to indirect 50M# + +

MO< V5i-direct Mo%e direct yte to indirect 50M# > >

MO< V5i-data Mo%e immediate data to indirect 50M# > +

MO< D2T5-data+; Mo%e immediate +; it data to data pointer re.ister# : >

MO

MO

MO


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MO

MO

MO

2=S' direct 2&sh direct yte onto stac"# > >

2O2 direct 2op direct yte from stac"# > >

C' 0-5n 41chan.e re.ister with 0CC# + +

C' 0-direct 41chan.e direct yte with 0CC# > +

C' 0-V5i 41chan.e indirect 50M with 0CC# + +

C'D 0-V5i 41chan.e !ow order ni!e of indirect50M with !ow order ni!e of 0CC + +

Boo!ean +

S4TB C Set carry f!a.# + +

S4TB itSet direct it > +

C2L C Comp!iment carry f!a.# + +

C2L it Comp!iment direct it# > +

0NL C-it 0ND direct it to carry f!a.# > >

0NL C-it 0ND comp!iment of direct it to carry# > >

O5L C-it O5 direct it to carry f!a.# > >

O5L C-it O5 comp!iment of direct it to carry# > >

MO< C-it Mo%e direct it to carry f!a.# > +

MO< it-C Mo%e carry to direct it# > >


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C re! &mp if carry is set# > >

NC re! &mp if carry is not set# > >

B it-re! &mp if direct it is set# : >

NB it-re! &mp if direct it is not set# : >

BC it-re! &mp if direct it is set U c!ear it# : >

*rogra( 3ranching


0C0LL addr++ 0so!&te s&ro&tine ca!!# > >

LC0LL addr+; Lon. s&ro&tine ca!!# : >

54T 5et&rn from s&ro&tine# + >

54TI 5et&rn from interr&pt# + >

0M2 addr++ 0so!&te j&mp# > >

LM2 addr+; Lon. j&mp# : >

SM2 re! Short j&mp @re!ati%e addressA# > >

M2 V0D2T5 &mp indirect re!ati%e to the D2T5# + >

re! &mp re!ati%e if 0CC is 8ero# > >

N re! &mp re!ati%e if 0CC is not 8ero# > >

CN4 0-direct-re! Compare direct yte to 0CC and j&mp if not e9&a!# : >

CN4 0-data-re! Compare immediate yte to 0CC and j&mp if not e9&a!#: >

CN4 5n-data-re! Compare immediate yte to re.ister and j&mp if not e9&a!#:>

CN4 V5i-data-re! Compare immediate yte to indirect and j&mp if not e9&a!#:>

DN 5n-re! Decrement re.ister and j&mp if not 8ero# > >


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DN direct-re! Decrement direct yte and j&mp if not 8ero# : >

Other Instr&ctions


NO2 No operation# + +


61/62

25O650M COD4 OF T'IS 25O4CT

or. ////h

sjmp main

main7

jn p+#/-!i.ht

jn p+#+-fire

jn p+#>-int jn p+#:-water

jn p+#E-remote

sjmp main

!i.ht7 c!r p>#/ aca!! de!ay

set p>#/

sjmp main

fire7 c!r p>#+

aca!! de!ay

set p>#+ sjmp main

int7 c!r p>#>

aca!! de!ay

set p>#>


62/62

sjmp main

water7 c!r p>#:

aca!! de!ay

set p>#: sjmp main

remote7 c!r p>#E

aca!! de!ay

set p>#E

sjmp main

de!ay7 mo% r/-+//

mo% r+->//

mo% r>->//

sim7 djn8 r/-sim

djn8 r+-sim

djn8 r>-sim

ret

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