12
Vacuum Tubes, BJT or FET? Circuit Analysis: Amplifier & Feedback Classic BJT Circuits Arduino Intro 6.101 Spring 2020 Lecture 5 1 Acknowledgements: Yanni Coroneos, Henry Love Neamen, Donald: Microelectronics Circuit Analysis and Design, 3 rd Edition 3 Handouts Lab 3 (2) Lecture notes Vacuum Tubes NY Times “Guitar heroes favor vacuum tube amplifiers in their instruments” “Many recording engineers tend to use vacuumtube equipment in their studios” “Some listeners pay thousands of dollars for highend tubebased stereo systems and CD players.” 6.101 Spring 2020 Lecture 5 2 Linear without feedback Characteristics independent of temperature Wider dynamic range BJT or FET Depends on application Amplifiers BJT are more linear that MOSFET, better fidelity (low harmonic distortion) can drive low impedances at higher power lower noise with low source impedance Operate at < 2 V MOSFET high input impedance Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 +15V + V in - + V OUT - R L R 1 + + R 2 [a] Common Emitter Amplifier [b] Common Collector [Emitter Follower] Amplifier R E R E +15V + V in - + V OUT - R L R 1 + + R 2 + [c] Common Base Amplifier TRANSISTOR AMPLIFIER CONFIGURATIONS R 2 R 1 + V in - + V OUT - R E + + high input impedance, for general amplification voltage gain = 1 ; use in amplifier output stage. low input impedance for low impedance sources, for high frequency response. BJT FET Common source Common drain [Source follower] Common gate

BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

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Page 1: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

• Vacuum Tubes, BJT or FET?• Circuit Analysis: Amplifier & Feedback• Classic BJT Circuits• Arduino Intro

6.101 Spring 2020 Lecture 5 1

Acknowledgements:Yanni Coroneos, Henry LoveNeamen, Donald: Microelectronics Circuit Analysis and Design, 3rd Edition

3 HandoutsLab 3 (2)Lecture notes

Vacuum Tubes

• NY Times – “Guitar heroes favor vacuum tube amplifiers in 

their instruments”– “Many recording engineers tend to use vacuum‐

tube equipment in their studios”– “Some listeners pay thousands of dollars for high‐

end tube‐based stereo systems and CD players.”

6.101 Spring 2020 Lecture 5 2

Linear without feedbackCharacteristics independentof temperature

Wider dynamic range

BJT or FET

• Depends on application• Amplifiers

– BJT • are more linear that MOSFET, better fidelity (low harmonic distortion)

• can  drive low impedances at higher power• lower noise with low source impedance • Operate at < 2 V

– MOSFET• high input impedance• Voltage controlled device => lower power

6.101 Spring 2020 Lecture 5 3

Transistor Configurations

6.101 Spring 2020 Lecture 5 4

+15V

+

Vin

-

+

VOUT

-

RL

R1

+

+

R2

[a] Common Emitter Amplifier [b] Common Collector [Emitter Follower] Amplifier

RE RE

+15V

+Vin

-

+

VOUT

-

RL

R1

+

+

R2

+

[c] Common Base Amplifier

TRANSISTOR AMPLIFIER CONFIGURATIONS

R2

+15V

R 1

+

Vin

-

+VOUT

-

RE

+

+

high input impedance, for general amplification

voltage gain = 1 ; use in amplifier output stage.

low input impedance for low impedance sources, for high frequency response.

BJT

FET

Common source Common drain [Source follower] Common gate

Page 2: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Miller Effect* – Common Emitter

6.101 Spring 2020 Lecture 3 5

)](1[ LCmM RRgCC

* Agarwal & Lang Foundations of Analog & Digital Electronics Circuits p 861

Input Impedance and Frequency Response

6.101 Spring 2020 6

RV1 V2C

Av V2

V1

j XC

R j XC

1jC

R 1jC

1jRC 1

Av 1

sRC 1

High frequency cutoff fhi 1

2RC

log f

AV (dB)

-3dB

fHI or f-3dB

slope = -6 dB / octaveslope = -20 dB / decade

0

log f

Degrees

-45o

fHI or f-3dB

0o

-90o

PHASE LAG

Lecture 2

log scale

Low Frequency Hybrid‐ Equation Chart

6.101 Spring 2020 Lecture 5 7

High gain, better high frequency responseLow input resistance

Unity gain, low output resistanceHigh input resist.

High gain applicationsModerate input resistance

High output resistance

Cascode Amplifer

• Two transistor amplifer:  common emitter (CE) with a common base

• Miller effect avoided by setting gain of CE stage low.

• CE stage provides high input impedance

• Common base (CB) provides gain without Miller effect; base is grounded.

6.101 Spring 2020 Lecture 5 8

Miller effect

No Miller effect

Neamen p445

Page 3: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Objectives

• Perform an analysis into the behavior of a complicated circuit using basic properties of  BJT’s (npn, pnp)

• Calculate gain of the system 

• Discuss crossover distortion issues in push‐pull amplifiers

• Understand feedback

6.101 Spring 2020 Lecture 5 9

Three Stage – Push Pull Amplifier

6.101 Spring 2020 Lecture 5 10

6.101 Spring 2020 Lecture 5 11

Three Stage Amplifer – Block Diagram

Feedback

Q3‐Q4 Push Pull

6.101 Spring 2020 Lecture 5 12

• Q3: Emitter Follower (positve cycle)

• Q4: Emitter Follower (negative cycle)

• Overall gain ~1

• Q3 & Q4 Vbe are always one diode drop

• Crossover distortion about zero crossing

Page 4: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Crossover Distortion 

6.101 Spring 2020 Lecture 5 13

Q2 – High Gain Stage

6.101 Spring 2020 Lecture 5 14

• Since last stage is an emitter follower, node n4 should be biased near zero volts.

• Q2 is a common emitter configuration with a pnptransistor.

• For pnp configuration, reverse the polarity of the voltages from a npn.

mvVVI

g

rg

THTH

CQm

m

26

0

Lm

m

o

Lov Rg

g

RA

5701015

*38

4

vCQ

CQTH

CQm

AI

IVI

g

Q1 Analysis

6.101 Spring 2020 Lecture 5 15

Biasing

6.101 Spring 2020 Lecture 5 16

Page 5: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Biasing – Quiescent Point

• Determine the quiescent point• For BJT

– assume Vbe = 0.6V– assume base current neglible 

• Apply KVL, KCL

6.101 Spring 2020 Lecture 5 17

Biasing – Quiescent Point

6.101 Spring 2020 Lecture 5 18

v(n5) = Vout = 0

v(n1) - v(n3) = 0.6

v(n2) = 15 – 0.6

0.6 ma

knv

knv

iiKCL rt

10)3(06.0

1)15()3(6.0:

vnvornv 4.12)1(13)3(

kkforvnv 3/303.12)1(

it

if

+

0.6

-

-13.0

-12.4

Key Observations

6.101 Spring 2020 Lecture 5 19

• Crossover distortion caused by base emitter voltage.

• Feedback results in overall gain independent of β

• Biasing not precise, highly dependent on supply voltage (poor supply voltage rejection) 

Classic BJT Circuits/components

• Darlington Pair• Matched transistors• Short circuit protection• Currrent mirror• Schottky diode• Baker Clamp• Vbe multiplier

6.101 Spring 2020 Lecture 5 20

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MPSA13 Darlington

6.101 Spring 2020 Lecture 5 21

Matched Pair

• Close electrical and thermal characteristics

• Supermatched pairs also available

• Used in differental amplifiers and measurement equipment

6.101 Spring 2020 Lecture 5 22

Super Matched Pair

• Characteristics approach theoretical transistor

• Vbe matched to 50 µv

• hFE matched to 2%

6.101 Spring 2020 Lecture 5 23

7805 RegulatorShort Circuit Protection

6.101 Spring 2020 Lecture 5 24

• When voltage across R16 exceeds ~0.6 volt, Q14 diverts away base drive to Q15.

• Note Darlington pair Q15, Q16

Page 7: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

6.101 Spring 2020 Lecture 5 25

356 Op‐AmpShort Circuit Protection Current Mirror

6.101 Spring 2020 Lecture 5 26

Schottky* Diode

• Schottky diode formed withmetal‐semiconductor junction vspn junction

• Lower forward voltage drop: 0.15‐0.45 vs 0.6‐0.7 for pn junction

• Almost zero reverse recovery times.

• Used in 74LS series logic  Low‐power Schottky

6.101 Spring 2020 Lecture 5 27

* Walter Schottky

Baker* Clamps

• Reduces turn off time by limiting saturation

• Baker Camp with diodes

• Baker clamp with Schottky diode

6.101 Spring 2020 Lecture 5 28

*named by Richard Baker (1956); drawings from http://en.wikipedia.org/wiki/Baker_clamp

Page 8: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Vbe Multipler

6.101 Spring 2020 Lecture 5 29

BEVR

RRV2

21 )(

Arduino, Teensyduino• Low cost open source microcontroller and development system

• Many variants: Uno, Nano, Pro, Teensy ….

• Arduino Nano– 16MHz ATmega328, 32KB flash, 1KB EEPROM, 2KB SRAM– 22 I/O ports:  analog/digital– 5V (19ma) operation

• Teensy 3.2– 72Mhz MK20DX256, 256KB flash, 2KB EEPROM,  16KB SRAM– 34 I/O ports , 21 analog input (2 16bit ADC),  1 12bit DAC

• Ideal for prototyping,  process controller or state machines

• Maybe useful for final project but only in a secondary manner:– data display, control logic

• Originals vs clones

6.101 Spring 2020 Lecture 5 30

Teensy 3.2  ‐ Nano

Teensy 3.2 Nano

Processor: MK20DX256 ATmega328

Clock Speed: 72 MHz 16 Mhz

Flash Memory: 256 KB 1 KB

RAM: 64 KB 2KB

Operating Voltage 3.3 V 3.3 V

GPIO 34 14

Analog Inputs 21 8

DAC 1 0

PWM 12 6

UART 3 external

6.101 Spring 2020 Lecture 5 31

Arduino Nano

6.101 Spring 2020 Lecture 5 32

SPI: +5, GND, MISO, MOSI, SCK

Mini USB: programming & +5V power

reset

LEDs: Power, LED, Rx, Tx

ATMEGA 328P CPU

J1 – pin 1

J2 – pin 17-12 VDC in

J2 – pin 143.3V @20ma

J2 – pin 45V in or out

Page 9: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Arduino Nano

6.101 Spring 2020 Lecture 5 33

LM11155V

CH340FTDI Clone3.3V regulator

J2 – pin 1

J1 – pin 1

D3, D5, D6, D9, D10, and D11 provide 8-bit PWM output with analogWrite()

D10 (SS), D11 (MOSI), D12 (MISO), D13 (SCK) same as SPI header

A0-A7 10-bit analog inputs referenced to 5V or AREF using the analogReference() function;

A4 (SDA) and A5 (SCL) support I2C

Nano Multifunction I/O Pins Partial List

Pin Function 1 Function 2 Function 3

D13 digital I/O SCK (SPI) Built‐in LED

D12 digital I/O MISO 

D11 digital I/O MOSI

D3,5,6,9,10,11 digital I/O PWM

D3 digital I/O Interrupt 1

D2 digital I/O Interrupt 0

D1 digital I/O Tx

D0 digital I/O Rx

A5 analog in  SCL

A4 analog in  SDA

6.101 Spring 2020 Lecture 5 34

Serial Interface

• Arduino Nano clone uses CH340G; need to install serial port driver.

• Drivers on http://web.mit.edu/6.101/www/s2020/drivers/ have been tested.  – CH341SER_MAC:   OSX  Mojaveserial port:  cu.wchusbserial1410

– CH34x_Install_Windows_v3_4.zip:   Windows serial port:   COM3… COMx

– CH340_LINUX.zip: Ubuntu 14.04serial port:  /dev/ttyUSB0

6.101 Spring 2020 Lecture 5 35

// driver installmakesudo make load

Teensy 3.2

6.101 Spring 2020 Lecture 5 36

Micro USB: programming & +5V power LP38691

TI LDO 3.3V

MKL02Z32VFG4Kinetis L Peripheral IODAC, ADC

MK20DX256ARM Cortex-M4

ground

pin 0

pin 12

Vin (93.7-5.5)

AGND3.3V 100ma

pin 23

pin 13

L

AGNDground

Keep analog and digital grounds separate

Page 10: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Teensy 3.2 Top

6.101 Spring 2020 Lecture 5 37

Teensy 3.2 Bottom

6.101 Spring 2020 Lecture 5 38

Teensy 3.2

6.101 Spring 2020 Lecture 5 39

Teensy  ‐ Lab 3 part 2

6.101 Spring 2020 Lecture 5 40

Solder headers to TeensyAttached spacer to TFT displayWire circuit

Load sketch & verify displayCircuit will be used in PPG and ECG labs

Page 11: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Laser Cutting(it’s just as cool as it sounds)

source: cutmaps.com

Process

• high‐power laser beam optically  guided to machine head

• head moves in 2D (x, y)

• beam fired in rapid pulses while  head moves

• material is ablated or vaporized  

• fumes extracted

source: Universal Laser Systems

source: n-e-r-v-o-u-s.com

Design

source: wikipedia

• user generates 2D design• vector vs. bitmap• user sets power, speed for each color in file  

• machine traces vectors– moves in steady line  – line width < 0.001 inch– “hairline”

• or rasters bitmaps– sweeps back and forth to fill in

UCP (Universal Control Panel)

Page 12: BJT or FET Transistor Configurations · • Voltage controlled device => lower power 6.101 Spring 2020 Lecture 5 3 Transistor Configurations 6.101 Spring 2020 Lecture 5 4 ... –

Laser “Printing”

6.101 Spring 2020 Lecture 5 45

Laser Cuting – CorelDraw

6.101 Spring 2020 Lecture 5 46

Pink lines are board outlineBlack lines will be rastered

Laser Cutting Lab (Optional)

• Mon 2/25 4:15 and 5:15p EDS• Laser Cut base• Mount RLC‐BJT/MOSFET testor

6.101 Spring 2020 Lecture 5 47