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Slide 1 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Microelectronic Circuits
BJT as an Amplifier and Its Biasing
Slide 2 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Transfer Characteristics & Biasing
Slide 3 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT Current-Voltage relationship
The collector current Emitter current
TVBEvsC eIi
TVBEvsB e
Ii
C
E
ii
TVBEvsE e
Ii
BC ii
Slide 4 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT Current-Voltage relationship
We know that
BC ii
EC ii
EB ii
BB ii 1
1
1
Slide 5 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT as amplifier Large signal operation
Consider a BJT , CE amplifier circuit
Case I : vI < 0.5 V
TRANSFER CHARACTERISTICS
CCCEo Vvv
IBEvv
Output Voltage
for vI < 0.5 V Transistor will be in cut-off , iC will be
negligible and vO will be equal to VCC
Slide 6 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT as amplifier Large signal operation
Case I I: Base input voltage vI ≥ 0.5 V
TRANSFER CHARACTERISTICS
CCCCCEoiRVvv
Output Voltage
for vI > 0.5 V Transistor will be
in active mode , iC increases
and vO decreases.
Slide 7 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT as amplifier Large signal operation
Case III: Base input voltage vI increased more
TRANSFER CHARACTERISTICS
CCCCCEoiRVvv
Output Voltage
Active mode ends when vo or vCE falls by
0.4V, at this point CBJ turns on and
transistor enters into saturation region
Further increase in vBE causes vCE to
decrease slightly.
Slide 8 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
BJT as amplifier Large signal operation
Saturated BJT will exhibit very small resistance between Collector and Emitter (There is a low resistance path between collector and ground (Closed switch)
C
CEsatCC
CsatR
VVI
Slide 9 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Amplifier Gain
•For a BJT amplifier to operate in as a linear amplifier , it has to be biased in active region. •Q (quiescent point) •Q point is characterized by and
BEvCEv
Ci
T
BE
Vv
sCeIi
CCCCCEIRVV
Slide 10 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Amplifier Gain
The signal vi is superimposed on VBE.
The slope of the tangent to the curve at Q is the slope of the linear segment, which is the voltage gain of the amplifier for the small input signal around Q.
For vI=vBE
C
vv
S
T
v
vvI
o
v
ReIV
AThus
dv
dvA
T
BE
BEI
1
CECCCRC
T
RC
T
CC
v
VVRV
V
V
V
RIA
acrossdropvoltagedc
Slide 11 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Amplifier Gain
•Observe that output is inverting, i.e., output is 180o out of phase with the input. •We can observe that for the larger gain, large voltage drop across RC •Operate on smaller vCE
Slide 12 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Effect of vCE on Amplifier Gain
Lower VCE
Reduced gain and clipping on
the Negative half Cycle
Slide 13 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Effect of vCE on Amplifier Gain
Higher VCE
Reduced gain and clipping on the positive half
Cycle
Slide 14 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis of An Amplifier
B
BBBE
B
B
BEBBBB
R
Vv
Ri
viRV
1
asitwritecanwe
Let us consider vi=0, We get
let us determine the dc biasing point for this circuit.
Slide 15 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis of An Amplifier
The dc base current IB can found out graphically as below.
B
BB
R
V
Slide 16 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis of An Amplifier
Operating point will be on the iC-vCE characteristics curve shown below for the dc base current IB
C
CC
CE
C
C
CCCCCE
R
Vv
Ri
RiVv
1
asitwritecanwe
Q point gives dc collector current
IC and dc collector to emitter voltage
VCE
C
CC
R
V
Slide 17 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis of An Amplifier
•Q point should lie on the active region
•Q-point should be located in a region where it
allows a reasonable signal swing as the input vi is
applied.
Slide 18 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis
•When the Vi is applied • Curve BEB vi
Slide 19 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Graphical Analysis
•When the Vi is applied • Curve CEC vi
Slide 20 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Effect of Q-point location on signal Swing
•Now consider the effect of Q-point location on signal Swing •Positive peak of the can not go beyond the , otherwise transistor enters the cutoff region. •Negative peak of the can not extend below the 0.3 v, otherwise transistor enters the saturation region.
Curve CEC vi
cev
CCV cev
Slide 21 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Effect of RC on signal Swing
The load line position is based on the value of Rc
Lower value of Rc results into very large value of closed to , thus positive swing of will severely limited.
For large value of Rc, is too low and near to 0 value of thus negative swing of will severely limited.
CEV
CCV
CEV CEv
cev
cev
Slide 22 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Biasing of BJT
Transistor used in amplifier circuit must have constant (DC) levels of collector, base and emitter current and constant terminal voltages.
The level of IC and VCE defines the transistor dc operating points or Quiescent point.
The circuit that provides this state is called as bias circuit.
Ideally, currents and voltages should remains constant in bias circuit. However these quantities are affected due to temperature change and transistor current gain.
The best bias circuits hold the current and voltage constant regardless of the variation in current gain and temperature.
Slide 23 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Biasing of BJT
DC Load Line : It is a straight line drawn on the output characteristics . For Common Emitter configuration
Consider two cases and •For • For
These two point gives the DC Load Line
CCCCCE IRVV
0CI 0CEV0CI
CCCE VV
0CEV
CCCC RVI /
Slide 24 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
DC Load Line
CCC RV /
CCCE VV
Dc Load line has Two points
Point A at
Point B at
Q point lies on this DC load line at the center
CCC RV /
CCCE VV
Slide 25 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Stability of the circuit
It is desirable and necessary to keep IC constant with respect to the
variations of ICBO . The collector leakage current ICBO is greatly influenced
by temperature changes. A rise of 10°C doubles the collector leakage current which may be as high as 0.2 mA for low powered germanium transistors.
The extent to which a biasing circuit is successful in achieving this goal is measured by stability factor S. The value of stability S should be 1.
CBO
C
dI
dIS
Slide 26 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Basic Biasing Methods
Essentials of biasing:
(i) It should ensure proper zero signal collector current. (ii) It should ensure that VCE does not fall below 0.5 V for Ge transistors and 1 V for silicon transistors at any instant. (iii) It should ensure the stabilization of operating point.
Biasing Techniques
Collector -to-Base feedback resistor Bias
Two power Supply Bias (Emitter bias)
Voltage divider Bias
Constant Current source bias
Slide 27 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Basic Biasing Methods
Collector -to-Base feedback resistor Bias
1
1
BC
BECCE
BEBE
CE
BEBBCECC
RR
VVI
CurrentBiasEmitter
VRI
RI
VRIRIV
Slide 28 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Basic Biasing Methods
Collector -to-Base feedback resistor Bias
Advantages :
1. It provides the better stability less than 1- β
2. It is a simple method as it requires only one resistance RB.
Disadvantages : 1. stability factor is fairly high
2. This circuit provides a negative feedback which reduces the
gain of the amplifier
Slide 29 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Basic Biasing Methods
Two power Supply Bias (Emitter bias)
Advantages:
If RE >> R B then current will be independent of β
Thus it may provide better stability
disadvantages:
Emitter bias requited extra power which increases
the cost as well as power consumption
E
B
BEEE
E
RR
VVI
1
Slide 30 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Basic Biasing Methods
Voltage divider bias
This is the most widely used bias method for providing the biasing and stabilization of the transistor .
R1 and R2 connected to Vcc to provide the biasing and RE connected for stabilization.
The “voltage divider” name comes from the
voltage divider formed by R1 and R2.
Slide 31 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Voltage divider Bias
Apply KVL at Base-Emitter circuit
Thevenin’s Equivalent Circuit
E
B
BEBB
E
E
B
EEBBBEBB
RR
VVI
II
RIRIVV
1
1
Slide 32 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Voltage divider Bias
•To make IE insensitive to temperature variation and β value circuit required to satisfy two constraints
The variation in VBE is taken care by the large VBB
•When VBB is large , then voltage drop across RC and voltage VCB will be decreased. •As a rule of thumb, one designs for
1
B
E
BEBB
RR
VV Constraint 1
Constraint 2
CCCCCCCECBCCBBVaboutRIandVaboutVorVVaboutV
3
1
3
1)(,
3
1
Slide 33 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Voltage divider Bias
Advantages:
RE provides negative feedback action that stabilizes the bias current.
Stability is closed to unity.
Disadvantages:
Negative feedback action reduces the gain of the amplifier.
Selection of RB is a challenging task.
Slide 34 BITS Pilani, Dubai Campus
Lecture on Microelectronics Circuits Dr. Vilas
Constant current source bias
Q1 and Q2 are matched transistors Q1 is connected as a diode by shorting collector and base. If Q1 and Q2 have high β values we van neglect their base currents.
Emitter current is independent of β and RB, thus
RB can be made large enabling high input
resistance at the base without effecting the bias.
R
VVVII
VsamehaveQandQ
R
VVVI
BEEECC
REF
BE
BEEECC
REF
)(
)(
21