Bending tests of carbon nanotube thin-film transistors on flexible

substrate

Daniel Pham1, Harish Subbaraman

2, Maggie Yihong Chen

3, Xiaochuan Xu

1, and Ray T. Chen

1

1Microelectronics Research Center, Department of Electrical and Computer Engineering, University

of Texas at Austin, Austin, TX 78758. 2Omega Optics, Inc., 10306 Sausalito Dr, Austin TX 78759.

3Ingram School of Engineering, Texas State University, San Marcos, TX 78666.

ABSTRACT

Bending tests of carbon nanotube thin-film transistors on flexible substrate have been characterized in this

paper. The device channel consisting of dense, aligned, 99% pure semiconducting single-walled carbon nanotubes

(SWCNT) are deposited using dip-coat technique on sacrificial substrate and then transferred on to the device substrate.

Ink-jet printing technique is used to form the source, drain and gate electrodes using silver ink. A novel source-drain

contact formation using wet droplet of silver ink prior to CNT thin-film application has been developed to enhance

source-drain contact with the CNT channel. Bending test data on CNT-TFT test structures show minimal change (less

than 10%) in their performance. To reduce the device performance variation due to bending, flexible electronic circuit is

designed such that vertical device orientation is used for backward bending and horizontal orientation is used for forward

bending.

Keywords: carbon nanotubes, thin-film transistors, flexible electronics, single-walled carbon nanotube, dip-coat

technique, ink-jet printing.

1. INTRODUCTION

Over the last several years, there has been a growing interest on forming thin film transistors (TFTs) on low

cost flexible substrates using printing technique for multiple applications ranging from sensors to displays to power

devices. Printing technique is a simple and cost effective method to produce electronics. It is an attractive technique for

flexible electronics due to its non-contact and additive deposition process. The technique does not require sacrificial

resist or liftoff layers but rather deposits materials only where needed. Organic materials have been used as the channel

device for several state-of-the-art flexible electronics [1-4]. However, the carrier mobility of organic semiconductor

polymers is still less than 1.5cm2/Vs [3,4]. Other technique uses printed silicon nanoparticles as the device channel; the

reported mobility is less than 0.7cm2/Vs [5]. Low carrier mobility limits the TFTs operating speed to only a few kHz. On

the other hand, carbon nanotube (CNT) based thin-film transistors have seen tremendous improvement over the last five

years due to their excellent mobility characteristics. Extremely high mobility of 100,000cm2/Vs of individual CNTs has

been reported [6,9]. CNT TFT-based devices on flexible substrates have achieved high field mobility using ultrapure

electronics-grade CNT solutions [8,9] by ink-jet printing technique.

Printed thin-film transistors formed on flexible substrates are large devices, and the device dimensions range

from a few microns to several hundred microns due to their printing resolution limit. The final circuit or product of

flexible printed electronics can have a size of several square centimeters. Bending tests have been reported for TFT

device on flexible substrates [10-15]; however, the devices are formed by other techniques involving photolithography

process, followed by transfer onto flexible substrates. Depending on the flexible substrate materials, the bending tests

show minimal change in the performance; ranging from 1.1% change on polyimide substrate [14] to 8.9% on parylene-C

[10].

In this work, we fabricate CNT-TFTs on polyimide substrate using a combination of ink-jet printing and

stamping (for CNT layer) techniques, with self-aligned-CNT channel. Bending test is also performed on different device

orientations.

2. FABRICATION PROCESS

2.1 Ink-jet printing

Ink-jet printer from Dimatix DMP 2800 (Dimatix-Fujifilm Inc., Santa Clara, USA), which uses piezoelectric

printing cartridge (DMC-11610) is used for the experiment. The ink droplet dispensed from the ink cartridge has a

nominal volume of 10pL. The printing cartridge has a total of 16 nozzles. Nozzle diameter is around 21µm. In this work,

only one nozzle is used to print the small TFT device structure, and multiple nozzles are used for other large structures

such as probing pads or via contact pads. Room temperature setting is used for the platen and cartridge. Source, drain

and gate electrodes are printed using silver ink from Cabot Corporation (CCI-300). Spin-on glass is used as dielectric

ink. Customized waveform patterns in the printer are used to print silver and dielectric inks. Even though the ink droplet

has a nominal volume of 10pL, ink liquid material spreads on the substrate surface upon landing on the surface. In case

of the silver ink used in our work, the silver ink droplet forms circlular silver dots with the diameter around 46µm upon

drying. Figure 1a shows the microscope image of the silver dots printed by silver ink droplets. In ink-jet printing

technique, line structure is formed by overlap printing of multiple droplets on top of each others similar to conventional

printing using dots per inch (dpi) as a measure of image resolution. Smooth line can be formed by ink-jet printing

technique by choosing a suitable dpi of silver droplets. Figure 1b shows the microscope image of minimal silver line

with the width of 64.5µm that can be made by using the silver ink of this study.

Fig. 1. (a) Microscope image of silver dots. (b) Microscope image of minimal width silver line can be made by the silver ink of this study.

a) b)

2.2 Carbon Nanotube Deposition

Carbon nanotube solution can be printed, however, it often clogs up the nozzles. On the other hand, printed

CNT channel yields a random network of CNTs on the substrate. In this work, we use the dip-coat technique to align

CNTs on the sacrificial substrate, and then transfer this CNT thin-film on the device substrate. Dip-coating technique has

been widely used to deposit particles uniformly on different surfaces [16-18]. The main driving force for the convective

transfer of CNTs is evaporation of the solvent. As the solvent starts to evaporate, the convection force transfers the

CNTs to the contact line (solid-vapor-liquid interface), thus depositing CNTs on the substrate [16,17]. By varying the

solvent evaporation process, we observe that strips of CNTs thin film are obtained at high drying speeds. The CNT thin-

film strips are formed when the capillary force, which pulls the liquid inwards, builds up and exceeds the surface tension

of the liquid, thus, breaking up the liquid meniscus and forming a new contact line as shown in Figure 2. We use 99%

pure semiconducting single walled carbon nanotubes in surfactant solvent from Nanointegris, Inc (S10-671, 0.1mg in

10mL aqueous solution) for the dip-coat technique to deposit CNTs on a silicon substrate (acting as sacrificial substrate)

in this work. The surfactants keep the CNTs from bundling with each other, which assists in the self-alignment process.

Figure 2a shows the SEM image of strips of CNT, with the surfactant, formed using our process. After the dip-coat, the

sacrificial substrate with CNT thin-film is slowly rinsed with 2-propanol to remove the surfactants, thus leaving aligned

CNTs on the substrate as shown in Figure 2b. To see the network of the CNT thin-film formed by this technique, the

sample is further suspended in 2-propanol for 15 minutes to expose the CNT thin-film network, as shown in Figure 2c.

Fig. 2. (a) SEM image showing the strips of CNT with surfactant. (b) Zoom-in SEM image of self-aligned CNT thin film with surfactant, (c) SEM

image of self-aligned CNT thin-film after suspension in alcohol bath.

a)a) b)b)

c)c)

a)a)a)a) b)b)b)b)

c)c)c)c)

2.3 Process Integration

In contrast to silicon wafer processing, ink-jet printing technique deposits materials using droplets of liquid ink.

The viscosity of liquid ink materials need to be in the range of 10 to 12centipoise to be jetted out of the cartridge. At this

viscosity, the liquid ink can penetrate into the porous material such as CNT thin-film. In this work, we deposit the CNT

thin-film channel last to minimize the interaction between CNT channel with other materials. The schematic of the

bottom gate integration process flow is shown in Figure 3. The substrate is a Kapton polyimide film with a thickness of

127µm. The gate electrode is first printed on the Kapton film using silver ink, followed by thermal annealing at 160oC

for 10 minutes. Spin-on-glass is used as the dielectric material, which is also printed. The source and drain regions are

printed using the same silver ink as used for gate electrode and under the same annealing conditions. The device channel

length and width are 100µm and 300µm, respectively.

As discussed in section 2.2, the 99% pure semiconducting single-walled CNT from Nanointegris, Inc is

deposited on the silicon substrate (as a sacrificial substrate) using dip-coating technique. In order to transfer the CNT

thin-film on to the flexible Kapton polyimide substrate, another special Kapton substrate (25µm thick), with adhesion

coating on one side is used to lift the self-aligned CNT thin-film from the silicon substrate, and lay it on top of the first

substrate over the printed channel region. The Kapton with adhesive is left on the device in order to protect the CNT

channel, thus acting like a passivation layer.

Fig. 3. CNT thin-film deposition integration approach with novel source-drain and CNT contact.

Print gate dielectric material

Print SD silver

CNTs captured from Kaptonfilm with glue on 1 side

Pressed on heat-chuck @100oC for 30 min

Kapton

Print silver gate electrode

Print droplets of silver ink on SD areas (leave them wet) – to create better contact with CNT

channel

CNT

g g

g

Kapton

Kapton

s D g

Kapton

s D

g

Kapton

s D gs D

Kapton

gs D

Kapton

Final passivation layer (thin Kapton film) glued on top

Print gate dielectric material

Print SD silver

CNTs captured from Kaptonfilm with glue on 1 side

Pressed on heat-chuck @100oC for 30 min

Kapton

Print silver gate electrode

Print droplets of silver ink on SD areas (leave them wet) – to create better contact with CNT

channel

CNT

g g

g

Kapton

Kapton

s D g

Kapton

s D

g

Kapton

s D gs D

Kapton

gs D

Kapton

Final passivation layer (thin Kapton film) glued on top

One of the draw back of CNT thin-film deposition last integration approach is the CNT thin-film is applied on

dried source-drain areas. Limited contact is formed between the source-drain and the device channel causing low device

performance. We develop a novel technique to solve this source-drain junction contact problem by using droplets of

silver ink. In this technique, prior to bonding the Kapton thin layer containing CNT thin-film to the substrate, droplets of

silver ink are printed on the source and drain areas on the first substrate as shown in Figure 4. These wet silver ink

droplets allow the silver liquid to “wet” or interact with the CNT channel to form the source and drain contact junctions.

In order to bond the two substrates, the device is annealed under pressure on a heat chuck surface at 100oC for 30

minutes to enhance the bonding of the second Kapton substrate to the first substrate and eliminate any air pockets. Upon

bonding and annealing, the source-drain contact junction is formed into the CNT thin-film, thus providing a good contact

with the entire thin film. Without using the wet silver droplets to enhance the contact, the ON current is lower by several

orders and varies significantly during the bending test (as discussed in the next section). To protect the whole circuit, a

thin Kapton film with glue on one side is glued on top the whole circuit. This layer protects the silver lines from scratch

or oxidation.

Fig. 4. Wet silver droplets on source-drain areas before bonding with CNT thin-film.

3. CHARACTERIZATION OF THE SELF-ALIGNED CNT-TFT

Figures 5(a) and (b) show the measured I-V characteristics (ID versus IDS) of the self-aligned CNT-TFT as a

function of different gate voltages (VG). The transistor I-V characteristics are measured using precision semiconductor

parameter analyzer (Agilent 4156C). At a gate voltage of 0V gate, the device does not show pinch-off, most likely due to

a small number of metallic nanotubes in the channel. At VG= -3V and source-drain voltage (VDS) of -1V, high drive

current of 0.371mA is obtained, which is in good agreement with the high density and self-aligned nature of CNTs on

the device channel.

Fig. 5. (a) I-V characteristics (ID versus VDS) of the self-aligned CNT-TFT at different gate voltages, (b) ID versus VG of the self-aligned CNT-TFT.

As discussed above, printed electronic circuit can have a size of several hundred square centimeters. To make a

product using this technology, the circuit might need to fold and fit into the final product case. Bending test is performed

on our studied device to investigate the device performance at the bending area. Figure 6 shows the picture of bending

test structures. Two different test structures are formed to evaluate the vertical and horizontal orientations of the

transistor. Three different radii of curvature, 4.5mm, 3mm and 1.5mm, are used in this evaluation. Forward and

backward bending tests are conducted as described in Figure 6.

Horizontal test structure

Vertical test structure

S D

G

S

DG

Backward bending

Forward bending

Passivation layer

CNT-TFT

CNT-TFT

L=100µm; W=300 µm

a)

Horizontal test structure

Vertical test structure

S D

G

S

DG

Backward bending

Forward bending

Passivation layer

CNT-TFT

CNT-TFT

Horizontal test structure

Vertical test structure

S D

G

S

DG

Backward bending

Forward bending

Passivation layer

CNT-TFT

CNT-TFT

L=100µm; W=300 µm

a)

Fig. 6. a) Bending test structure for vertical and horizontal devices, b) Device under backward bending test at 1.5mm radius of curvature.

Figure 7a shows the normalized drain current (ID,test / ID,original) plotted against radius of curvature for the vertical

test structure. In forward bending, lower drain current is observed, with up to 10% change, while no significant drain

current difference is observed in backward bending case. Larger current change for vertical test structure can be

attributed to the 300µm channel width of the testing device subjected to the bending direction. Since the CNTs are

-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0

0.0

5.0x10-5

1.0x10-4

1.5x10-4

2.0x10-4

2.5x10-4

3.0x10-4

3.5x10-4

4.0x10-4

I d(A

mp

s)

Vg(Volts)

Vds

=0V

Vds

=-0.1V

Vds

=-0.2V

Vds

=-0.3V

Vds

=-0.4V

Vds

=-0.5V

Vds

=-0.6V

Vds

=-0.7V

Vds

=-0.8V

Vds

=-0.9V

Vds

=-1.0V

-1.0 -0.8 -0.6 -0.4 -0.2 0.00.0

5.0x10-5

1.0x10-4

1.5x10-4

2.0x10-4

2.5x10-4

3.0x10-4

3.5x10-4

4.0x10-4

I d(A

mp

s)

Vds

(Volts)

Vg = -3.0V

Vg = -2.7V

Vg = -2.4V

Vg = -2.1V

Vg = -1.8V

Vg = -1.5V

Vg = -1.2V

Vg = -0.9V

Vg = -0.6V

Vg = -0.3V

Vg = 0V

a) b)

captured by the thinner Kapton film that is bonded onto the thick Kapton substrate, forward bending may cause the thin

kapton film to move away from substrate, while in backward bending, it causes the thin Kapton film to press against the

substrate. Figure 7b shows drain current bending test data for horizontal test structure. Smaller change in drain current is

observed (less than 6%). For the horizontal test structure, 100µm channel length of the device is subjected to the bending

direction. In the forward bending case, shorter channel length causes a small increase in current, and in backward

bending case, “stretched” channel length reduces the current (even though the thin top layer Kapton is pressed against

the substrate).

It is noted that in backward bending, the vertical device structure has less variation; and in forward bending,

horizontal device orientation gives stable performance. From these results, flexible electronic circuit can be designed

such as it can be bended in either way with less variation in performance.

flat -4.5 -3 -1.5 flat 4.5 3 1.5 flat

0.90

0.92

0.94

0.96

0.98

1.00

1.02

Norm

aliz

ed

Dra

in C

urr

ent

Bending Radius (mm)

Exp1

Exp2

Exp3Testing sequence

flat

flat

flat

Vertical Test Structure

flat -4.5 -3 -1.5 flat 4.5 3 1.5 flat

0.90

0.92

0.94

0.96

0.98

1.00

1.02

Norm

aliz

ed

Dra

in C

urr

ent

Bending Radius (mm)

Exp1

Exp2

Exp3Testing sequence

flat

flat

flat

flat -4.5 -3 -1.5 flat 4.5 3 1.5 flat

0.90

0.92

0.94

0.96

0.98

1.00

1.02

Norm

aliz

ed

Dra

in C

urr

ent

Bending Radius (mm)

Exp1

Exp2

Exp3Testing sequence

flat

flat

flat

Vertical Test Structure

flat -4.5 -3 -1.5 flat 4.5 3 1.5 flat0.94

0.95

0.96

0.97

0.98

0.99

1.00

1.01

1.02

No

rma

lize

d D

rain

Cu

rren

t

Bending Radius (mm)

Exp1

Exp2

Exp3Testing sequence

flat

flat

flat

Horizontal Test Structure

flat -4.5 -3 -1.5 flat 4.5 3 1.5 flat0.94

0.95

0.96

0.97

0.98

0.99

1.00

1.01

1.02

No

rma

lize

d D

rain

Cu

rren

t

Bending Radius (mm)

Exp1

Exp2

Exp3Testing sequence

flat

flat

flat

Horizontal Test Structure

Fig. 7. Bending test data: a) for vertical test structure, b) for horizontal test structure.

4. SUMMARY

In this paper, self-aligned CNT-TFTs using 99% pure semiconducting nanotube on flexible Kapton substrate

have been fabricated and characterized. A novel source-drain contact is developed to enhance the contact with CNT

channel. Bending test data show minimal changes (less than 10%) in their performance. To minimize the device

variation, flexible electronic circuit can be designed such that vertical device structure can be used for backward bending

and vice versa horizontal device structure for forward bending.

ACKNOWLEDGEMENT

This work was supported by NASA under contract number NNX09CA37C. The authors also thank

Nanointegris, Inc for their CNT solution.

a) b)

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