Basic Electronics June 2013 (2010 Scheme)

I]SN 1OELNI5/25

First/Second Semester B.E. Degree Examination, June/July 2013Basic Electronics

Time: 3 hrs. Max. Marks:100

Note:1. Answer any FIVE full questions, choosing at least two from each part,

2. Answer all objective Q)pe questions only on OMR sheet page 5 of the answer booklet.3. Answer to objective type questions on sheets other than OMR will not be ,'t lued.

PART - A

o.

e

'a

'7+t.

nd)

agoi

A,i

^tcco!J=

oi:N

z

Eao.E

I a. Choose the correct answers for the following :

i) When lbrward - biased, a diodeA) blocks current B) conducts cunentC) has a high resistance D) drops a large voltage

ii) The knee voltage ofa Silicon diode is

A) 0.3 V B) 0.s v c) 0.7 v D) None of theseiii) The ripple factor ofhalfwave rectifier is about _

A) 40.6 B) 0.46 C) r.21 D) 81.2iv) The rms value of a load current ir case of a full wave rectifier is

A) ,I B)]' C) g2 2 ^12b. Deduce the following for HWR

i) I,,". iD Id" (04 Marks)c. With a neat circuit diagram, gxplain the working principles of full wave bridge rectifier.

(06 Marks)

D)-lI11l

(04 Marks)

: 0.48 and(06 Marks)

(04 Marks)

d. Draw the circuit of full wave rectifier and show that the ripple factorefficiency - 8lo o.

2 a. Choose the correct answers for the following :

i) The current relationship between two current gain in a transistor is

A) B - , 0

l-0

c) B=l oI+(x

ii) The 0a. ofa transistor is itsA) current gainC) power gain

iii) In a transistor the curent conduction is due to

B) p=i+

D) s=0+lp

B) voltage gainD) internal resistance

carries.minorityNone ofthese

A) majorityC) both (A) and (B)

iv) In a transistor circuit,A) Ie:lc B)lr>lc

B)D)

C)IE<IC D) Ir << Icb. Draw input and output characteristics ofan NPN transistor in common base configuration

and explain. (08 Marks)c. Calculate the value oflc , Is and pa" for a transistor with cr: 0.99 and Ie: 110 pA.

(04 Marks)(04 Marks)d. Obtain the relation between 'cr6"' and'p6"'

1 of3

For More Question Papers Visit - www.pediawikiblog.com


www.pediawikiblog.com



i) The intersection ofa dc load time and the output characteristics ola transistor is calledA) Q - pointC) Operating point

ii) For an emitter follower, the voltage gain isA) unityC) less than unity

A) fixedC) voltage divider

iv) In self bias or emitter bias circuit' A) inductor

C) resistor

B) Quiescent pointD) All of these

B) greater than unityD)zerc

B) collector to base

D) None of theseis connected between emitter and ground

B) capacitorD) transformer

10ELN15/25

(04 Marks)

(04 Marks)

D) Fourpoint

D) conducting

D) None olthese

D) UJT,characteristics and explain

(10 Marks)as a relaxation

(06 Marks)

iii)The best biasing stability is achieved by using _ biasing circuit.

b. Explain the concepts ofbase bias techniques using NPN transistor. (10 Marks)c. Calculate the Q - point values for the circuit of collector to base circuit. Given

RB : 100 KCr, Rc = 10 KO, Vcc: 12 V and 0a": 100. (06 Marks)


i) A SCR hasA) one

A) negativeiii) The FET is a

A) current

number of layersB) two C) three

ii) The minimum point in VI characteristic of UJT is known as

B) valley C) latchingcontrolled devise

B) voltage C) poweriv) The relaxation oscillator uses

A) MOSFET B)SCR C)BJTb. Draw two transistor equivalerrt circuit of SCR. Also plot V - I

various regions of operatiqns.c. Explain with suitable diagram and waveforms, how UJT can be used

oscillator.

5a.

PART_B

Choose the correct answers for the following :

i) Oscillator uses _ tlpe offeedbackA) positive B) negative C) both

ii) A phase shift oscillator has

A) tluee RC circuits B) tkee LC circuits C) a T - type circuitiii) The frequency of Hartley oscillator is f: _

(04 Marks)

D) None of these

D)antypecircuit

D)l2rl C

c) -+2 nr/C

c.d.

2r^lLCB)l

27rJRC

iv) The upper and lower critical frequencies are sometimes called theA) power frequenciesC) 6 dB points

B) half power frequenciesD) None ofthese

Explain with a neat diagram, the working of single stage RC coupled amplifiers with itsfrequency response. (08 Marks)Give any four advantages ofnegative feedback in amplifier. (04 Marks)In a colpitts oscillator, if the desired ffequency is 800 KHz, determine the values ol L andC"q if C; : Cz : 10 picofarad. (04 Marks)

2 of 3





6a.

d. Give any four applications of CRO.


A) transmitterC) none ofthe above - ,.-

iii) The 2's complement of 1010 gives :

A) 1111 B) 0110

A) NOT

Choose the correct answers for the following :

i1 The CMRR is given by -

A) A,a x A" B) &/ Ad C) Ad /A"ii) The gain of the inverting amplifier using Rr: 10 KO and Rr =

A)-10 B) -11 c) 10

C) negative

lKQisD)

l':.

B) receiverD) between transmitter and receiver.

c) 0010

10ELN15/25

(04 Marks)

D) 20 log A" /Aa

D) 0101

(04 Marks)

11

iii) The gain of the voltage follower is _A) zero B) infinite D) unity

iv) The screen of CRT is coated withA) chromium B) phosphor C) carbon D) germanium

b. Calculate the output voltage of a three input summing amplifier : Given Rr = 200 Ka,Rz:250 KQ, R: : 500 KO and &: 1 MO, Vr = 2V, Yz:2Y and Vr = 1 V. (06 Marks)

c. Show, how an op amp can be used as an integrator. Derive an expression for output voltage.(06 Marks)(04 Marks)

(04 Marks)

D) None oftheseA) lower than B) higher than C).gqual toii) The modulation is done in

i) The modulating frequency is carrier frequency

b.c.

d.

iv) In binary numbers, shifting the binary point one place to rightA) divides by 2 B) decreases by 10

C) increases by 10 D) multiplies by 2With suitable block diagranr, explain the function of superheterodyne receiver. (08 Marks)

Convert (ABCD)r6: ( )r:( h:( )ro:( )eco (04 Marks)Subtract : (28)ro - ( 19)ro using both 1's complement and 2's complement methods.

(04 Marks)

8 a. Choose the coftect answers for the following :

i) When demorganis theorem apptied to iA + B), we get

A) A+B B)AB C)Aii) Y-AB+BA is a Boolean expression for

A) EX-ORc) Ex-NoR

iii) The example for universal gate isB) NOR

iv) The expression for half adder cany'C'with inputs'A'and'B'A) A+B B) AB C)AB

b. i) Realize the NAND gate using minimum number of NOR gates

ii) Simplify M =XYZ+XYZ+ z<y and realize using of NOR gates.

D)B

B) EX _NANDD) none ofthese

c) oR D) ANDis given by

D) none ofthese

(08 Marks)c. Realize a full adder using two half adders and an OR gate with truth table.

.,,,,,.. .--;,,

_(Q.8. Marks)

,,,/l'|'< 'j6-'

3 of3For More Question Papers Visit - www.pediawikiblog.com




Documents

Basic Electronics June 2013 (2010 Scheme)