Basic Digital Design Experiments

7/18/2019 Basic Digital Design Experiments

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Table of ContentsDedication.................................................................................................................3Foreword...................................................................................................................4

About the Author.......................................................................................................5What they say about the book ....................................................................................6

LOGIC GATES.........................................................................................................7NOT GATE................................ ................................ ................................ ........... 9

AND GATE....................................................................................................10OR GATE............................................................................................................12

NOR and NAND GATES................................ ................................ ........................ 14NOR Gate................................................................ ................................ ............ 15

NAND Gate................................................................ ................................ .........17EXCLUSIVE OR GATE.........................................................................................19

EXCLUSIVE-OR GATE.....................................................................................19EXCLUSIVE-NOR GATE..................................................................................20

BOOLEAN ALGEBRA THEOREMS.....................................................................24

Boolean Algebra..................................................................................................24De Morgans Law................................................................................................26

Distributive Law..................................................................................................28FULL ADDER ........................................................................................................30

Half Adder...........................................................................................................32Full Adder ...........................................................................................................32

MAGNITUDE COMPARATOR.............................................................................367-SEGMENT DISPLAY WITH DECODER...........................................................42

Decoders..............................................................................................................427-Segment Display ..............................................................................................43

Resistor ...............................................................................................................44

555 ASTABLE MULTIVIBRATOR.......................................................................47555 Timer ............................................................................................................47Capacitor .............................................................................................................48

J-K FLIP FLOP.......................................................................................................51JK........................................................................................................................51

T flip flop ............................................................................................................52


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Dedication

To CS Students of NEU


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Foreword

Basic Digital Design Experiments is a compilation of experiment manual designedfor Computer Science Students. Electronic enthusiasts alike may also refer to this

work text to test the logic operations of IC packages.

The author considered students taking the course in Logic Circuits or Digital Design

have little (or none at all) knowledge about electronics. This is the reason why abackgrounder is discussed before doing the actual experiment. We encourage

students to read the texts first before proceeding on the experiment proper.

Safety of the students should be the top most priority of instructor when conducting

the experiment. We discourage the use of ACDC power supply converter to testcircuits. A 1.5V or 9V battery will do to conduct all experiments. Caution should be

taken when testing LEDs on 9V battery. This will burn out the lights immediately.

The course is designed to be taken in one full semester. After grasping all theconcepts, a digital up down counter may be used as a final project for the students.


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About the Author

Jeremias C. Esperanza is a Computer Science professor currently teaching at NewEra University (NEU), Quezon City, Philippines. He had also stint teaching at Jose

Rizal University (JRU) and Asia Pacific College.

Subjects he teaches include Introduction to Programming, Object-Oriented

Programming, Database Management Systems, Systems Analysis and Design, DigitalDesign, and Software Engineering. Teaching profession spans 10 years now from the

time he left the industry to pursue an academe post.

He worked as Administrative Specialist at IBM Philippines, Inc. and served as a

Technical Support Engineer at ETSI Technologies, Inc. (A Siemens Nokia jointventured company) for ten years. He was a Database Marketing Analyst for a year at

OSRP (a PCMall.com company) and as Analyst at Business Intelligence Group ofeTelecare Global Solutions for another couple of years.

As database professional, he is an IBM DB2 Academic Associate Certified. A good

grasp of Business Intelligence (BI) using IBM Cognos is also included as one of hisskills.

He currently pursues his doctorate degree in Information Technology; holds amaster's degree in Education major in Educational Management and a bachelor's

degree in Computer Engineering.

Most of his developed instructional texts have now reached a total of 195,127 views

on Scridb.com; YouTube instructional videos have reached 177,083 views.

He is one of Yahoo!Contributor Network writers who submits articles life of general

interest. As a registered professional teacher, he loves inspiring people to experiencetheir unique full potential.


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What they say about the book

That was excellent. I'm sure it will be very helpful. I enjoyed watching it and learneda thing or two from it as well. Thanks for taking the time to put that together. ---

Universal Garage Remote

Thank you sir Anonymous

Wow Nice tutorial/Guide Sir.. this can really help for all the students who have digitaland Logic Design Subject. Take care Sir God bless on How do JK Flip Flops Work -

-- keanmind


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Experiment 1

LOGIC GATES

OBJECTIVE

The student will become familiar using the following:

a. Prototyping board (breadboard)b. Digital ICsc. Reading a schematic diagramd. Wiring a circuit

Study the logical operations of Logic Gates

NOT Gate. This is also known as the Inverter. The output is high

when both inputs are low. The output is low when one or both inputs are high.

AND Gate. This gate performs logical multiplication commonlyknown as the AND function. The output is high when both the inputs are high.

The output is low level when any one of the inputs is low.

OR Gate. The gate performs a logical addition commonly known asthe OR function. The output is high when any one of the inputs is high. The

output is low level when both the inputs are low.

EQUIPMENT

Prototyping board (breadboard)

DC Power Supply 1.5 VLight Emitting Diode (LED) (3)

Solid-core wire (gauge 22, 1 meter long)Digital ICs:

7404 Hex Inverter7408 Quad AND

7432 Quad OR

PROCEDURE

The Prototyping Board

Prototyping boards are rows of connectors wired together behind a plasticface. Things you can stick into the little holes of prototyping boards include:

wire (22 gauge solid-core is typical)

resistor leads (1/4 or 1/8 Watt is typical)

leads for transistors, capacitors, diodes, etc.


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ICs (the hole spacing is made for DIP [dual-inline package]chips)

Figure 1. The Prototyping Board (or Breadboard)

Figure 2. Wiring Connection of Prototyping Board

Isolating the half-part of the board (see Figure 2), you will see the wiring

connections of the holes. The lower part which consists of two rows is connectedhorizontally while the upper part is connected vertically.


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Figure 3. Hex Inverter PIN Diagram

NOT GATE

1. Assign lines for the + and terminals of your

breadboard. Cut two (2) sufficient lengths

(around 10 cm) of wire and insert these to thebreadboard. These will serve as lines to powersupply as you apply the battery.

2. Snugly fit 7404 at the center of the

breadboard separating the two sets of the 7 sidepins of the IC.

3. Connect pin 7 (ground) by a wire to

terminal line of the breadboard; pin 14 (Vcc) tothe + terminal line.

4. Cut enough length of wire that can beadjustably connected to + and terminal lines of

the breadboard. Insert the first end of the wire atthe hole connected on pin 1 and the other end at

+ terminal line of the breadboard.

5. Insert the longer pin of the LED to the hole connected to pin 2 and the shorter pin

to terminal line of the prototyping board.

6. Connect the battery to the prototyping board. What was the output in the LED?Did it light?

__________________________________________________________________

7. Remove the wire connecting pin 1 to + terminal. Change it to pin1 to terminalline. What was the output in the LED? Did it light?

__________________________________________________________________________________________________________________________________________

_____________________________________________________________________

Figure 5. Light Emitting Diode (LED) Terminals

Figure 4. LED Symbol


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Figure 6. Quad AND PIN Diagram

8. Based from your observation, fill up the following truth table. Use 0 to show low

input/output signal; 1 to show high input/output signal.

INPUT

(x)

OUTPUT

(y)0

1Table 1

9. Draw the schematic symbol of an NOT with x as the input and y as the output.

10. How many INVERTER do we have in an 7404 HEX inverter? ___________

11. Identify the INPUTs and OUTPUTs pin number of the 7404 HEX INVERTERfrom the given table

INPUTPIN

OUTPUTPIN

Table 2

AND GATE

12. Snugly fit 7408 at the center of theprototyping board separating the two sets of the 7

side pins of the IC.

13. Connect pin 7 (ground) to terminal line ofthe prototyping board by a piece of wire; pin 14

(Vcc) to the + terminal line.

14. Cut enough length of wire (2 lengths) thatcan be adjustably connected to + and terminal

lines of the prototyping board. Insert the firstlength of the wire at the hole connected on pin 1;

the second length at pin 2. Connect both wireends at the + terminal line of the prototyping board.

15. Insert the longer pin of the LED to the hole

connected to pin 3 and the shorter pin to terminal line of the prototyping board.


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16. Connect the battery to the prototyping board. What was the output in the LED?

Did it light?_____________________________________________________________

17. Make input alternate combinations for pin 1 and 2: one connected to + terminalline and the other to negative terminal. You should make four input combinations inall. Everytime you connect the input pins (1 or 2) to + terminal, code this as HIGH or

1; LOW or 0 if connected to negative terminal. Tabulate the output of the LED.

INPUTS

Pin 1 Pin2

OUTPUT(Pin 3)

0 0

0 1

1 0

1 1Table 3

18. Draw the schematic symbol of an AND gate with x and y as inputs and z as the

output.

19. How many AND gates do we have in an 7408? ___________

20. Identify the INPUTs and OUTPUTs pin number of the 7408 quad 2-input AND

gate from the given table:

INPUT

PIN

OUTPUT

PIN

Table 4


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Figure 7. Quad OR PIN Diagram

OR GATE

21. Snugly fit 7432 at the center of the prototyping board separating the two sets of

the 7 side pins of the IC.

22. Repeat step 13 through 15

23. Connect the battery to the prototypingboard. What was the output in the LED?

Did it light?_________________________________

24. Repeat step 17.

INPUTS

Pin 1 Pin2

OUTPUT

(Pin 3)0 0

0 1

1 0

1 1Table 5

25. Draw the schematic symbol of an OR

gate with x and y as inputs and z as theoutput.

26. How many OR gate do we have in an 7432? ___________

27. Identify the INPUTs and OUTPUTs pin number of the 7432 quad 2-input ANDgate from the given table:

INPUTPIN

OUTPUTPIN

Table 6


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28. Based from the results of the experiment, what general rule can you apply for

NOT

_____________________________________________________________________

_____________________________________________________________________

AND GATE

__________________________________________________________________________________________________________________________________________

OR GATE

__________________________________________________________________________________________________________________________________________


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Experiment 2

NOR and NAND GATES

OBJECTIVE

The student will be able to do the following:

a. Determine the logic operations of NAND and NOR gates.

b. Connect basic logic gates to produce NAND and NOR gates.c. Fill-up truth tables of circuit equation and determine its

input/output logic combinations.

Logic Operations

NAND GATE. The gate is a contraction of AND-NOT. The output ishigh when both inputs are low and any one of the input is low .The output is

low level when both inputs are high.

NOR GATE. The NOR gate is a contraction of OR-NOT. The outputis high when both inputs are low. The output is low when one or both inputs

are high.

All other gates/functions can be implemented by NOR or NAND gates. So

they are called universal gates. In fact, in chips, entire logic maybe built usingonly NAND (or NOR) gates.

Example: NOT or Inverter -- NAND with inputs shorted.

AND -- NAND followed by a NOT (using NAND).OR -- giving inverted inputs to NAND gate.


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EQUIPMENT


DC Power Supply 1.5 V

Light Emitting Diode (LED) (2)Solid-core wire (gauge 22, 1 meter long)Digital ICs:


7432 Quad OR

PROCEDURE

NOR Gate

1. Based from the pin assignments of Figure 1, plot the circuit in the prototypingboard. Make sure the Vccand ground pins of OR gate and NOT are also connected

prior to test.

2. Fill-up the truth table below after performing the different input combinations ofpin 1 and 2 of OR gate. Determine the output of NOT at pin 6.

INPUT OUTPUT

Pin1 Pin2 Pin6

0 0

0 1

1 0

1 1

Table 1. Truth Table of OR-NOT Gates


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3. What is the difference between the output of an OR gate compared to the output ofa NOR gate with the same set of inputs? ___________________________________

__________________________________________________________________________________________________________________________________________

4. Draw the schematic symbol of a NOR GATE (simplified) with x and y as inputs; zas the output.

5. What general rule you could state for a NOR GATE with its logic operation?_____________________________________________________________________

__________________________________________________________________________________________________________________________________________

_____________________________________________________________________

6. Suppose we have a 3-input NOR GATE. Fill-up the truth table below and

determine the output from the given input combinations.


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NAND Gate

7. Plot the circuit in the breadboard using the diagram below.

8. Fill-up the truth table below after performing the different input combinations of

pin 13 and 12 of AND gate. Determine the output of NOT at pin 10.

INPUT OUTPUT

Pin13 Pin12 Pin10

0 00 1

1 0

1 1

Table 3. Truth Table of AND-NOT Gates

9. What is the difference between the output of a AND gate compared to the output

of a NAND gate with the same set of inputs? _____________________________________________________________________________________________________

_____________________________________________________________________

10. Draw the schematic symbol of a NAND GATE (simplified) with x and y asinputs; z as the output.

11. What general rule you could state for a NAND GATE with its logic operations?_____________________________________________________________________

__________________________________________________________________________________________________________________________________________


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12. Suppose we have a 4-input NAND Gate. Fill-up the truth table below and

determine the output from the given input combinations.


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Experiment 3

EXCLUSIVE OR GATE

OBJECTIVE


a. Determine the logic operations of EXCLUSIVE-OR and

EXCLUSIVE-NOR gates.b. Use the EXCLUSIVE-OR gate symbols in simplifying circuit

equations and making a circuit diagram as we combine to othercircuits.

c. Use 7486 EXCLUSIVE-OR Gate and test its inputs and outputs.d. Form EXCLUSIVE-OR, combine it with other basic logic circuit

gates and determine the output signal.

Logic Operations

EXCLUSIVE-OR GATE. The gate uses a modulo-2 sum

symbol to denote its logic operations and performs the function:

Expressed in diagram, this has the equivalence:

As you have observed, Exclusive-OR gate is just a simplification ofcombinational circuit at the left of Figure 1. Note of the special symbol used.

We will indicate this XOR symbol on the rest of this experiment.

By definition, the value of Exclusive-OR equation is logic-1, or youobtain a high output if and only if the x and y, but not both x and y, has the

input value of logic HIGH or 1.


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EXCLUSIVE-NOR GATE. The gate is just a complement ofExclusive-OR and performs the function:

Expressed in graphic diagram, we have:

Note of the bubble inserted at the end of XOR symbol at the right of Figure 2.

The output of the XOR is just negated. Defining it, XNOR can only obtain alogic-1 output if and only if the value of x and y inputs are the same;

otherwise, the value will be logic-0.

EQUIPMENT





7432 Quad OR7486 Quad EXCLUSIVE-OR

PROCEDURE

1. Based from the pin assignments (Figure 3A) of the diagram below, plot thecircuit using 7486 XOR gate in the breadboard.


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2. Fill-up the truth table below after performing the different input combinationsof pin 4 and 5 of OR gate.

INPUT OUTPUT

Pin4 Pin5 Pin6

0 0

0 1

1 0

1 1

Table 1. Truth Table of Exclusive-OR Gates

3. What inputs are required to produce a logic-0 across the output?

______________________________________________________________________________________________________________________________

_______________________________________________________________


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4. What inputs are required to produce a logic-1 across the output?______________________________________________________________________________________________________________________________

_______________________________________________________________

_______________________________________________________________

5. Plot another circuit same as Figure 4 and fill-up the truth table on Table 2.

INPUT OUTPUT

Pin10 Pin12 Pin13 Pin2

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

Table 2. Truth Table of Combinational circuit

6. What general rule can you state with regards to operation of Exclusive ORGate?_______________________________________________________________

______________________________________________________________________________________________________________________________

_______________________________________________________________


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7. Write the equivalent circuit equation of Figure 5.

________________________________________________________________

8. Draw the equivalent circuit diagram of the equation (Note: a0-a3 are inputlabel literals):


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Experiment 4

BOOLEAN ALGEBRA THEOREMS

OBJECTIVE


a. Identify the different Boolean Algebra Theorems and its properties.

b. Plot circuits and prove De Morgans Theorem equivalence.c. Construct circuits and prove Distributive Law equivalence.

d. Simplify circuit equation by manipulation using boolean equations.

Boolean Algebra

Boolean algebra is used for two-valued logic that is present on any digitalsystem. Named after in the honor of English Mathematician George Boole,

Boolean algebra describes the interconnection of digital gates and howsimplification can be implemented through its use.

Table 1 present the properties of Boolean algebra theorems. The first

three theorems state the properties of Boolean operations AND, OR, andNOT. Theorem 3a states ORing logic-1 with anything will always result a

logic-1.

Idempotent law (fourth theorem) states that repetitions of variables in

an expression are redundant and may be deleted.


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Involution law produces a cancellation effect when doublecomplementation occurs as stated on Theorem 6.

Interchanging the order of variables does not change the result of the

operation as stated in Commutative law. Theorems 8 and 9 show

simplification of Boolean expression. De Morgans law the effect ofcomplementation on variables when connected by the AND and ORoperations.

Any order in groupings can be applied using Associative law when

ANDing and ORing of variables. Distributive law shows how factoring isdone using the same principle in algebra.

Take note of the symmetrical property of Boolean algebra equations.

This is known as the principle of duality. AND and OR operation (and viceversa) can be interchanged on each occurrence.

Equation Complementation

The complement of an equation is obtained by the interchange of 1s to 0s

and 0s to 1s. To achieve this, we can apply algebraically by using DeMorgans theorem. The generalized form of this law states that the

complement of an expression is obtained by interchanging AND and ORoperations and complementing each variable each variable and constant.

Let us apply complementation on the following:

EQUIPMENT




7404 Hex Inverter7408 (2) Quad AND

7432 (2) Quad OR


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PROCEDURE

De Morgans Law

1. Construct Circuit 1 on your prototyping board. Take note of the numberassigned inside the logic gate symbols. This denotes the IC number package

designation for each IC that you will use.

2. Write the equivalent logic equation of Circuit 1. ______________________

3. Construct circuit 2.

4. Write the equivalent logic equation of Circuit 2. _____________________

5. Test the different input combinations of Circuit 1 and Circuit 2 and fill-up thefollowing truth tables.


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6. Do the two circuits equal in terms of output D? ________________________

7. If you were to choose between Circuit 1 and Circuit 2, which design will you

implement and why? ________________________________________________________________________________________________________________

__________________________________________________________________________________________________________________________________

8. Simplify Circuit 1 equation using De Morgans theorem. Show your step-by-step solution.

_________________________________________________________________

__________________________________________________________________________________________________________________________________

__________________________________________________________________________________________________________________________________

_________________________________________________________________


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Distributive Law

9. Construct Circuit 3.

10.Write the equivalent equation of Circuit 3. ___________________________

11.Construct Circuit 4.

12.Write the equivalent equation of Circuit 4. ___________________________

13.Test the input combinations of Circuit 3 and 4 and fill up the following truth

tables.


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14. If you were to choose between Circuit 3 and Circuit 4, which design will youimplement and why? _______________________________________________

__________________________________________________________________________________________________________________________________

_________________________________________________________________

15. Simplify Circuit 3 equation using Distributive law. Show your step-by-step

solution. Hint: Apply the theorem on the shaded portion of Circuit 3.__________________________________________________________________________________________________________________________________

__________________________________________________________________________________________________________________________________

__________________________________________________________________________________________________________________________________

_________________________________________________________________


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Experiment 5

FULL ADDER

OBJECTIVE


a. Design a one-bit full adder with carry-in and carry-out.

b. Use truth table, Karnaugh map, and Boolean Algebra theorems insimplifying a circuit design.

c. Implement a full adder circuit based from the design.

Map Simplification

Boolean expression may be simplified by algebraic manipulation. Due toduality of the boolean function, though uniquely represented by truth table,

the expression may appear in different forms.

Another form that we may simplify boolean expression is the use of

Karnaughmap or K-map. The map is a diagram made up of squares, with

each square representing one minterm of the function. Expressed in graphicalform, alternate expressions can be derived from the same equation.

Two-variable Map. This map consists of four squares. As seen on

Figure 1(b), 0 and 1 are marked on the left and top side of the map todesignate the values of the variables. The column and row represent the

complement and uncomplement of the X and Y variables.

Figure 1(a) represents the 4 minterms you could placed on the K-map.

Figure 1(c) simplifies the functions of adjacent cells.


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Three-variable Map. This map consists of eight squares. Figure 2(b)

marks 0 and 1 on the left ant top side of the map to designate the values of thevariables. Take note also of adjacent cells in simplifying the equation.

Four-variable Map. Figure 3(a) consists of 16 squares as we applyminterm numbering system on the map. Simplifying adjacent cells can also

mean by folding the map vertically and horizontally. Figure 3(b) shows howthe four corners derived the simplified terms.

In general, combination of squares during simplification process is as

follows:

One square represents a minterm of four literals(variables).

A rectangle of 2 squares represents a product term of three literals.

A rectangle of 4 squares represents a product term of two literals.

A rectangle of 8 squares represents a product term of one literal.

A rectangle of 16 squares produces a function that is equal to logic 1.


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Half Adder

A half adder is an arithmetic circuit that generates the sum of two binary

digits. The circuit is composed of two inputs and two outputs. The inputvariables (X and Y) serve as the augend and addend bits; the output variables

(S and C) produce sum and carry. Table 1 defines the truth table operations ofthe half adder circuit.

Inputs Outputs

X Y C S

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0

Table 1. Truth Table of Half Adder

From the given truth table and using a two-variable K-map we couldobtain the circuit Boolean equation of the half adder:

S = X Y

C = XY

Full Adder

A full adder is a combination of arithmetic sum of three input bits. The twoinput variables (X and Y) represents the significant bits to be added and thethird bit, Cin, represents the carry from the low significant position. Just like a

half adder circuit, full adder has S and Coutthat serve its output.

Table 2 shows the truth table operations of full adder circuit.

Inputs Outputs

X Y Cin Cout S

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

Table 2. Truth Table of Full Adder


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The following equations can be derived as we simplify the equationusing K-maps:

S = X Y Cin

Cout= XY + Cin(X Y)

Figure 4 represents the simplified diagram of full adder circuit:

Figure 4. Full Adder Simplified Diagram

EQUIPMENT



Solid-core wire (gauge 22, 1 meter long)

Digital ICs:7486 Quad XOR7408 Quad AND

7432 Quad OR

K-MAP

FA

X

Y

Cin S

Cout


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CIRCUIT DIAGRAM

PROCEDURE

7. Based from the given truth table in Table 2, simplify S and C outusing K-map.Show your simplification in the K-map section.

8. Derive the equation. Simplify further (if any) using Boolean theorems.

9. Draw the equivalent circuits in the CIRCUIT DIAGRAM section. Assign ICand pin numbers on each gate that you will use. Designate LED for S andCout.

10.Plot the design using logic gates in breadboard.

11.Test all input combinations and check if you arrive on the same output resultfrom the truth table (Table 2).

12.Was there any simplification you have used other than K-map derivation?Explain your answer.

______________________________________________________________________________________________________________________________

13.What do you think the basic reasons on why we need to use other options insimplifications?_______________________________________________________________

______________________________________________________________________________________________________________________________


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14.Given with connected Full Adders (Figure 5), fill-up the possible output of thetruth Table 3.

A1 A0 B1 B0 S0 Cout0 Cin1 S1 Cout1

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 0

1 1 1 1

Table 3. Truth Table of Two-bit Full Adder

Figure 5. Two-bit Full Adder

FA0

FA1

A0

B0

A1

B1

Cin1

S0

S1

Cout0

Cout1


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Experiment 6

MAGNITUDE COMPARATOR

OBJECTIVE


a. Design a comparator that will test equality and relational quantity

difference between two two-bit binary numbers.b. Use truth table, Karnaugh map, and Boolean Algebra theorems in

simplifying a circuit design.c. Implement a comparator circuit based from derived boolean

equations.

Magnitude Comparator

Generally, magnitude comparators are digital circuits (IC's) which have twoports that accepts, and latches two 8 or 16 bit binary numbers and have three

single bit outputs: "Greater than, less than, and equal."

One simple use would be comparing the output of a free runningdigital counter to some fixed number. This fixed number, if derived from user

adjustable binary hex switches, would allow control based on some adjustableterminal count.

For instance, if the counter is also fed into a Digital to Analog

converter, and use the magnitude comparator to compare the two numbers,you now have a user adjustable ramp which can further be used with analog

comparators to trigger many sorts of analog systems and also acts as a digitaldivider.

The SN54/74LS85 is a 4-Bit Magnitude Comparator which compares

two 4-bit words (A, B), each word having four Parallel Inputs (A0A3, B0B3); A3,B3 being the most significant inputs. Operation is not restricted to

binary codes, the device will work with any monotonic code.

Three outputs are provided: A greater than B (OA>B), A less than

B (OAB, IAB, OA


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the normal operation under all conditions that will occur in a single device orin a series expansion scheme.


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The lower five lines describe the operation under abnormal conditions

on the cascading inputs. These conditions occur when the parallel expansiontechnique is used.

EQUIPMENT




7486 Quad XOR7408 (2) Quad AND

7432 (2) Quad OR

7404 Hex Inverter

Truth Table

INPUT OUTPUT

B1 B0 A1 A0 E LT GT

0 0 0 0

0 0 0 1

0 0 1 00 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

1 0 1 0

1 0 1 1

1 1 0 0

1 1 0 1

1 1 1 01 1 1 1

Table 1. Two-bit Comparator


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K-MAP

E = _______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

______________________________________________

LT = ______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

______________________________________________

GT = _____________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________

_______________________


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CIRCUIT DIAGRAM

PROCEDURE

1. Assume B and A are two integer numbers ranging from 0 to 3. These arerepresented by B1B0and A1A0as its binary number equivalent (subscript 0

represents the least significant binary digit of a number and subscript 1represents the most significant binary digit).

2. Based from the given truth table (Table 1), determine and fill-up the output forE, LT and GT. E represents if two binary numbers are equal; LT for less than

and GT for greater than. Magnitude reference should be from B to A.

3. Plot the values in K-Map. Show your simplification in the K-map section.

4. Derive the circuit equation. Simplify further (if any) using Boolean algebratheorems.

5. Draw the equivalent circuits in the CIRCUIT DIAGRAM section. Assign ICand pin numbers on each gate that you will use. Use LEDs as indicator for E,LT and GT.

6. Plot the design using logic gates in breadboard.

7. Test all input combinations and check if you arrive on the same output resultfrom the truth table (Table 1).


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8. Was there any simplification you have used other than K-map derivation?Explain your answer._______________________________________________________________

_______________________________________________________________

_____________________________________________________________________________________________________________________________________________________________________________________________

9. What do you think the basic reasons on why we need to use other options insimplification? _________________________________________________________________________________________________________________

______________________________________________________________________________________________________________________________

10. How many binary bits do I need to design in making a comparator for integer

numbers 0-15? Why? Explain your answer._______________________________________________________________

______________________________________________________________________________________________________________________________

______________________________________________________________________________________________________________________________

_______________________________________________________________


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Experiment 7

7-SEGMENT DISPLAY WITH DECODER

OBJECTIVE


a. Demonstrate the operation of a decoder-driver circuit that accepts a

binary or BCD input code and generates the 7-segment displaysignals to produce the numbers 0 through 9 and other characters.

b. Understand and use color coding scheme of resistors.

Decoders

Decoder is combinational circuit that converts binary information from the ncoded inputs to a maximum of 2

nunique outputs.

The decoder presented on this experiment are called n-to-m linedecoder where m 2

n. Its purpose is to generate the 2

n(or fewer) minterms of

n input variables.


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The operation of 7447 decoder may be clarified form the truth table in

Table 1. For each possible input combination, there are seven outputs that areequal to 0 and only one that is equal to 1. The output variable equal to 1

represents the minterm equivalent of the binary number that is applied to the

input lines.

INPUTS OUTPUTS

Decimalor

FunctionD C B A a b c d e f g

0 0 0 0 0 0 0 0 0 0 0 1

1 0 0 0 1 1 0 0 1 1 1 1

2 0 0 1 0 0 0 1 0 0 1 0

3 0 0 1 1 0 0 0 0 1 1 0

4 0 1 0 0 1 0 0 1 1 0 05 0 1 0 1 0 1 0 0 1 0 0

6 0 1 1 0 1 1 0 0 0 0 0

7 0 1 1 1 0 0 0 1 1 1 1

8 1 0 0 0 0 0 0 0 0 0 0

9 1 0 0 1 0 0 0 1 1 0 0

Table 1. 7447 Decoder Truth Table

7-Segment Display

A seven segment display, as its name indicates, is composed of seven

elements. Individually on or off, they can be combined to produce simplifiedrepresentations of the arabic numerals.

Seven-segment displays may use liquid crystal display (LCD), arrays

of light-emitting diodes (LEDs), and other light-generating or controllingtechniques such as cold cathode gas discharge, vacuum fluorescent,

incandescent filaments, and others.


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Resistor

A resistor is a two-terminal electronic component that produces a voltage

across its terminals that is proportional to the electric current through it in

accordance with Ohm's law V= IR. This is used to impede the flow ofcurrent.

Four-band identification is the most commonly used color-codingscheme on resistors. It consists of four colored bands that are painted around

the body of the resistor (see Figure 3). The first two bands encode the first twosignificant digits of the resistance value, the third is a power-of-ten multiplier

or number-of-zeroes, and the fourth is the tolerance accuracy, or acceptableerror, of the value.

The first three bands are equally spaced along the resistor; the spacing

to the fourth band is wider. Sometimes a fifth band identifies the thermalcoefficient, but this must be distinguished from the true 5-color system, with 3significant digits.

Resistance is measured by ohms () and uses this

symbol in logic diagrams.


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CIRCUIT DIAGRAM

EQUIPMENT


DC Power Supply 1.5 V7-Segment LED Display common anode

Solid-core wire (gauge 22, 1 meter long)470 ohms resistors watts (7)

Digital IC:7447 7-segment Decoder


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PROCEDURE

11.Construct the circuit shown in Figure 4 on breadboard. Make sure that pin 3,4,5 are all connected to the positive line of the power supply.

12.Due to variety of 7-segment display available commercially, you need to testwhich pins are assigned to segment a-g. You could check the segmentindividually by connecting the common anode pin to the positive terminal of

the power supply, and the segment pin connected to the one (1) 470 ohmsresistor.

13.Test all input combination in Table 2 and determine the number display.

INPUTS

D C B ANumberDisplay

0 0 0 0

0 0 0 1

0 0 1 0

0 0 1 1

0 1 0 0

0 1 0 1

0 1 1 0

0 1 1 1

1 0 0 0

1 0 0 1

Table 2. Number Display for DCBA inputs

14.What logic level is required at the inputs of the 7-segment LED display to lighta particular segment?

______________________________________________________________________________________________________________________________

15.Write a brief description of the circuits operation.______________________________________________________________________________________________________________________________

______________________________________________________________________________________________________________________________

______________________________________________________________________________________________________________________________

______________________________________________________________________________________________________________________________

_______________________________________________________________


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Experiment 8

555 ASTABLE MULTIVIBRATOR

OBJECTIVE


a. Use 555 timer as square wave oscillator that generates square wave

signal.b. Understand and apply the use of capacitors.

c. Determine the result of ON and OFF periods by changingresistance of the circuit.

555 Timer

555 Timer is also known as astable multivibrator or square-wave oscillator to

generate a continuous series of pulses. It alternates between two differentoutput voltage levels during the time it is on. The output remains at each

voltage level for a definite period of time. If you looked at this output on anoscilloscope, you would see continuous square or rectangular waveforms.

If you refer to figure 1, the trigger (pin 2) is connected to the

threshold of pin 6 that continuously re-triggers the timer and generates thesquare-wave signal.


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The voltage across C is low as you power the circuit. Since the

trigger is tied to pin 6, the 555 timer is triggered to release the short across Cand allows it to charge making the output high.

Capacitor C charges through the two resistors R1 and R2. Whenvoltage across C reaches the 2/3 V threshold, discharge pin 7 becomes lowdischarging the capacitor through R2.

When the voltage across the capacitor drops to 1/3V, the trigger input

pin 2 is again triggered thus, repeating the cycle.

The charge and discharge periods are not equal. The high outputperiod is determined by R1 and R2 and C. While low output period is

determined by R2and C. We can use the following formula:

Charge Period: t1= 0.693(R1+R2)C

Discharge Period: t2=0.693R2C

Total Period: T = t1+t2= 0.693(R1+R2)C

The operating frequency (f) of generated square wave is equal to 1/Tor:

F= 1.44/(R1+2R2)C

The duty cycle (D) is a factor of the resistors,

D = R2/(R1+2R2)

Capacitor

In a way, a capacitor is a little like a battery. Although they work in

completely different ways, capacitors and batteries both store electricalenergy. Just like a battery, capacitor has two terminals that produce electrons

during chemical reactions on one terminal and absorb electrons on the otherterminal. A capacitor is much simpler than a battery, as it can't produce new

electrons -- it only stores them.


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Figure 2 CapacitorInside the capacitor, the terminals connect to two metal plates

separated by a non-conducting substance, ordielectric.

In theory, the dielectric can be any non-conductive substance.

However, for practical applications, specific materials are used that best suitthe capacitor's function. Mica, ceramic, cellulose, porcelain, Mylar, Teflon

and even air are some of the non-conductive materials used. The dielectricdictates what kind of capacitor it is and for what it is best suited. Depending

on the size and type of dielectric, some capacitors are better for highfrequency uses, while some are better for high voltage applications.

Figure 3 Ceramic Capacitors

A capacitor's storage potential, or capacitance, is measured in unitscalled farads. A 1-farad capacitor can store one coulomb (coo-lomb) of

charge at 1 volt. A coulomb is 6.25e18 (6.25 * 10^18, or 6.25 billion billion)

electrons. One amprepresents a rate of electron flow of 1 coulomb ofelectrons per second, so a 1-farad capacitor can hold 1 amp-second ofelectrons at 1 volt.

A 1-farad capacitor would typically be pretty big. It might be as big as

a can of tuna or a 1-liter soda bottle, depending on the voltage it can handle.For this reason, capacitors are typically measured in microfarads (millionths

of a farad).

EQUIPMENT

Prototyping board (breadboard)DC Power Supply 1.5 V1 F capacitor

0.01 F ceramic capacitor1 Mega resistor watt (2 pieces)

2.2 Mega resistor watt(1) LED

Solid-core wire (gauge 22, 1 meter long)Digital IC:

555 Timer IC


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PROCEDURE

16.Interconnect the circuit shown in Figure 1.

17.Connect the power supply and allow the circuit to settle down for a couple ofseconds.

18.What is the output signal reflected in the LED? _______________________________________________________________________________________________________________________________________________________

19.Are the ON and OFF periods equal? __________________________________

20.Switch off the power and replace R2 with 2.2 Mega ohm resistor.

21.Did the replacement of R2 to 2.2 Mega ohm resistor make the ON and OFFperiods equal? ___________________________________________________


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Experiment 9

J-K FLIP FLOP

OBJECTIVE


a. Determine the logic operation of JK flip flops.b. Connect and observe the state transition of JK as connected to the

clock generator circuit.c. Design T flip flop from JK.

d. Analyze timing diagram of flip flops.

Flip-flop

Flip-flops (FFs) are devices used in the digital field for a variety ofpurposes. When properly connected, flip-flops may be used to store data

temporarily, to multiply or divide, to count operations, or to receive andtransfer information.

Flip-flops are bistable multivibrators. The types used in digital

equipment are identified by the inputs. They may have from two up to fiveinputs depending on the type. They are all common in one respect. They have

two, and only two, distinct output states. The outputs are normally labeled Qand Q and should always be complementary. When Q = 1, then Q = 0 and

vice versa.

There are four types of flip flops. These are SR, D, JK and T. On thisexperiment we will explore the operation of JK flip flop.

JK

JK flip flop is considered as the universal flip flop. When configured in

various ways, it is capable of operating like most other types of flip flops.

Figure 1 Clocked JK


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Note that in a JK flip-flop, the letter J is for set and the letter K is forclear. When logic 1 inputs are applied to both J and K simultaneously, the

flip-flop switches to its complement state, ie., if Q=1, it switches to Q=0 andvice versa.

A clocked JK flip-flop is shown in Figure 1. Output Q is ANDed withK and CP inputs so that the flip-flop is cleared during a clock pulse only if Qwas previously 1. Similarly, ouput Q' is ANDed with J and CP inputs so that

the flip-flop is set with a clock pulse only if Q' was previously 1.

Note that because of the feedback connection in the JK flip-flop, a CP signalwhich remains a 1 (while J=K=1) after the outputs have been complemented

once will cause repeated and continuous transitions of the outputs. To avoidthis, the clock pulses must have a time duration less than the propagation

delay through the flip-flop. The restriction on the pulse width can beeliminated with a master-slave or edge-triggered construction. The same

reasoning also applies to the T flip-flop.

T flip flop

Figure 2 T Flip flop

The T flip-flop is a single input version of the JK flip-flop. As shown

in Figure 2, the T flip-flop is obtained from the JK type if both inputs are tiedtogether. The output of the T flip-flop "toggles" with each clock pulse.

EQUIPMENT

Prototyping board (breadboard)DC Power Supply 1.5 V

555 Timer circuit (complete)LED (2)

Solid-core wire (gauge 22, 1 meter long)Digital IC:

74LS73 JK Flip flop


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GRAPHICAL SYMBOL

Figure 3 74LS73 PIN CONFIG URATION

FUNCTION TABLE

Input OutputCLR CLK J K Q Q'

L X X X L H

H L L Q0 Q0'

H H L H L

H L H L H

H H H Toggle Toggle

H H X X Q0 Q0'

Table 1 74LS73 Function TablePROCEDURE

22.Choose one set of flip-flop from IC 74LS73. Refer to figure 3 for pin set

configuration.

23.Connect the Vcc and ground of the IC.

24.Connect the two LEDs to the state Q and its complement state Q.

25.Connect the timer circuit to the input CLK of the IC.


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26.Test and observe the output of the different input combinations of J and K.Refer to the table 1 function table.

27.Based from what you have observed, continue plotting the highs and lows ofQ and Q to the timing diagram below:

Figure 4 JK Timing Diagram

28.Connect J and K together to form T flip-flop.

29.Fill-up the function table below:

Table 2 T Flip flop function table

Input OutputCLR CLK T Q Q'

L X X

H L

H H

H H X


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30.Continue the given timing diagram below by plotting the output signals of Qand Q:

Figure 5 T Flip flop timing diagram

Documents

Basic Digital Design Experiments