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LIFE IS A JOURNEY!! “FOCUS ON THE JOURNEY, NOT THE DESTINATION. JOY IS FOUND NOT IN FINISHING AN ACTIVITY BUT IN DOING IT”
--GREG ANDERSON
BAKER MOHAMMAD Curricula Vitae
Baker Mohammad
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Table of Contents:
Name and Contacts .......................................................................................................................................... 2
Education: ........................................................................................................................................................ 2
Summary of Industry Experience (10 years intel and 6 years with Qualcomm): ................................................ 2
Summary of Teaching and Training Experience: .............................................................................................. 2
Research Interest: ............................................................................................................................................ 3
Active Projects .................................................................................................................................................. 3
Senior Design Projects Supervisor: .................................................................................................................. 3
Graduate Students Supervision/Involvement: ................................................................................................... 4
Publications Invention and Patents ................................................................................................................... 5
Books: .............................................................................................................................................................. 5
Refereed Journals ............................................................................................................................................ 5
Inventions and Patents ............................................................................................................................. 6
Refereed Conferences...................................................................................................................................... 7
Tutorials .................................................................................................................................................. 11
Funded Research Projects: ..................................................................................................................... 11
AWARDS ................................................................................................................................................ 12
Community and Professional Services .................................................................................................... 12
Detailed Industrial Experience and List of Projects ......................................................................................... 13
04/2012 to 02/2016 Consultant Qualcomm Inc., Dubai, UAE .................................................................. 13
12/2004 to 01/2011 Senior Staff Engineer/Manager at Qualcomm Inc. Austin Texas. USA ................... 13
07/1995 to 12/2004 Senior Circuit design Engineer at Intel Corporation. ................................................ 13
12/93 to 07/95 Field Service Engineer, Silicon Valley group (SVG), San Jose, CA ................................. 14
SKILLS & INTERESTS: .................................................................................................................................. 14
References ..................................................................................................................................................... 14
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Name and Contacts Baker Mohammad, PhD, Senior Member IEEE
Email: [email protected] UAE address: P.O Box 127788 US home number: 512-547-1804 Abu Dhabi, UAE UAE cell +971 554718194
Website: http://www.kustar.ac.ae/pages/dr-baker-mohammad
Education: PhD, Electrical and Computer Engineering, August. 2008, University of Texas at Austin, USA Thesis Topic: Cache Design for Low Power and High Yield GPA: 4.0/4.0 MS, Electrical and Computer Engineering, August 1998 Arizona State University, Tempe, AZ, USA Emphasis: Microelectronics, Solid State Electronics GPA: 3.6/4.0 BS, Electrical Engineering, December 1993, University Of New Mexico, Albuquerque, NM, USA.
Summary of Industry Experience (10 years intel and 6 years with Qualcomm): Over 16 years’ of industrial experience in the area of electronics digital, microprocessor/SOC design and
architecture on the state of the art process technology (from 250nm to 20nm) utilizing state of the art Computer Aided Design (CAD) tools.
Demonstrated history of leading, solving and delivering innovative technical solutions related to processor design to meet the target performance power and schedule.
In depth understanding of Circuit Design for high performance and low power processors and SOC. Familiar with all aspects of design flow from architectural specification and product definition to RTL and on through verification, implementation, silicon debug and into production. Exceptional problem solving skills focused on accuracy, timely execution, and customer satisfaction with proven ability to work well in a team environment. Experience with multi-site design teams and internal/external foundry partners to meet aggressive schedules, power and performance goals.
Methodology development for low design and analysis for different power modes active, stand by, sleep, and deep sleep. Power optimization for active, leakage, and standby mode electronic systems.
Develop quantitative models to predict future scaling trends for performance, power, and area. Supervised and trained circuit design engineers for both design concepts and CAD tools usage. Worked with
CAD tools developer to provide requirements and usage models for circuit design related tools. Design of Register file and SRAM-based memory subsystem including small signal arrays on both L1 and L2
caches. Design time optimization for maximum yield and low power with minimum voltage Circuit design of full custom High Speed /low power data path blocks using both static and dynamic logic Take great pride in the ability to get things done and consider it one of my greatest strengths
Summary of Teaching and Training Experience:
In addition to delivering many target training to junior Engineers and internship students during my 16 years industrial experience to cover both in depth design concepts and CAD tools usage, I developed the following formal full semester courses at Khalifa University, Electrical and Computer Engineering
Energy Harvesting for Autonomous Embedded System – Graduate course for PhD students
Fundamental of Electronics – for non ECE students.
Digital Logic Design – covering Basic logic design, combinational, sequential, basic memory and Verilog.
Electric Circuit 2: circuit analysis for both DC and AC, AC power analysis, correction, and quality factor. Frequency response, filter design, bode plot, gain, and using Laplace in analyzing step response.
Digital Logic Lab: Supervise lab experiment Using NI Elvis and NEXYS2 Xilinx based Spartan 3E FPGA
VLSI: Introduction to digital design using CMOS technology with emphasis on small geometry challenges. Develop labs using Synopsys custom designer platform.
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Embedded System Design: techniques required to develop embedded systems hardware-software co-design principles and tradeoffs. Selecting and designing with hardware components such as microcontroller, sensors, and actuators. Build a medium complexity embedded system project
Advance Digital System Design: Advance topic in digital design including: FSM, high speed arithmetic, timing analysis of digital system, advance Verilog and test bench.
03/2015 – present Associate professor Khalifa University, Abu Dhabi, UAE In addition to delivering word class teaching to undergraduate and graduate level students in the area of electronics and computer engineering, I lead research in area of Resistive RAM, Energy harvesting and Power management for autonomous electronics system focusing on biomedical devices and wireless sensor nodes application. 08/2010 to 03/2015 Assistant Professor at Electrical and Computer Engineering, Khalifa University of Science, Technology and research , UAE http://www.kustar.ac.ae/
Service: o Internship coordinator for ECE department o Curriculum committee chair overseeing all ECE courses offering and topics and provide
continuous improvement to serve our graduate o IEEE student chapter advisor o Serve in many department and university committees such as (hiring, student recruitment)
Teaching: o Teach graduate and undergraduate courses in Digital logic and design, Electronic circuits and
Circuit theory, embedded system and VLSI design. o Excellent student feedback for all my courses and labs.
Research Interest: Power Efficient Computing, Computer Architecture, and Embedded System VLSI implementation of low power high performance, variation tolerant circuits Energy Harvesting and Power Management circuits for low/self-power Embedded System and IoT Embedded Memory design for high speed, low power and maximum yield Sequential element design (FF, pulse latches, retention elements) on advance technology node Emerging Memory Technology Memristor, MRAM, STT-RAM
Active Projects Low power SRAM memory design in nano scale
Memristor & STTRAM Modeling, fabricating and Design tradeoffs
Energy harvesting interface circuit and Power management for SOC
Power conversion including AC-to-DC, and DC-to-DC
Non-Volatile memory for on-chip to support normally off instantaneous on goal
Power switch design and tradeoff on FinFet (size, area, performance, power tradeoff)
Senior Design Projects Supervisor: Energy harvesting System for waste-heat energy from buildings or Cars 3 ECE students / 2 MECH Indoor Localization system for close proximity – 4-ECE students – fall/spring 2014 Spray cooling with closed loop system for Electronics – 2-ECE and 2 ME- fall/spring 2014 Heath Monitor for Febrile Seizure – 4-ECE students – fall/spring 2014 SOC Design based on open cores modules – 4-ECE students fall/spring 2013 - co-supervisor Pollution Monitoring and Weather Station – 3-ECE students – fall/spring 2012
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Graduate Students Supervision/Involvement:
PhD Students
Student Name Role University Graduate date
Thesis Title
Yasmin Halawani supervisor KUSTAR Dec, 2018 TBD
Heba Abu Nahla supervisor KUSTAR Dec, 2016 Memristor Device Modeling, Fabrication and Security Application
Mohammad Alhawari
co-supervisor KUSTAR May, 2016
Multi-Source Energy Harvesting Interface Circuits for Biomedical Wearable Electronics
Temesghan Hebte co-supervisor KUSTAR May, 2016
Ultr Low Power Systems for Biomedical Application
Hamad Marzouqi examinar KUSTAR May, 2015 Prime Field Elliptic Curve Cryptography Processor with Unified Countermeasures
Tauseef Rab committee member UT austin May, 2013
Techniques To Minimize Circuitry and Improve Efficiency for Defect Tolerance
MS Students
Student Name Role University Graduate
date Thesis Title
Muath Abu Lebdah supervisor KUSTAR May, 2017 TBD
Abdulqader Mahmoud supervisor KUSTAR May, 2017 TBD
Muna Darwish supervisor KUSTAR May, 2017 TBD
Lilas Al Akhras supervisor KUSTAR May, 2016 Electrostatic Energy Harvesting Interface Circuits for Microsystems
Dima Kilani supervisor KUSTAR August, 2015
An Efficient On-chip Switched-Capacitor DC-DC Converter for Ultra-low Power Applications
Maisam Wahbah supervisor KUSTAR May, 2015 Piezo Electric Energy Harvesting System for Biomedical Applications
Nourhan Bayasi co-supervisor KUSTAR May, 2015
An ECG Signal Processor for the Prediction of Ventricular Arrhythmia
Yasmin Halawani supervisor KUSTAR Dec, 2014
Impact of Emerging Memory Technologies on the Energy Efficiency of Wireless Sensor Nodes
Khouloud Eledlebi examiner KUSTAR May, 2015
Modelling And Characterizing Nano Schottky Junctions For Low Power Nano Devices
Dalia Y. Attia examiner KUSTAR May, 2016 Categorizing Exercise Intensity Levels by Cardiorespiratory Signals
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Publications Invention and Patents
Author and co-Author several US patents. Updated list @
http://patft.uspto.gov/netahtml/PTO/search-adv.htm
IN/Baker AND IN/Mohammad AND AN/Qualcomm
Author/co-author 1-book, over 19 journals, over 50 conference papers
Full list is @ http://scholar.google.ae/citations?user=oPRJVPsAAAAJ&hl=en
Books:
B. Mohammad, “Embedded Memory Design for Multi-Core and SOC,” New York, US, Springer, January 2014, DOI 10.1007/978-1-4614-8881-1
Refereed Journals (italics are my students, IF (Impact factor))
[1]. D. Kilani; M. Alhawari; B. Mohammad; H. Saleh; M. Ismail, "An Efficient Switched-Capacitor DC-DC Buck
Converter for Self-Powered Wearable Electronics," in IEEE Transactions on Circuits and Systems I: Regular
Papers , vol.PP, no.99, pp.1-10, doi: 10.1109/TCSI.2016.2586117, (IF 2.393)
[2]. M. Alhawari; B. Mohammad; H. Saleh; M. Elnaggar, "An Efficient Zero Current Switching Control for L-based
DC-DC Converters in TEG Applications," in IEEE Transactions on Circuits and Systems II: Express Briefs ,
vol.PP, no.99, pp.1-1, doi: 10.1109/TCSII.2016.2558110 (IF 1.136)
[3]. H. Abunahla; M. A. Jaoude; C. J. O'Kelly; B. Mohammad, “Sol-gel/drop-coated micro-thick TiO 2 memristors
for γ-ray sensing”. Materials Chemistry and Physics, Elsevier, September 2016 (online)(IF 2.357)
[4]. M. Wahbah M. Alhawari,; B. Mohammad; H. Saleh; M. Ismail; " An AC/DC converter for human body-based
vibration energy harvesting”; Microelectronics Journal, Elsevier, vol. 55, pp 1-7, Sept. 2016,
doi:10.1016/j.mejo.2016.06.006 (IF 0.92)
[5]. C. O'Kelly, H. N.M. Abunahla, M. Abi Jaoude, D. Homouz,, B Mohammad, "Threshold Continuum
Conductance Change In NbO Pt Memristor Interfaces", J. Physical Chemestry C, ACS, pp 18971-18976,
August 2016, DOI: 10.1021/acs.jpcc.6b05010 (IF 4.509)
[6]. B. Mohammad, Maguy Abi Jaoude, Vikas Kumar, Dirar Mohammad Al Homouz, Heba Abu Nahla, Mahmoud
Al-Qutayri, Nicolas Christoforou: "State-of-the-art of metal-oxide memristor devices" Nanotechnology
Reviews, degruyter, volum 5, issue 3, pp 311-329, June 2016; DOI:10.1515/ntrev-2015-0029 (IF = 2.044)
[7]. N. Bayasi, T. Tekeste, H. Saleh, B. Mohammad, A. Khandoker and M. Ismail, "Low-Power ECG-Based
Processor for Predicting Ventricular Arrhythmia," in IEEE Transactions on Very Large Scale Integration
(VLSI) Systems, vol. 24, no. 5, pp. 1962-1974, May 2016; doi: 10.1109/TVLSI.2015.2475119, (IF 1.245)
Best paper award
[8]. Y. Halawani, B. Mohammad, D. Homouz, M. Al-Qutayri and H. Saleh, "Modeling and Optimization of
Memristor and STT-RAM-Based Memory for Low-Power Applications," in IEEE Transactions on Very Large
Scale Integration (VLSI) Systems, vol. 24, no. 3, pp. 1003-1014, March 2016. doi:
10.1109/TVLSI.2015.2440392, (IF 1.245)
[9]. H. Abunahla, D. Shehada, C. Yeob Yeun, B. Mohammad, Maguy Abi Jaoude: Novel secret key generation
techniques using memristor devices. AIP Advances, AIP, February 2016; DOI:10.1063/1.4942041, (IF 1.496)
[10]. B. Mohammad; H. Saleh, M. Ismail, “Design Methodologies for Yield Enhancement and Power Efficiency in
SRAM-Based SoCs,” IEEE Transaction on Very Large Integration System (TVLSI), volume 23, issue 10,
pp2054-2064, Oct. 2015, doi: 10.1109/TVLSI.2014.2360319 , IF (1.245)
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[11]. B. Mohammad, "Embedded Memory Interface Logic and Interconnect Testing," in IEEE Transactions on
Very Large Scale Integration (VLSI) Systems, vol. 23, no. 9, pp. 1946-1950, Sept. 2015; doi:
10.1109/TVLSI.2014.2354381, IF(1.245)
[12]. L. Mahmoud, Lama, M. Alhwarai, S.Yarjan, B. Mohammad, K. Laio,, I. Elnaggar Ismail; "Characterization of a
Graphene-Based Thermoelectric Generator Using a Cost-Effective Fabrication, Process Energy Procedia,
Elsevier, issue 75, pp 615-620, August 2015; doi: 10.1016/j.egypro.2015.07.466 ,
[13]. L. Mahmoud, Lama, M. Alhwarai, S.Yarjan, B. Mohammad, K. Laio,, I. Elnaggar Ismail; “Combination of PVA
with graphene to improve the seebeck coefficient for thermoelectric generator applications”, Journal of
Electronic Materials, Springer, volume 44, issue 1, pp. 420-424, January 2015, doi: 10.1007/s11664-014-
3451-4, (IF 1.491)
[14]. M. Saint-Laurent et al., "A 28 nm DSP Powered by an On-Chip LDO for High-Performance and Energy-
Efficient Mobile Applications," in IEEE Journal of Solid-State Circuits, vol. 50, no. 1, pp. 81-91, January 2015;
doi: 10.1109/JSSC.2014.2371454 (IF 3.299)
[15]. Heba Abunahla, Dirar Homouz, Yasmin Halawani, B. Mohammad: "Modeling and device parameter design
to improve reset time in binary-oxide memristors", Applied Physics A, Springer, volume 117, issue, pp 1019-
1023, November 2014. DOI:10.1007/s00339-014-8786, (IF 1.44)
[16]. M. Wahbah, M. Alhawari, B. Mohammad, H. Saleh and M. Ismail, "Characterization of Human Body-Based
Thermal and Vibration Energy Harvesting for Wearable Devices," in IEEE Journal on Emerging and Selected
Topics in Circuits and Systems, vol. 4, no. 3, pp. 354-363, Sept. 2014; doi: 10.1109/JETCAS.2014.2337195
(IF 1.578)
[17]. B. Mohammad, D. Homouz and H. Elgabra, "Robust Hybrid Memristor-CMOS Memory: Modeling and
Design," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 11, pp. 2069-
2079, Nov. 2013; doi: 10.1109/TVLSI.2012.2227519, (IF 1.245)
[18]. B. Mohammad, J. A. Abraham: "A reduced voltage swing circuit using a single supply to enable lower
voltage operation for SRAM-based memory", Microelectronics Journal 02/2012; volume 43, issue 2:, pp 110-
118, February 2012, DOI:10.1016/j.mejo.2011.11.006, (IF 0.92)
[19]. E. S. Fetzer et al., "A fully bypassed six-issue integer datapath and register file on the Itanium-2
microprocessor," in IEEE Journal of Solid-State Circuits, vol. 37, no. 11, pp. 1433-1440, Nov 2002; doi:
10.1109/JSSC.2002.803948 (IF 3.299)
Inventions and Patents
Author and co-Author more than 19 issued US patent and several pending patent applications.
Granted Patents:
[1]. B. Mohammad, D. Homouz. “A system and method for designing a hybrid memory cell with memristor and
complementary Metal-Oxide Semiconductor”, US Patent 9299425, March 2016
[2]. Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud;
Mohammad, Baker; Elnaggar, Mohammed Ismail; " Architecture and method for real-time parallel
detection and extraction of maximally stable extremal regions (MSERS) 2016 "US
Patent 9,311,555"
[3]. Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud;
Mohammad, Baker; Elnaggar, Mohammed Ismail; " HARDWARE ARCHITECTURE FOR REAL-TIME
EXTRACTION OF MAXIMALLY STABLE EXTREMAL REGIONS (MSERs) 2016 "US Patent
20,160,071,280"
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[4]. Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Salahat, Safa Najeh; Sluzek, Andrzej Stefan; Al-qutayri,
Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " Object Detection and Tracking Using Depth
Data 2016 "US Patent 20,160,117,830"
[5]. Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Salahat, Safa Najeh; Sluzek, Andrzej Stefan; Al-qutayri,
Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " METHODS AND SYSTEMS FOR
PROCESSING MRI IMAGES TO DETECT CANCER 2016 "US Patent
20,160,113,546"
[6]. Habte, Temesghen Tekeste; Bayasi, Nourhan Yahya; Saleh, Hani Hasan Mustafa; Khandoker, Ahsan Habib;
Mohammad, Baker; Al-qutayri, Mahmoud; Elnaggar, Mohammed Ismail; " MEDICAL DEVICE HAVING
AUTOMATED ECG FEATURE EXTRACTION 2016 "US Patent 20,160,120,431"
[7]. Mohammad, Baker S; Bassett, Paul D; Saint-Laurent, Martin; " System and method for reducing cross
coupling effects 2016 "US Patent App. 15/045,282"
[8]. Al Ahmad, Mahmoud; Mohammad, Baker; " VIBRATIONAL ENERGY HARVESTING SYSTEM 2016
"US Patent 20,160,134,204"
[9]. E. Salahat, H. Saleh, B. Mohammad, et. Al “Architecture and method for real-time parallel detection and
extraction of maximally stable extremal regions (MSERS)”, US patent 9,311,555, September, 10th 2014
[10]. B. Mohammad, “System and Method to Read a Memory Cell with a Complementary Metal-Oxide-
Semiconductor (CMOS) Read Transistor”, US Patent, 8737117, May 27, 2014
[11]. B. Mohammad, H. Kim, P. Basset, “Method and apparatus for testing a memory device,” US Patents :
8,466,707 , March 3ed 2010, and 8884637, June, 18, 2013
[12]. S. Venkumanhnti, B. Mohammad, “Thread allocation and clock cycle adjustment in an interleaved multi-
thread processor”, US Patent, 8397238, March 12, 2013
[13]. B. Mohammad, “System and Method including built-in self-test (BIST) circuit to test cache memory” US
Patent, 8127184, February, 28 2012
[14]. B. Mohammad et. al, “Systems and methods for low power, high yield memory”, US Patent, 7760576, July,
20th, 2010
[15]. M. Saint-Laurent, B. Mohammad, P. Bassett, “Sequential circuit element including a single clocked
transistor”, US Patent, 7746137, June, 29th 2010
[16]. B. Mohammad,. M. Ahmad; P. Bassett, Paul; S. Jamil, A. Ingle, “Low power microprocessor cache memory
and method of operation, “US Patent, 7620778, Nov. 17th 2009
[17]. B. Mohammad, M. Saint-Laurent, P. Bassett, “Circuit device and method of controlling a voltage swing”, US
Patent, 7567096, July, 28, 2009
[18]. B. Mohammad, P. Bassett, “System and method for low power wordline logic for a memory”, US Patent,
7466620, Dec, 16th, 2008
Refereed Conferences [1]. H. Abunahla, N. E. Nachar, D. Homouz, B. Mohammad, and M. A. Jaoude. Physics model of memristor
devices with varying active materials. In 2016 IEEE International Symposium on Circuits and Systems
(ISCAS), pages 1590–1593, May 2016.
[2]. M. Alhawari, D. Kilani, B. Mohammad, H. Saleh, and M. Ismail. An effi- cient thermal energy harvesting and
power management for uwatt wearable biochips. In 2016 IEEE International Symposium on Circuits and
Systems (ISCAS), pages 2258–2261, May 2016.
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[3]. T. Tekeste, H. Saleh, B. Mohammad, A. Khandoker, and M. Ismail. A biomedical soc architecture for
predicting ventricular arrhythmia. In 2016 IEEE International Symposium on Circuits and Systems (ISCAS),
pages 2262–2265, May 2016.
[4]. A. Abdulslam, B. Mohammad, M. Ismail, and Y. Ismail. A simple hybrid 3-level buck-boost dc-dc converter
with efficient pwm regulation scheme. In 2015 IEEE International Conference on Electronics, Circuits, and
Systems (ICECS), pages 368–371, Dec 2015.
[5]. Y. Halawani, B. Mohammad, M. Al-Qutayri and H. Saleh, "Memory impact on the lifetime of a Wireless
Sensor Node using a Semi-Markov model," 2015 IEEE International Symposium on Circuits and Systems
(ISCAS), Lisbon, pp. 1470-1473, May 2015 ; doi: 10.1109/ISCAS.2015.7168922
[6]. E. Salahat et al., "A robust histogram-based image segmentation ASIC design for System-on-Chip using
65nm technology," Communications, Signal Processing, and their Applications (ICCSPA), 2015 International
Conference on, Sharjah, pp. 1-4, 2015; doi: 10.1109/ICCSPA.2015.7081298
[7]. N. Bayasi, T. Tekeste, H. Saleh, B. Mohammad and M. Ismail, "A 65-nm low power ECG feature extraction
system," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, pp. 746-749, May
2015, doi: 10.1109/ISCAS.2015.7168741
[8]. M. Alhawari, D. Kilani, B. Mohammad, H. Saleh and M. Ismail, "An efficient power management unit for
μWatt thermoelectric generators," Information and Communication Technology Research (ICTRC), 2015
International Conference on, Abu Dhabi, 2015, pp. 148-151; doi: 10.1109/ICTRC.2015.7156443
[9]. M. Alhawari, B. Mohammad, H. Saleh and M. Ismail, "An all-digital, CMOS zero current switching circuit for
thermal energy harvesting," Circuit Theory and Design (ECCTD), 2015 European Conference on,
Trondheim, 2015, pp. 1-4; doi: 10.1109/ECCTD.2015.7300094
[10]. T. Tekeste et al., "Adaptive ECG interval extraction," 2015 IEEE International Symposium on Circuits and
Systems (ISCAS), Lisbon, 2015, pp. 998-1001; doi: 10.1109/ISCAS.2015.7168804
[11]. Abdulslam, B. Mohammad, M. Ismail and Y. Ismail, "A simple hybrid 3-level buck-boost DC-DC converter
with efficient PWM regulation scheme," 2015 IEEE International Conference on Electronics, Circuits, and
Systems (ICECS), Cairo, 2015, pp. 368-371; doi: 10.1109/ICECS.2015.7440325
[12]. E. Salahat, H. Saleh, A. Sluzek, M. Al-Qutayri, B. Mohammad and M. Ismail, "A maximally stable extremal
regions system-on-chip for real-time visual surveillance," Industrial Electronics Society, IECON 2015 - 41st
Annual Conference of the IEEE, Yokohama, 2015, pp. 002812-002815; doi: 10.1109/IECON.2015.7392528
[13]. E. Salahat, H. Saleh, A. S. Sluzek, B. Mohammad, M. Al-Qutayri and M. Ismail, "Novel MSER-guided street
extraction from satellite images," 2015 IEEE International Geoscience and Remote Sensing Symposium
(IGARSS), Milan, 2015, pp. 1032-1035; doi: 10.1109/IGARSS.2015.7325945
[14]. E. Salahat, H. Saleh, A. Sluzek, M. Al-Qutayri, B. Mohammad and M. Ismail, "Novel fast and scalable
parallel union-find ASIC implementation for real-time digital image segmentation," Industrial Electronics
Society, IECON 2015 - 41st Annual Conference of the IEEE, Yokohama, 2015, pp. 003122-003125; doi:
10.1109/IECON.2015.7392579
[15]. D. Kilani, B. Mohammad, H. Saleh and M. Ismail, "LDO regulator versus switched inductor DC-DC
converter," Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on,
Marseille, 2014, pp. 638-641; doi: 10.1109/ICECS.2014.7050066
[16]. D. Kilani, B. Mohammad, H. Saleh and M. Ismail, "Digital pulse frequency modulation for switched capacitor
DC-DC converter on 65nm process," Electronics, Circuits and Systems (ICECS), 2014 21st IEEE
International Conference on, Marseille, 2014, pp. 642-645; doi: 10.1109/ICECS.2014.7050067
[17]. M. Wahbah, B. Mohammad, H. Saleh and M. Ismail, "Implementation of boost converter zero current
detection using digital ASIC design flow," Electronics, Circuits and Systems (ICECS), 2014 21st IEEE
International Conference on, Marseille, 2014, pp. 702-705; doi: 10.1109/ICECS.2014.7050082
9
[18]. N. Bayasi, H. Saleh, B. Mohammad and M. Ismail, "65-nm ASIC implementation of QRS detector based on
Pan and Tompkins algorithm," Innovations in Information Technology (INNOVATIONS), 2014 10th
International Conference on, Al Ain, 2014, pp. 84-87; doi: 10.1109/INNOVATIONS.2014.6987567
[19]. D. Kilani, B. Mohammad, H. Saleh and M. Ismail, "Switched capacitor DC-DC converter for ultra-low power
applications," Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on,
Marseille, 2014, pp. 463-466; doi: 10.1109/ICECS.2014.7050022
[20]. N. Bayasi, T. Tekeste, H. Saleh, A. Khandoker, B. Mohammad and M. Ismail, "Adaptive technique for P and
T wave delineation in electrocardiogram signals," 2014 36th Annual International Conference of the IEEE
Engineering in Medicine and Biology Society, Chicago, IL, 2014, pp. 90-93; doi:
10.1109/EMBC.2014.6943536
[21]. H. Abunahla, B. Mohammad and D. A. Homouz, "Effect of device, size, activation energy, temperature, and
frequency on memristor switching time," 2014 26th International Conference on Microelectronics (ICM),
Doha, 2014, pp. 60-63; doi: 10.1109/ICM.2014.7071806
[22]. T. Tekeste, H. Saleh, B. Mohammad, M. Al-Qutayri and M. Ismail, "Survey of wireless baseband SoC for
biomedical application," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International
Conference on, Abu Dhabi, 2013, pp. 98-99; doi: 10.1109/ICECS.2013.6815361
[23]. Y. Halawani, B. Mohammad, M. Al-Qutayri and H. Saleh, "Efficient power management in wireless sensor
networks," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on, Abu
Dhabi, 2013, pp. 72-73.; doi: 10.1109/ICECS.2013.6815350
[24]. H. H. Saleh, B. S. Mohammad and M. Maalouf, "A high-throughput, contention-free low-power, Radix-2
1k,2k, 4k and 8k-point fast fourier transform engine using 28nm standard-cell process," Design & Technology
of Integrated Systems in Nanoscale Era (DTIS), 2013 8th International Conference on, Abu Dhabi, 2013, pp.
184-185; doi: 10.1109/DTIS.2013.6527807
[25]. N. Bayasi, H. Saleh, B. Mohammad and M. Ismail, "The revolution of glucose monitoring methods and
systems: A survey," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference
on, Abu Dhabi, 2013, pp. 92-93; doi: 10.1109/ICECS.2013.6815358
[26]. Y. Halawani, B. Mohammad, M. Al-Qutayri and H. Saleh, "Modeling of STT-MTJ for low power embedded
memory applications: A comparative review," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th
International Conference on, Abu Dhabi, 2013, pp. 719-722; doi: 10.1109/ICECS.2013.6815515
[27]. M. Wahbah and B. Mohammad, "Piezo Electric energy harvester and its interface circuit: Opportunities and
challenges," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on, Abu
Dhabi, 2013, pp. 795-798; doi: 10.1109/ICECS.2013.6815534
[28]. B. Mohammad, H. Elgabra, R. Ashour and H. Saleh, "Portable wireless biomedical temperature monitoring
system: Architecture and implementation," Innovations in Information Technology (IIT), 2013 9th International
Conference on, Abu Dhabi, 2013, pp. 95-100; doi: 10.1109/Innovations.2013.6544400
[29]. B. Mohammad and H. Saleh, "Energy efficient and hign bandwidth embedded memory implementation,"
Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2013 8th International Conference on,
Abu Dhabi, 2013, pp. 117-121; doi: 10.1109/DTIS.2013.6527790
[30]. Y. Halawani, B. Mohammad, D. Humouz, M. Al-Qutayri and H. Saleh, "Memristor for energy efficient
wireless sensor node," 2013 8th IEEE Design and Test Symposium, Marrakesh, 2013, pp. 1-2; doi:
10.1109/IDT.2013.6727141
[31]. Y. Tanurhan et al., "Panel: Regional and global collaboration models to boost chip design sector in the
Middle East," 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC),
Istanbul, Turkey, 2013, pp. xvii-xvii; doi: 10.1109/VLSI-SoC.2013.6673231
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[32]. E. Salahat, H. Saleh, B. Mohammad, M. Al-Qutayri, A. Sluzek and M. Ismail, "Automated real-time video
surveillance algorithms for SoC implementation: A survey," Electronics, Circuits, and Systems (ICECS), 2013
IEEE 20th International Conference on, Abu Dhabi, 2013, pp. 82-83; doi: 10.1109/ICECS.2013.6815354
[33]. Y. Halawani, B. Mohammad, D. Homouz, M. Al-Qutayri and H. Saleh, "Embedded memory design using
memristor: Retention time versus write energy," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th
International Conference on, Abu Dhabi, 2013, pp. 41-44; doi: 10.1109/ICECS.2013.6815340
[34]. D. Homouz, Z. Abid, B. Mohammad, Y. Halawani and M. Jacobson, "Memristors for digital, memory and
neuromorphic circuits," 2013 25th International Conference on Microelectronics (ICM), Beirut, 2013, pp. 1-4;
doi: 10.1109/ICM.2013.6734970
[35]. B. Mohammad, N. Eleyan, G. Seok and H. Kim, "Automated flow for generating CMOS custom memory bit
map between logical and physical implementation," 2013 8th IEEE Design and Test Symposium, Marrakesh,
2013, pp. 1-6; doi: 10.1109/IDT.2013.6727105
[36]. M. Alhawari et al., "Energy efficient system-on-chip architecture for non-invasive mobile monitoring of
diabetics," Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2013 8th International
Conference on, Abu Dhabi, 2013, pp. 180-181; doi: 10.1109/DTIS.2013.6527805
[37]. M. Alhawari, B. Mohammad, H. Saleh and M. Ismail, "A survey of thermal energy harvesting techniques and
interface circuitry," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on,
Abu Dhabi, 2013, pp. 381-384; doi: 10.1109/ICECS.2013.6815434
[38]. G. Seok, H. Kim and B. Mohammad, "Write-through method for embedded memory with compression Scan-
based testing," 2012 IEEE 30th VLSI Test Symposium (VTS), Hyatt Maui, HI, 2012, pp. 158-163; doi:
10.1109/VTS.2012.6231096
[39]. B. Mohammad, P. Dadabhoy, K. Lin and P. Bassett, "Comparative study of current mode and voltage mode
sense amplifier used for 28nm SRAM," 2012 24th International Conference on Microelectronics (ICM),
Algiers, Algeria, 2012, pp. 1-6; doi: 10.1109/ICM.2012.6471396
[40]. H. Elgabra, I. A. H. Farhat, A. S. A. Hosani, D. Homouz and B. Mohammad, "Mathematical modeling of a
memristor device," Innovations in Information Technology (IIT), 2012 International Conference on, Abu
Dhabi, 2012, pp. 156-161; doi: 10.1109/INNOVATIONS.2012.6207722
[41]. Z. Abid, D. Homouz, B. Mohammad and W. Wang, "Memristors-based NMOS logic circuits," 2012 24th
International Conference on Microelectronics (ICM), Algiers, Algeria, 2012, pp. 1-4; doi:
10.1109/ICM.2012.6471402
[42]. B. Mohammad, D. Homouz, O. A. Rayahi, H. Elgabra and A. S. A. Hosani, "Hybrid Memristor-CMOS
memory cell: Modeling and design," ICM 2011 Proceeding, Hammamet, 2011, pp. 1-6; doi:
10.1109/ICM.2011.6177388
[43]. D. Homouz, B. Mohammad, H. Elgabra and I. Farahat, "Memristor: Modeling read and write operations,"
ICM 2011 Proceeding, Hammamet, 2011, pp. 1-5; doi 10.1109/ICM.2011.6177398
[44]. B. Mohammad, "Low leakage power SRAM cell for embedded memory," Innovations in Information
Technology (IIT), 2011 International Conference on, Abu Dhabi, 2011, pp. 367-370; doi:
10.1109/INNOVATIONS.2011.5893851
[45]. B. Mohammad and P. Dadabhoy, "Effective screening for NBTI effect on SRAM-based memory," 2010
International Conference on Microelectronics, Cairo, 2010, pp. 383-386.
doi: 10.1109/ICM.2010.5696167
[46]. S. Bijansky, B. Mohd and B. Mohammad, "Dynamic power analysis for custom designs," 2009 IEEE
International Conference on IC Design and Technology, Austin, TX, 2009, pp. 173-176; doi:
10.1109/ICICDT.2009.5166289
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[47]. B. Mohammad, M. T. Rab, K. Mohammad and M. A. Suleman, "Dynamic cache resizing architecture for high
yield SOC," 2009 IEEE International Conference on IC Design and Technology, Austin, TX, 2009, pp. 211-
214; doi: 10.1109/ICICDT.2009.5166298
[48]. N. N. Eleyan, K. Lin, M. Kamal, B. Mohammad and P. Bassett, "Semi-custom design flow: Leveraging Place
and route tools in Custom Circuit design," 2009 IEEE International Conference on IC Design and
Technology, Austin, TX, 2009, pp. 143-147; doi: 10.1109/ICICDT.2009.5166283
[49]. A. Hussein, H. Saleh, B. Mohammad and E. John, "Optimum organization of SRAM-based memory for
leakage power reduction," 2008 51st Midwest Symposium on Circuits and Systems, Knoxville, TN, 2008, pp.
775-778; doi: 10.1109/MWSCAS.2008.4616914
[50]. B. Mohammad, S. Bijansky, A. Aziz and J. Abraham, "Adaptive SRAM memory for low power and high
yield," Computer Design, 2008. ICCD 2008. IEEE International Conference on, Lake Tahoe, CA, 2008, pp.
176-181; doi:10.1109/ICCD.2008.4751858
[51]. B. Mohammad, M. Saint-Laurent, P. Bassett and J. Abraham, "Cache Design for Low Power and High
Yield," 9th International Symposium on Quality Electronic Design (isqed 2008), San Jose, CA, 2008, pp. 103-
107; doi: 10.1109/ISQED.2008.4479707
[52]. B. Mohammad, K. Lin, P. Bassett and A. Aziz, "A 65nm level-1 cache for mobile applications," 2008
International Conference on Microelectronics, Sharjah, 2008, pp. 5-10; doi: 10.1109/ICM.2008.5393826
[53]. M. Saint-Laurent, B. Mohammad and P. Bassett, "A 65-nm pulsed latch with a single clocked transistor,"
Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on, Portland, OR,
2007, pp. 347-350; doi: 10.1145/1283780.1283855
[54]. B. Mohammad, P. Bassett, J. Abraham and A. Aziz, "Cache Organization for Embeded Processors: CAM-
vs-SRAM," 2006 IEEE International SOC Conference, Taipei, 2006, pp. 299-302; doi:
10.1109/SOCC.2006.283902
Tutorials: Deliver the following tutorials for IEEE conferences
[1]. Mohamed Abu-Rahma, “B. Mohammad. Embedded Memory Design in Nanometer Technology,” IEEE
International Conference on Microelectronics (ICM), Dec. 2010, Cairo, Egypt
[2]. B. Mohammad. “Embedded Memory Design in Nanometer Technology,” IEEE International Conference on
Electronics, Circuits, and Systems (ICECS), Dec. 2013, Abu Dhabi, UAE
[3]. B. Mohammad, M. Ismail, “: Energy Harvesting and Power Management for Autonomous Self-powered
Devices”, IEEE International Symposium On Circuits And Systems (ISCAS), May 2015, Lisbon, Purtogal.
Member of the Following Panel Discussion
How microelectronic industry can help decrease the ICT ecological footprint? IEEE conference ICICDT,
May 2009, Austin, TX
Relationship between Universities and Industry in Middle East and North Africa (MENA) region, ICM
Conference, IEEE, December, 2012, Tunis
Regional/Global Collaboration. Models to Boost Chip Design Sector in the Middle East, VLSI-SOC, March,
2013, Istanbul, Turkey
Funded Research Projects:
PI of the following projects:
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1. B. Mohammad, Maguy Abi Jaoude, Vikas Kumar, Dirar Mohammad Al Homouz, Heba Abu Nahla,
Mahmoud Al-Qutayri, Nicolas Christoforou , “Memristor Modeling, Design, and Fabrication, for Memory,
Logic and Neuromorphic Applications”, 2.14 Million AED funded by Khalifa University Internal fund
KUIRF2, September 2014
2. B. Mohammad, M. Ismail, “Energy harvesting and Power management for SOC”, 1.1 Million AED funded
project by ATIC-SRC. Expected Completion date: September, 2016
3. M. Ismail, B. Mohammad, “Efficient Power Management Solutions for Standby and Sleep Modes in
Battery-powered SoCs, 1.1 Million AED funded project by ATIC-SRC. Expected Completion date:
September, 2016
4. B. Mohammad, M. Abu Gouda, G. Wesley Hitt, “Memristor device for radiation sensor”, 300K AED,
funded from Abu Dhabi Education Council. December 2015.
CO-PI for the following projects:
5. M. Ismail, B. Mohammad, H. Saleh,” An Integrated low power Platform for Non-invasive EKG/Glucose
Monitoring System, 900,000 AED funded project by ATIC-SRC. Expected Completion date: September,
2016
6. M. Ismail, B. Mohammad, “CMOS-Compatible Piezoelectric Energy Harvesting Using NEMS Fabrication
Techniques”, $1.5M Start January 2015 for 3-years
7. S. Singh, B. Mohammad, M. Ismail, “Energy Efficient Smart Power Electronic Systems”, 900,000 AED
funded project by ATIC-SRC. Expected Completion date: May , 2014
AWARDS o Best paper award from SRC Techon conference (September 2016) o Best paper award from Very Large Integration System (VLSI) IEEE journal, 2015 o Three Qualcomm Qstar award for excellence on performance, education and leadership o Best paper award for Qtech conference June 2009 o Intel Involve in the community award for volunteer and impact on the community o Qualcomm interne mentor award for mentoring and training interne o KUSTAR ECE department award for excellent in research, 2012 o KUSTAR ECE award for service to Semiconductor Research Center, 2013 o IEEE region 8 award for contributing to UAE student day as steering committee -2014 o KUSTAR staff excellence award in intellectual property creation - 2015
Community and Professional Services Editor for microelectronics Journal, Elsevier May – 2015 – present
Reviewer for following journals on topics related to low power and memory design: o IEEE Transaction of VLSI journal o IEEE Transactions on Circuits and Systems-Part II
o IEEE Transactions on Design Automation of Electronic Systems journal o IEEE Design &Technology of Integrated System o IEEE International Design and Test Symposium o ACM Transactions on Semiconductor Manufacturing journal
Program Committee on Logic and Circuit Design Track for IEEE International Conference on Computer Design
Hiring committee and Community committee member at Khalifa University
IEEE advisory for student branch at Khalifa University
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IEEE ICECS conference public relation committee chair, 2014
Board member of Austin peace Academy School, Austin, Tx (2008-2009)
IEEE region 8 judge for student projects 3-years
KUSTAR internship coordinator for ECE department for 4-years
KUSTAR curriculum committee member 2014, 2011, 2010
KUSTAR student recruitment committee 2011, 2013
Detailed Industrial Experience and List of Projects
04/2012 to 02/2016 Consultant Qualcomm Inc., Dubai, UAE Consult in area related to low power circuit design, process technology evaluation, embedded memory
architecture, and design for low power and variation tolerant circuit.
12/2004 to 01/2011 Senior Staff Engineer/Manager at Qualcomm Inc. Austin Texas. USA I started at Qualcomm as a Senior Staff Engineer in the custom design team where I designed and supported Instruction and Data caches for Qualcomm's DSP. The DSP is used in several Qualcomm CDMA technology based chips for communication and multi-media applications. After demonstrating success in leading the circuit design team, I was promoted to run the custom macro design team. In addition to managing schedule, deliverable, design reviews and provide career paths to my direct report, I work closely with micro architecture and logic design Engineers in defining and balancing pipeline stages, visibility studies, technology selection, cache sizes, and timing and power budget. I worked closely with CAD group in developing the circuit design timing/power simulation related tools/flows for the lead process technology nodes. A accomplishments/tasks includes but not limited to:
Successfully lead a circuit design team for a new design center and delivered all macros L1’s, L2’s and reg files in 65nm, 45nm, and 28nm process technology for DSP microprocessor.
Lead the circuit and physical design of TLB, TAG, state array, load and store align in addition to the data array blocks. Designed 32 KB 16 way set associative, pseudo dual ported data cache.
Interface with internal process technology team and foundry on defining technology node metrics
Performing circuit feasibility studies for input into the micro-architectural definition of the cache sub-system.
Deliver Si characterization plan and work with Silicon validation team both on system level and on the tester platform
07/1995 to 12/2004 Senior Circuit design Engineer at Intel Corporation. Key member of several microprocessor design team at intel corporation, building custom circuit design utilizing dynamic, and static design styles for various microprocessors families ( high performance > 1GHZ with 100Watt (IA-64 Itanium) , and low power < 1Watt xscale) Follow are the list of projects and the key accomplishments:
05/2004 to 12/2004 Vermilion core design team, Chandler, AZ (90nm Technology) Technical lead for level 1 cache design. Responsible for designing 32 KB L1 cache based on intel mobile processor family “Centrino” on 90 nm technology . Electrical Rule Checking (ERC) and Noise verification lead for
the Vermilion project. Small Signal array methodology owner. 07/2002 to 05/2004 Xscale core design team, Chandler, AZ (90nm Technology)
Developing low power circuit design techniques for intel xscale processor in 90 nm technology targeted for mobile market. Validate performance/functionality at different power mode. Senior member of the L2 cache design team on manzano CPU. Design, validate, floorplan, and supervise layout of 256K L2T low power high performance cache block on 90 nm technology.
Responsible for C4 bump, die file generation, power grid design, and floor plan on manzano test chip. Supervise top level test chip floorplan/power grid and block placement. Determined ESD clamp
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placements and strapping. Main interface between package design, firmware, FAB, and circuit design team to insure high quality and functional chip. Co-processor physical and timing interface owner. Responsible for physical design, timing allocation and analysis of the multimedia processor interface with manzano. Worked with cross site team of manzano and driscoll to insure all timing, and routing issue is been addressed.
11/99 to 07/2002 “Mckinley/shavano” CPU project, Fort Collins, CO (0.18 Technology) Member of the McKinley CPU Design team, which is a joint project between Intel and HP to develop the second generation of Intel IA-64 processor family on 0.18 um technology and 1-1.1 GHZ. Responsible for all circuit design activities of 4 semi custom blocks in integer execution unit "ieu". Duties include: Synthesize block using synopses and generate layout using cells3 where is possible. In cases where area or timing is critical designed custom circuit from iHDL code, floor planning, generate layout, Static timing Analysis. Technical lead of McKinley post-A0 full dynamic verification. Main responsibilities include: coordinate with all unit owners synch up points between schematic and rtl. Responsible for rtl model build, debug using AWSIM tool. Member of the shavano technology readiness design team, responsibilities include: Designing circuits on transistor level that generate the different clock waveforms used in McKinley
10/97 to 10/99 Merced CPU project, Chandler, AZ (0.18 Technology) Member of the Circuit Design team of A and B step of Merced "Itanium" Processor. The first Intel IA-64 processor on 0.18 um technology and 600 - 800 MHZ. Responsible for all Circuit Design activities of 4 Data path LBFs (~ 20 - 45 K Transistors) in ISD, and REN units. Duties include: Circuit design from iHDL code using both Domino and full custom CMOS design techniques, Formal Verification, Logic verification, Static Timing Analysis, Floor Planning, and Layout supervision Cluster ERC, Cross Coupling, and Bus Design Owner. Duties include: Technical support for all cluster circuit designers, and liaison between Full chip global team and lbf owners. Review erc and characterization results.
07/95 to 10/97 i960JT100 core, CEG, Chandler, AZ (0.25 Technology) Member of the Circuit Design and Validation team of i960JT100 RISC architecture microprocessor. Duties include: Developed Electrical Rule Checker and Reliability Verification flows using Static Timing Analysis Cad Tools. Defined and implemented parasitic extraction and back annotation flow. Build and simulated power network for global metal power lines to calculate IR drop and metal width EM. Padio Unit Owner for i960JT100 project: Duties Include: Designed, Simulated 5 volt tolerant buffers, Supervised 2 Engineers in doing AC timing and Noise simulation. Did Logic Validation of the Padio unit. Defined and implement ESD protection for all different Pads and Pad ring. Supervised Mask designer in doing Padio layout Member of the DFM group, Duties Include: Develop capabilities and methodologies that focus on Design For Manufacturability. Extract requirements and guidelines to insure quality and reduce cost
12/93 to 07/95 Field Service Engineer, Silicon Valley group (SVG), San Jose, CA Reasonable for installing and supporting SVG track system hardware and software tool suite used in intel state of the art Fabrication (FAB) of VLSI component. Participate in client tool training, upgrade, and maintenance
SKILLS & INTERESTS: Highly skilled professional with UNIX, windows, Microsoft office, AWK, and many IC design CAD tools, such as
o Timing verification tools Hsim, Hspice, Pspice, NanoTime, Pathmill, PLUS, primetime o Formal Verification ESP-CV(innologic), Verplex, SALT o Schematic and layout capture Virtuoso, Piglet, OPUS, SEES, Reliability tool Powermill, Railmill, Redhawk
Excellent communication skills in both English and Arabic.
References: available upon request also sample is at my profile on linkedin
http://www.linkedin.com/profile/view?id=9544679&trk=tab_pro