AVR Introduction - amoBBSd1.amobbs.com/bbs_upload782111/files_34/ourdev_595601BW1BHW.… · Copyright 2010 Atmel Confidential The 8 bit AVR core, tinyAVR, megaAVR,

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AVR Introduction

Copyright 2010 ATMEL

Less

Po

we

r

More Performance

C51

Legend

Atmel’s MCU Products

megaAVR

AVR XMEGA

tinyAVR

C51

UC3

32-bit AVR

SAM3 and SAM9

ARM

ARM11

MPU

32-bit

8-bit

Copyright 2010 Atmel Confidential

The 8 bit AVR core, tinyAVR, megaAVR, XMEGA

• Harvard architecture• Separate memories and buses for program and data

• 32x8-bit general purpose working registers

• 3 register pair act as 16-bit data pointers

• True Single-cycle operation

• Architecture and instruction set co-designed with IAR Systems

• The design process resulted in…• Instruction set with16-bit arithmetic operations

• 32 working registers eliminating data shuffling

• Single Cycle execution

• ... an optimal core for high performance and low power


Scaleable architecture

• Devices range from 1 to 256KB

• From 8 to 100 pins

• Full code compatibility

• Pin/feature compatible families

• One set of development tools


The 32-bit AVR core, UC3

• AVR UC3 offers superior CPU performance• Industry’s best 32-bit MCU DSP instruction set

• Industry’s best 32-bit MCU Floating point unit

• Industry’s only 32-bit MCU with dual-port SRAM

• Go digital – reduce system cost• Remove analog components

• Eliminate analog calibration

• Put an end to analog temperatureand voltage drift

5


Highest Data Throughput

• No high speed bottlenecks• Dual Port CPU SRAM

• Distributed peripheral SRAM

• High Speed Communication • USB up to 480 Mbit/s

• Ethernet up to 100 Mbit/s

• SPI/SSC/USART up to 33 Mbit/s

• UART up to 4 Mbit/s

• I/O pin toggle up to 33 MHz

6

User Peripherals

Peripheral BridgePeripheral DMA

Controller: 18 channels

6-layer High Speed Bus Matrix

EB

I / EC

C

SPI

x2

PDC

USB

On-The-Go

USART

x4

PDC

TWI

x2

PDC

SSC

x1

PDC

Timer

3 ch

ADC

8 ch

PDC

Audio

DAC

PDC

PWM

3 ch

32-bit AVR CPU

66 MHzJTAG/

Nexus

OCD

SRAM

64 KBInstr. Data

MPU MemIF

Fla

sh

SR

AM

32 K

B

SR

AM

32 K

B


We Work Hard so you Don’t Have to

System KnowledgeTechnology

SoftwareDevelopmentTools

Boards& Kits

SoftwareFramework

250+ IntegratedMCU Derivatives

® ®

® ®

Appnotes

®

®

ReferenceDesigns

Support

®

User Differentiation


We Most Likely Have it!

picoPower

AVR Architecture,Event System

Wide Flash Range,up to 384kB

Highly IntegratedDevices

QTouch Library

You bet!

Software frameworkAppnotes

Reference Designs

ATXMEGA32A4

ATXMEGA32C4

ATXMEGA32D4

ATXMEGA64A3

ATXMEGA64D3

ATXMEGA128A3

ATXMEGA128D3

ATXMEGA192D3

ATXMEGA256A3

ATXMEGA256A3B

ATXMEGA256D3

32 kB

64 kB

128 kB

192 kB

256 kB

384 kB

ATXMEGA Portfolio Detail

ATXMEGA192A3


- Tested & Verified Starting Point

• Peripheral drivers• Optimized drivers for all peripherals speed up development and ease migration

between AVR devices

• USB and TCP/IP stacks• 100% tested and verified stacks ready to drop into any design

• Application specific softwarebrings you half way there:• QTouch Library

• DSP library,

• Optimized audio and image CODECs

• Encryption library

• Display drivers

• FAT12/16/32 file system

• Real Time OS

Software Framework


Complete Application Platforms

• Qtouch• Push buttons• Sliders• Wheels• Enabled on all AVR MCUs• Robust, patented software library

that just works!

• Wireless• Dedicated product line with ZigBee RF wireless control

interface• Leading in low power, low cost and RF Performance

• Digital Audio, Battery management....

/ Copyright 2010 AtmelPage 11

AVR® picoPower®


Reduced power consumption in all modes

• Continous R&D effort

Run ModeUC3B

(2007)UC3 L

(2010)Change

Active 308 uA/MHz 165 µA/MHz - 46 %

RTC 25 uA 0.6 µA - 976 %

Shutdown 100 nA 9 nA -910%

Run ModeATmega168P

(2007)ATmega168PA

(2010)Change

Active 290 µA/MHz 190 µA/MHz - 34.48 %

RTC 0.80 µA 0.75 µA - 6.25 %

Power down 100 nA 100 nA -0%


AVR Operating Current

AVR Family, device Active current

1.8V VCC

Active current

3.0V VCC

tinyAVR, ATtiny10 150 uA/MHz at 1 MHz 160 uA/MHz at 4 MHz

megaAVR, ATmega48PA 150 uA/Mhz at 4 MHz 250 uA/Mhz at 8 MHz

XMEGA, ATxmega32A4 200 uA/MHz at 12 MHz 370 uA/MHz at 32 MHz

UC3, AT32UC3L064 165 uA/MHz at 50 MHz

AVR Family, device Idle current

(All peripharls and

DMA can operate and

wake device)

Powerdown current

(SRAM retention, Pin-

change or I2C address

match can wake device)

Shutdown current

(selected Pins, and

RTC if running, can

wake device)

Typ

(25C)

Max*

(85C)

tinyAVR, ATtiny10 20 uA/MHz 150 nA 2 uA N/A

megaAVR,ATmega48PA 32 uA/MHz 100 nA 2 uA N/A

XMEGA, ATxmega32A4 80 uA/MHz 100 nA 5 uA N/A

UC3, AT32UC3L064 150 uA/MHz 5 uA TBD 9 nA

*Increased current is caused by higher leakage at higher temperature


Sleep Modes

200

100


Sleep Modes: Active

200µA

200

100


Sleep Modes: Idle

30µA

200

100


Sleep Modes: Power-Save

0,75µA

200

100


Sleep Modes: Power Down

100nA

200

100


Power consumption of a CMOS device

Ptotal = Pstat + Pdyn

Pstat is tied to process

Pdyn is the one we can control


Reducing power consumption in 6 steps

1. CPU consumes ~40-80% of total chip consumption Stay in sleep modes when possible

Eliminate interrupts that wake CPU

2. Power consumption is proportional to operating frequency Control clock frequency

3. Signal transitions consume power Stop clocks to unused peripherals

4. Power consumption is exponential to supply voltage Run at as low supply voltage as possible

5. Energy is wasted during wakeup-cycle while oscillators stabilizes Select oscillators that wakes up fast

6. Leakage in transistors Shutdown (switch off power to transistors when not in use)


True 1.62V operation

• Reducing operating voltage will reduce power consumption

• AVR is fully functional down to 1.62V• ADC

• Flash

• EEPROM

• Flexible voltage supply• 1.8V ±10% (regulated)

• 1.62 – 3.6V (battery)

XMEGA A series


Peripheral Event System

• Direct routing of signals between peripherals• 2 cycle latency

• Predictable

• No lost events

• Eliminates CPU wakeups

• Examples• RTC event → ADC start conversion

• Analog Comparator → adjust PWM period


Without Event System



With Event System



• Intelligent peripherals

• Compare input value to preset threshold

• Alert CPU only when threshold exceeded

• Eliminate CPU interrupts

• Reduce CPU overhead

• Reduce power consumption in sleep modes

RTC

ADC

CPU

RAMADC RAM

CPUNormal modeStatic mode

Periodic event

wakes ADC

Temperature

below threshold:

Return to sleep

Temperature

above threshold:

Wake system

SleepWalking™ - Peripheral Intelligence


DMA controller

• Transfer data while CPU is sleeping

• One interrupt per block instead of one per byte

• Example – Transfer 200 bytes on SPI• Polled: 200 CPU interrupts

• DMA: 1 CPU interrupt


Faster wakeup

• Low sleep modes stops Oscillator

• Energy is wasted while Oscillator and PLL starts

• Example: Startup from Power Save and Power Down• Crystal Oscillator

• 16.000 cycles

• Ceramic resonator

• 258 cycles

• RC oscillator

• 6 cycles


Separate clock domains

• AVR offers multiple clock domains

• Run each domain at optimal frequency

• Dynamic clock selection and prescaling

• SW controlled individual clock gating (PR registers)


• Zero BOD power consumption in sleep

• Full BOD protection in active mode

• POR protects memory and registers

• picoPower offers full protection at 0 overhead in power

Sleeping BOD


Summary

• picoPower has become even better• Lower power consumption

• Continuous improvements

• Operates at lower voltages

• True 1.6V operation

• Powerful peripherals

• Sleepwalking

• DMA

• Event system

• Flexible sleep modes

• Flexible clocking

Documents

AVR Introduction - amoBBSd1.amobbs.com/bbs_upload782111/files_34/ourdev_595601BW1BHW.… · Copyright 2010 Atmel Confidential The 8 bit AVR core, tinyAVR, megaAVR,