16
Ava1an.c he Injection and Second Breakdown in Transistors Abstract-A rapid type of second breakdown observed in silicon n+-p-n-n+ transistors is shown to be due to avalanche injection at the collector n-n+ junction. Localized thermal effects, which are usually associated with second breakdown, are shown to play a minor role in the initiation of the transition to the low voltage state. A useful tool in the analysis of avalanche injection is the n+-n-n+ diode, which exhibits negative resistance at a critical voltage and current. A close correspondence between the behavior of the diode and the transistor (open base) is established both theoretically and experimentally. Qualitative agreement with the proposed model is obtained for both directions of base current flow. It is shown that transistors having thin,lightlydopedcollectorregions are particularlysusceptibleto avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors. I. INTRODUCTION F ROR? both a theoretical and experimental viewpoint, efforts to solve the problem of second breakdown in transistors have met with only par- tial success. Progress has been made in the area of what mightbemoreproperlycalled“thermalbreakdown.” The identification of localized thermal runaway and the associated theory [l], [Z] has led to the design of tran- sistors 131-[SI in which individual emitter resistors limit the formation of regions of high current density and substantially increase the range of power over which the device is thermally stable. In this paper, the label “secondbreakdown” is ap- plied to any abrupt reduction in collector-emitter volt- agethatoccursas collector current is increased (see Fig. 1). When second breakdown is due to thermal effects, local rises in temperature and enhanced thermal generation of carriersarelinkedto local increases in current density through a feedback loop that becomes unstable at some critical temperature. Efforts to apply similar ideas to the case where avalanche generation of carriers becomes significant have not met with notable success. At large collector voltages, transistors are still susceptible to an undesirable phenomenon, whose pre- dominant feature is the transition to a low-voltage high- currentmodeoccurring at some critical point in the collector characteristic [7], [8]. 1969. Preliminary results of this paper were reported at the Physics Manuscript received October 17, 1969; revised November 20, of Failure in Electronics Conference, Battelle Memorial Institute, Columbus, Ohio, November 1966. Development Laboratory, Palo Alto, Calif. 94304. The authors are with Fairchild Semiconductor Research and “C E Fig. 1. Collector characteristic for atransistor exhibiting breakdown, after Schafft and French [6]. For curve F, the E-B terminals are forward biased; for curve 0, the base is open; for curve R. 1:h.e E-B terminals are reverse biased. This phenomenon,which is the subject of the present paper, exhibits the following characteristics. 1) The coordinates of the transition point are inde- pendent of the duration of applied bias. 2) Transition to the low-voltage state is quite rapid compared to thermal breakdown. The “delay time” defined by Schafft and French [9] is quite small and is usually determined by the external circuit. In addition, silicon n+-p-n-nf transistors (epitaxial collector) are particularly susceptible to this phenom- enon. In this paper we demonstrate that this rapid type of second breakdown is due to avalanche injection occur- ring a.t the collector n-n+ junction. The high-field region required for avalanche generation of carriers is located in a thin space-charge layer at this junction. In Section 11, avalanche injection is described for the case of both n+-n-nf diodes and n+-p-n-n+ transistors. It is shown that the diode can serve as a useful model for predicting transistor behavior at the onset of ava- lanche injection. In Section 111, the theory of avalanche injection is verified experimentally for diodes having plane-parallel contacts. Care is taken in the experiments to keep the temperature of the active region to a value less than that needed for significant thermal generation. Section IV consists of an experimental verificationof

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Page 1: Avalanche injection and second breakdown in transistors

Ava1an.c he Injection and Second Breakdown in Transistors

Abstract-A rapid type of second breakdown observed in silicon n+-p-n-n+ transistors is shown to be due to avalanche injection at the collector n-n+ junction. Localized thermal effects, which are usually associated with second breakdown, are shown to play a minor role in the initiation of the transition to the low voltage state. A useful tool in the analysis of avalanche injection is the n+-n-n+ diode, which exhibits negative resistance at a critical voltage and current. A close correspondence between the behavior of the diode and the transistor (open base) is established both theoretically and experimentally. Qualitative agreement with the proposed model is obtained for both directions of base current flow. It is shown that transistors having thin, lightly doped collector regions are particularly susceptible to avalanche injection, which suggests that some compromise may be necessary in the design of high-frequency power transistors.

I. INTRODUCTION

F ROR? both a theoretical and experimental viewpoint, efforts to solve the problem of second breakdown in transistors have met with only par-

tial success. Progress has been made in the area of what might be more properly called “thermal breakdown.” The identification of localized thermal runaway and the associated theory [l], [ Z ] has led to the design of tran- sistors 131-[SI in which individual emitter resistors limit the formation of regions of high current density and substantially increase the range of power over which the device is thermally stable.

In this paper, the label “second breakdown” is ap- plied to any abrupt reduction in collector-emitter volt- age that occurs as collector current is increased (see Fig. 1). When second breakdown is due to thermal effects, local rises in temperature and enhanced thermal generation of carriers are linked to local increases in current density through a feedback loop that becomes unstable a t some critical temperature. Efforts to apply similar ideas to the case where avalanche generation of carriers becomes significant have not met with notable success. At large collector voltages, transistors are still susceptible to an undesirable phenomenon, whose pre- dominant feature is the transition to a low-voltage high- current mode occurring a t some critical point in the collector characteristic [7] , [8].

1969. Preliminary results of this paper were reported at the Physics Manuscript received October 17, 1969; revised November 20,

of Failure in Electronics Conference, Battelle Memorial Institute, Columbus, Ohio, November 1966.

Development Laboratory, Palo Alto, Calif. 94304. The authors are with Fairchild Semiconductor Research and

“C E

Fig. 1. Collector characteristic for atransistor exhibiting breakdown, after Schafft and French [6]. For curve F, the E-B terminals are forward biased; for curve 0, the base is open; for curve R. 1:h.e E-B terminals are reverse biased.

This phenomenon, which is the subject of the present paper, exhibits the following characteristics.

1) The coordinates of the transition point are inde- pendent of the duration of applied bias.

2) Transition to the low-voltage state is quite rapid compared to thermal breakdown. The “delay time” defined by Schafft and French [9] is quite small and is usually determined by the external circuit.

In addition, silicon n+-p-n-nf transistors (epitaxial collector) are particularly susceptible to this phenom- enon.

In this paper we demonstrate that this rapid type of second breakdown is due to avalanche injection occur- ring a.t the collector n-n+ junction. The high-field region required for avalanche generation of carriers is located in a thin space-charge layer a t this junction.

In Section 11, avalanche injection is described for the case of both n+-n-nf diodes and n+-p-n-n+ transistors. I t is shown that the diode can serve as a useful model for predicting transistor behavior at the onset of ava- lanche injection. In Section 111, the theory of avalanche injection is verified experimentally for diodes having plane-parallel contacts. Care is taken in the experiments to keep the temperature of the active region to a value less than that needed for significant thermal generation. Section IV consists of an experimental verification of

Page 2: Avalanche injection and second breakdown in transistors

HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRANSISTORS 32 1

the transistor-diode correspondence with the transistor operating in the open-base mode. In Section V, i t is shown that transistor behavior for Ig#O is also quali- tatively consistent with the diode model.

11. A DESCRIPTION OF AVALANCHE INJECTION I N

n+-n-n+ DIODES n+-p-n-n+ TRANSISTORS AND

The original theory of avalanche injection was devel- oped by Gunn [lo], and with certain extensions, it has been reasonably successful in explaining the I - V char- acteristics of small-area germanium and silicon nf-n-n+ diodes [ l l ] , [12]. As in the case of the more routinely observed avalanche breakdown, avalanche injection is a manifestation of the process of avalanche generation of carriers within a high-field region. In the case of avalanche breakdown, the electric field is determined by the fixed charge of the impurities (which is usually large compared to the charge contributed by the car- riers) and by the width of the depleted region. I n the case of avalanche injection, the space charge is not due to fixed impurities but is built up from the charge of mobile carriers. Therefore, the charge density p is not constant, but instead is a function of both the current density J , and the space variable x.

The added degree of freedom contributed by the J-dependence of space-charge density can have rather drastic consequences as far as the I - V characteristics of devices are concerned. For a transistor, the most impor- tant effect is that the device can switch to a low-voltage high-current mode a t some critical value of collector current and voltage.

In this section we describe the effects of avalanche injection in n+-n-n+ diodes and n+-p-n-n+ transistors. The diode is included because i t is a useful model for both theoretical and experimental study of the effect of high-current density in transistors.

A . Diode I - V Characteristic Because avalanche injection leads to a current-con-

trolled negative resistance, that is, an S-shaped I -V characteristic, it is preferable to view the diode as being driven by a current source, as shown in Fig. 2. The posi- tive contact, which turns out to be analogous to the collector of a transistor, is at the left of the diagram.

A t low currents a diode with contact area A will ex- hibit a resistance Rot given by

Ro = L/qW,SDA (1)

where L and N o are the thickness and donor density of the n region. In contrast to the hemispherical case con- sidered by Gunn [ lo] and also Gibson and Morgan [ l l ] , we assume that the n+ regions form plane-parallel boundaries to the n region.

As the current is increased, a value of electric field will be reached for which the mobility pLn can no longer

d n + l n l n + h

I

Fig. 2. Terminal definitions for the diode.

be assumed constant. For electrons in silicon this field is approximately 104 V/cm, and for larger fields, the drift velocity v d tends to saturate at a value 2 1 1 , which is approximately lo7 cm/s. Due to transit-time effects,’ the diode current will not show the same tendency to saturate as does the drift velocity, and for current densities larger than the value J o = q v l N ~ , charge is necessarily stored within the n region. The resulting space-charge density is negative and nearly constant a t

p qAVo - J/‘dl (2)

throughout the n region. (For the diodes to be discussed in this paper we can assume that J is entirely due to drift, and the effect on terminal voltage due to diffusion at the n+-n junction can be ignored.) With (2 ) and using Poisson’s equation, i t is a simple matter to show that the slope of the characteristic in the saturated drift velocity range is given by

d l

dV -- - 26vlA/L2.

Thus the characteristic will have the general features shown in Fig. 3. For a particular terminal voltage V (beyond the “knee” of the characteristic), the diode current can be treated as the sum of Io( = JoA) and a “space-charge limited” component I S C L . The component that dominates is determined by the values of V , N o , and L.

The analysis is simplified if we consider only the two extreme cases, that is, the “SCN” case, where current is flowing in a region that is space-charge neutral, and the

ratio of dielectric relaxation time to transit time is a small number. In the equation J=pnvd, one can assume n = n 7 D only if the

For fields less than lo4 V/cm this ratio is

where V is the terminal voltage. For fields greater than 104 V/cm, it is necessary to use the “differential dielectric relaxation time” [13] in this equation, which gives

If TrelaX is much larger than Ttraosit, n will exceed N D , and the current- voltage characteristic will be determined by the effects of space charge in the n region. In this case the current is said to be ‘‘space- charge limited.”

Page 3: Avalanche injection and second breakdown in transistors

322 IEEE TRANSACTIONS O N ELECTRON DEVICES, APRIL 1970

I / v

Fig. 3. Diode I-V characteristic.

“SCL” case, where N o and L are small enough so that I N I S C L , at the particular V of interest. This classifica- tion of N o and L is used because i t is a simple matter to estimate the peak electric field for each case.

The I -V characteristics and field profiles for diodes approximating the SCK and SCL cases are shown in Fig. 4. For an SCK diode the electric field is uniform and is given by E = V / L . For an SCL diode the charge density is approximately constant a t p = - J / v l , which says that the field will be linearly decreasing in x. In the vicinity of the negative contact at x = L , there will be a region where E ( x ) decreases below the value required for velocity saturation, and here the assumption of con- stant charge density is no longer valid. Since we are interested in determining diode behavior for values of electric field well beyond the onset of velocity satura- tion, we can neglect the voltage drop across this “low- field” region and approximate the peak field by E ( 0 ) ~2 V / L for the SCL diode.

As the current is increased, a point will be reached where the maximum field in the diode enters the range where avalanche generation becomes significant. I t is a t this point that the mechanism of avalanche injection begins to affect the terminal properties of the diode. I n this paper we assume that avalanche injection begins when the peak field reaches some critical value E,, where E , is defined as the value of peak field for which the probability of ionization over the n region reaches some small threshold 6. This means that when E(0) =E,, we have

(4)

where a, is the electron ionization coefficient. For the SCN diode, which has a uniform field, the

criterion reduces to an(E , )L= 6. Because a,(E) in- creases very strongly with E , E , is a weak function of both the threshold condition 6 and the n region length. For example, if 6 =0.01 and L = 1 cm, then an(Ec) = 10 cm-I. Using Ogawa’s data [I41 for a,, this gives E , = 1.2 x lo6 V/cm. If 6 is increased (or L is de- creased) by an order of magnitude, E , increases only slightly to 1.5 x 105 V/cm. Using a similar argument one can also show that E , will be approximately the same for both the SCN and SCL diodes. Therefore, through-

+- L X

L X

(C) ( d l Fig. 4. (a) Diode I-V characteristic. (b) Field profile for an SCN

diode. diode. (c) Diode I-V characteristic. (d) Field profile for an SCL

out the remainder of the paper, me assume that E , is independent of N D and L.

As the current increases beyond the value for which E ( 0 ) =E,, a significant change takes place in the charge distribution within the diode. This change is due to the presence of holes which have been generated by the avalanche process. The charge density for the case of an SCN diode with E ( 0 ) > E , is shown qualitatively in Fig. 5 . The holes will drift toward the negative contact, where their positive charge is easily neutralized by in- jection of electrons from the n+ contact. At the positive contact, the hole density must be zero (the n+ contact cannot inject holes) and the current at this point is made up entirely of electrons. Thus at x = 0 the charge density is negative and proportional to J . As x increases toward x = L , the magnitude of the charge density de- creases, both E and a decrease, and an increasing por- tion of the current is carried by holes. Using the analogy of a forward biased p-i-n diode, one can view the holes in the small a region as being “injected” by the ava- lanching region.

An exact solution of the avalanche injection problem is rather complicated; however, we can give a useful picture of the physical behavior of the diode using the following assumptions.

1) Recombination is negligible throughout the n

2 ) The density of thermally generated carriers is

3) Electron and hole ionization coefficients are equal

4) Electron and hole drift velocities are equal and

region.

small compared to No.

(a,=a,=a).

constant (v, = v, = 2 1 1 ) .

I t is convenient to divide the region at the point X I ,

where ,?(xl) =E,. The nonavalanching portion will be denoted as ‘(region 1,” for which a = 0, x l<x<L, and

Page 4: Avalanche injection and second breakdown in transistors

HOM‘ER A S D R E D D I : AV.4LANCHE INJECTION AND SECOND BREAKDOWN I N TRANSISTORS 323

p t

Fig. 5. Charge density profile for a n S C S diode with E(O)>E,.

E 5 E,. Similarly, “region 2” is defined by a > 0, E > E,, and 0 5 % <xl (see Fig. 5 ) .

Throughout both regions the current density is given by

J = Jn + Jp = qvl(n + p ) . ( 5 )

Since we are ignoring thermal generation and recom- bination, the continuity equations take the form

(6)

for electrons and

d J P - = aJ dx

for holes. The boundary conditions for (6) and ( 7 ) are J p = Q and J n = J a t x = 0 .

The “primary carriers” are electrons which enter re- gion 2 a t x1 and contribute the current density J,(xl). As a result of avalanche multiplication, this current is increased to MJ,(xl) a t x = O , where the multiplication factor is defined as the ratio of exit and entrance electron currents. Integrating (6) gives

The hole and electron currents are related by

1 - Jn(xl) /J = Jp(Xl)/J = a(E)dx. so=1 (9)

At the onset of avalanche injection, the ionization integral of (9) is equal to the threshold value 6 , and M g l + 6 . As J increases, M will increase; but in con- trast to avalanche breakdown of a depleted region, where M-+ as J--t 30, the corresponding limit here is M = 2 .

This limit on M can be derived by considering the relationships between current densities, charge, and field in region 1 . The maximum charge density in this region is limited by the change in field from x=L to x = X I . Integrating Poisson’s equation for region 1 gives

As described below, x1 approaches zero a t large J ; therefore the difference of n and p in region 1 must re-

J t

(c) ( d l Fig. 6 . (a) Charge density, (b) field, and (c) carrier density profiles

for an SCN diode at J = J1 (dashed curves) and J = J z (solid curves). (d) Current density versus voltage.

main finite as n, p , and J become infinite, and in the limit J , ( x l ) / J = J p ( x l ) / J = $ and

Sozla(E)dx = 3,

which then gives M= 2 from (8). In Fig. 6(a), (b), and (c) we show qualitatively the

charge, field, and carrier density profiles for an SCK diode. The profiles are shown for two current densi- ties with the first value J1 slightly greater than J O ( J 1 = 1.2 J o ) , and a second value J ~ = 2 . 4 J o .

At the onset of avalanche injection, the field through- out the n region will be uniform, and for J = J1, only a slight deviation from the uniform case occurs. As J increases, the increased carrier density in region 1 will allow space-charge limited current to dominate, and the field profile will become linear in region 1; for example, see Fig. 6(b).

If space-charge neutrality held in region 1 , i t would follon. that

M = 2J/(J + Jo). (11)

If p in region 1 is negative, as for the case of J = J z , then M will be slightly less than the value predicted by (1 1). In either case, the ionization integral must increase with J .

The field profile in region 2 is determined by a ( E ) , Poisson’s equation, M , and the boundary conditions on p . Increasing current density will require the field profile to be more steeply sloped, but because a ( E ) is such a strong function of E , only slight increases in

Page 5: Avalanche injection and second breakdown in transistors

324 IEEE TRASSACTIONS ON ELECTRON DEVICES, APRIL 1970

E ( % ) are needed to give the required value of M . Thus as J increases, the peak field increases, x1 decreases, and the voltage drop across region 2 decreases, as shown in Fig. 6(b). In the limit, as J+ 00, the voltage drop across region 2 approaches the threshold value required for ionization [ l j ] ( g 2 volts) and the voltage across region 1 approaches E,L/2. Thus the current density versus diode voltage curve will have the appearance of Fig. 6(d).

The point of the I - V characteristic lj-hich corresponds to the onset of avalanche injection will be called the “turnover point” with coordinates ( V T , IT). For an SCN diode

V T = E,L ( 1 2 ) J T = Jo = q%’iAVD (13)

and for an SCL diode

TIT = E,L/2 (14) JT = CV~E, /L . ( 1 5 )

For the case of uniform current density in an SCN diode, i t is the decrease in voltage across region 1 from E,L to E,L/2 that contributes the negative resistance. In an SCL diode the field profile is already linear when E ( 0 ) =E, , and therefore this diode shows no negative resistance.

An actual diode will be neither purely SCN nor SCL, and in general, E,L/2 < I;T< E,L. The dividing line between the t\vo cases can be estimated by setting (15) equal to (13) lvhich gives

E NDL = - E,. (1 6 )

q

For E,= 1 X105 V/cm, ( 1 6 ) gives N ~ L g 6 X l o ’ l cm-2. Thus if N~L<<6X10l l cmP2, the diode can be assumed to be of the SCL type. If N&>>6 X 10” cm-2, the SCN results apply. For in-between values of N D L , a rough approximation to J T is the sum of ( 1 3 ) and ( 1 5 ) . In Fig. 7 we have shown qualitatively the dependence of the I - V characteristic on N D and L . Experimental ex- amples of these characteristics will be discussed in Sec- tions I11 and IV.

An actual diode will differ from the behavior just described in two respects. In silicon, a,>ap, and there- fore assumption 3 above is not strictly correct. The most important result of this inequality is that E, for silicon n+-n-n+ diodes will be less than that for p+-p-p+ diodes. Beyond the onset of avalanche injection, a,> ap will introduce only slight changes in the required M values. This will not drastically alter the dependence of voltage on current density.

The second deviation is that for an actual diode, the current density can be assumed to be uniform only up to the “knee” of the I-V characteristic, that is, the turnover point. For currents larger than IT , the voltage is usually observed to switch abruptly to a value in the range of 10 to 20 volts. From the work of Gibson and Morgan [ l l ] and Muller [ 1 6 ] , i t is quite reasonable to assume that once avalanche injection begins, the cur-

J t Jf

I 1 No FIXED

I , L FIXED

EcL/2 EcL

(a) (b) Fig. 7. The effect on the diode characteristic of (a) varying L

and (b) varying ND.

rent becomes localized to a thin filament typically less than one micron in diameter. Thus the current density will switch abruptly from a value slightly greater than J T to a value many times J T , with little change in ter- minal current. Under the condition of filamentary con- duction, the voltage across region 2 will decrease to a few volts, and the voltage across region 1 mill usually decrease to values much less than E,L/2, because of current spreading effects. This problem is discussed in more detail in the Appendix.

For the practical application of using the diode as a model to predict transistor behavior, we need not be greatly concerned about the high current density, low- voltage state, since we are primarily interested in be- havior up to and including the turnover point. For cur- rents less than IT we can assume J to be uniform in the diode, provided the smallest contact dimension is large compared to L .

B . Transis tor Characteris t ic (Base Open) Uniform current density in the transistor is more

difficult to achieve, even with Ig = 0, because here the current density is subject to nonuniformities in collector multiplication and emitter efficiency not present in the diode case. However, for the discussion of this section, we do assume uniform current density in the transistor up to the turnover point.

The transistor 1-1’ characteristic is dictated by the requirement that M a C E = 1 , where, according to the usual notation, a C E is the ratio of the electron current at the base edge of the collector-base depletion region to the total emitter current, and :II is the (electron) multiplication factor for the collector-base depletion region. Throughout most of the collector current range up to IT we can assume that QCE is reasonably close to unity, although at very small values of collector current a negative resistance will appear (not sholvn in Fig. 1) due to the decrease in CYCE as Ic+O. At larger currents, M will be a number slightly greater than unity and will be determined to a large extent by the peak electric field within the collector-base depletion region.

For the conditions we have described, nearly all the current throughout the transistor is carried by electrons,

Page 6: Avalanche injection and second breakdown in transistors

HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRANSISTORS 325

EMITTER I BASE 1 COLLECTOR

n+ I P I n I n+

Fig. 8. Transistor field profile for various current densities.

and the space-charge density in the n region, given by pN,- J/ol , is decreasing as IC increases. According to Poisson’s lalv, the field profile over the n region must then change from a trapezoid (or a triangle for large enough L ) a t low currents to the nearly rectangular shape sho\\-n in Fig. 8. (To conform with the usual rep- resentation of a transistor, the collector has been placed at the right of the diagram.) As J increases to J o , the area under the field profile increases and the I - I / char- acteristic shows a positive resistance.

Suppose J is increased to a value slightly greater than Jo . I t is clear that the space-charge density will be nega- tive near the nf substrate, since the hole density there must be zero. Thus the field profile has a negative slope near the substrate. Throughout the rest of the n region the shape of the field profile depends upon xvhether or not the region will support a significant component of (electron) space-charge limited current. At first we con- sider the case where N D L is large enough (say, 6 X 10l2 cm-2 or greater) so that space-charge limited current can be neglected. Then, as J exceeds Jo the magnitude of electric field at the substrate must exceed the value corresponding to J = Jo in order to give the correct value for M . As a result, the location where most of the holes are generated has shifted from the collector-base junction to the n-n+ junction at the substrate. The field profile for this situation ( J > Jo) is indicated in Fig. 8.

As J passes through the value J o , the transistor field profile becomes almost identical to the field profile for an n+-n-n+ diode at the onset of avalanche injection. For J > Jo, the transistor will also exhibit negative resistance due to avalanche injection. For very large current densities, where the carrier densities exceed the base acceptor desnity, the diode and transistor will also show similar field profiles. In this case, CYCE+$ and M + 2 . For current densities greater than Jo, but not large enough to cause a significant decrease in CYCE, the diode and transistor behavior \\-ill differ, because in this range the transistor base is still exerting some control over hole current.

As a practical matter, this intermediate current range is not particularly important, since, just as in the case of the diode, filamentary conduction occurs at the onset of avalanche injection, and the transistor voltage she\\-s an abrupt decrease to a value typically in the range of 10 to 20 volts.

_i ‘,d?:.; t--

nf

Fig. 9. Cross section of diode used in experiments of Section 111.

The most important link between the diode and the transistor is that as J exceeds J o , the field profiles in the two devices will be approximately the same. Thus if the t\vo n regions have the same doping and length, the turnover points for the tn-o devices will also be the same. Experimental data x\-hich confirm this corre- spondence are given in Section IV. The SCL case where the transistor N D L < < ~ X cm-* is also discussed in that section.

111. EXPERIMENTAL R ~ E A S U R E M E N T S OF n+-n-n+ DIODES

This section describes measurements performed on a number of diodes having the cross section shown in Fig. 9. The n region is formed by epitaxially growing an n- type film on an n+ substrate, the latter acting as one contact to the n region. The remaining contact, an n+ “dot,” is formed by phosphorus diffusion using standard photomasking techniques. The configuration shown is desirable when L is much less than the substrate thick- ness, which is the case for all diodes described here.

For a given film, the power generated at the turnover point will be proportional to the area of the dot. Be- cause the heat flow is three-dimensional, thermal resis- tance is inversely proportional to dot diameter. Thus for the steady-state case, the temperature of the n region at turnover will be proportional to dot diameter. There- fore, to minimize thermal effects, D should be small. Hon-ever, D must not be so small as to prevent the assumption of one-dimensional current flow; that is, D y 3 L should hold. Furthermore, D must be large enough to avoid difficulties in fabrication. By using the overlay scheme shown in Fig. 9, a large enough pad diameter (3 mils) is available for external contacting, while D can be held to values of approximately 1 mil. Contact is made to the aluminum pad by ball bonding a gold wire.

A . Elec tr ica l Measurements and Trans ien t Thermcd Considerat ions

Fig. 10 shows a measured I-I.’ characteristic for a diode nith No =2.5 X 101j ~ m - ~ and L = 5.4 microns. The space-charge limited component of current is sig- nificant for this doping and thickness, and the 1-1 ’ characteristic shows a significant slope up to the turn- over point. As expected, all diodes exhibited a sym- metrical characteristic and showed no dependence on the time taken to reach the turnover point. Practically the same curve \\-as obtained using a conventional curve tracer or the test circuit of b-ig. 11. For the latter cir-

Page 7: Avalanche injection and second breakdown in transistors

326 IEEE TRASSACTIOSS OS ELECTROS DEVICES, APRIL 1970

0 2'5 V l v a l t s )

Fig. 10. Measured I-V characteristic for a diode. L = 5 . 4 pm, N ~ = 2 . 5 X l O ~ k r n - 3 .

0 50 v ( v o l t s )

Fig. 12. Measured I-V characteristic of the diode of Fig. 10 at case temperatures of 77OK (upper curve) and 300OK.

L J L C 16.7 m s 4

- i Fig. 11. Pulsed current source test circuit.

cuit the duration of the ramp mas adjustable from 1 p s to several ms.

The fact that the I- Vcharacteristic is independent of pulse time is convincing evidence that thermal effects are not contributing to the turnover process. Confirma- tion of this fact can be seen from the follolving experi- ment. For the same diode of Fig. 10, the characteristic \vas measured a-ith the case a t both room and liquid nitrogen temperatures, as sholvn in Fig. 12. For these curves the pulse ramp \\-as adjusted so that turnover occurred approximately 0.5 p s after initiation of the ramp. For times this short a considerable portion of the total heat flow is used to raise the temperature of the gold ball bond. This complicates the thermal picture somewhat, but a precise calculation of the temperature of the n region is not necessary for this discussion. We need only show that the temperatures reached at turn- over are considerably less than the intrinsic tempera- ture, for which ni(7') = No. For the diode of Fig. 10, this temperature is approximately 300°C.

For simplicity, let us assume that a step of power T I T I T is applied a t t = 0 , and that heat flows into an infinite hemisphere of silicon. Then the temperature at the radius D / 2 and after a time t can be found using the results of Goldenberg's analysis [ 17 ] . For a 1-mil diameter dot, the temperature at t = O . j p s is found to be2

Lvhere the power J'TIT has the dimensions of u-atts.

teristics of silicon: thermal diffusivity, k = 0 . 7 4 cmz/s; thermal The following values have been used for the thermal charac-

conductivity, K = 1.3 watt/cm O C .

Since the pon-er is applied gradually and since there is a significant flow of heat to the ball bond, this calculation n-ill overestimate the true temperature of the n region.

The temperature difference A T , between the n region and the case, must then obey the following inequality:

AT < 1 9 ( l / ~ I ~ ) = 38OC

for the 25°C curve of Fig. 12. The thermal conductivity and specific heat of silicon change with temperature in such a way that the temperature rise for the liquid nitrogen curve will be even less than that given by (17). Thus for both temperatures ni will be many orders of magnitude less than N D and it is clear that the observed negative resistance cannot be due to thermal genera- tion of carriers.

B. Comparison with the Avalanche Injection ilfodel Although the behavior exhibited in Fig. 1 2 cannot be

explained using a thermal model, i t is consistent with avalanche injection theory. Because the ionization co- efficient is greater a t liquid nitrogen temperatures than a t room temperature [18], the critical field E, will de- crease slightly with temperature, explaining the ob- served decrease in V T .

As mentioned previously, the slope of the I-V curve prior to turnover is due to electron space-charge limited current. As noted in Section 11, this slope is given by

~ d l = 2Acz!l/L2. dV

The curves of Fig. 12 show that d I / d V increases by approximately 15 percent a t the lower temperature, which is consistent with the temperature behavior of v z 1191. For the diode under consideration, A =6X10-6 cm-2 and L= 5.4 microns, so that (18) gives d I / d V = 0.43 mmho, using vl= 1 X lo7 cm/s ( T = 25°C). From Fig. 12, d I / d 1/=0.41 mmho, which is in good agree- ment with the calculated value.

To check the dependence of VT on L, diodes were made from n/n+ wafers having different film thick- nesses. The results are plotted in Fig. 13. These diodes had large N D L values and exhibited a saturating type of characteristic. For this reason the measured points lie fairly close to the line VT = E,L.

The results for diodes made from four different wafers are tabulated in Table I according to increasing NDL

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HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRAKSISTORS 327

TABLE I PROPERTIES OF n+-n-n+ DIODES

I I I I

Diode 1VD L (cm-3) ~ (microns) (cm-’)

-- AD-1 linear 7 X loi4 10 7 X 10” AD-2 AD-3 ~ sa;%?ng ~ 2 X 10’6 ~ 11

2.5X10i5 5 .4 1 1.35X1012

A D 4 saturating 3.5X 10’6 12.8 1 4.5X1012 1 2.2X10’2

I60 I I I I I I I

6o t / i 4 0 1 / -I

‘0 2 4 6 8 10 12 14 16 L (microns)

Fig. 13. VT versus L. The solid line is drawn for E,= 1 X 105 V/cm.

values. The donor density is computed from low-voltage resistance measurements using (1). Throughout the range of NDL used, the data show that I T ~ I T ( S C - \ T ) +IT(SCL) is a reasonable approximation. As expected, VT moves in the direction of E,L/2 as NDL decreases from 6x10“ cm-* and toward E,L as NDL increases above this value.

For currents greater than IT , the measured I- V char- acteristic usually exhibits a discontinuity, and V abruptly decreases to a low value, sometimes called the “sustaining voltage.” For example, the diode of Fig. 10 shows a sustaining voltage of approximately 20 volts. As noted in Section 11, the one-dimensional model for region 1 current flow predicts that the sustaining voltage should always exceed E,L/2. For the diode of Fig. 10 this limit is not obeyed, since E,L/2 = 27 volts, and, in general, sustaining voltages are observed that are less than the value E,L/2. This is particularly true a t large values of current, say I ~ l O O mA. As noted in Section 11, these low voltages are very likely due to the formation of a current filament with a radius much less than L. The current flow in region 1 then becomes radial and the resulting value of V I will be about 5 to 10 volts, depending on the filament radius, NO, and L. Since V2 is also in this same range, the terminal voltage at large currents normally falls within the range of 10 to 20 volts.

IV. APPLICATION OF THE DIODE ~ Z ~ O D E L TO TRANSISTORS

This section describes an experimental check of the idea advanced at the beginning of Section 11; namely,

6 . 2 1 6 . 7 1 12.9 18 ’ 60 50 11 .5 24 ’ 35.5

19 24.7 1 4 .9 30 1 34 .9 28 130

EMITTER AREA: 0 . 5 x 2 m l I

L n

n’ n+

Fig. 14. Device cross sections for the transistor-diode experiment.

when avalanche injection begins a t the collector n-n+ junction, the transistor becomes electrically identical to an n+-n-n+ diode.

For the experiment, transistors were made on one half of a wafer and diodes on the other half, n.ith cross sections as shown in Fig. 14. The same mask was used for diffusing the diode n+ contact and transistor emitter. Both devices were subjected to the same processing steps, with the exception that the base impurity deposi- tion steps were omitted for the diode. This means that L for the transistor is reduced from the value for the diode by the base width, which is approximately one micron. Since the film thickness is approximately 10 microns, VT for the diode should be about ten percent larger than VT for the transistor; however, L is also subject to some variation over the wafer due to film growth conditions. For this reason, a precise comparison of VT values is not warranted.

A . I- V Characteristics, IB = 0

The half-diode half-transistor experiment was per- formed with three wafers having epitaxial films of ap- proximately the same thickness but of various donor densities. The I - V characteristics for the transistors and diodes are shown in the double exposure photographs of Fig. 15. All measurements were made using the pulsed current source of Fig. 11. The duration of the current ramp is approximately 20 ps. Curves (a), (b), and (c) of Fig. 15 correspond to wafers A , B , and C, where the listing is in the order of increasing NDL product.

The diode I-V characteristics, which are the upper curves, show the predicted behavior with No (see Fig. 7). Measured values of VT and IT for the diodes show good agreement with the values computed from the theory of Section 11-A (see Table 11).

From the discussion of Section 11-B, me would expect the diode and transistor characteristics to differ up to

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32s IEEE TR.lSS.4CTIOSS O S ELECTROS DET'ICES, .IFRIL 1970

TABLE I1 RESULTS OF THE TIUKSISTOR-DIOE'E EXPERIMENT*

-~ .~ __ _______________ ~ _ _ _ _ _ _ _ _ I Calculated

\Yafer Lv.G L

I

Diode IT Diode VT Transistor .IT Transistor VT IT(SCN)+ (~n1-3) i (microns) 1 Characteristic ~ (volts) 1 (mA) 1 (volts) IT (SCL)

~ (mA4)

x 7 x 1014 linear 26 63 25 I 6.3 2 x 1015 mixed 33 I 92 B

19

C 7X10I5 ~ 9 saturating ~ 110 78 ~ 107

* Emitter area=8.7X10-6 cm2.

' t n n+ I COLLECTOR

( B A S E ) (SUBSTRATE)

A B c

10 10 2 x 10'5

7 X lo1'

9 7 X 10l6

Fig. 15. I-V characteristics (obtained from double exposures) for the transistor-diode experiment. (a), (b), and (c) correspond to wafers A , B , and C, respectively. In every case the diode charac- teristic is the upper curve.

turnover point. At this point, avalanche injection begins and the characteristics should coincide. The shape of the transistor characteristic prior to turnover is determined by the effect of current-dependent space charge in the collector region together with the requirement that crcsM= 1. This subject is discussed further in part B of the present section.

For the transistor, the turnover point is taken to be \\.here the measured characteristic exhibits an abrupt discontinuity. L'T and IT for the transistors are listed in Table 11. The agreement between both coordinates of the turnover point is excellent for devices made from n-afer A . For B and C devices, the VT values show good agreement, while for both wafers, IT for the diode ex- ceeds the transistor IT. This latter disparity is not sur- prising since, as we have noted previously, the transistor

Fig. 16. Behavior of the field profile for a transistor with N D L - ~ X 10" cm-*.

current density is subject to nonuniformities not present in the diode.

The transistor curves of Fig. 15 change quite drasti- cally with film doping, and for transistors A and C the I -V characteristic is quite different from that shown in Fig. 1. This variation with N , is not anomalous, and can be easily explained by extending the discussion of Section 11-B.

B. Collector Space-Charge Efects for IC< IT First n-e consider the "preliminary" negative resis-

tances region exhibited by transistor A . At currents less than IT, the magnitude of the peak electric field in the n region is approximately "locked" a t a value E, de- termined by the condition C Y C E M = l . Since LICE is slightly less than unity, we can expect E , to be about equal to E , from the argument of Section 11.

For IC> Io( = pvJV,A), space-charge effects play an important role in the collector region. The requirement that dE/dx decreases with increasing current and the fact that the depletion region is bounded by the n+ substrate, dictate that the field profile behave as shown in Fig. 16. Here the n+ collector is on the right and CYCE

is taken to be constant. As I C goes from zero to IO, the E(%) curve flattens as shown. For Ic>IO, E ( x ) must have a negative slope and the field profile slopes toward the base with the value at the n-n+ boundary fixed near -E,. T h u s the area under the E ( x ) curve will decrease from its I C = I o value and a negative resistance will appear at the C-E terminals forecurrents less than the value needed for avalanche injection. As IC increases, the voltage will continue to decrease to approximately E,L/2, for which I C = IT(SCL). For larger currents,

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HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRANSISTORS 329

avalanche injection occurs and both transistor and diode curves show an abrupt decrease to approximately 45 volts. This value is quite close to the value E,L/2 = 50 volts, the sustaining voltage predicted for the one- dimensional model in Section 11.

For devices made from wafer A , 1 0 is calculated to be about 8 mA. This value agrees well with the beginning of the transistor negative-resistance region observed at about 5 to 7 mA. For the B devices IO is calculated to be approximately 23 mA. Again this agrees well with the observed transistor current ( s 2 0 mA) a t which negative resistance becomes apparent.

Although L is approximately the same for both de- vices A and B , VT has increased from about 60 to 80 volts. This is expected, since the role of electron space charge is less important for the B devices, and VT will be closer to the value E,L (= 100 volts).

For devices made from wafer C, Lis approximately the same as in the previous cases, but now No has increased to the point where reachthrough does not occur at low currents. As current is increased dE/dx must again decrease, but now the depletion region is free to expand into the n region. Therefore, for transistor C, the area under the E(%) curve increases with current and there is no preliminary negative-resistance region. The transis- tor I-V curve shows a discontinuity in slope a t about 20 mA. At this point, the space-charge region has reached the n+ substrate. For larger currents, the depletion region is bounded, and the area under the E ( x ) curve grows less rapidly with current. As a result, the slope shows an abrupt change.

Transistor C, which has a large value of N D L , shows no preliminary negative resistance because its n region will not support a significant component of space- charge limited current. Thus if negative resistance in a transistor is to be avoided at currents less than I T , NDL must be several times 6X 1011 cm-2.

V. TRAKSISTOR OPERATING IOD DES

In the previous section, we examined the behavior of transistors operating with the base open. In this section, i t is shown that qualitative agreement between experi- ment and the avalanche injection model is also ob- tained for the case where I5 # O . Current flowing into the base terminal is defined to be positive.

A . IB>O The measured collector characteristic for transistor B

is shown in Fig. 17. This curve was obtained using a conventional curve tracer with the transistor being well heat-sunk. Note that the turnover voltage V F ( 1 5 ) de- creases with increasing base current, while the turnover current I T ( I B ) increases. This behavior of the turnover point was observed for all three transistors, and can be explained as follows. Consider the case of fixed I B with I c ( IB)>IT(O) . Then, even at small V C E , the field profile in the n region will have a negative slope. As V C E is increased, the magnitude of the field a t the collector

Fig. 17. RIeasured collector characteristic for transistor B I B is in 0.1 mA steps.

L I I

+ C E

Fig. 18. Behavior of the field profile with I S , for IB>O.

n-n+ junction, 1 E ( L ) 1 , increases until I E ( L ) I =Ec. At this point V C E ~ V T ( I B ) and the transistor will exhibit a negative resistance due to avalanche injection. For a larger I,, I C increases, the field profile has a steeper slope, and turnover is reached a t a smaller VCE than for the first IB. This situation is illustrated in Fig. 18.

B. IB<O The reverse base current mode is the most critical

from the practical standpoint of avoiding the high- current negative-resistance regions of the collector characteristic. We shall now consider the case where a resistor R is connected from base to emitter and a current source is applied from collector to emitter. The base current is given by

I C 0 ( a C E M - 1) I - - - - I 5 - C (19) W E a C E M

for the particular sign convention that has been chosen. ICO is the collector leakage current and is negligible for the cases of interest. Strictly speaking, iZ/I can be non- uniform over the collector-base junction [20], [21], especially for shallow base devices, but for present pur- poses we can assume ill to be uniform over the junction, depending only on VcB.

\Ve want to describe the locus of points where nega- tive resistance begins as the current is increased. The shape of this locus can be drawn qualitatively by making use of the following arguments.

1) Regardless of whether the negative resistance is caused by collector space-charge effects or by

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330 IEEE TRANSACTIOSS O S ELECTROS DEVICES, APRIL 1970

I C ‘

_.

I n Region I: I, = I E I, - I c ( ~ c E M - l )

I < Q c E M < 2

In Region E: 1s 0 1, -1,

Fig. 19. Collector characteristic for IB<O (VCZR mode). The instability locus is indicated by the dotted line.

avalanche injection, it can be assumed to occur when the collector current density reaches a criti- cal value. From the discussion of Section IV i t is clear that this critical density is 1 0 , regardless of the maguitude of NDL. (We are ignoring the well- known negative-resistance region that occurs at small values of I C due to the current dependence

Two areas of the VCER collector characteristic will be considered : region I , where M is slightly greater than unity ( VCE slightly greater than VCEO), and region 11, where M is large and VCE is close to VCBO (see Fig. 19).

O f a C E . )

The IC versus VCE curve will then lie in a particular 11.1 region depending on the value of R.

For large R, a c ~ M will be near unity and the main effect of R will be to reduce the current gain of the transistor, requiring a slightly larger value of M than for the R= case. The resulting value of base current introduces a rather drastic effect as far as the distribu- tion of collector current is concerned. Because of the finite conductivity of the base region, the forward bias of the emitter-base junction will be less at the base edge of the emitter stripe than at the center, thus localizing the emitter current to the center of the stripe. For all practical purposes, and thus Jo will be reached for a smaller value of IC than for the Ig = 0 case. The locus of negative resistance onset, or “instability locus,” will then move toward smaller collector currents and larger values of V C E , as shown in Fig. 19. (A way of avoiding this descent to lower currents is described below.)

Eventually an ;21 (and a corresponding R) ]vi11 be reached where the emitter and base currents are roughly equal, corresponding to a point near the minimum of the locus. For R smaller than this value, the situation can be approximated by assuming that up to the point of negative resistance, all the collector current floxvs out of the base. The base-emitter voltage is then given by

1 I I I I 20 40 60 80 100 120 140

v,, ( V I

Fig. 20. Measured instability loci for two transistors.

where is an effective resistance that is determined by the geometry and conductivity of the base layer. As IC increases to the point where V B E reaches approximately 0.6 volts, the emitter-base junction becomes forward biased. Only a slight increase in IC is then needed for the collector current density to exceed Jo. At this point the transistor will exhibit a negative re~istance.~

As R continues to decrease, a larger value of IC will be required to forward bias the emitter-base junction and reach the critical current density. Thus the locus shows a positive slope up to the R = 0 or V C E ~ case.

Two measured instability loci are shown in Fig. 20. The 2x918 has an epitaxial collector and an emitter geometry identical to the transistors described above. However, L for this particular transistor is fairly small ( ~ 4 microns). As the figure shows, the locus for the 2N918 exhibits a pronounced dip in the stability locus.

One way of avoiding this effect is to increase L (or N D ) so that 1,’~ (for 1, = 0) exceeds L V C E o and be- comes comparable to B V C B ~ . Then, in the VCER mode, 11.1 will be large and the base current will be determined primarily by collector multiplication and not emitter injection efficiency, thus avoiding the (‘pinch-in” effect associated with region I of Fig. 19. Transistor C meets these requirements, and as Fig. 20 shoxt-s, the locus has no minimum and increases to higher current as R is decreased.

C. Some Practical Considerations The experiments that verified the theory of avalanche

injection were purposely arranged to avoid thermal effects by using small-area structures and by testing 11-ith current pulses of short duration and low repeti- tion rate. I n a practical situation, thermal effects may not be avoidable and the temperature behavior of ni, Q C E , M and thermal conductivity can then no longer be ignored.

Grutchfielf and Moutoux [7]. This ortion of the locus has been described previously by

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HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRANSISTORS 331

* LvC E 0 BvCBO vCE

Fig. 21. Sketch of instability loci for avalanche injection and thermal breakdown. For decreasing pulse times the latter locus moves as shown.

A number of theories of thermal instability have been developed and some of these include many of the details of transistor behavior. However, for the present discus- sion, we shall simply say that thermal instability is reached when the active (current-carrying) area of the transistor reaches a critical temperature, Terit. Since the carrier generation rate is changing exponentially with temperature, a more precise criterion will not drastically alter the thermal instability locus.

In general, a constant temperature curve will have the appearance of the dashed curve of Fig. 21. For T = Tcrit this curve then gives the locus of thermal in- stability. Because a certain time is required for the ac- tive region to reach Terit, the curve will depend upon the pulse time and shape. For short pulses we can expect a shift in the dashed curve as shown.

The solid curve is the locus of negative resistance de- termined by Jo. For a given device this curve mill be fixed. The apparent locus of instability will be the com- posite of the dashed and solid curves. Thus for the case indicated, thermal effects will limit performance for 1 ~ 7 0 , and avalanche effects will dominate for negative base current.

VI. DISCUSSION

The results of this paper should be applied with cau- tion to large-area transistors. In particular, when esti- mating the turnover point ( V T , IT) from the analysis of Section 11, IT will usually be optimistically large, es- pecially for transistors in which reachthrough occurs a t small values of collector current. For this case, the dy- namic resistance in the V C E ~ mode is quite small and the turnover current is very susceptible to nonuniformities in film thickness, L. At the onset of avalanche injec- tion, current will be concentrated in regions with small values of L. The simple case of two transistors with slightly different L values is illustrated in Fig. 22 . If these transistors \\\-ere operated in parallel, the observed turnover current would flow almost entirely through TI and would show very little increase over IT for a single transistor. Thus film uniformity becomes a prime con-

Fig. 22. VCEO characteristic for two transistors having the same NO but slightly different L values.

sideration in any attempt to increase IT by increasing the emitter area.

Although this paper has been concerned solely with avalanche injection into an n-type region, it is natural to look into the alternate possibility of using a p-type region in the collector. Since CY~<<CY, in silicon, we would expect that the critical field E, for a p+-p-p+ diode should be larger than that of the n-type analog. Preliminary experiments with p+-p-p+ diodes confirm this idea. In addition, measurements on p-n-p epitaxial collector transistors all show evidence of thermal breakdown prior to avalanche injection; that is, the observed turn- over point mas dependent on the values of applied cur- rent and pulse time. Based on these findings, we suggest that the p-n-p transistor is worthy of further considera- tion in high-frequency power applications despite prob- lems with surface inversion and an increase in collector- to-emitter transit time.

VII. CONCLUSION

In this paper we have endeavored to show that al- though the basic features of the thermal breakdown and avalanche I- V characteristics are the same, the physical mechanism associated with each type of breakdown is quite different. If second breakdown is to be avoided, both the thermal design and the choice of n-region thick- ness L and donor density N D become important to the device engineer. Moreover, if avalanche injection is dominant, there are additional constraints placed on N D and L besides the more familiar requirements con- nected with low-current avalanche breakdown, satura- tion voltage, and collector transit time.

APPENDIX

CALCULATION OF THE DIODE I-V CHARACTERISTIC A . Region 2 (CY > 0)

In this section we calculate the voltage V , across the avalanching portion of the diode, O < x < x l . As in Sec- tion I1 and Fig. 2 , the positive contact is taken to be at x = 0. Because of the necessary mathematical simplifica- tions, the calculation is intended to show the main fea-

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332 IEEE TRANSACTIONS ON ELECTRON DEVICES, APRIL 1970

tures of the I-V characteristic, and precise agreement with experimental data is not a primary objective.

For region 2 me assume the following:

We can then rewrite (6) as

dl2 dP - - - - a(?& + p ) = - e

ax ax

Differentiating Poisson's equation gives

which when combined with (22) yields

d2E dp 2E 6 2 - = p - = - Ja .

dX2 dE DL

This equation can be integrated to find

which is now in a fairly convenient form for solution, although three successive integrations are required to find Vz.

For the boundary conditions we use

p(xJ = 0 p ( 0 ) = q - - S o E ( x J = E,. (26) C l )

For a ( E ) we use the empirical form

a ( E ) = aEn. ( 2 7 )

By properly selecting a and n, (27) can provide a satis- factory match to a ( E ) data over the range of E to be considered.

The first integration of (25) gives

dE 4 J a - __ (En+l - E , n+l )]'". (28) c v l n + 1

If we make the substitution u = (E/E,)n+l and integrate over the interval x to x,, the result is

f " du

Although the above integral can be written as the dif- ference of txvo incomplete beta functions [22], th' IS pro- cedure will not give an explicit function for E(%). How- ever, a fornlula for E ( x ) can be derived if the value of n is sufficiently large. I n this case unln+l will behave very nearly as u to the first power. Tha t is,

where F is a correction factor determined by the value of n and the ratio E / E c corresponding to the upper limit of the integral. F is plotted for various values of n in Fig. 23. The integral on the right-hand side of this equation is easily evaluated with the result

E(%) = E ~ / C O S ~ / ( ~ + ~ ) e (%) (31)

where

Strictly speaking, F is not independent of x. However, from Fig. 23 i t is clear that F is a weak function of E , and hence a weak function of x. Thus in integrating E ( x ) we can approximate F by an average value F, with

typically in the range 1.2 to 1.4. The third integration (over the interval 0 to x,) then gives the avalanche vol- tage as

where we define

J y = - - l

J o

(33)

(34)

The upper limit 81 of the integral corresponds to the point x=O. From the boundary condition on p ( 0 ) and (28) and (31) , we can write

where

and 81 is given by (32) with x=O. Equations (33) and (35) determine V 2 ( J ) , which is the desired result and (35) relates the thickness of the avalanching region x1 to the current density. For large J , 81+n/2 and x1 J-1'2. Tha t is, the thickness of the avalanching region de- creases with increasing current density. Also, the inte- gral H(&) approaches a limit that can be expressed ex- actly in terms of gamma functions:

H ( T / ~ ) = r[+(. - I ) / ( ~ z + 1 ) ]

r [ n / ( n + 0 1

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HOWER AND REDDI: AVALANCHE INJECTION AND SECOND BREAKDOWN IN TRANSISTORS 333

I .of

1 01 I I I I 1 I , , I 1 I I I , , , I I I I I I l l , 10-1 100 IO' 102

E/E,-I

Fig. 23. Correction factor of (30) versus normalized field difference.

Thus for large current density (33) gives the result that l i t= J-ll2. Tha t is, the avalanche region is a "negative- resistance region."

B . Region 1 (a = 0) Although carrier generation is absent in region 1, the

calculation of V l ( J ) is not a simple matter. Complica- tions arise because of the presence of large electron and hole densities and because current flow is laterally un- stable.

Experimentally, the terminal voltage is observed to decrease quite abruptly to a value typically in the range 10 to 20 volts as the current is increased beyond the turnover point. I n this mode, the voltage is virtually independent of current, with the I-V characteristic showing a small value of negative resistance (for ex- ample, see Fig. lj(c)). The abrupt transition is consis- tent with filamentary conduction mechanisms [ l l ] , [I61 wherein the filament radius is determined by a balance between generation of carriers in the filament by impact ionization and removal of carriers from the filament by diffusion.

Realistic estimates of VI will be made in this section for the case where the current flow is either radial or uni- form in the x direction, the applicable solution being determined by the ratio of filament radius ra to region 1 thickness L - X I .

At this point, it is convenient to consider the calcula- tion of the I-V characteristic for a specific N D and L. We leave open the question of the type of current flow in Region 1 and calculate for both the radial and uni- form cases. For the example, we take N D = 1 X cm3 L = 15 pm, and F = 1.3. The NDL product is large enough to neglect the space-charge component of current at turnover.

For the calculation of V , we use the following: n = 5, a = 1.67X10-24 cmn-'/Vn. With these values, (27) fits

the data for the effective ionization ratecr(E) within a factor of two over the range 2 X l o2 < a < 5 X lo4 cm-1 [14], [18]. For J < J O we assume J = ~ N D u ~ ( E ) and use the vd(E) da ta of Sorris and Gibbons [23] to calculate the terminal voltage. For J slightly greater than Jo (say, O<y <0.5), we can assume that EEE, in region 1 and w i t e

v = v2 + E,(L - X I ) (3 6)

where x l ( J ) is given by ( 3 2 ) with x = 0 and B =e1. The terminal voltage and avalanche voltage are

plotted in Fig. 24 for the example under consideration. For y>O.5 an alternate solution for VI is necessary be- cause it is no longer permissible to assume that the field in region 1 is uniform and equal to E,. Furthermore, be- cause of filamentary conduction, the solution for V 2 ( J ) applies in a practical case only for J> I / r r a 2 where ra is the radius for which a stable filament can form in re- gion 2.

We first consider the case where ra is large enough to permit the assumptionof uniform current flow in the x direction. I n addition, we make the following assump- tions.

1) Recombination for both holes and electrons is negligible, so that dJp/dx = dJ,/dx = 0.

2) E throughout region 1 is greater than El, the value for which carrier drift velocity saturates ( E 1 ~ 1 0 4 V/cm for silicon).

3 ) Diffusion current can be neglected, so that Jp = qvlp and J , = qvln.

For a carrier diffusion coefficient D = 20 cm2/s, assump- tion 1 implies a carrier lifetime greater than 10-8 sec- onds. This is quite reasonable for either band-to-band recombination or recombination through an intermedi- ate level. Assumption 2 will be invalid only for a thin region near h: = L. Assumption 3 is valid if Lvl>>D, which is the case for the present example.

The hole and electron continuity equations then im- ply that p and n will be constant throughout region 1. In fact, p and n differ by just the right amount so that

E, = LJz: ( p - n + N D ) ~ x . (3 7) E

Since the charge density is uniform in x , we have

E, 2

Vl = - ( L - XI). (38)

At large current densities, where x1 decreases to a frac- tion of a micron, (38) implies that VlsE,L/2. For diodes with large values of NDL, this result says that beyond turnover, the terminal voltage will decrease abruptly to approximately one-half the turnover voltage, pro- vided the current density is uniform in region 1. Evi- dence of this behavior can be seen from the I-V charac-

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334 IEEE TRANSACTIONS ON ELECTRON DEVICES, APRIL 1970

N~ = I x ~ o ' ~ c m - ~ L = l 5 p m J/J, : 500 x i = 0.74 pm

r , x (rm)

Fig. 26. Field profiles for radial and uniform current flow (upper curve) in region 1.

Io-' o+ 50 100 150 2 00 solution for the electric given by field Szedon is and Jordan [12] . The equation v, v, ( V O I I E I

u-here & = q N D r , / e . 'l'he corresp

V3 = (Ec f Eo)r,(l - f) - EOra In (llf) (41)

where

Eo Et

Ea + EO The voltage V3 is relatively insensitive to the radius ra and the saturation field El, and is typically about 2 volts.

v ( V I In region 4, E < El, and the flux lines change from a Fig. 25. Measured diode characteristic. L = 12 pm, radial direction to a direction normal to the n+ contact.

N D =2.2 X 1016 cm-3. As an approximation for VA we use

teristic shown in Fig. 25 where an intermediate voltage range, 40< V<60 volts, is observed.

For lower voltages, the current distrubtion in region 1 is radial, with flux lines emanating from a small hemi- sphere of radius ra. For x l g l pm, order of magnitude estimates of the filament radius [ l l ] , [16] give values of a few tenths of a micron. For the calculation of I', we assume that the one-dimensional solution is still valid for region 2. I t is convenient to further divide region 1 into two regions defined by

yo I Y 5 Y , region 3

ye 5 Y 5 L region 4

where E(r,) =El . VI is then given by

111 = v3 + 114 (39)

where V3 and Vd are the voltage differences across re- gions 3 and 4, respectively. For V, we use the radial

E L 2

v4 - ( L - Y J . (42)

This approximation assumes a linearly decreasing field in the r dimension. Since the field profile in region 4 will have a slight positive curvature, (42) will overestimate v4.

Field profiles for the radial and uniform case are plotted in Fig. 26. A rough estimate of the profile in region 4 is indicated by the dashed line. For this plot we have used J/Jo = 500, which gives V2 = 9.8 volts. The voltage for the uniform case is calculated from (38) which gives VI= 71 volts. Thus for a filament with a diameter 2raY1j p m , the terminal voltage will be ap- proximately 82 volts.

For a small diameter filament-say, ra =x1 = 0.74 pm -the radial solution applies and the field profile in region 3 is given by (40). For the radial case we can write

Page 16: Avalanche injection and second breakdown in transistors

HOWER AND REDDI: AVALANCHE INJECTION AND SEC(

V = Vz + 1 1 3 4- Vd = 9.8 + 2.0 + 7.1 = 18.9 volts,

This result agrees with values of V typically observed in the high current range. Furthermore, Vz and V, are in- dependent of L and are only weakly dependent on cur- rent density and No. The voltage V4 will increase with L , provided recombination can be neglected.

The abrupt transition of the I-V characteristic that we have been discussing is quite important from the standpoint of avoiding second breakdown in transistors. For collector currents just slightly in excess of the turn- over value IT, i t can be assumed that the collector voltage will switch possibly to a value = L l / c ~ 0 / 2 , and very likely to an even lower value in the range of 10 to 20 volts. Thus, unless special circuit precautions are taken to limit collector current, this current will in- crease and local temperatures will be reached which will lead to permanent damage of the transistor.

ACKNOWLEDGMENT

The authors thank E. Yim n-ho grew the n/n+ films used for the devices, and A. Rosales who assisted with the experimental Ivork. Thanks are also due C. A. Bitt- man, W. Kauffman, and R. J. iyhittier for their com- ments and suggestions.

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