Automotive Capacitive Pressure Sensor Reference Design ... · PDF file• 12.5 Kpa to 115 Kpa • 20 Kpa to 250 Kpa • 10 Kpa to 350 Kpa • ... vT 1st IIR Order Filter Digital Compensation

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Overvoltageand

Reverse-Polarity

EMI Filter

VDD

GND

PGA400-Q1

Outputprotection

OutputVOUT

AVSS

DVSS

DVDD

AVDD

CP

CR

EMI Filter

ICAP

Ir

Ip

tx

Csensor Cref

+5 V

GND

T

1TIDUBN2A–June 2016–Revised March 2017Submit Documentation Feedback

Copyright © 2016–2017, Texas Instruments Incorporated

Automotive Capacitive Pressure Sensor Reference Design

TI DesignsAutomotive Capacitive Pressure Sensor Reference Design

Design OverviewThe TIDA-00985 design provides a simple, robust, andaccurate sensor signal-conditioning solution using thePGA400-Q1 for capacitive-type pressure sensors. Theprotection strategies implemented in this designprotect the pressure sensor against wiring harnessfaults, EMI, and automotive electrical transients.Additionally, this design guide systematically explainsthe theory, operation, and challenges involved in thisTI Design.

Design Resources

TIDA-00985 Design FolderPGA400-Q1 Product FolderPGA400EVM Product Folder

ASK Our E2E Experts

Design Features• Accuracy of 0.25% Over-Temperature

(–40°C to 125°C)• Second-order Temperature and Linearity

Compensation Algorithm• Form Factor Design of 18.6-mm Diameter• Protection Against Harness Faults (Overvoltage

and Reverse-Polarity Protection), and BrokenWire Detection

• Meets ISO 7637-3 Requirements for TransientPulses

• Tested for Bulk Current Injection (BCI)ISO 11452-4

Featured Applications• Capacitive Pressure-Sensor Signal Conditioning• Level-Sensing Signal Conditioning• Humidity Sensing Signal Conditioning• Fuel Pressure• Antilock Braking• Manifold Pressure Sensing

An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use, intellectual property matters and otherimportant disclaimers and information.

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http://www.ti.com/tool/TIDA-00985

http://www.ti.com/product/pga400-q1

http://www.ti.com/lit/pdf/sldu010

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Key System Specifications www.ti.com

2 TIDUBN2A–June 2016–Revised March 2017Submit Documentation Feedback



1 Key System Specifications

Table 1. Design Requirements

PARAMETER DESCRIPTIONSensor type Capacitive

Pressure range

Custom ranges:• 15 Kpa to 102 Kpa• 12.5 Kpa to 115 Kpa• 20 Kpa to 250 Kpa• 10 Kpa to 350 Kpa• …and so on

Power supply operating voltage 5 VOvervoltage protection Yes, up to 30 VReverse-polarity protection YesCalibration Based on the sense element specificationsTransient immunity Designed to meet ISO 7637-3 standardsNominal output voltage 0.5 V to 4.5 VOutput VOUT protection YesTemperature range –40°C to 125°CEMi protection Tested for BCIHarness faults protection YesForm factor 18.6-mm diameterNumber of layers Two-layer, two-side populated

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PGA400-Q1

PADCSTAGE 2GAIN

PADC

vP

vT

Linear Regulators

Temperature

DACVp Digital Compensation

ICAP

CR

CP

VDD

GND

VOUT

EMI Filter

Overvoltage Protection

Reverse- polarity

ProtectionTransient Protection

Zf Cd

Output

OFFSETCANCEL

Integrated Front-end, Digital Compensation, DAC

EMI Filter

Resettable fuseF1

Output Protection

DVSS

AVSS

DVDD

DVDD

CrefCsensor

Ix

Overvoltage and Reverse-

Battery Protection

Ir

Ip

Self Oscillating

Demodulator


t

Sense element Signal Conditioner

Sensor

Sensor Output

Pressure

t


www.ti.com Introduction




2 IntroductionThis design guide explains how to design a simple, robust, and accurate pressure-sensor signal-conditioncircuit for capacitive sense elements. This reference design also explains the theory, operation, andcomplications involved.

This TI Design emphasizes topics such as harness faults, protection strategies (reverse-polarityprotection, overvoltage protection), the PGA400-Q1 calibration procedure, and the design challenges ofprinted-circuit boards (PCBs). Furthermore, the external protection circuitry complies with regulatory ISO7637-3 and ISO 11452-4 standards: capacitive coupling clamp (CCC) and BCI methods. This guideprovides links to all the relevant design files such as the schematics, bill of materials (BOM), Altium files,and Gerber files.

3 System DescriptionThe preceeding Figure 1 shows the two building blocks a typical pressure sensor has: a sense elementand a signal conditioner (SC).

Figure 1. Block Diagram of Typical Pressure Sensor

The primary purpose of the SC is to process the output of the sense element for its nonidealities, andprovide the processed output to the electronic control unit (ECU). Figure 2 shows the conceptual blockdiagram which represents a pressure sensor SC for capacitive-type sense elements. The heart of thisreference design is the PGA400-Q1, which consists of an integrated analog front end (AFE), a digitalcompensation algorithm, and a digital-to-analog converter (DAC). This device converts pressure signalsdirectly into desired voltage levels.

Figure 2. Conceptual Block Diagram

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System Description www.ti.com




The preceeding Figure 2 describes the conceptual block diagram of the system. Sense element(capacitive) output is given to the PGA400-Q1 through the EMI filter (ferrite beads serve the purpose ofremoving electromagnetic noise). Differential current from the sense capacitor and reference capacitor isfed to the self oscillating demodulator (SOD); the SOD converts differential current into voltage with thehelp of the built-in trans-impedance amplifier. The voltage output from the trans-impedance amplifierfollows with gain and offset stages before giving it to the analog-to-digital converter (ADC). Based on theprovided drive current, trans-impedance gain, drive voltage, and gain and offset, the ADC interprets digitalvalues, and sends information to the built-in compensation algorithm. The algorithm is designed tocompensate for linearity and temperature effects on the sense element (nonidealities of the senseelement). The DAC translates output back into analog values. A simple discrete circuit around thePGA400-Q1 protects the chip from overvoltages and transients. Around 20 harness fault conditions in theautomotive environment are analyzed to prove that the design withstands harness conditions.

In a real application scenario, the device is powered up with the 5-V supply from the ECU. To protect thelines from coupling effects, the power supply is shunted with a transient-voltage-suppression (TVS) diodeto clamp the wiring harness pulses (capacitive and inductive coupled surges). To account for the reverse-battery connections, a discrete reverse-voltage circuit is provided for –20 V to 20 V. Although the absolutemaximum rating of the PGA400-Q1 is 16 V, to provide the overvoltage protection for >16 V, a discreteovervoltage protection circuit is implemented in the design. The ICAP (current source) supply inside thePGA400-Q1 device provides current to the capacitive sense element. The output DAC delivers a 0.5-V to4.5-V signal across the output pin.

During normal operation, the signal travels through a resettable fuse (PTC, which offers a very lowresistance of 2 Ω) and outputs the sensor signal. Whenever overvoltage appears across the sensor outputpin, the resettable fuse, along with the Zener diode, limits the overvoltage and the fuse opens, whichprotects the PGA400-Q1. Ensuring that all three external connections are fully protected, this referencedesign protects the sensor against all wiring harness faults. Figure 2 shows the components of this designin a conceptual schematic diagram.

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PGA400-Q1

ICAP

CR

CP

VDD

GND

VOUT Output

EMI Filter

Overvoltage and

Reverse- Polarity

Protection

Output Protection

EMI Filter

+5 V

GND

DVDD

AVDD

DVSS

AVSS

CrefCsensor

Ix

Ir

Ip

t


www.ti.com Block Diagram




4 Block DiagramFigure 3 describes the blocks involved in the pressure sensor design. Figure 4 shows the pin descriptionof the TIDA-00985 design.

Figure 3. Pressure Sensor Block Diagram

Figure 4. TIDA-00985 Pin Description

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2nd

Order TC

&

2nd

Order NL

Sensor

Compensation

LINEAR REGULATORS

ANALOG

DIAGNOSTICS

VDD

EEPROM

(Calibration Coeffs, Serial No.)

DAC GAIN

OWI DRIVER

vdd

tx

rx

GND

AVDD

OWI

DAC

AVDD REGULATOR

DVDD REGULATOR

DVSS

AVSS

P ADC

VINPP

VINPN

vPSTAGE 1

GAIN

vdd

+

-

VOUT

DVDD

req

SENSOR VOLTAGE SUPPLY

VBRGP

BRIDGE DRIVE

vP

vT

T ADCvT

1st

IIR

Order Filter

Digital Compensation

Internal

Temperature

vtint

OSCILLATORCLK

STAGE 2

GAIN

OFFSET

CANCEL

-


Block Diagram www.ti.com




4.1 Highlighted ProductsThe PGA400-Q1 is a pressure-sensor SC with built-in linearity and a compensation algorithm. Theaccuracy and robustness of the device make it a perfect choice for selecting signal conditioning elementsfor pressure sensor applications.• Suited for AFE capacitive sensors. Directly accepts the capacitve output without any need for external

conditioning amplifiers. Different configurations (frequency, gain, drive current, and so on) give the userflexibility to interface different types (various spans) of sense elements.

• Second-order compensation and EEPROM memory (accuracy improvement for temperature variationsand sense element linearity variations)

• Includes ratio-metric voltage output• On-chip temperature sensor enables full accuracy over grade 1 temperature range• 16-bit, 1-MHz sigma-delta (∑Δ) ADC for signal channel• Digital features include: Compensation equation

– Second-order temperature: Two clocks per instruction cycle– On-chip oscillator

• One-Wire Interface (OWI)• Power supply: 4.5-V to 5.5-V operational, –5.5-V to 16-V absolute maximum• Qualified in accordance with AEC-Q100

Figure 5 shows the PGA400-Q1 functional block diagram.

Figure 5. PGA400-Q1 Functional Block Diagram

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www.ti.com System Design Theory




5 System Design Theory

5.1 Sensor InterfacePressure sensors are usually connected to the ECU. Figure 6 shows the normal connection of pressuresensors with the ECU. The output of the sensor mainly has three wires, namely 5 V, signal, and ground.The ECU provides the supply. The signal wire connects to the pullup resistor and pulldown resistor on theECU side for diagnostic purposes. The ECU interprets the signal from the pressure sensor, and sends theinformation to the respective unit to make a necessary controlling action. Figure 6 shows the connectionbetween the sensor and the ECU.

Figure 6. Pressure Sensor Connection to ECU

5.2 Signal ConditioningThe main purpose of signal conditioning is to process the sensor signal for its nonidealities, and ensurethe fully protected and accurate signal is available to the ECU. The conceptual schematic diagram inFigure 2 describes the signal-condition circuit for capacitive sense elements using the PGA400-Q1 single-chip solution.

The signal conditioning is divided into three main stages:1. Front end (EMI filter)2. Power supply protection3. Output protection

5.2.1 Front EndDue to issues such as small-signal output from sense element, temperature, offset, and different types ofnonidealities, achieving overall system accuracy is critical, because these issues are very important inautomotive pressure sensor applications. Figure 7 shows the AFE module. Current source inside thePGA400-Q1 supplies the current to the sense capacitor and reference capacitor. Based on thecapacitance value, current varies and the differential current is amplified and converted to the voltageusing a trans-impedance amplifier through the SOD, by switching between charging and dischargingphases.

Ferrites beads are used to remove the EMI noise. The front-end pressure-sensor signal chain consists ofa capacitive sense element in the front, an EMI filter, C-to-V converter, gain stage, offset correction stage,ADC ∑Δ, and a decimation filter.

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GND

VCC

2.74 kR1

6.81 k

R2

5.6 V

D3MMSZ5232B-7-F

3

1

2

Q1

DMP3098L-7

5.6 V

D1MMSZ5232B-7-F

20.0 kR3

3

1

2

Q3BC857C-7-F

3

1

2 Q2

FMMT720TA

0.1 µFC2

20 V

D2SM4T23AY/CAY

6.81 kR4

5 V

2.2 µFC1

5 V

GND

OvervoltageProtection

Reverse-PolarityProtection

TransientProtection


Gain stage

Analog-to-digital converter

ADC buffer

2×

�û

Modulator1 MHz

Decimation filter

Offset cancel

Csensor Cref

Self Oscillating Demodulator

(C to V converter)

Is

Ir

Ix

Sensor Drive(ICAP Supply)

PGA400-Q1 Front end


System Design Theory www.ti.com




Figure 7. AFE

The ADC in the PGA400-Q1 has three main stages: the ADC buffer, ∑Δ modulator, and decimation filter.To ensure the input signal is as free of noise as possible, two ferrite beads are placed along the signalline.

5.3 Power Supply StageThe main purpose of the external power supply stage is to protect the PGA400-Q1 from transients,overvoltages, and reverse polarities. Figure 8 shows the power supply stage divided into three stages:• Transient-pulse suppression• Reverse-polarity protection• Overvoltage protection

Figure 8. Power Supply Stage

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www.ti.com System Design Theory




5.3.1 Transient Pulse SuppresionTo provide immunity for transients at a system level, an external transient protection is installed. The effectof transients on the pressure sensor is mainly due to the wiring harness faults (coupling transients). Thecircuit was made in compliance with ISO 7637-3 standards with two main types of coupling effects(capacitive or inductive) on the supply lines. The strength of the pulses according to level IV would be inmagnitudes of –60 V and 40 V, with varying times. These coupling effects are not from the supply lines,but the supply lines could affect coupling transients because of other wiring harness couplingmechanisms. The diode breakdown voltages must be chosen so that transients are clamped at voltagesthat protect the MOSFET and the rest of the system. In the present case, there is a need to protect acontinuous 20-V signal, so the breakdown voltage of the TVS should be more than 20 V (typical 23.4-Vbreakdown voltage diode selected). A TVS diode with a breakdown voltage of 24 V, and a clampingvoltage of 33 V is selected to serve this purpose. The reverse clamping device clamps all negativevoltages greater than the battery voltage so it does not short out during a reverse-battery condition.

The other parameter to choose for the TVS diodes is the peak power rating. This rating is importantbecause it is proportional to the package size of the diodes. Measure the amount of peak power to whichthe diode is exposed to size the package properly. The important features are its clamping voltage, thevoltage of the pulse it is clamping, and the source impedance of the pulse. The rise time and duration ofthe pulse also play a role, although not an immediate one.

The following is an example of calculating for Pulse B from ISO 7637-3, which ends up being the worstcase (test level IV):• VPULSE = 40 V• RSOURCE = 50 Ω• VCLAMP = 32.4 V (for 10/1000 µs)

The worst-case assumption is that the load draws very little current, so the majority goes through the TVSdiodes. If VPULSE = 32.4 V and the pulse generator generates a 40-V pulse, this implies a 7-V dropacross R1 (the source impedance of the pulse as defined in ISO 7637-3), 7.6 V / 50 Ω = 0.152 A, comingout of the pulse generator. Most of this passes through the TVS diode, and therefore users can estimatethe peak power seen by the device as P = I × V = 32.4 V × 0.152 A = 4.9248 W. Based on thespecifications listed, a 400-W, 32.4-V clamping voltage TVS diode is selected.

5.3.2 Reverse-Polarity ProtectionThe circuit in Figure 8 withstands reverse power-supply voltages. The power supply circuit provides a–20-V, reverse-voltage protection capability. Three simple additions (components) to the circuit in Figure 8provide the necessary reverse-voltage protection. The circuit employs a P-channel MOSFET. Byconfiguring the MOSFET as shown, the body diode of the device automatically conducts when a power-supply voltage of greater than about 0.5 V is present. The body diode of this transistor is a necessaryfeature because without it the circuit will not start up. The addition of this component provides adisconnect function under reverse-voltage conditions. The requirements for the reverse-protectionMOSFET are that the ON resistance (RON) should be low to have less forward voltage drop. ADMP3098L serves this purpose and it has 120-mΩ ON resistance. A Zener diode and resistorconfiguration is used to protect the MOSFET.

5.3.3 Overvoltage ProtectionThe main pass element in the protection circuit shown in Figure 8 is the PNP transistor Q2. Choosecarefully when selecting this part because any drops in the power-supply voltage are determined by thecharacteristics of this transistor. The FMMT720T device has been used for this duty. The FMMT720Tbelongs to a family of devices that exhibit very low VCE saturation-voltage values. This device minimizesthe voltage drop induced by the presence of the protection circuit. The transistor Q3 acts as the controlelement for Q2 and turns on (turning Q2 off) when the voltage at the power-supply input is equals the sumof the Zener voltage, due to the VBE voltage of diode D3 and Q3 at a collector current of about 650 µA.Q3 and D3 together produce a typical trip voltage of 5.85 V at 25°C. Approximately 0.53 V of this trip

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GND

F1

NANOSMDC020F-2

68 pF

C5

7.5 V

D4

1SMA5922BT3G

Output


System Design Theory www.ti.com




voltage is due to the VBE voltage of Q3. The remaining 5.32 V is produced across D3. The Zener diodeD3, although a nominal 5.6-V device, is operated at a very low reverse current, about 200 µA, as definedby the VBE of Q3 together with the 2.7-kΩ resistor. At this current, the Zener voltage is below thecharacteristic knee and is therefore less than the rated value. The 6.8-kΩ resistor connected to the baseof Q3 provides the current required to keep Q2 turned on under normal circumstances.

5.4 Output StageThe output protection is achieved through the combination of a Zener diode and resettable fuse. Thiscircuit consists of a series element, a resettable fuse, and a parallel element Zener diode. The serieselement limits the current and the parallel element clamps the voltage level. The resettable fusedisconnects or breaks when a large current passes through the fuse.

When an input voltage exceeds the Zener diode breakdown voltage parameter, a sudden surge in currentoccurs through the Zener diode and in the resettable fuse. The temperature increase in the fuse causes itto break the circuit. The resistance of the fuse increases many folds, which is equivalent to the circuitbeing open. When the overvoltage condition is removed, the current stops flowing through the fuse, andthe temperature of the fuse reduces, thus closing the circuit again after some time.

5.4.1 Reverse-Voltage Protection on Output PinWhen a reverse voltage is applied at the input, the Zener diode is forward biased. A large surge of currentthrough the PTC fuse leads to an increased temperature of the fuse, and hence the circuit breaks. Themain advantage of this circuit is that it can protect the devices and systems from all EOSscenarios—overvoltage, reverse voltage, short circuit, and overcurrent. Only two components are added tothe BOM. The two main parameters of a resettable fuse are the IHOLD current and the series resistor.The IHOLD current is the current up to which the fuse does not break. This current value must be equal toor slightly more than the maximum current consumption of the systems. To keep the series voltage dropacross the fuse minimum, use a fuse with the least series resistance. A Zener diode must be chosen sothat the breakdown voltage of the Zener diode is equal to or slightly more than the working voltage of thesystem being protected. However, the breakdown voltage must not exceed the maximum voltage limit ofthe system being protected.

In resettable fuses, as the resistance decreases, the IHOLD current increases. To have an optimum valuebetween the IHOLD current and series resistance, a resettable fuse with an IHOLD current of 200 mA anda series resistance of approximately 1 Ω is chosen. In normal operation, the fuse does not break, and witha very small voltage drop, the output signal follows the path to the ECU. Whenever an overvoltage eventoccurs, the resettable fuse forms a loop with the 7.5-V, 1.5-W Zener diode and the fuse breaks. Figure 9shows the output overvoltage protection circuit.

NOTE: To facilitate OWI communication, a Zener diode with a 7.5-V rating has been selected.

The maximum power that the Zener diode handles in an overvoltage condition is:P = V × I = 7.5 V × 200 mA = 1.5 W

Figure 9. Output Overvoltage Protection

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www.ti.com PCB and Form Factor




6 PCB and Form FactorThe only goal of the design with regard to the PCB is to make a solution as compact as possible, whilestill providing a reasonable way to mount the components to remove EMI noise. Figure 10 compares aPCB size to a pencil tip. Based on the user requirement, the PC size can be further reduced by removingrespective stages.

Figure 10. TIDA-00793 Board Form Factor

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Harness Fault Conditions and Solutions www.ti.com




7 Harness Fault Conditions and SolutionsTable 2 describes the possible combinations of harness faults for the pressure sensor mechanism. Thecircuit is designed to meet all these harness faults. Each case describes the way these fault conditions arehandled.

Table 2. Harness Fault Conditions

FAULTNO

DEVICEVDD

DEVICEGND DEVICE VOUT REMARK DEVICE STATUS AFTER

REMOVAL OF FAILURE

1 5 V 0 V Pull up to VDD Normal connection with VOUT to bepulled to VDD Safe

2 5 V 0 V Pull down to GND Normal connection with VOUT to bepulled to GND Safe

3 20 V 0 V GND to VDD Overvoltage Safe

4 Open 0 V Pull up to VDD Open VDD with VOUT to be pulled toVDD Safe

5 Open 0 V Pull down to GND Open VDD with VOUT to be pulled toGND Safe

6 5 V Open Pull up to VDD Open GND with VOUT to be pulled toVDD Safe

7 5 V Open Pull down to GND Open GND with VOUT to be pulled toGND Safe

8 0 V 20 V Pull up to VDD Reverse voltage with VOUT to bepulled to VDD Safe

9 0 V 20 V Pull down to GND Reverse voltage with VOUT to bepulled to GND Safe

10 0 V 0 V Pull up to VDD VDD shorted to GND with VOUT tobe pulled to VDD Safe

11 0 V 0 V Pull down to GND VDD shorted to GND with VOUT tobe pulled to GND Safe

12 20 V 20 V Pull up to VDD GND shorted to VDD with VOUT tobe pulled to VDD Safe

13 20 V 20 V Pull down to GND GND shorted to VDD with VOUT tobe pulled to GND Safe

14 20 V 0 V 20 V VOUT shorted to VDD Safe15 20 V 0 V Pull down to GND VOUT shorted to GND Safe

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www.ti.com Harness Fault Conditions and Solutions




Set up the hardware as shown in Figure 11. Apply different combinations of voltages at the J1 connectoras described in Table 2.

Figure 11. Power Supply Connections for Harness Faults

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GND

VCC

GND

GND

0.1µFC3

0.1µFC7

F1

NANOSMDC020F-2

1000 ohm

L1

68pFC8

7.5V

D41SMA5922BT3G

Output0.1µFC6

0.015µFC4

GPIO_2 1GPIO_1 2VP_OTP3

VOUT1 4

VOUT2 6

VBRG9

AVDD20

VDD21

DVDD24

TXD 31

RXD 32

U1

0.1µFC5

Open

GND

F1

NANOSMDC020F-2

68pFC8

7.5V

D41SMA5922BT3G

OutputA+ - +

-5 V

PGA400QRHHTEP


GND

F1

NANOSMDC020F-2

68pFC8

7.5V

D41SMA5922BT3G

OutputVOUT14

VOUT26

TXD31

RXD32

A+ -


GND

F1

NANOSMDC020F-2

68pFC8

7.5V

D41SMA5922BT3G

Output

GPIO_21

GPIO_12

VOUT14

VOUT26

TXD31

RXD32

GPIO_534

GPIO_435

GPIO_336

1 K5 V

+

-






7.1 Case 1: VDD = 5 V, GND = 0 V, VOUT = 5 V (VDD)Apply 5 V voltage to the output pin through the 1-kΩ pullup resistor. Figure 12 shows 5 V across theoutput pin.

Figure 12. 5 V Across Output Pin

Internal current-limit protection is available when the output reaches 5 V (30-mA short to battery) and doesnot require any external protection circuitry. This is a safe case and the signal follows the normal path.

7.2 Case 2: VDD = 5 V, GND = 0 V, VOUT = 0 V (GND)Output to ground, and the power supply is at 5 V. A dead short to ground can allow as much as 30 mA ofcurrent to flow. This is a safe case. Figure 13 shows the output connected to the ground.

Figure 13. Output Connected to Ground

7.3 Case 3: VDD = 20 V, GND = 0 V, VOUT = 5 V (VDD)Similar to Section 7.14, the power supply section opens (overvoltage condition). When the output is at 5 Vwith VDD open, all circuits inside the PGA400-Q1 attempt to power up, but nothing happens to the devicebecause it cannot pass much current inside. Figure 14 shows the VDD opens and output is at 5 V.

Figure 14. VDD Opens and Output is at 5 V

This is a safe case.

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20 V

OpenOFF

R3

20.0 k

D1

MMSZ5232B-7-F

5.6 V

1

Q1

DMP3098L-7

3 2

C2

0.1 µF

D2

20 V

SM4T23AY/CAY

5 V5 V

GND

D3

MMSZ5232B-7-F

5.6 V

R2

6.81 k

R1

2.74 k

1

23

Q3

BC857C-7-F

1

2 3Q2

FMMT720TA

GND

6.81 kR4

2.2 µFC1

VCC


GND

VCC

GND

GND

0.1µFC3

0.1µFC7

F1

NANOSMDC020F-2

1000 ohm

L1

68pFC8

7.5V

D41SMA5922BT3G

Output0.1µFC6

0.015µFC4

GPIO_2 1GPIO_1 2VP_OTP3

VOUT1 4

VOUT2 6

VBRG9

AVDD20

VDD21

DVDD24

TXD 31

RXD 32

36

U1

0.1µFC5 A

+ -

Open

Open


PGA400QRHHTEP





7.4 VDD Opens and Output is at 5 VAs described in Section 7.3, the power supply section opens. When the output is at 5 V with VDD open,all circuits inside the PGA400-Q1 try to power up, but nothing happens to the device because it will notpass much current inside. This is a safe case.

7.5 CASE 5: VDD = OPEN, GND = 0 V, VOUT = 0 V (GND)In this case, there is no possibility of excess current to flow, because no potential exists and the device issafe. This is a safe case.

7.6 CASE 6: VDD = 5 V, GND = OPEN, VOUT = 5 V (VDD)The two ends of the internal pullup diode are at the same voltage. There is no path for the excess currentto flow, because the diode is not conducting. The device is safe. This is a safe case.

7.7 CASE 7: VDD = 5 V, GND = OPEN, VOUT = 0 V (GND)All the internal circuits of the PGA get power and try to discharge through the VOUT pulldown diode. Thedevice is safe.

Figure 15. Original Ground Open and Ground Connected to Output

7.8 CASE 8: VDD = 0 V, GND = 20 V, VOUT = 5 V (VDD)In the power supply section, reverse-voltage protection is achieved using PMOS and Zener diodeconfiguration. As shown in Figure 16, when the reverse voltage is applied across the terminals, gatesource voltage (VGS) is not sufficient for the PMOS to switch ON, meaning PMOS is in OFF condition.This implies that the other part of the circuit is floating. VDD of the PGA400-Q1 is open, because of thereverse-polarity protection implemented. The device is safe. The Zener diode protects the PMOS fromhigher voltages. Figure 16 shows the behavior of the circuit when reverse polarity is applied.

Figure 16. Reverse-Polarity Protection

Now the condition evolves into an open VDD with GND 20 V, and the output is at 5 V. Figure 17 showsthe high-current path which exists in between the 5-V and 20-V supply. The output fuse opens as highcurrent flows, implying the output is floating. As a result, the output and VDD are open. The device is safe.The is a safe case.

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GND

F1

NANOSMDC020F-2

68pFC8

7.5V

D41SMA5922BT3G

Output

GPIO_21

GPIO_12

VOUT14

VOUT26

TXD31

RXD32

GPIO_534

GPIO_435

GPIO_336

+ -A

20 V


Open

20 VGND

F1

NANOSMDC020F-2

68pFC8

7.5V

D41SMA5922BT3G

OutputVOUT14

VOUT26

TXD31

RXD32

+ -A 5 V






Figure 17. Output Protection When Ground is at 20 V, and Output is at 5 V

7.9 CASE 9: VDD = 0 V, GND = 20 V, VOUT = 0 V (GND)Reverse-voltage protection is applied, and the circuit behaves according to Section 7.8 (the VDD opens).Output is grounded with the VDD open and ground at 20 V. There is no path for the current to flowthrough the PGA400-Q1, because the supply is open and no closed loop exists. The only possibility forthe current to flow is through a Zener diode to fuse to the output. The Zener diode forward current is 200mA. When the current is more than 200 mA, the fuse opens and the circuits survive.

Figure 18. Ground at 20 V and Output Grounded

7.10 Ground at 20 V and Output GroundedThere is no effect on the circuit (see Section 7.4). This is a safe case.

7.11 CASE 11: VDD = 0 V, GND = 0 V, VOUT = 0 V (GND)There is no effect on the circuit because everything is grounded, and no potential exists in the circuit (seeSection 7.5). This is a safe case.

7.12 CASE 12: VDD = 20 V, GND = 20 V, VOUT = 20 VThe initial PMOS does not have enough voltage (threshold voltage) to turn ON, both positive and negativesupplies are in 20 V. The VCC opens. On the output section, applying 20 V with respect to 20 V (GND)means nothing is applied (GND) across the output. The output is shorted to 0 V (same as Section 7.5).This is a safe case.

7.13 CASE 13: VDD = 20 V, GND = 20 V, VOUT = 0 V (GND)The VDD is open and output is grounded (see Section 7.5). This is a safe case.

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GND

VCC

GND

GND

0.1µFC3

0.1µFC7

F1

NANOSMDC020F-2

1000 ohm

L1

68pFC8

7.5V

D41SMA5922BT3G

Output0.1µFC6

0.015µFC4

1GPIO_1 2VP_OTP3

VOUT1 4

VOUT2 6

VBRG9

AVDD20

VDD21

DVDD24

TXD 31

RXD 32

U1 PGA400QRHHTEP

0.1µFC5

OpenOpen


Open


R46.8 k

C12.2 µF

VCCFMMT720TA

3

1

2 Q2

Q3BC857C-7-F

2

1

3

R12.74 k

R2

6.81 k

D3MMSZ5232B-7-F5.6 V

GND

D1MMSZ5232B-7-F5.6 V

R320.0 K

C20.1 µF

DMP3098L-7

Q123

1

D2SM4T23AY/CAY20 V

GND

20 V

5 V5 V

-

+





7.14 Case 14: VDD = 20 V, GND = 0 V, VOUT = 20 VOnce the voltage at the output pin is greater than the supply voltage (5 V) by about 0.5 V, the internal topdiode (pullup diode) starts to conduct, but it cannot tolerate high voltages, resulting in a high voltageacross the output pin, and the chip may become damaged. Output protection must be implemented in thiscase.

Also, according to absolute maximum ratings of the PGA400-Q1, it can only survive until 16 V. Applying20 V may damage the chip. Overvoltage protection is needed in this case for 20 V.

7.14.1 Power Supply ProtectionThe transistor Q3 acts as the control element for Q2 and turn ons (turning Q2 off) when the voltage at thepower-supply input is equal to the sum of the Zener voltage, due to the VBE saturation voltage of diodeD3 and Q3. Q3 and D3 together produce a typical trip voltage of 5.85 V. This path exists only when theZener diode has a sufficient voltage to breakdown (in overvoltage situations). In normal cases the 6.8 kresistor connected to the base of Q2 provides the current necessary to keep Q2 turned on. As shown inFigure 19, the circuit operates to disconnect the load during overvoltage conditions, meaning Q2 switchesoff when an overvoltage condition is detected, removing power from the load. Q2 turns on again when theovervoltage condition is removed.

Figure 19. Power Supply Protection

7.14.2 Output PIN ProtectionAs shown in Figure 20, consider the case when the output is at 20 V. The voltage across the fusebecomes high, therefore the current and fuse opens. Consider its resistance is 650 mΩ with a 20-Voutput, then most of the current flows through the fuse and it opens. The fuse takes almost 100 ms toblow; in this time the Zener should be able to tolerate this current. A Zener that can handle a high-pulsecurrent must be selected. This is a safe test case.

Figure 20. Output Pin Protection

7.15 Case 15: VDD = 20 V, GND = 0 V, VOUT = 0 V (GND)The output is short to ground and power supply is at 20 V (overvoltage), implying the VDD opens. With theVDD open and output grounded, there is no potential existing in the network. The device is safe.

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Hardware www.ti.com




8 HardwareFor the initial board setup, the following equipment is required:• TIDA-00985 PCB with the PGA400-Q1 preprogrammed• PGA400-Q1 EVM with the TI-GER USB board• PC (PGA400-Q1 GUI installed)• 5-V battery or power supply• 12-V battery or power supply• Capacitive sense element• Keithley 2001 6½ digit multimeter (preferred)

To calibrate the PGA400-Q1 for a particular sense element, connect the hardware as shown in Figure 21.

8.1 Hardware Setup for CalibrationPerform the following steps to connect the hardware for calibration (see Figure 21).1. Connect the 5-V power supply on the 5-V pin2. Connect the Keithley 2001 6½ digit multimeter on the Vout pin.3. Connect the sense element as shown in Figure 214. Connect the 12-V power supply to the PGA400-Q1 EVM (100-mA current limitation).5. Connect the output terminal (Vout) of the TIDA-00985 to the GPIO: VOUT1 pin of the PGA400-Q1

EVM (to establish OWI), as shown in Figure 21.6. Connect the EVM and TIDA-00985 grounds as shown in Figure 21.7. Connect the PGA400-Q1 EVM to the PC through the TI-GER USB board as shown in Figure 21.

Figure 21. TIDA-00985 Connection to PGA400-Q1 EVM

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www.ti.com Calibration Procedure




9 Calibration ProcedureThe PGA400-Q1 comes with built-in programming for the pressure sensors applications. Different senseelements with different spans exist to match the PGA400-Q1 for a particular sense element, so the usermust calibrate the PGA400-Q1. The device can be calibrated using the OWI pin of the PGA400-Q1. TheVOUT pin on the PGA400-Q1 is responsible for the OWI communication. OWI driver circuitry and PCinterface (TI-GER USB board) circuitry is available on the PGA400-Q1 EVM, so the PGA400-Q1 EVMmust be interfaced with the TIDA-00985 to do the calibration. Connect the PGA400-Q1 EVM to the TIDA-00985 board as shown in Figure 21.

The following subsections describe the calibration procedure in detail. For easy understanding and toavoid confusion, a step-by-step procedure is described by using an example sense element (differentSMD capacitors).

9.1 HardwareConnect the hardware as described in Section 8.1 (also see Figure 21).

9.2 SoftwareVerify all the following required files are available before starting the procedure.• PGA400-Q1 GUI• PGA400-Q1 coefficient calculations spreadsheet• PGA400-Q1 signal chain spreadsheet• PGA400-Q1 EEPROM memory MAP

9.3 OWI StartingPerform the following steps to start the OWI.1. Power up the EVM power supply and the TIDA-00985 power supply.2. Start the PGA400-Q1 GUI.3. Click on OWI tab in the right half of the GUI, then activate the OWI with Overvoltage Drive and activate

the TI- GER UART (see Figure 22).4. Click on the TEST tab in the left half of the GUI, and click on IFSEL/uc_RST to reset the

microcontroller. 03 should appear under the register OE Micro CTL. This verifies that the hardware isconnected properly, and the sensor is ready for calibration.

9.4 Gain and Offset SettingPerform the following steps to set the gain and offset.1. To calibrate, implant a capacitive sense element on the specified pins of the hardware. For example,

assume the sensor capacitance is from 15 pf to 25 pf and the reference capacitor is at 14 pf.2. Using the signal chain spread sheet, navigate to the GAIN tab and adjust Gain 1 and Gain 2, then

using the CAPACITIVE tab adjust the drive voltage, drive current, and trans-impedance values, to getthe ADC input at a value from –1.65 V to 1.65 V. (see Figure 22).

NOTE: Choose a selection that keeps the frequency somewhere from 200 kHz to 800 kHz.

The signal chain spread sheet shows all green fields if everything is correct. If a value isincorrectly given the signal chain spread sheet shows red fields.

3. Navigate to the EEPROM tab → BANK_5 tab → SEN1GAIN section and enter the Gain 1 and Gain 2values. Enter the CAPSEN value under the EEPROM tab → BANK_5 tab → CAPSEN section.• SEN1GAIN = 02• CAPSEN = 0C

4. Set the offset based on the spread sheet value. Navigate to the EEPROM tab → BANK_5 tab andSEN1OFF1 = 00, SEN1OFF2 = A0.

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Calibration Procedure www.ti.com




5. Click the WRITE ALL button.6. Click the Program EEPROM button.7. Click the Reload Cache button to verify whether it is written in EEPROM registers or not. Figure 22

shows the GUI after having completed these steps.

Figure 22. EEPROM BANK_5 Registers in PGA400-Q1 GUI

9.5 ADC Calibration

NOTE: First, complete the 3P-1T measurements. Then, complete the 3P-3T measurements.

For the 3P-1T measurements (25°C), perform the following steps.1. Unreset the microcontroller.2. Place the sensor at its minimum pressure (15 pf).3. Start the OWI and reset the microcontroller.4. Go to the ADC Conversion Result area, on the right half of the GUI.5. Click the PADC Continuous button.6. Within 1 to 2 min, a .csv file generated in the folder where the GUI is located. Take the average of 500

generated values, and enter that value in the PGA400-Q1 coefficient calculations spreadsheet underPRESSURE ADC → PMIN.

7. Repeat Steps 2 through 6 for sensor maximum, and mid and max pressures (20 pf and 25 pf).

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Figure 23 lists the ADC and DAC data in 3P-1T measurements.

Figure 23. Representation of ADC and DAC Data in 3P-1T Measurements Spreadsheet

For the 3P-3T measurements (-20 °C, 50 °C, 120 °C), perform the following steps.1. Place the TIDA-00985 in the temperature chamber, and set the temperature to –20°C.2. Unreset the microcontroller.3. Place the sensor at its minimum pressure (15 pf).4. Start the OWI and reset the microcontroller.5. Go to the ADC Conversion Result area, on the right half of the GUI.6. Click the PADC Continuous button.7. Within 1 to 2 min, a PADC.csv file is generated in the folder where the GUI is located. Take the

average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under PRESSURE ADC → Pmin → Tmin.

8. Repeat steps 2 through 6 for the sensor maximum and mid voltages (20 pf and 25 pf), and then enterthe PADC Continuous averaged value under the Pmax and Pmid sections, respectively (PGA400-Q1coefficient calculations spreadsheet under PRESSURE ADC → Pmin → Tmin and PRESSURE ADC→ Pmid → Tmin).

9. Click the TADC Continuous button.10. Within 1 to 2 min, a TADC.csv file is generated in the folder where the GUI is located. Take the

average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under the following locations:• TEMPERATURE ADC → Pmin → Tmin• TEMPERATURE ADC → Pmid → Tmin• TEMPERATURE ADC → Pmax → Tmin

11. Set the chamber temperature to 50°C.12. Repeat Steps 2 through 6.13. Within 1 to 2 min, a PADC.csv file is generated in the folder where the GUI is located. Take the

average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under PRESSURE ADC → Pmin → Tmid.

14. Repeat Steps 2 through 6 for the sensor maximum and mid voltages (20 pf and 25 pf), and then enterthe PADC Continuous averaged value under the Pmax and Pmid sections, respectively (PGA400-Q1coefficient calculations spreadsheet under PRESSURE ADC → Pmin → Tmid and PRESSURE ADC→ Pmid → Tmid).


average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under the following locations:• TEMPERATURE ADC → Pmin → Tmid• TEMPERATURE ADC → Pmid → Tmid• TEMPERATURE ADC → Pmax → Tmid

17. Set the temperature to 120°C.

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ADC DATA

Temperature Pmin Pmid Pmax

Tmin –12845 –495 11252

Tmid –12486 –189 11495

Tmax –12174 75 1743

ADC DATA


Tmin –123 –123 –123

Tmid 70 74 74

Tmax 269 263 271

DAC DATA


Tmin 401 2022 3643

Tmid 403 2030 3656

Tmax 403 2034 3666

User Input Data

Pressure ADC

DAC Code

Temperature ADC





18. Repeat Steps 2 through 6.19. Within 1 to 2 min, a PADC.csv file is generated in the folder where the GUI is located. Take the

average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under PRESSURE ADC → Pmin → Tmax.

20. Repeat Steps 2 through 6 for sensor maximum and mid voltages (20 pF and 25 pF), and then enterthe PADC Continuous averaged value under the Pmax and Pmid sections, respectively (PGA400-Q1coefficient calculations spreadsheet under PRESSURE ADC → Pmin → Tmax and PRESSURE ADC→ Pmid → Tmax).


average of 500 generated values and enter that value in the PGA400-Q1 coefficient calculationsspreadsheet under the following locations:• TEMPERATURE ADC → Pmin → Tmax• TEMPERATURE ADC → Pmid → Tmax• TEMPERATURE ADC → Pmax → Tmax

Figure 24. Representation of ADC and DAC Data in 3P-3T Measurement Spreadsheet

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9.6 DAC CalibrationFirst complete the 3P-1T measurements. Then, complete the 3P-3T measurements.

For the 3P-1T measurements (25°C), perform the following steps.1. Go to EEPROM → BANK_4 → DAC CAL ENABLE = 01.2. Go to EEPROM → BANK_4 → DACCALMSB = 01, DACCALLSB = 96.3. Unreset the micro by placing "00" in 0E MICRO CTL (under the TEST tab).4. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spread sheet under PminMeasured VOUT.

5. Start the OWI and reset the microcontroller.6. Go to EEPROM → BANK_4 → DACCALMSB = 07, DACCALLSB = FA.7. Unreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).8. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spreadsheet under PmidMeasured VOUT.

9. Start OWI and reset the microcontroller.10. Go to EEPROM → BANK_4 → DACCALMSB = 0E, DACCALLSB = 60.11. Unreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).12. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spreadsheet under PmaxMeasured VOUT. The spreadsheet should be visible as shown in Figure 26.

13. Measure the exact supply value as shown in Figure 25, and then enter in the coefficients spreadsheetunder VDD.

Figure 25. VDD Measurement Across PGA400-Q1

14. Enter the given DAC codes in the spreadsheet.

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Figure 26 shows what the spreadsheet looks like.

Figure 26. DAC Codes for 3P-1T Measurements

For the 3P-3T measurements (–20°C, 50°C, 120°C), perform the following steps.1. Place the TIDA-00985 in the temperature chamber, and set the temperature to –20°C.2. Start the OWI and reset the microcontroller.3. Go to EEPROM → BANK_4 → DAC CAL ENABLE = 01.4. Go to EEPROM → BANK_4 → DACCALMSB = 01, DACCALLSB = 9C.5. Unreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).6. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spreadsheet (3P-3T DAC) underPmin → Tmin Measured VOUT.

7. Start the OWI and reset the microcontroller.8. Go to EEPROM → BANK_4 → DACCALMSB = 07, DACCALLSB = FD9. Unreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).10. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spreadsheet (3P-3T DAC) underPmid → Tmin Measured VOUT.

11. Start the OWI and reset the microcontroller.12. Go to EEPROM → BANK_4 → DACCALMSB = 0E, DACCALLSB = 60.13. Unreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).14. Measure the output voltage of the DAC using the multimeter (HP 3458 8 ½ digit multimeter), and then

enter the measured value in the PGA400-Q1 coefficient calculations spreadsheet (3P-3T DAC) underPmax → Tmin Measured VOUT.

15. Measure the VDD voltage as shown in Figure 25, and enter the value in the spreadsheet under TminVDD.

16. Place the TIDA-00985 in the temperature chamber, and set the temperature to 50°C.17. Repeat Steps 2 through 14, but enter the respective values in

• Pmin → Tmid Measured VOUT• Pmid → Tmid Measured VOUT• Pmax → Tmid Measured VOUT

18. Measure the VDD voltage as shown in Figure 25, and enter the value in the spreadsheet under TmidVDD.

19. Place TIDA-00985 in the temperature chamber, and set the temperature to 120°C.20. Repeat Steps 2 through 14, but enter the respective values in:

• Pmin → Tmax Measured VOUT• Pmid → Tmax Measured VOUT• Pmax → Tmax Measured VOUT

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21. Measure the VDD voltage as shown in Figure 25, and enter the value in the spreadsheet under TmaxVDD. Figure 27 shows what the spreadsheet looks like.

Figure 27. DAC Codes for 3P-3T Measurements

9.7 Coefficients CalculationFor the 3P-1T measurements (25°C), perform the following steps.1. In the coefficient calculations spreadsheet under 3P-1T ADC, the N0, G0, and H0 values are

generated based on ADC and DAC measurements as described in Steps 4 and 5.2. Go to the PGA400-Q1 GUI.3. Start the OWI and reset the microcontroller.4. Click EEPROM tab → BANK_1 tab, and then enter N0, G0, and H0 values as per the EEPROM

memory MAP spreadsheet.5. Click the WRITE ALL button.6. Click the Program EEPROM button.7. Click the Reload Cache button to verify whether it is written in EEPROM registers or not.

Figure 28. Coefficients Spreadsheet

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Figure 29 shows how the GUI appears after having completed these steps.

Figure 29. EEPROM BANK_1 Registers When 3P-1T Coefficients Entered in PGA400-Q1 GUI

For the 3P-3T measurements (–30°C, 45°C, 120°C), perform the following steps.1. In the coefficient calculations spread sheet under 3P-3T ADC, the N0, G0, H0, N1, G1, H1, N2, G2,

and H2 values are generated based on ADC and DAC measurements as described in Steps 4 and 5.2. Go to the PGA400-Q1 GUI.3. Start the OWI and reset the microcontroller.4. Click the EEPROM tab → BANK_1 tab, and then enter the N0, G0, H0, N1, G1, H1, G2, and H2

values as per the EEPROM memory MAP spreadsheet.5. Click the WRITE ALL button.6. Click the Program EEPROM button.7. Click the Reload Cache button to verify whether it is written in EEPROM registers or not.8. Click EEPROM tab → BANK_2 tab, and enter the N2 value as per the EEPROM memory MAP

spreadsheet.9. Click the WRITE ALL button.10. Click the Program EEPROM button.11. Click the Reload Cache button to verify if it is written in EEPROM registers or not. The coefficients in

the spreadsheet should look like Figure 30.

Figure 30. 3P-3T Measurement Coefficients

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Figure 31 shows the appearance of the GUI.

Figure 31. EEPROM BANK_1 Registers When 3P-3T Coefficients Entered in PGA400-Q1 GUI

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9.8 PGA400-EEPROM Bank 2 Registers1. Click the EEPROM tab → BANK_2 tab.2. Enter the values as shown in Figure 32.

Figure 32. EEPROM BANK_2 Registers

3. Click the WRITE ALL button.4. Click the Program EEPROM button.5. Click the Reload Cache button to verify that it is written in EEPROM registers or not.

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3. Click the WRITE ALL button.4. Click the Program EEPROM button.5. Click the Reload Cache button to verify whether it is written in EEPROM registers or not.

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9.11 Microcontroller UnresetUnreset the microcontroller by placing 00 in 0E MICRO CTL (under the TEST tab).

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www.ti.com Test Setup




10 Test SetupThe testing procedures outlined in this document are designed to ensure proper functionality, and toanalyze the effects of harness faults, EMI, and ISO 7637-3 pulses on the pressure sensor system.

10.1 Basic FunctionalityConnect the sense element to the prescribed terminals of the board. In the current scenario SMDcapacitors are connected as sense elements (15 pF, 20 pF, and 25 pF).

Figure 35. Test Setup to Measure Basic Functionality

Set the chamber temperature to 25°C, and apply capacitance values varying from 15 pF to 25 pF indifferent steps. Table 3 lists the applied input voltages and corresponding output voltages.

The expected voltage can be calculated using Equation 1. The sensor output span is 0.5 V to 4.5 V. Theexpected voltage for the minimum sensor voltage should be 0.5 V, but the output of the PGA400-Q1 isratiometric, so the output depends on the supply voltage variations.Output expected (V) = Supply voltage (V ) × 0.5 / 5 = 4.9722 × 0.5 / 5 = 0.49722 V (1)

Full-scale accuracy can be calculated using Equation 2.%FS accuracy = Output expected (V) – Output measured (V) × 100 / Output span (4) = 0.49722 V – 0.492 V × 100 / 4= 0.1305% (2)

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Test Setup www.ti.com




Table 3. Pressure Sensor Output Voltage, %FS Accuracy Versus Input Voltage

S/NCAPACITANCE

SUPPLY (V) OUTPUTEXPECTED (V)

OUTPUTMEASURED (V) ACCURACY (%)SENSE

CAPACITANCEREFERENCE

CAPACITANCE1 15 pf 14.2 pf 4.9722 0.49722 0.492 0.13052 20 pf 14.2 pf 4.9722 2.44222 0.8894 0.13993 25 pf 14.2 pf 4.9722 4.50166 1.2874 0.1343

From Table 3 it is seen that the accuracy of the system at 25°C is less than 0.14%.

10.1.1 Response TimeResponse time is the time from power up to a valid output. To measure response time, set the input toPmid, power up the device, and measure the time from power up until VOUT settles to an expected outputvalue. This value can be measured using an oscilloscope. From Figure 36, the response time measured is22.4 ms.

Figure 36. Response Time

10.2 Temperature DependenceNormally, pressure-based measurements vary with respect to temperature. But in the present case, usingthe PGA400-Q1 the accuracy of the device can be improved over the grade 1 temperature range. Second-order linearity compensation algorithms have imported inside the chip to compensate the temperaturechanges, and to give more accurate results. Section 10.2.1 describes %FS accuracy calculations over thegrade 1 temperature range.

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www.ti.com Test Setup




10.2.1 Temperature Versus Output Pressure VariationsTable 4, Table 5, and Table 6 show the variation of output voltage with respect to temperature variations.As shown in Figure 35, set up the experiment, and change the temperatures in steps of 20°C.

The PGA400-Q1 has a built-in temperature compensation algorithm. Using the internal temperaturesensor and compensation algorithm, the output voltage changes are minimized with respect totemperature changes. Table 4 shows the effect on output voltage accuracy over the grade 1 temperaturerange (–40°C to 125°C). For calculations of expected output and accuracy, see Equation 1 andEquation 2.

Table 4. Output Voltage Change With Respect to Temperature (at Pmin Input = 15 pf)

TADC VALUE PADC VALUE TEMPERATURE(°C) SUPPLY (V) EXPECTED

OUTPUTMEASUREDOUTPUT (V) ACCURACY (%)

–178 –12972 –40 4.982 0.4982 0.4956 0.0650–123 –12833 –20 4.981 0.4981 0.5018 –0.0925–65 –12709 0 4.980 0.4980 0.5014 –0.0850

–6 –12600 20 4.979 0.4979 0.5001 –0.055077 –12470 50 4.977 0.4977 0.4971 0.0150

164 –12345 80 4.975 0.4975 0.4930 0.1125215 –12214 100 4.974 0.4974 0.5016 –0.1050273 –12172 120 4.972 0.4972 0.4940 0.0800286 –12169 125 4.972 0.4972 0.4966 0.0150

From Table 4, the variation of output voltage over the defined temperature range is very low (accuracy of0.1125%) when the input is at its minimum value.

Table 5 shows the effect on output voltage accuracy over the grade 1 temperature range (–40°C to125°C). When the input is locked at a medium value and changes from –40°C to 125°C, the outputvoltage variation can be seen in Table 5.

Table 5. Output Voltage Change With Respect to Temperature (at Pmid Input = 20 pf)



–178 –601 –40 4.982 2.4910 2.4850 0.1500–122 –477 –20 4.981 2.4905 2.4880 0.0625–63 –373 0 4.980 2.4900 2.4910 –0.0250

–6 –289 20 4.979 2.4895 2.4900 –0.012577 –164 50 4.977 2.4885 2.4879 0.0150

162 –55 80 4.975 2.4875 2.4846 0.0725217 63 100 4.974 2.4870 2.4916 –0.1150273 93 120 4.973 2.4865 2.4820 0.1125285 102 125 4.972 2.4860 2.4834 0.0650

From Table 5, the variation of output voltage over the defined temperature range is low (accuracy of0.15%) when the input is at its maximum value.

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Temperature (qC)

Acc

urac

y (%

)

-50 0 50 100 150-0.15

-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.25

0.3

D001

PminPmidPmax

Test Setup www.ti.com




Table 6 shows the effect on output voltage accuracy over the grade 1 temperature range (–40°C to125°C). When the input is locked at the maximum value and changes the temperatures from –40°C to125°C, the output voltage variation can be seen in Table 6.

Table 6. Output Voltage Change With Respect to Temperature (at Pmax Input = 25 pf)



–178 11174 –40 4.9820 4.48380 4.4771 0.16750–122 11273 –20 4.9810 4.48290 4.4815 0.03500–64 11343 0 4.9800 4.48200 4.4790 0.07500

–6 11436 20 4.9790 4.48110 4.4800 0.0275079 11531 50 4.9770 4.47930 4.4770 0.05750

164 11633 80 4.9750 4.47750 4.4738 0.09250216 11742 100 4.9740 4.47660 4.4805 –0.09750271 11744 120 4.9720 4.47480 4.4672 0.19000285 11745 125 4.9715 4.47435 4.4645 0.24625

From Table 6, the variation of output voltage over the defined temperature range is low (accuracy of0.24625%) when the input is at its maximum value.

Figure 37 shows the accuracy over the entire pressure and temperature range.

Figure 37. %FS Accuracy Over Entire Temperature and Pressure Range

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www.ti.com EMC Tests




11 EMC TestsOne of the goals of this design is to qualify the design according to automotive EMC standards. To provethat the TIDA-00985 is immune to conductive and radiative disturbances, the current design mainlyfocuses on immunity standards in automotive. In general, sensors in the vehicle are connected to the ECUthrough a wiring harness, and the wiring harness may introduce many coupling effects. The current designis tested for these types of coupling effects using ISO 7637-3 simulated pulses. One of the toughest testsfor common automotive systems regarding immunity against continuously applied RF energy is the BCItest. Radiative frequencies disturb the sensor signals and the output signal varies. To determine that thesensor is prone to radiative disturbances, the ISO 11452-4 BCI test is performed.

11.1 ISO 7637-3ISO 7637 is titled Road Vehicles – Electrical Disturbances From Conduction and Coupling, and part 3 isspecifically for Electrical Transient Transmission By Capacitive and Inductive Coupling Via Lines OtherThan Supply Lines. The current design relates to sensors, and sensor-to-ECU lines are a part of wiringharness. According to the standard, the coupling effects might occur on all input and output lines, and alsoon the supply line. So the three sensor wires (supply, GND, and output) must be tested for couplingeffects.

The standard defines a test procedure, including the description of test pulses, to test the susceptibility ofan electrical subsystem to transients, which could potentially be harmful to its operation. Each pulse ismodeled to simulate a transient that could be created by a real event in the car. The following subsectionsgo into the pulses tested for in this design.

The standard specifies two types of transients: fast transient pulses and slow transient pulses. The fasttransient test uses bursts composed of a number of fast transients, which are coupled into lines ofelectronic equipment, in particular input and output (I/O) lines. The fast rise time, repetition rate, and lowenergy of the fast transient bursts are significant to the test. The slow transient test uses a single pulsesimilar to the pulse used for conducted transient, and is applied a number of times to the device under test(DUT).

During the design phase, the production wiring harness is not available, and the electrical noises of thevehicle are not known. The test must be performed with the worst-case situation, which is represented bythe capacitive and inductive coupling described in this part of ISO 7637. The current design is tested forfast transients according to capacitive coupling clamp method

11.1.1 Capacitive Coupling Clamp (CCC) MethodAccording to this method, sensor wiring harness should be placed between two metal plates (formscapacitor), a capacitive clamp forms using these two plates setup. One end of the plates is connected tothe pulse generator (pulse description is given in Section 12.1) and other end is connected to anoscilloscope. Pulses travel from one end to the other end through the capacitive clamp. It implies the pulseis coupled to the sensor lines which are between the capacitive clamp (between two metal plates). Theresult of the test and the pass fail criteria depends on the design requirement specifications.

This method is applicable for fast transient pulses and the pulse description is given in Section 12.1.

11.1.1.1 EFT Pulses a and bThe fast transient test pulses are a simulation of transients which occur as a result of the switchingprocesses. The characteristics of these transients are influenced by distributed capacitance andinductance of the wiring harness. The pulse shapes and parameters are: t – time and u – tension in volts.

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Parameters 12-V system

US in V

tr in ns 5

td in µs 0 , 1

t1 in µs 100

t4 in ms 10

t5 in ms 90

Ri in ? 50

I

min.

II III IV

max.

Fast a (DCC and CCC) –10 –20 –40 –60 10

Fast b (DCC and CCC) 10 20 30 40 10

Test levels USC

VTest pulse

aSelected

test levelb

Test

time

min

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Figure 38 shows pulse a and b, and Figure 39 shows the pulse specifications.

Figure 38. Pulse a and b

Figure 39. Pulse Specifications

11.2 Bulk Current Injection (ISO 11452-4)BCI is a method of carrying out immunity tests by inducing disturbance signals directly into the wiringharness by means of a current injection probe. The injection probe is a current transformer through whichthe wiring harnesses of the DUT are passed. Immunity tests are carried out by varying the test severitylevel and frequency of the induced disturbance.

Typically, the frequency range tested is 100 kHz to 400 MHz. The test simulates worst-case conditions forRF cross-coupling in a harness for a different wires of an electric subsystem assembled inside a car.Because of the small distance between the RF source (emitting harness or wire) and the RF sink (harnessof the sensor module), the induced energy can be very high and is measured in mA or dBμA during theBCI test. To ensure the induced energy can influence only the sensor module during the test, the ECU isreplaced by a standardized artificial network.

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12 EMI Test ResultsTable 7 lists the general summary.

Table 7. General Summary

TEST RESULTCapacitive coupling clamp (ISO 7637-3) Passed (meets requirement)

BCI (ISO 11452-4) Passed (meets requirement)

The power line of the PCB is connected to the 5-V supply. The device status is turned on.

NOTE: During both tests, the device status is always ON.

12.1 Capacitive Coupling Clamp Test ResultsTable 8 lists the test requirements.

Table 8. Test Requirements

PARAMETER DESCRIPTIONTest level IV

Mode Fast transient pulsesDevice status ONTemperature 25°C

Test time 10 minutes

Table 9 lists the acceptance criteria.

Table 9. Acceptance Criteria

OPERATION MODE MONITORING PARAMETERS ACCEPTANCE TEST LEVEL

ON status Device survival Class B (device should survive for thepulses) IV

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According to the design acceptance level stated in Table 9, the device survives after the application ofpulses and passes the test.

Figure 40. CCC Test Method Setup

12.2 Bulk Current Injection MethodTable 10 lists tests requirements.

Table 10. Test Requirements

PARAMETER DESCRIPTIONTest modulation 0.1 to 400 MHz CW, AM

Test method Open loop method: CBCIClamp position 150 cm to DUT

Test level IVTemperature 25°C

Table 11 lists the monitoring parameters and acceptance criteria.

Table 11. Monitoring Parameters and Acceptance Criteria

OPERATION MODE MONITORING PARAMETERS ACCEPTANCE TEST LEVEL

Device status ON Output voltage deviation A deviation more that 10%considered as fault IV

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Table 12 lists the test results.

Table 12. Test Results

FREQUENCY(MHz)

INJECTIONMODE

POSITION(mm) MODULATION DUT MODE TEST LEVEL TEST LEVEL

DESCRIPTION0.1 to 400 CBCI 150 CW ON mode IV Meets Class A0.1 to 400 CBCI 150 AM ON mode IV Meets Class A

Figure 41 describes the test setup.

Figure 41. BCI Test Setup

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Design Files www.ti.com




13 Design Files

13.1 SchematicsTo download the schematics, see the design files at TIDA-00985.

13.2 Bill of MaterialsTo download the bill of materials (BOM), see the design files at TIDA-00985.

13.3 PCB Layout RecommendationsTo download the PCB files, see the design files at TIDA-00985.

Figure 42. Signal Conditioning Circuit Schematic

• A solid ground island should exist underneath the PGA400-Q1.• Sensor input circuitry should be as close as possible to the I/O connector. Treat every trace carrying

sensitive signals (PGA400-Q1 input circuitry) as a receiving antenna when considering its routing(consideration implies shortest paths).

• Symmetry should be maintained between the two lines of a differential signal.• Separate input, output, and power circuitry.• Pour solid ground planes on both sides (top and bottom layers).• TVS diode should be as close as possible to the power connector.• Place input capacitors as close as possible to the IC to reduce the parasitic series inductance.

13.4 Altium ProjectTo download the Altium project, see the design files at TIDA-00985.

13.5 Gerber FilesTo download the Gerber files, see the design files at: TIDA-00985.

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13.6 Calibration DocumentsTo download the supportive documents for calibration, see TIDA-00985.

13.7 Software FilesTo download the software files, see TIDA-00985.

14 Related Documentation1. Texas Instruments, PGA400-Q1 Pressure Sensor Signal Conditioner, PGA400-Q1 Datasheet

(SLDS186)2. Texas Instruments, Power Supply Requirements and Connections, PGA400-Q1 EVM User's Guide

(SLDU010)3. International Organization for Standardization, ISO 7637-3, Road Vehicles — Electrical disturbances

from conduction and coupling — Part 3: Electrical transient transmission by capacitive and inductivecoupling via lines other than supply lines (https://www.iso.org/standard/59603.html)

4. Texas Instruments, Two-Step Calibration of Sensor Signal Conditioners, Technical Brief (SLYT625)

14.1 TrademarksAll trademarks are the property of their respective owners.

15 About the AuthorSANDEEP TALLADA is a systems engineer at Texas Instruments. As a member of the AutomotiveSystems Engineering team, he focuses on Powertrain end-equipment and creating subsystem referencedesigns. He brings to this role experience in sensor systems technology. Sandeep earned his master ofscience in sensor systems technology from the University of Applied Sciences in Karlsruhe, Germany.

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http://www.ti.com/lit/pdf/SLDS186

http://www.ti.com/lit/pdf/SLDU010

https://www.iso.org/standard/59603.html



http://www.ti.com/lit/pdf/SLYT625

http://www.ti.com/lit/an/slyt625/slyt625.pdf

Revision A History www.ti.com



Revision History

Revision A HistoryNOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (June 2016) to A Revision ......................................................................................................... Page

• Changed all instances of PGA331-Q1 to PGA400-Q1 ............................................................................... 1

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