Automatic component meter range design usingfloating - point conversionW. Riggs, M.Sc, and W.A. Evans, M.Sc, C. Eng.f M.I.E.E.

Indexing terms: Analogue/digital conversion, Components, Convenors, Instrumentation and measuringscience

Abstract: The control of dynamic range and resolution in the conversion of the voltage and current signals onwhose measurement depends the operation of a modern electronic component meter or 'bridge' is a majorproblem in design. The paper presents a modified form of dual-slope analogue-to-digital convertor for thispurpose. Called adaptive acquisition time (AAT) conversion, the technique directly produces a floating-point binary output representation of the signal for subsequent computation purposes. The AAT convertorleads to a bridge range design procedure resulting in a maximum variation of convertor counts of only 2.1over the entire resistance range of the instrument from 0.5 n to 8MJ2. The design of the excitation circuitresulting from the use of AAT conversion itself leads to an autoranging system faster in operation thanconventional step-by-step methods. A technique for reducing the sensitivity of the integrator to timingerrors in the acquisition period when unfiltered signals from the phase-sensitive detector are used is givenalong with other features of the implementation of the scheme in an instrument.

1 Introduction

The electronic universal component meter is a moderninstrument which calculates the resistive and reactive elementsof a component under test from a set of complex voltage andcurrent measurements. Classical AC and DC bridges have largelybeen replaced during the last 20 years by bridges based on thetransformer ratio-arm principle. These have several virtues,including simplicity of design and high accuracy in operation.More recently, a new generation of microprocessor-basedcomponent meters or 'bridges' has emerged, extending theevolutionary process. These bridges are characterised by theirspeed of operation and may have extra features such as variablefrequency and remote programmability via a general purposeinterface bus. Accuracy, however, is not as good as thatobtainable with the best transformer ratio-arm bridges. Con-ventional impedance measurement techniques have been fullydescribed by Hall in Reference 1.

The heart of the modern component meter is the excitationcircuit from which signals representing the voltage across theunknown component and the current through it are extracted.These signals usually have a large dynamic range in a wide-rangeinstrument. It is necessary to define the measurement rangesof the bridge and the dynamic range of the measured signals inorder to make full use of the resolution of the instrument'sanalogue-to-digital convertor (ADC) and to determine thecounting rate required for this. Usually there is a need forsignal conditioning by means of attenuators and level control-lers to limit the dynamic range of the signal presented to theADC. Essentially, the problem concerns the representation ofthe widely differing signal levels encountered in the electronicbridge in a fixed range number format, i.e. the binary outputof the ADC.

Whenever this problem arises, the use of a floating-pointnumber system greatly increases the range of numbers it ispossible to represent with a given number of bits and efficientlyuses these to maintain the required accuracy. The adaptiveacquisition time (AAT) convertor* described in this paperproduces a floating-point conversion of its analogue inputsignal, limiting the range of the conversion count and main-taining conversion accuracy over a wide range of inputs.

The paper first describes the AAT convertor. Then, in

•Patent pending

Paper 123SG, first received 23rd June and in revised form 3rdDecember 1980The authors are with the Department of Electrical & ElectronicEngineering, University College of Swansea, Singleton Park, Swansea,Glam. SA2 8PP, Wales

considering the voltage and current relationships in theexcitation circuit of an electronic bridge, the influence of thisconvertor on the design of the ranges and the autorangingsystem is described. Some features of the practical implemen-tation of the system in an experimental electronic bridge aregiven, including a phase-locked convertor acquisition perioddesigned to minimise errors when unfiltered PSD signals aredirectly integrated.

2 Adaptive acquisition time convertor

The dual-slope ADC performs a voltage-to-time conversion inwhich a stable reference frequency is counted to establish anaccount of time. Figs, la and b show a basic dual-slopeintegrator and its output waveforms for conventional oper-ation. A signal is integrated for a fixed time tx. During thetime t2, a reference voltage returns the integrator output to itsstarting value. Since the net integration of the unknown inputand reference voltage is zero, the integrator output voltage Vo

is given by

Vn =RC

= 0

or

ref,sig

The resulting count t2 is proportional to the input signal asshown in Fig. \b, where signal a is greater than signal b.Frequently, the integration period tt is fixed at 20 ms or amultiple thereof, to reject any spurious 50 Hz componentsin the input signal. In the AAT convertor, tx is allowed to vary,but remains quantised to certain binarily related multiplesof 20 ms. Within a maximum time limit, a small signal isintegrated longer than a large signal, thus maintaining the sizeof the conversion count. Thus signal-to-noise ratio is alsoimproved when a small signal is being handled. The AATconvertor requires a comparator that triggers at half themaximum output level of the integrator, and a time constantof integration selected so that the maximum input signalcauses the integrator output to reach this threshold within abase period, e.g. one mains period. Fig. \c shows the operationof the AAT convertor for three signals a, b and c where ais greater than b and b greater than c. If, after integration forone mains period, the output level has not reached the halfwaythreshold level, the integration time is doubled. If the thresholdcomparator triggers during the extended integration time, this

IEEPROC, Vol. 128, Pt. G, No. 2, APRIL 1981 0143-7089/81/020067 + 07 $1.50/0 93

is terminated at the end of two mains periods. Otherwise, tx

is again doubled to four mains periods. This process iscontinued to a specified maximum of 2M mains periods, sothat signals lying between the maximum value and this dividedby 2 " all yield integrator outputs lying between maximum andhalf scale, with a corresponding range of conversion counts.It can be seen from Fig. Id, which pertains to the maximum

•v,ref

-V signal

V.max

V^rnax

lower RC limit

*- upper RC limit

maximum input signal

d

Fig. 1 Dual-slope integrator, conventional and adaptive acquisitiontime-convertor timing diagrams

input signal condition, that the integrator time constant maylie between the value described above and half this value,without effect on the operation of the system. This preservesthe latitude of selection of timing components normallyassociated with dual-slope systems.

The AAT converter's 2:1 restricted range of conversioncounts conveys only part of the information about the inputsignal. Further scaling information is held in the number ofmains periods forming tx. When continually doubled as de-scribed above, the reciprocal of this number is the value of apower of two which is the exponent of a floating-point binarynumber. The mantissa of this number is the conversion countitself. The exponent describes the order of magnitude of thenumber and the mantissa describes the number to the requiredaccuracy within that range. The AAT dual-slope integratorthus performs a floating point analogue-to-digital conversion,maintaining accuracy at the expense of a binarily increasingacquisition period.

In floating-point arithmetic, a normalised number is onewhose mantissa M has been adjusted to lie in the range

[l/r, 1)

where r is the number system radix — two here. Theoretically,the AAT convertor could produce normalised floating-pointresults, as the mantissa or conversion count lies between halfand full scale. Operation to achieve such counts, however,would not allow tolerance on the timing components or countrate and, in practice, overflow would almost certainly occur. Itis therefore better to postnormalise a conversion result bymeans of a software routine before using the data in acalculation.

3 Bridge range design

The property of the AAT convertor of maintaining conversioncount accuracy over a wide range of input signal levels hasinfluenced the design of the ranges and the range selectionsystem of an experimental electronic bridge. Fig. 2a shows theprinciple of the instrument's excitation circuit for the simpleresistance case. Unknown resistor Ru is placed in series withstandard resistor Rs, across which a signal representing thecircuit current is developed. Ru can then be calculated digitallyfrom the magnitudes of the voltage and current signals. It hasbeen shown [2] that any unknown impedance placed in theposition of Ru can be evaluated in this manner when thevoltage and current signals are resolved into quadraturecomponents.

current signal

(1) v=Ru i(2)v=-Rsi*V

voltage signal

signals obtainedwhen R,,= Rc/8

signals obtainedwhen Rur8R

current

=V/9

voltagesignal= 8 v/9

currentsignal =8V79

V/9R voltagesignal =V79

Fig. 2 Voltage and current relationships in excitation circuit

The voltage and current relationships in the basic excitationcircuit, where the unknown impedance is purely resistive, areshown by the load-line diagram in Fig. 2b. As the unknownresistor Ru varies in value from Rs/8 to SRS, the voltage andcurrent signals VR and VR vary, respectively, from V/9 and8K/9 when RU=RJ8, to %V/9 and V/9 when Ru = SRS. Ifa new standard resistor 64 times higher than the first isselected when Ru = 8RS, then the voltage and current signalsagain become V/9 and 8K/9; indeed, this 64:1 standardresistor switching will always result in their lying within thesame 8:1 dynamic range. If the AAT convertor allows alengthening of the acquisition time to eight base periods, thenthe 8:1 dynamic range of the signals can be fully accomo-dated to give a maximum 2:1 variation in the accumulatedconvertor count over the entire unknown resistance rangefrom one eighth the lowest standard resistor to eight times thehighest. A time limit of eight mains periods has been placed onthe integration time in the bridge in order that the measure-ment cycle should not become unduly slow.

94 IEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981

Four standard metal film resistors of 4.000 12, 256.012,16.38kl2 and 1.048 M12 are used in the experimental bridge,giving a range of resistance measurement from 0.5 £2 to 8 M12in the following ranges

Range

Standard resistor

Measurement range

0 1

25612,

On each range, the voltage and current signals are bounded bythe limits shown on Fig. 2b. Outside of these ranges, measure-ment accuracy falls as it is dominated by the reduced conver-sion accuracy of the voltage signal below 0.512 and by that ofthe current signal above 8M12. The bridge is an impedance-measuring instrument and the corresponding inductance andcapacitance ranges are defined for \XL\ or \XC\ in the rangeRJ8 to SRS.

4 Automatic rangefinding

When the component meter standard resistors are selected onthe basis of the previous Section, the instrument is operatingon the correct measurement range when Ru lies in the rangeRJS to 8RS. Unfortunately, the resulting measurement rangescontain figures which are untidy from the operational view-point. For example, with the above set of chosen standardresistors, the measurement ranges are from 0.5 to 3212, 32 to204812 etc. The design integrity could be compromisedsomewhat by the use of decimal ratio standard resistors suchas 1012, 1 k!2, 100k!2, and allowing Ru to vary from Rs/l0to IORS on each measurement range. The component meter,however, is an impedance measuring instrument and thefrequency-dependent measurement range tables which resultwhen a capacitor or inductor, Zu, is substituted for Ru againbecome untidy.

It is therefore desirable that the bridge should direct theoperator to the correct range for each measurement, or becapable itself of finding that range. Ideally, an autorangingsystem should not incur a penalty of greatly extendedmeasurement time. To some extent, this has been achieved inthe present work. Frequency is removed as a variable from therange selection procedure in the bridge, as the operator firstspecifies the operating frequency he requires for a compleximpedance measurement. Ranging information is derived fromthe measured signal components. The nature of the voltageand current relationships in the excitation circuit and thepreviously described scaling of the standard resistors thenpermit a special autorange technique in which a measure-ment can be made on the correct range after just one trialmeasurement. Stepping along successive ranges is not required.

The present instrument provides two modes of measure-ment. The first is for resistors where the voltage and currentsignals are assumed to be in phase. The second mode fullyevaluates any impedance Zu by the resolution of the voltageand current signals into quadrature components.

Consider a measurement made in the simplified resistancemode. Then

where the voltage signal = a and the current signal = c.The AAT-oriented design of the excitation circuit establishes

a system where the ratio of the voltage and current signals isalways in the range £ to 8. The normalised floating-pointrepresentation of £ is \ x 2"2 . The floating-point arithmeticsoftware for the bridge uses a 16-bit mantissa and 8-bitexponent, either being in twos' complement form when

JEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981

negative. The value \ x 2~2 is thus represented in binarynotation by 010000000000 0000 11111110 or in hexa-decimal notation by 4000 FE, and \ is the smallest number soexpressed with an exponent of — 2. The value 8 is represented

.16.38kl2,

^204812- i 3 1 k

1.048M12,

by \ x 24 or 4000 04, but is not uniquely identified by itsexponent. However, 4000 04 is only one least significant bitgreater than 1FFF03, which is the largest number with anexponent of + 3. Thus, if an unknown resistor is measured onthe correct range, the binary exponent of the normalisedquotient of a/c always lies in the range [—2,3].

When, in the impedance measuring mode, an unknownimpedance is measured with the correct standard resistor, theratio of the moduli of the voltage and current signals alwayslies in the range \ to 8. This ratio is given by

a2+b2

c2+d2

where the voltage signal = a+ jb and the current signal= c+jd.

If evaluated and normalised, the range of the binaryexponent of this quantity is again given by [—2,3] whenon the correct range.

The bridge examines the normalised binary exponents ofa/c or y/(a2 + b2)/(c2 + d2), to determine whether a measure-ment has been made on the correct range. If the wrong rangehas been used, it is possible to determine the correct rangefrom the value of the exponent.

Consider again the resistance ranges. If the instrument isoperated on the lowest range, then the normalised binaryexponent of a/c will lie in the range [— 2, 3] for all unknownresistors Ru in the range [0.5,32)ohm. If the unknownresistor lies in the range [32, 2048) ohm then the ratio of thevoltage and current signals will lie in the range [8, 512). Thenormalised binary exponent will then lie in the range [4,9]indicating that the measurement should be made one rangehigher. If the unknown resistor lies in the range [2.048,131.072)kilohm the ratio of voltage and current signals willlie in the range [512, 32768). The normalised binary exponentwill then lie in the range [10, 15], indicating that the measure-ment should be made two ranges higher. Similarly, anexponent greater than 15 would indicate that a measure-ment should be made three ranges higher. In practice, therangefinding system based on these exponent examinationsworks reliably only for a maximum jump of two ranges, owingto the dynamic range limitations of the signal handlingcircuitry.

It is thus possible only to give an indication 'increaserange' or 'decrease range' if the operator has manually selectedone of the four bridge ranges. When in the autorange mode,however, the first measurement sequence is always performedon the lowest range but one. The bridge can then reliablymake a second, improved measurement one or two rangeshigher, or one lower. In so doing, it is possible to give anexact indication of the correct range to use with similarunknown components. Autoranging is thus always completedin two measurement sequences, as against the possible four ofconventional set-by-step systems.

5 Implementation

The AAT dual slope convertor and its associated ranging

95

system have been successfully used in an experimental variablefrequency electronic component meter shown in blockschematic form in Fig. 3. A low distortion sine wave excitationsignal is generated by 2-stage process of filtering a square-wavein a nonrecursive digital filter and further smoothing theresult in an analogue interpolating filter which ensures that

quadrature components by means of a phase-sensitiverectifier (PSD). To remove the effects of DC offsets throughoutthe system, each signal is resolved against antiphase axes andoffset-free data are available as the difference of two conver-sions [2]. Thus, the voltage-to-time circuit of Fig. 4 must beable to handle both polarities of signal from the PSD. The

frequency control

programmable divider crystal oscillator

PSD phase control

twisted ring counter

display

soft key controls

MICROCOMPUTER

PSD phase selectorPSD drive

nonrecursive digital filter

i switched analogue filter

excitation signal

range control,voltage/currentselection ,APSsynchronisation

zero crossing /polarity f lag, AATthresholdf lag, counter control,integrator control

combined operationalmeasuring circuitryand phase-sensitiverectifiers

floating-pointdual slope ADC

Fig. 3 Block diagram of component meter

unwanted harmonic components are more than 60 dB downon the fundamental at all operating frequencies. In addition,the reference waveforms required by the PSD circuit occurnaturally at the outputs of the twisted ring counter, whoseclock input is generated from a crystal oscillator. The com-bined phase-sensitive rectifiers and operational measuringcircuitry have been discussed elsewhere [2]; these lead toan implementation which is particularly economical in termsof number of components employed. Owing to the limitedrange of the conversion counts normally accumulated, thesystem does not require a particularly fast counter to runwhile the reference current is being integrated. Softwarecounting loops which increment or decrement a 16-bit micro-processor register pair (8085) at 120 kHz are used as theconversion counter. The adaptive acquisition period timingand control functions are also performed by microprocessorprogram. The convertor circuitry thus comprises little morethan the basic integrator, reference supplies, analogue switchesand comparators shown in Fig. 4.

The operation of the bridge involves the resolution of thevoltage and current signals from the excitation circuit into

unknown component

bridge uses a discrete component, bipolar convertor in whichthe integrator output is driven both positively and negativelyfrom zero volts. Unlike a full-scale complementing system,this approach allows the AAT convertor to lengthen theintegration time for small signals of both polarities, withconsequent signal-to-noise ratio improvement for both. Theintegrator capacitor is also exercised in both directions, withpossible diminution of dielectric retention problems.

The integrator control software outline in the flowchart ofFig. 5 has been structured as a complete data gathering and

| set iteration counter I =Q|

| acquisition period synchronisation|

no

A AT acquisition periodT= 1,2,̂ or 8 base periods

RST (reset integrator)

{threshold) VOK

let acquisitionperiod = T

examine polarity detector andselect voltage reference

|invert measurement phase]

apply reference and startconversion period counter |store m-phase measurement]

| derive exponent from T |

yes

voltage referencesources

store antiphase measurement]I

signal input7

conversion)ntegrator

Fig. 4 Outline of dual-polarity voltage to time-convertor circuit

perform subtraction of measurements

Fig. 5 Generalised flowchart for equalised AAT conversion withAPS (as used in component meter)

96 IEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981

\

Fig. 6 Resistor measurement

a Measurement of 32 £1 resistor on range 1. V:/:: 1:8b Measurement of 2048 fi resistor on range 1. K:/::8:lThese show AAT action at two range boundaries

processing routine. Once called, the routine automaticallyperforms two AAT conversions for offset cancellationand returns normalised floating-point conversion data to thecalling program.

The action of the AAT convertor and bridge ranging systemin ensuring that the integrator is always driven to a levelbetween half and full output can be seen from Figs. 6 and 7.The bridge first measures the current signal against antiphaseaxes and then, similarly, the voltage signal. The excitationsignal is 100 Hz here, and the halfwave output of the PSDis directly integrated. The standard resistor on range 1 is256 £2 and that on range 2 is 16.38 k£2. Thus, in the measure-ment of a 32 £2 resistor on range 1, the current signal isintegrated for one mains period and the voltage signal for eight,as shown on Fig. 6a. These times are interchanged at the otherend of the range, 2048 ft, as shown in Fig. 6b. Fig. 7 shows theaction of the autoranging system in selecting a range suchthat the magnitude of the integrator output always liesbetween five and ten volts. This occurs with a signal inte-gration time of two mains periods for a midrange measurement,

Fig. 7 Resistor measurement-a Autoranging from range 1 to range 2 for 1638412 resistor.16384 il is midrange on range 1. V:I:: 1:1

as seen in Fig. 7 and Fig. 8, which additionally shows theconvertor control signals as they are applied in Fig. 4.

In the resolution of a signal against antiphase switching axesfor offset cancellations, it can happen that opposite polaritysignals are integrated for different times as shown in Fig. 9.Theoretically this has no effect, as the doubling of the conver-sion count or mantissa is compensated by a reduction by oneof the exponent formed from the acquisition period. Practi-cally, it has been found desirable that the antiphase signalpairs should be integrated for equal times, to balance anycontributions from 2nd-order effects.

Fig. 8 Integrator control waveforms

a Midrange resistor measurement, e.g. 256 J2 on range 1b SIG, connects signal to integratorc POS, connects V+

Kfto integratord NEG, connects V'^fto integratore RST, resets integrator

Fig. 9 Resistor measurementa Showing current and then voltage conversions for 132 fi resistor onrange 1. Voltage signal just reaches Vfhreshold (5 ^)b Showing current and then voltage conversions for 120fi resistor onrange 1. Voltage signal does not reach Ky^/joy (5 V). Integrationtime is doubled.

The AAT control software shown in the flowchart of Fig. 10contains one accurately timed 20 ms delay period. The signalintegration switch is closed only during this period. The totalsignal integration time is controlled by two software counters,one of which counts the total number of 20 ms integrationperiods in a conversion, and the other lets each extension ofthe integration time be equal to the previous total time. Theoverall signal integration time thus continually doubles, asrequired for floating-point AAT conversion, until terminatedafter the detection of the AAT threshold comparator signal,or upon expiry of the time limit of eight mains periods.

In the 'equalised' AAT scheme that has been foundpreferable in practice, this procedure is followed only for thefirst conversion of an antiphase signal pair; in the secondconversion, the acquisition period is set to the same length asthat of the first. The acquisition periods of the general flow-chart of Fig. 5 have been expanded in the flowchart of Fig. 11

In the bridge, the PSD output is passed directly to theintegrator. The effect can be seen clearly in the photographs.Although eliminating the settling time delay of an intermediatefilter, this scheme requires that the integration time be anaccurate multiple of the period of the excitation signal.Although there is no theoretical constraint on the relativephasing of the window of the integration period and the signalwaveform, it is difficult in practice to avoid some variabilityin the conversion results when an entirely 'free-phase' schemeis implemented. It is possible to overcome this problem when

IEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981 97

halfwave phase-sensitive rectification is used. Fig. 12a shows atypical halfwave PSD output signal. Integration of this signalover either of the equal intervals A or B theoretically producesthe same result; however, switch slew rate limitations couldproduce errors in case B. The exact duration of interval Bwould be difficult to determine. Fig. 12b shows a worst-caseexample where the mean level of the signal is zero, but theeffects of timing errors would be very serious. Fig. 12c showshow the problem is overcome. By halting the microprocessorand restarting on the edge of the PSD drive signal that selectsthe ground condition, the acquisition period can be synchron-ised to the signal waveform. The acquisition period alwaysstarts just after the signal has gone to zero. The time t necessaryfor the microprocessor to handle the restart instruction se-quence ensures that the ends of integration window do not coin-cide with the presence of a signal from the PSD. The shortestsuch instruction sequence on the 8085 microprocessor consistsof a (hardware supplied) ReStarT instruction, followed by anOUTput instruction, assuming that all control signal con-ditions have been preset. Figs. 13 and 14 demonstrate themethod in practice. The software acquisition period synchron-isation (APS) scheme can work at 100 kHz, but as the half-period of the excitation signal approaches the minimumrestart instruction sequence time, the timing becomes moredifficult, and half cycle skipping with dummy instructionswould be necessary to ensure zero signal switching.

6 Conclusions

An electronic component meter in which accuracies of 0.1%have been achieved has been designed and built around theAAT convertor. With further refinements to the circuitry, theprinciples employed offer considerable potential for improve-

let counter B = 0let counter 0 = 1

star t integrat ion , t i m e = 0stop integration at t ime =20 ms

let B = B • 1let C = C - 1

Fig. 10 Flowchart of AAT acquisition period control by means oftwo counters

98

(start of 1st acquisition period^ (start of 2nd acquisition period)

let 1 = 1let iteration counter 1=01

let counter B=0let counter C= 1

start integration ,t = 0stop integration at t = 20ms

Fig. 11 Flowchart of equalised AAT acquisition period controlscheme for measurement of antiphase signal pairs

( i ) -

microprocessorhalted

interrupt / restart '\on this edge

microprocessor restarted

Fig. 12 Acquisition period synchronisation (APS)

IEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981

SQf

, b

Fig. 13 Acquisition period synchronisation

a Signal waveform (100 Hz)b SIG, connects signal to integrator when lowPSD output of 0.4 V peak integrated for 80 ms, starting and finishingjust after signal ground is selected

ment on this figure and so offer an alternative, even for highaccuracy measurement, to the ratio-arm bridge with itsrestricted frequency range and slower operation. Owing to thedynamic range controlling action of the AAT-based bridgerange system, the analogue electronics are relatively straight-forward and contain no special level control circuitry. Lowclock rates (120 kHz) have been used. This contrasts withpreviously reported work [3] where higher clock rates arenecessary to obtain the same resolution during the measure-ment sequences, leading to the use of hardware rather thansoftware counters. The integrator itself, where the interplaybetween the system software and hardware is most evident,has been successfully constructed from discrete components,yet the component count of the analogue board is substantiallylower than that of similar commercial instruments [3]. Nopotentiometer adjustments are necessary by virtue of themeasurement techniques used.

The stability of the integrator performance in the directintegration of phase-sensitively rectified signals has beenassured through the use of APS. The variability between thedisplayed results of successive measurements of a standard

Fig. 14 Acquisition period synchronisation

a Signal waveform (100 Hz)b SIG, connects signal to integrator when lowPSD output of 1.6 V peak integrated for 20 ms, starting and finishingjust after signal ground is selected. The program waits until conditionsare properly established

component has been at the limit of resolution of the arithmeticof the system. It is envisaged that the concepts of floating-point AAT conversion and APS will find wider application inthe fields of analogue-to-digital conversion and signal pro-cessing.

7 Acknowledgments

The authors wish to acknowlege the support provided by theUK Science Research Council.

8 References

1 OLIVER, B.M., and CAGE, J.M. (Eds.): 'Electronic measurementsand instrumentation' (McGraw-Hill, 1971), Chap. 9, pp. 264-318

2 RIGGS, W., and EVANS, W.A.: 'Component evaluation by means ofvoltage and current measurements'. Proceedings of IMEKOsymposium on application of microprocessors in devices forinstrumentation and automatic control', 1980, 358-367

3 BROWN, R.F., and BOND, D.F.: 'Improving the measuringaccuracy of components with a microprocessor'. IEE Conf Publ.174, 1979, pp. 125-128

William Riggs received the B.Sc. degree inelectrical and electronic engineering in1977 after studying at Paisley College,Scotland. Mr. Riggs has worked at CERN,Geneva, and, after a period as a SeniorResearch Assistant in the Department ofElectrical and Electronic Engineering,University College of Swansea, he gainedthe M.Sc. degree from the University ofWales in 1979. He is currently workingfor the degree of Ph.D. Mr. Riggs' re-

search interests include measurement techniques in electronicinstrumentation and the development of analogue and digitalmethods in this field.

W.A. Evans read physics at SwanseaUniversity College, receiving a B.Sc. degreein pure science with honours in physics.He was awarded the Erisson scholarshipto pursue information engineering atBirmingham University, where he ob-tained an M.Sc. degree in 1958.

Following industrial experience inCanada with Ferranti Packard, Toronto,and RCA Research Laboratories, Montreal,he was, for two years, a lecturer at the

University College of North Wales, Bangor, before returningto Swansea in 1968. Since that time he has been continuouslyengaged in research work in electronic instrumentation and iscurrently a Reader in the Department of Electrical and Elec-tronic Engineering at Swansea. He is a Member of the IEE anda Fellow of the Institution of Electronics and Radio Engineers.

IEEPROC, Vol. 128, Pt. G., No. 2, APRIL 1981 99