Automated vision system for IC lead inspection

This article was downloaded by: [University of Chicago Library]On: 14 November 2014, At: 04:23Publisher: Taylor & FrancisInforma Ltd Registered in England and Wales Registered Number:1072954 Registered office: Mortimer House, 37-41 Mortimer Street,London W1T 3JH, UK

International Journal ofProduction ResearchPublication details, including instructions forauthors and subscription information:http://www.tandfonline.com/loi/tprs20

Automated vision system forIC lead inspectionTung-Hsu Tony HouPublished online: 14 Nov 2010.

To cite this article: Tung-Hsu Tony Hou (2001) Automated vision system for IClead inspection, International Journal of Production Research, 39:15, 3353-3366,DOI: 10.1080/00207540110061913

To link to this article: http://dx.doi.org/10.1080/00207540110061913

PLEASE SCROLL DOWN FOR ARTICLE

Taylor & Francis makes every effort to ensure the accuracy of allthe information (the “Content”) contained in the publications on ourplatform. However, Taylor & Francis, our agents, and our licensorsmake no representations or warranties whatsoever as to the accuracy,completeness, or suitability for any purpose of the Content. Any opinionsand views expressed in this publication are the opinions and views ofthe authors, and are not the views of or endorsed by Taylor & Francis.The accuracy of the Content should not be relied upon and should beindependently verified with primary sources of information. Taylor andFrancis shall not be liable for any losses, actions, claims, proceedings,demands, costs, expenses, damages, and other liabilities whatsoeveror howsoever caused arising directly or indirectly in connection with, inrelation to or arising out of the use of the Content.

This article may be used for research, teaching, and private studypurposes. Any substantial or systematic reproduction, redistribution,reselling, loan, sub-licensing, systematic supply, or distribution in anyform to anyone is expressly forbidden. Terms & Conditions of access

http://www.tandfonline.com/loi/tprs20

http://www.tandfonline.com/action/showCitFormats?doi=10.1080/00207540110061913

http://dx.doi.org/10.1080/00207540110061913

and use can be found at http://www.tandfonline.com/page/terms-and-conditions

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

http://www.tandfonline.com/page/terms-and-conditions

http://www.tandfonline.com/page/terms-and-conditions

int. j. prod. res., 2001, vol. 39, no. 15, 3353 ± 3366

Automated vision system for IC lead inspection

TUNG-HSU (TONY) HOUy*

An automated vision system for the inspection of Small Outline Package (SOP)and Dual In-Line Package (DIP) IC lead ¯ aws is presented. This system consistsof a special lighting and image acquisition system, a series of processing tech-niques to measure the lead coplanarity and to inspect the skewed lead frame. Inthis research, a new algorithm for determining the reference plane of an IC andmeasuring the coplanarity was developed, and compared with a traditional algor-ithm. Experimental results show that the proposed image acquisition system ishelpful for IC lead image acquisition and the proposed lead inspection system caneŒectively detect skewed lead ICs and faulty coplanarity ICs. In addition, theproposed algorithm for ® nding the reference plane results in better performancein processing speed and detection accuracy than the traditional algorithm.

1. Introduction

The manufacturing process for surface mounted integrated circuits (IC) consists

of wafer fabrication and chip packaging. The chip-packaging processes consist of

sawing the die from the wafer, die bonding, wire bonding, molding, trimming and

forming, marking, plating, and inspection. The trend toward miniaturization, higherpin counts and ® ner pitches have put a lot of stress on both the IC manufacturing

processor and the inspector. In order to streamline the entire IC production system

and to relieve inspector stress, it is necessary to inspect these components automa-

tically based on computer vision systems.

Inspection of an IC lead during IC packaging and printed circuit board assembly

may include the following categories: lead coplanarity, lead pitch, and lead oŒset.IC lead coplanarity is the distance between the pins and the reference plane,

which is logically determined by the three longest pins. Ideally, all pins of the

SMD device contact the reference plane. In reality, only three pins will lie exactly

on that plane, and the rest will have a certain distance to it (Collins, 1992). If one or

more pins have a distance to the reference plane that exceeds a pre-de® ned maxi-mum, then the coplanarity criterion is not satis® ed. Lead oŒset is de® ned as the

distance between the real lead position with respect to the ideal lead position. The

ideal lead position is calculated based on the CAD de® nition of the component, with

respect to the calculated position. The lead pitch is de® ned as the distance between

the adjacent two pins. Lead oŒset and lead pitch ¯ aws are caused by skewed leadframes. The de® ned IC lead ¯ aws are illustrated in ® gure 1.

As ICs become smaller, have higher pin counts and ® ner pitches, checking the

lead coplanarity and pitch becomes a big challenge for the industry. When an IC

component is placed on a board, none of its leads should sit too far above the board.

International Journal of Production Research ISSN 0020± 7543 print/ISSN 1366± 588X online # 2001 Taylor & Francis Ltd

http://www.tandf.co.uk/journals

DOI: 10.1080/00207540110061913

Revision received March 2001.{ Institute of Industrial Engineering and Management, National Yunlin University of

Science and Technology 123, Sec. 3 University Road, Touliu, Yunlin 640, Taiwan.* To whom correspondence should be addressed. e-mail: [email protected]

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

Otherwise, they will not make su� cient contact with the solder paste. In addition,

the ® ner pitches require less solder in order to avoid short circuits, aggravating the

manufacturing and assembling process.

To assure reliable solder contacts in ® ne pitch devices, it is therefore a prerequi-

site that the components comply with tight coplanarity tolerances. It is the respon-

sibility of the IC manufacturer or the packaging companies to assure that its

components comply with the coplanarity speci® cation, as well as the other lead

speci® cations, such as lead pitch and lead oŒset caused by an overall frame skewness.

Therefore a 100% outgoing inspection for all of these speci® cations is absolutely

necessary, and integration of the computer vision based inspection system on a SMD

pick-and-place system is also required.

To measure the coplanarity and the other lead speci® cations, it is necessary to

inspect the device from all sides. Traditionally, coplanarity is measured from the

sides with one camera per side. However, it is di� cult to put the results for all of the

sides together in a reliable and accurate way. A laser-based system, using a triangu-

lation method by projecting a laser beam and detecting its re¯ ection has also been

used. However, the laser head or the part must be moved around so that one position

or one line can be measured at one time, which results in a low throughput.

Smeyers and Truyens (1992) designed a special lighting technique and an

advanced subpixel technique (HALE) to measure the lead coplanarity for a Quad

Flat Package (QFP) IC. They used four diŒerent light sources around the four

corners of the QFP and a camera to capture the lead image. For every lead, two

light sources in diŒerent positions were used to create two projected images of thelead on a frosted glass plate. The respective positions of the same lead in the two

images were then used to calculate the position and the height of the lead. The light

sources were switched sequentially, producing four diŒerent images. All of the infor-

mation for the four images were then combined into a data structure containing the

position of all of the individual leads. Since the system measured the coplanarity

based on projection images and a triangulation technique, a calibration procedure

had to be conducted.

Stanke et al. (1998) developed a layout using up to four mirror planes and a back

lighting source to inspect all of the sides of a QFP from one point of view. The

mirrors were located at the four sides of the reference plane at a 458, causing a

de¯ ection of the light rays, so that all sides could be seen directly from above.

Their coplanarity algorithm involved measuring the width of the light gaps and

returning a Boolean information about the coplanarity of the pins. Although this

system proved to be precise and robust and was integrated into a SMD device

industrial process, the IC chip had to be placed onto a carrier and then put on a

specially designed layout.

3354 T.-H. Hou

Figure 1. IC leads ¯ aws de® nitions.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

In this research, we present a lead inspection system based on a computer vision

system for Small Outline Package (SOP) and Dual In-Line Package (DIP) ICs. Thesystem consists of a special lighting and image acquisition system, and a series of

processing techniques to measure the lead coplanarity and lead pitch.

2. System framework

Figure 2 shows the framework of the proposed system. First of all, A SOP or DIPdevice image is captured using a top-view CCD camera through a special layout that

uses two mirrors at the sides of the reference plane at a 458. The image will contain

the top view of the IC and a re¯ ection of the height of the IC leads. A preset template

of the IC lead is then selected and a correlation procedure is used to ® nd the posi-

tions and the height of the leads.

Since there are only three pins that will lie exactly on the reference plane, themathematical equation for the reference plane can be determined using the coordi-

nates of the three pins. The distance of each pin to the reference plane is then

calculated. The longest distance of a pin to the reference plane, de® ned as the

coplanarity, is determined. By using the coordinates and coe� cients of lead correla-

tions, other lead ¯ aws such as missing leads, broken leads, and skewed lead frames

can also be detected.

3355Automated vision system for integrated circuits lead inspection

IC ImageAcquisition

CorrelationCalculation

IC Lead PositionExtraction

Reference PlaneCalculation

CoplanarityCalculation

Other FlawsDetection

Figure 2. Framework of the proposed system.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

2.1. Image acquisition system

The layout of the proposed image acquisition system is shown in ® gure 3. The IC

is put on a carrier and two mirrors are installed at 458 at the sides of the reference

plane to re¯ ect the height of the IC leads. A CCD camera is installed at the top of the

layout illuminated by ring type LED lighting. The IC image is captured by the

acquisition system (® gure 4). Block 1 region shows an image of the IC lead heightre¯ ection at one side. The block 2 region is the IC lead image from the top view and

the block 3 region is also an IC chip image from the top view. Similarly, the Blockregion 4 is an IC lead image, and the block 5 region is the IC lead height re¯ ection

image at the other side.

2.2. Correlation calculation

The correlation of two discrete functions for two dimensions is de® ned as

(Gonzalez and Woods, 1992):

fe…x; y† ¯ g…x; y† ˆXM 1

mˆ0

XN 1

nˆ0

f *e …m; n†ge…x ‡ m; y ‡ n†; …1†

3356 T.-H. Hou

r in g ty pe L EDlight i ng

m ir rorpla teIC carr ier

Figure 3. Layout of the image acquisition system.

B l o c k 1

B l o c k 2

B l o c k 4

B l o c k 5

B l o c k 3

Figure 4. IC image captured by the acquisition system.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

where * is the complex conjugate, and x ˆ 0; 1; 2; . . . ; M 1, and y ˆ 0;1; 2; . . . ; N 1.

One of the principle applications of correlation in computer vision is template

matching which is ® nding the closest match between an unknown image and a set of

known images (i.e. a template). If we try to match a subimage W…x; y† of size J £ K

within an image f …x; y† of size M £ N, (® gure 5), then the correlation between f …x; y†and W…x; y† in the simplest form is:

c…s; t† ˆX

x

X

y

f …x; y†w…x s; y t†; …2†

where s ˆ 0; 1; 2; . . . ; k; M 1, t ˆ 0; 1; 2; . . . ; N 1 and the summation is taken

over the image region where W and f overlap. For any value of …s; t† inside

f …x; y†, equation 2 yields one value for c. As s and t are varied, W…x; y† moves

around the image area, giving the function c…s; t†. The maximum value of c…s; t†indicates the position where W…x; y† best matches f …x; y†. The correlation function

given in equation (2) has the disadvantage of being sensitive to changes in the

amplitude of f …x; y† and W…x; y†. An approach used to overcome the di� culty is

to perform matching through the correlation coe� cient, which is de® ned as:

r…s; t† ˆ

X

x

X

y

‰ f …x; y† ·ff …x; y†Š‰w…x s; y t† ·wwŠ

X

x

X

y

‰ f …x; y† ·ff …x; y†Š2X

x

X

y

‰w…x s; y t† ·wwŠ2» ¼1=2

; …3†

where s ˆ 0; 1; 2; . . . ; k; M 1, t ˆ 0; 1; 2; . . . ; N 1, W is the average value of the

pixels in W…x; y†, f …x; y† is the average value of f …x; y† in the region coincident withthe current location of w. The summation is taken using the coordinates common to

both f and w.

2.3. IC lead position extraction

By selecting a template in the captured IC image (in this case the template is asubset of the lead images) and applying the correlation procedure to the selected

area, the procedure will ® nd other leads, which match closely with the template, and


Figure 5. Template matching the illustration.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

the XY positions of the leads, where the leads have high correlation coe� cients. The

template and the selected area can be preset in a training stage. The correlationprocedure then can be applied on-line to extract the test IC lead positions in the

inspection stage. Figure 6 shows an example of using the correlation procedure to

® nd the lead positions of C point in block 2 region. Similarly, the XY position of A

and B points in the block 1 region in ® gure 6 can be also extracted.

After the XY coordinate values of each pin at the A and B Points has been

extracted, the distance between the A and B point of each pin can be calculatedusing an Euclidean distance formulation. Since the image in the block 1 region is the

re¯ ected image of the IC lead height using a mirror at the side of the reference plane

at 458, the height of each IC lead (the Z value of each pin) can be calculated using the

following equation:

Lead height ˆ distance of AB sin 45¯: …4†

Therefore, the mentioned procedure can be used to ® nd the XYZ values for all of

the IC lead coordinates, and the reference plane equation can be determined using

the lead coordinates.

2.4. Reference plane and coplanarity calculation

According to the coplanarity de® nition, the longest three pins are used to buildthe reference plane equation of an IC. However, the longest three pins may reside on

the same side or may result in a plane that does not consist of the centroid of the IC.

In these cases, the plane constructed by the three longest pins will not be stable

enough to support the IC. A traditional approach to resolve this problem is not

to use one of the longest pins that is farthest away from the centroid, and replace thepin with another long pin. Therefore, a search and test of the feasibility of the other

longest pins is performed (Fukuchi, 1994). The search and test procedure is iterated

untill a reasonable reference plane is created.

In practice, some automated vision systems used a least square algorithm by

using all the pins to ® nd the reference plane. However, the reference plane acquiredfrom the least square algorithm is a pseudo-plane. Most of the longest pins de® nitely

will not sit on the plane. The coplanarity measurement based on the pseudo-plane

3358 T.-H. Hou

C

A

B

D

Figure 6. Using correlation to ® nd lead coordinates.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

will be smaller than the real one. Therefore, the least square algorithm will under-

estimate the coplanarity of an IC and result in more miss rates (more Type II errors).Instead of using the traditional algorithm and the least square algorithm to build

the reference plane, in this research, we propose a new heuristic algorithm to ® nd the

three pins that ® t the reference plane best. The procedures for the proposed algor-

ithm are as follows:

Step 1. If a SOP IC has 48 pins, then the coordinates of the IC pins are stored inUpper_Pin and Lower_Pin arrays are:

Upper Pin:

0

1

..

.

22

23

2

66664

3

77775¢ x y z‰ Š Lower Pin ¢

0

1

..

.

22

23

2

66664

3

77775¢ x y z‰ Š: …5†

Step 2. First, we assume that two of the three pins constituting the reference plane

come from the upper side and the other pin from the lower side.

Step 3. Search for the longest pin at the upper side and set this pin as ref-pin 1.

Step 4. By referring to the location of the ref-pin 1 and the centroid, we candetermine the region (Ru) in which the other longest upper pin may

appear. As shown in ® gure 7 if ref-pin 1 belongs to ‰1 ! 12Š, then the

other longest upper pin may appear in Ru ˆ ‰13 ! 24Š. On the contrary,

if the ref-pin 1 appears in ‰13 ! 24Š region , then the other longest upper

pin will appear in Ru ˆ ‰1 ! 12Š. Finally, we search for the longest pin in

the Ru region to ® nd the other upper pin that may constitute the referenceplane, and denote it as ref-pin 2.

Step 5. By connecting the lines from ref-pin 1 and the centroid, ref-pin 2 and the

centroid, the region in the lower side, denoted as RUL, containing the third

pin can be determined. We then search for the longest pin in the RUL

region, and denote it as ref-pin 3.Step 6. By using the coordinates of the ref-pin 1, 2 and 3, the reference plane

equation can be determined and is denoted as follows:

P: AX ‡ BY ‡ CZ 1 ˆ 0: …6†

Step 7. Find the angle between the reference plane P and the XY plane, and denote

this angle as ³.

Step 8. At this stage, we test another assumption that two of the three pins con-

stituting the reference plane come from the lower side and the other pin


r e f _ p i n 1 r e f _ p i n 2

c e n t r o i d

R U L

Figure 7. Three pins that de® ne the reference plane.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

from the upper side. Then, steps 3± 7 are iterated to ® nd the ref-pin 1, ref-

pin 2, ref-pin 3, P and ³.Step 9. Compare the angles in Steps 7 and 8, and ® nd the true reference plane.

Since a smaller angle between the reference plane and the XY plane repre-

sents a more stable situation for the IC on the XY plane, the smaller angle

is selected and the corresponding plane is selected as the true referenceplane. The three reference pins that constitute the true reference plane

can then be determined. The equation of the reference plane is then denoted

as AX ‡ BY ‡ CZ 1 ˆ 0.

Step 10. Calculate the distance of each pin to the reference plane. The coplanarity of

the IC is then the maximum value of the distance from a pin to the refer-

ence plane.

2.5. Other ¯ aws detection

During the correlation calculation and IC lead position extraction stages, wefound the coordinates of all of the pins and the correlation coe� cients of all of

the pins to the template. If the correlation coe� cient of a pin is high, then that

pin has high similarity to the template. On the other hand, if the correlation coe� -

cient of a pin is very low, then we can easily detect that a missing lead (or a broken

lead) occurs at the location of that pin. Since we have acquired the XY coordinatesof all of the pins, we can calculate the distance between two adjacent pins to measure

the pitch between the two adjacent pins. If the coordinates of pin 1 and pin 2 are

…X0; Y0† and …X1; Y1† respectively, then the pitch of pin 1 and pin 2 in Euclidean

distance is determined by D ˆ��…x0 x1†2 ‡ …y0 y1†2

q. If the pitch is greater or

smaller than a preset value, then we detect a pitch ¯ aw. Similarly using the XY

coordinate of the lead, we can calculate the lead oŒset. By using the right mostpin in ® gure 6 as an example, if the coordinates of the C and D points are

…X0; Y0† and …X1; Y1† respectively, then the lead oŒset equals jx1 x0j. If the

oŒset is greater than a preset value, a lead oŒset ¯ aw is detected. The pitch ¯ aws

and lead oŒset both originate from a skewed frame. Therefore, we can use either

pitch or lead oŒset to detect a skewed frame. In this research, the pitch was usedbecause we can detect the coplanarity and skewed frame ¯ aws using only the A, B,

and C coordinates in ® gure 6.

2.6. Operational procedure of the lead inspection systemThe operational procedure for the proposed IC lead inspection system is shown

in ® gure 8. First of all, an IC image is captured by the proposed acquisition facility.

Then the correlation procedure (or the template matching) is applied to the IC leads

in block 1, block 2, block 4, and block 5 regions respectively. If the correlation

coe� cient of a lead is smaller than a preset value, the system detects a missinglead in the IC, and stops testing. Otherwise, the coordinates of all of the IC leads

extracted from the template matching procedure are recorded and used to calculate

the pitch and coplanarity. If the pitch between any two adjacent pins is smaller or

larger than the standard value, then the system detects a pitch ¯ aw (a skewed lead

frame). Similarly, if the coplanarity calculated from the proposed algorithm is largerthan the standard value, then the system detects a coplanarity ¯ aw which may be

caused by bent or broken leads.

3360 T.-H. Hou

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

3. Experimental results

In order to test the feasibility of the proposed system, two experiments were

conducted. The ® rst experiment used ten 48-pin good SOP ICs to test the coplanarity

measurement reliability of the proposed system. The measurement results were then

used to set the standard value that is then used to judge if a test IC is good or bad in

the second experiment. The proposed coplanarity measurement algorithm and the

traditional algorithm were tested and compared in the ® rst experiment. The second

experiment used 25 good ICs and ® ve faulty ICs to test the inspection accuracy of the

proposed system and the traditional approach.

In this research, the test ICs were provided by a local semiconductor packaging

company (the Orient Semiconductor Electriconics Ltd). The coplanarity speci® ca-

tion of the IC is 4 mils (1 mil ˆ 1=1000 inch), and standard pitch is 19 mils with 5

mils tolerance. The image frame grabber used in this research is the EureCard

PICOLO, manufactured by the Euresys s.a. Belgium. The frame grabber has resolu-

tion up to 768 £ 576 pixels. In this research, the test IC has 1 cm in length that

corresponds to 500 pixels in the frame image. Therefore, one pixel in the image


Figure 8. Operation procedure for the proposed lead inspection system.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

corresponds to 0.787 mil and the coplanarity speci® cation of the IC is approximately

equal to 5 pixels. As for the pitch, 19 mils in length about equal to 24 pixels and the

5 mil tolerance approximately equal to 6.3 pixels.

The coplanarity measurements for the ten good ICs for both the proposed algor-

ithm and the traditional algorithm are shown on table 1. The results show that the

proposed algorithm results in smaller standard deviations than the traditional algor-

ithm. The proposed algorithm is therefore more reliable than the traditional algor-

ithm. In addition, the proposed algorithm takes only two iterations to acquire

measurements while the traditional algorithm takes 25 iterations on average to

acquire the measurements. The proposed algorithm takes ¹1 ms to get a result

while the traditional algorithm takes ¹15 ms to get a result. The proposed algorithm

is signi® cantly better than the traditional algorithm in both reliability and processing

speed.

The measurements are then used to set the standard value for the proposed

system and the traditional algorithm respectively. The standard value is set at the

mean plus three measurement standard deviations (SD). The con® dence interval

within the standard will be 99.87% , and the Type I error will only be 0.0013. By

this de® nition, the standard coplanarity for the proposed algorithm and the tradi-

tional algorithm are 5.01 pixels (4 mil) and 6.46 pixels (5 mil) respectively. The plot

charts of the coplanarity measurements and the standard value are shown in ® gure 9.

3362 T.-H. Hou

Coplanarity of Coplanarity of Iterations ofthe proposed the traditional the traditional

IC type algorithm algorithm algorithm

IC1 2.05 5.68 7IC2 2.39 2.66 31IC3 2.92 3.17 27IC4 2.49 2.33 25IC5 3.20 2.24 20IC6 4.41 4.41 25IC7 2.87 2.81 26IC8 3.53 3.65 25IC9 2.14 3.10 37IC10 2.82 3.09 24Mean 2.88 3.31 24.7SD 0.71 1.05Standard value 5.01 6.46

Table 1. Coplanarity of the 10 good IC (unit: pixel).

Proposed Algorithm

(Uni

ts:P

ixel

s)

Traditional Algorithm

(Un

its:

Pix

els

Figure 9. Coplanarity measurements of the 10 good ICs and the standard value.

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

These charts show that all of the measurements for the 10 good ICs are smaller than

the standard value. Therefore, both the proposed algorithm and the traditionalalgorithm generate feasible results. These standard values are then used to judge if

a test IC is good or bad in coplanarity measurement in the second experiment. If the

measurement is smaller than the standard value, the test IC has good one coplanar-

ity; otherwise, it is a faulty IC.

In the second experiment, 25 good IC and ® ve faulty ICs were tested. The ® rst

faulty IC has a lead missing on pin 19 (® gure10a). The second faulty IC has a brokenlead on pin 19 (® gure 10b). The third and the fourth faulty IC have skewed leads on

pins 1 and 28 in ® gure 10(c) and (d). The ® fth faulty IC has a upwardly bent lead on

pin 36 (® gure 10e).

The missing lead IC and the skewed lead ICs can be easily detected by the

proposed lead inspection system, as shown in ® gure 8. Using the correlation pro-cedure, the proposed system detects a missing lead on pin 19. As the standard pitch is

19 mil (24 pixels) and the tolerance is 5 mil (6.36 pixels), the distance between pin 1

and pin 2 in ® gure 10(c) is only 14 pixels, which is shorter than the pitch speci® ca-

tion, therefore, the proposed system detects the skewed lead IC. Similarly, the pro-

posed system detects the faulty IC in ® gure 10d because the system ® nds that the

distance (the pitch) between pin 27 and pin 28 is 32 pixels which is beyond the pitchspeci® cation.

The broken lead IC in ® gure 10(b) and the upwardly bent lead IC in ® gure 10(e)

can be detected using the proposed coplanarity measurement system. Measurement

results from the coplanarity for the 25 good ICs and the four faulty ICs (we did not

measure the coplanarity of the missing lead IC) of the proposed system and thetraditional algorithm are shown on table 2.

In this research, each IC is measured ® ve times. There are ® ve measurements and

the range in these ® ve measurements can be calculated. From the range values in

table 2 this research found that the average range measured by the proposed algor-

ithm was only 0.11 pixels and the average range measured by the traditional algor-

ithm was 1.01 pixels. The proposed coplanarity measurement algorithm results inmore stable results than the traditional algorithm.

In additional, the traditional algorithm misclassi® ed the IC5, IC6, IC10, IC13,

IC21, and IC23 as faulty ICs because their coplanarity values were larger than the

standard value, 6.46 pixels. However, the proposed algorithm does not generate any

type I error. Both the proposed algorithm and the traditional algorithm successfullydetect the broken lead faulty IC and the upwardly bent lead IC. In short, the

proposed algorithm generates better performance in measurement accuracy than

the traditional algorithm.

Table 2 also shows that both the proposed algorithm and the traditional algor-

ithm did not successfully detect the skewed lead faulty IC2 in the coplanarity meas-

urement. However, the skewed lead faulty IC can be detected by the pitch

measurement. Therefore, this research concludes that the skewed lead IC shouldbe detected by the pitch measurement procedure instead of the coplanarity meas-

urement procedure.

The reason that the traditional algorithm misclassi® ed IC5, IC10, IC13, IC21 and

IC23 as faulty ICs in coplanarity may lie on the selection of the longest three pins inconstructing the reference plane. It may be that two of the selected three pins were

too close and the diŒerence in length between the two pins was too large. Therefore,

the angle of the reference plane and the horizontal plane is too large, which results in


Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

high coplanarity values. However, the proposed algorithm can avoid this situation.

The three pins selected by the proposed algorithm are evenly spread around the IC,

therefore, the constructed reference plane does not have a large angle with the XY

plane. The above situations are illustrated in ® gure 11.

3364 T.-H. Hou

Figure 10. (a) Lead missing IC, (b) lead broken IC, (c) lead skewed IC1, (d) lead skewedIC2, (e) upwardly bent lead IC.

(a) (b)

(c)

(d)

(e)

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14


Trial 1 Trial 2 Trial 3 Trial 4 Trial 5 Range Good/bad

IC 1 proposed 1.85 1.83 1.84 1.84 1.84 0.02 Gtraditional 2.91 3.04 3.16 3.16 3.16 0.25 G




IC 5 proposed 2.48 2.51 2.59 2.58 2.53 0.11 Gtraditional 18.16 18.69 18.09 18.25 17.99 0.70 B





















Broken lead IC proposed 18.40 18.41 18.64 18.65 18.65 0.25 Btraditional 18.08 18.11 18.39 18.38 18.36 0.31 B

Skewed lead IC1 proposed 7.18 7.25 7.17 7.19 7.21 0.08 Btraditional 9.11 9.16 9.03 9.02 9.03 0.14 B

Skewed lead IC2 proposed 2.94 2.96 2.92 2.98 2.94 0.06 Gtraditional 2.36 2.36 2.46 2.37 2.41 0.10 G

Bent lead IC proposed 10.81 10.92 10.88 10.89 10.92 0.11 Btraditional 11.08 11.12 11.10 11.07 11.06 0.06 B

Table 2. Measurement results of the IC coplanarity (unit: pixel).

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

4. Conclusions

In this research, an automated vision system for inspection SOP or DIP IC lead

¯ aws was proposed. The system consists of a special lighting and image acquisition

system, and a series of processing techniques to measure the lead coplanarity and toinspect skewed lead frames. First of all, a SOP or DIP device image is captured using

a top-view CCD camera and LED ring type lighting through a special layout that

uses two mirrors at the sides of the reference plane at 458. The image contains the top

view of the IC and the re¯ ection of the IC lead height. In addition, the proposed

image acquisition system provides the opportunity to inspect the IC leads and markssimultaneously using the same image. An image correlation procedure is used in the

IC lead inspection system to ® nd the coordinates of the IC leads. A new algorithm

for determining the reference plane of an IC and measuring the coplanarity is pro-

posed. Experimental results show that the proposed image acquisition system is

helpful for IC lead image acquisition and the proposed lead inspection system caneŒectively detect skewed lead ICs and faulty coplanarity ICs. In addition, the pro-

posed algorithm for ® nding the reference plane results in better performance in

processing speed and detection accuracy than the traditional algorithm.

Acknowledgement

Research was partially supported by the National Science Council of theRepublic of China under grant number NSC 89-2213-E-224-062 .

References

Collins, R., 1992, Projective reconstruction of approximately planar scenes, 21st AIPRWorkshop, SPIE Proc. 1839, pp. 174± 185.

Fukuchi, K., 1994, IC shape measurement devices, Journal of Electronics Material, May, pp.91± 94. (in Japanese).

Gonzalez, R. C. and Woods, R. E., 1992, Digital Image Processing (Addison-Wesley).Smeyers, G. and Truyens, C., 1992, A lead coplanarity inspection system for surface

mounted devices, Electronic Manufacturing Technology Symposium (IEEE/ISHM’92),pp. 270± 277.

Stanke, G., Wohrle, T., and Schilling, F., 1998, High-precision and versatile opticalmeasurement of diŒerent sides of IC’s in the confectioning process using onlyone viewpoint, Proceedings of the 24th Annual Conference of the IEEE, Vol. 4,pp. 2425± 2427.

(a) (b)

Figure 11. Three pins of the reference plane. (a) Traditional algorithm and (b) proposedalgorithm.

3366 Automated vision system for integrated circuits lead inspection

Dow

nloa

ded

by [

Uni

vers

ity o

f C

hica

go L

ibra

ry]

at 0

4:23

14

Nov

embe

r 20

14

Documents

Automated vision system for IC lead inspection