AT91SAM9G45-EKES - Microchip Technologyww1.microchip.com/downloads/en/DeviceDoc/doc6481.pdfpower plug adapter corresponding to that of your country, and insert it in the power supply

AT91SAM9G45-EKES ....................................................................................................................

User Guide

6481B–ATARM–27-Nov-09

Section 1Introduction.................................................................................................................1-1

1.1 Scope................................................................................................................................. 1-1

1.2 Applicable Documents ....................................................................................................... 1-2

Section 2Kit Contents ................................................................................................................2-1

2.1 Deliverables ....................................................................................................................... 2-1

2.2 Evaluation Board Specifications......................................................................................... 2-2

2.3 Electrostatic Warning ......................................................................................................... 2-2

Section 3Power Up....................................................................................................................3-1

3.1 Power Up the Board........................................................................................................... 3-1

3.2 Battery................................................................................................................................ 3-1

3.3 DevStart ............................................................................................................................. 3-1

3.4 Recovery Procedure .......................................................................................................... 3-1

3.5 Sample Code and Technical Support ................................................................................ 3-2

Section 4Board Description .......................................................................................................4-1

4.1 Equipment on the Board .................................................................................................... 4-1

4.1.1 Interfaces ............................................................................................................. 4-1

4.1.2 Board Interface Connection ................................................................................. 4-2

4.1.3 Push Button Switches.......................................................................................... 4-2

4.1.4 Display LCD and LEDs ........................................................................................ 4-3

4.2 Hardware Layout and Configuration .................................................................................. 4-3

4.2.1 Processor............................................................................................................. 4-3

4.2.2 Clock Circuitry...................................................................................................... 4-3

4.2.3 Reset Circuitry ..................................................................................................... 4-4

4.2.4 Memory................................................................................................................ 4-4

4.2.5 Power Supplies.................................................................................................... 4-7

4.2.6 Debug Interface ................................................................................................... 4-9

4.2.7 Audio Stereo Interface ....................................................................................... 4-14

4.2.8 TV-Out Extension .............................................................................................. 4-16

4.2.9 Software Controlled LEDs ................................................................................. 4-16

4.2.10 Serial Peripheral Interface Controller (SPI) ....................................................... 4-17

4.2.11 Two Wire Interface (TWI)................................................................................... 4-18

4.2.12 SD/MMC Interface ............................................................................................. 4-18

4.2.13 TFT LCD with Touch Panel ............................................................................... 4-20

4.2.14 Push Buttons ..................................................................................................... 4-22

AT91SAM9G45-EKES User Guide 1-i


4.2.15 Expansion Slot ................................................................................................... 4-22

Section 5Configuration ..............................................................................................................5-1

5.1 JTAG/ICE Configuration..................................................................................................... 5-1

5.2 ETHERNET Configuration ................................................................................................. 5-1

5.3 Jumpers Configuration ....................................................................................................... 5-2

5.4 Miscellaneous Configuration Items .................................................................................... 5-3

5.5 PIO Configuration............................................................................................................... 5-3

5.5.1 Peripheral Signals Multiplexing on I/O Lines ....................................................... 5-3

5.5.2 Multiplexing on PIO Controller A (PIOA).............................................................. 5-4

5.5.3 Multiplexing on PIO Controller B (PIOB).............................................................. 5-5

5.5.4 Multiplexing on PIO Controller C (PIOC) ............................................................. 5-6

5.5.5 Multiplexing on PIO Controller D (PIOD) ............................................................. 5-7

5.5.6 Multiplexing on PIO Controller E (PIOE).............................................................. 5-8

Section 6Connectors .................................................................................................................6-1

6.1 Power Supply ..................................................................................................................... 6-1

6.2 RS232 Connector with RTS/CTS Handshake Support ...................................................... 6-1

6.3 DBGU................................................................................................................................. 6-2

6.4 Ethernet.............................................................................................................................. 6-3

6.5 USB Host ........................................................................................................................... 6-3

6.6 USB Host/Device ............................................................................................................... 6-4

6.7 JTAG Debugging Connector .............................................................................................. 6-4

6.8 SD/MMC- MCI0.................................................................................................................. 6-6

6.9 SD/MMC- MCI1.................................................................................................................. 6-7

6.10 AC97 .................................................................................................................................. 6-7

6.11 Image Sensor - ISI ............................................................................................................. 6-8

6.12 Video.................................................................................................................................. 6-9

6.13 Display Devices.................................................................................................................. 6-9

6.13.1 LG TFT LCD LG/PHILIPS.................................................................................... 6-9

6.14 Large LCD Extension ....................................................................................................... 6-10

Section 7Schematics .................................................................................................................7-1

7.1 Schematics......................................................................................................................... 7-1

Section 8Revision History..........................................................................................................8-1

8.1 Revision History ................................................................................................................. 8-1

1-ii AT91SAM9G45-EKES User Guide


Section 1

Introduction

1.1 Scope

This User Guide introduces the SAM9G45 Evaluation Kit (SAM9G45-EKES) and describes its develop-ment and debugging capabilities.

Figure 1-1. Board Photo

The Atmel® SAM9G45-EKES is a fully-featured evaluation platform for the Atmel SAM9G45-based microcontroller. The evaluation kit allows users to extensively evaluate, prototype and create application-specific designs.

The SAM9G45-EKES includes many hardware peripherals such as:

Two high speed USB hosts and one high speed device port

An Ethernet 10/100 interface

Two high speed multimedia card interfaces

An LCD TFT display (480*RGB*272)

A composite video output

AT91SAM9G45-EKES User Guide 1-1


Introduction

A camera interface

Several communication peripherals such as:

– Universal Synchronous/Asynchronous Receiver Transmitter (USART)

– Serial Synchronous Controller (SSC)

– Two-Wire Interface (TWI)

The external memory block is made of 3 memory types:

DDR2-SDRAM

NAND Flash

NOR Flash

1.2 Applicable Documents

Table 1-1. Applicable Documents

Reference Title Comments

6438A SAM9G45 Preliminary Datasheet

This document describes the SAM9G45, which is part of the Atmel's Smart ARM® Microcontrollers.

It is available from http://www.atmel.com/dyn/products/product_card.asp?part_id=4596

6485AErrata on AT91SAM9G45 Engineering Sample Devices

It is available from http://www.atmel.com/dyn/products/product_card.asp?part_id=4596

1-2 AT91SAM9G45-EKES User Guide


Section 2

Kit Contents

2.1 Deliverables

The Atmel SAM9G45-EKES toolkit includes:

Board

– The SAM9G45-EKES board

Power supply

– Universal input AC/DC power supply with US, Europe and UK plug adapters

– One 3V Lithium Battery type CR1225

Cables

– One micro A/B-type USB cable

– One serial RS232 cable

A Welcome Letter

Figure 2-1. Unpacked SAM9G45-EKES

Unpack and inspect this kit carefully. Contact your local Atmel distributor, should you have issues con-cerning the contents of the kit.



Kit Contents

2.2 Evaluation Board Specifications

2.3 Electrostatic Warning

The SAM9G45-EKES evaluation board is shipped in a protective anti-static package. The board must not be subjected to high electrostatic potentials. We strongly recommend using a grounding strap or sim-ilar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example...). Avoid touching the component pins or any other metallic element on the board.

Table 2-1. SAM9G45-EKES Specifications

Characteristics Specifications

Clock speed 400 MHz PCK, 133 MHz MCK

Ports Ethernet, USB, RS232, DBGU

Board supply voltage 5 VDC from connector

Temperature

- operating

- storage

-10° to +50° C

-40° to +85° C

Relative humidity 0 to 90% (non condensing)

Dimensions 180 mm x 160 mm

RoHS status Compliant



Section 3

Power up

3.1 Power Up the Board

Unpack the board taking care to avoid electrostatic discharge. Unpack the power supply, select the right

power plug adapter corresponding to that of your country, and insert it in the power supply.

Connect the power supply DC connector to the board and plug the power supply to an AC power plug.

The board LCD should light up and display a welcome page. Then, click or touch icons displayed on the screen and enjoy the demo.

3.2 Battery

The SAM9G45-EKES ships with a 3V coin battery.

This battery is not required for the board to start up.

The coin battery is provided for user convenience in case the user would like to exercise the date and time backup function of the SAM9G45 series devices when the board is switched off.

3.3 DevStart

The on-board NAND Flash contains a “SAM9G45-EKES DevStart”.

It is stored in the “SAM9G45-EKES DevStart” folder on the USB Flash disk available when the SAM9G45-EKES is connected to a host computer.

Click the file “welcome.html” in this folder to launch SAM9G45-EKES DevStart.

SAM9G45-EKES DevStart guides you through installation processes of IAR™ EWARM, Keil MDK and GNU toolkits. Then, it gives you step-by-step instructions on how to rebuild a single example project and

how to program it into the SAM9G45-EKES. Optionally, if you have a SAM-ICE™, instructions are also given about how to debug the code.

We recommend that you backup the “SAM9G45-EKES DevStart” folder on your computer before launching it.



Power up

3.4 Recovery Procedure

The DevStart ends by giving step-by-step instructions on how to recover the SAM9G45-EKES to the state as it was when shipped by Atmel.

Follow the instructions if you deleted the contents of the embedded Flash or the NAND Flash and want to recover from this situation.

3.5 Sample Code and Technical Support

After boot up, you can run some sample code or your own application on the development kit. You can down load sample code and ge t techn ica l suppor t f rom Atme l webs i te http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4597

Figure 3-1. Atmel Website for SAM9G45 Series



Section 4

Board Description

4.1 Equipment on the Board

Figure 4-1. Board Architecture

4.1.1 Interfaces

The board is equipped with a SAM9G45-CU chip (324-ball TFBGA package) together with the following interfaces or peripherals:

DDR2/LPDDR memory interface is connected to 128 MB DDR2-SDRAM memory

External Bus Interface (EBI) is connected to three kinds of memory devices (DDR2-SDRAM, NAND Flash and NOR Flash (not populated))

PARALLEL FLASH

AT91SAM9M10AT91SAM9G45

DEBUGDEBUG

JTAG/ICEDBGU

System ControllerSystem Controller

External MemoryExternal Memory

EBI0EBI0

EBI1 / 1.8vEBI1 / 1.8v

DDR2 SDRAM

DDR2 SDRAM

NAND FLASH

Multimédia Cards InterfaceMultimedia Cards Interface

MCI0MCI0

SPI0SPI0

MCI1MCI1

DataFlash

USARTUSART USB

USB

Host AHost A

Host BHost B

DeviceDevice

ETHERNET 10/100 MAC

ETHERNET 10/100 MAC

LCD InterfaceLCD Interface AC97

AC97

PIOPIO

TWITWI

oooooooooooooooo

Serial Eeprom

oooooooooooooooo

4 bits interfaceSD/MMC

8 bits interfaceSD/MMC

Micro

Line In

Line Out

oooooooooooooooo

LCD TFT 480*272

LCD TFT 480*272

PWMPWM

PHY RMIIRS232

Codec

NPCS0

NCS0

NCS3

NCS1

Led

CD

User I/OAudioVidéoLCD TFTMultimedia cardsMain Memory

Touch Screen

Touch Screen

Composite video

VCC 5V PIOJTAG/ICEDBGUUSBHub / Device

USB HubHigh / Full

RS232Ethernet RMII/MIIISI

Image SensorInterface

Image SensorInterface

Power / Shdn

Joystick & P.B



Board Description

One TWI serial memory

One USB Host/Device multiplexed port interface

One USB Host port interface

One RS232 serial communication port

One DBGU serial communication port

One JTAG/ICE debug interface

One Ethernet 100-base TX with three status LEDs

One AC97 Audio DAC with headphone line out, line in and mono/stereo micro inputs

One TV interface (composite video output)

One 4.3" TFT LCD Module with touch screen and back light

One ISI connector (camera interface)

One Power red LED and two general-purpose green LEDs

Two user input push buttons

One joystick with 4-direction control and selector

One Wakeup input push button

One reset input push button

One DataFlash®/SD/SDIO/MMC plus card slot (4/8 bit interface)

One SD/SDIO/MMC card slot (4-bit interface)

One Lithium Coin Cell Battery Retainer for 12 mm cell size (memory backup usage)

4.1.2 Board Interface Connection

Ethernet using RJ45 connector (J15)

USB Host, support USB host using a type A connector (J12)

USB Host/Device, support USB host/device using a type micro AB connector (J14)

UART1 (Rx, Tx, Rts, Cts) connected to a 9-way male D-type RS232 connector (J11)

DBGU (Rx and Tx only) connected to a 9-way male D-type RS232 connector (J10)

JTAG, 20 pin IDC connector (J13)

SD/MMCplus connector (J5)

SD/MMC connector (J6)

Headphone (J7), line-in (J8) and microphone headset (J9)

Speaker output (JP15)

Image sensor connector (J17)

TFT LCD display (J16), with TouchScreen (J19) and BackLigth (J21)

Test points; various test points are located throughout the board

Main power supply (J2)

4.1.3 Push Button Switches

Reset, board reset (BP1)

Wake up, push button to bring processor out of low power mode (BP2)

Right and left click, user push button switches (BP4 and BP5)

Joystick (BP3)



Board Description

4.1.4 Display LCD and LEDs

Display, 480xRGBx272 pixels LCD module display connected to the PIO port E (LCD1)

One surface-mounted power red LED, user interface (D8)

Two surface-mounted green LEDs, user interface (D6 and D7)

Three surface-mounted LEDs indicate Ethernet status (D9, D10, D11)

Figure 4-2. Board Layout Commented

The major components of the SAM9G45-EKES board are shown in Figure 4-1.

4.2 Hardware Layout and Configuration

4.2.1 Processor

The board features the Atmel SAM9G45-CU 324-ball TFBGA package. This chip runs at a nominal fre-quency of 400 MHz for the core and 133 MHz for the system bus.

For more information, refer to the last SAM9G45 datasheet available from http://www.atmel.com/

4.2.2 Clock Circuitry

The SAM9G45-EKES includes six clock sources:

JP15

TP4

TP2

Y6

Y7

C196

J20

J7

MN16

R72

C150C151

J9

C118

J8

J6

R125

C199

L24 R119

C200

R121

C113

C121

JP14

R71

R68

C136R67

J10

BP3C192

L21TP5

MN13

L22

C112

C146

C131

C130

C129

C137

C128

MN15

MN18

L18

MN23

C193

C144

JP13

Y3

R58

MN9

MN11

C122

JP10

J11

MN17

J18

MN8

MN10RR13

RR17

JP6

TP6

RR9

RR11

JP9

C164

RR19 RR21

RR25

R28

C36

MN20

C163

J12

RR23

C48

R27 R26

JP5

C165

J14

MN5

C29

R32

R23

Q2

J23

Y2

C52

C35

C27

C54

MN6

D8

Y1

L6R9

L3

L5R7

R3

JP8

R25

R33

J13

J17

JP2

JP1

MN7

C172C174

R185R109

C177

JP11

J1

RR44

Y5JP3

R93R92Y4

MN14

R107

R104

R102

R95R94C180

R112

C173

R143C221

D6D7

R11R10

JP12

JP16

R101

R100

R108

C181C175

C178 C171

J15

RR36

RR34

R142C220

JP7

L7

JP4

R103

C176

C182

J5

RR35

BP5

BP2

Q1

D5L4

D3L2

RR46

D10D11

D9

TP1

TP3

BP4

J3

BP1

MN4

MN2

MN1

D2

J2

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WAKE-UPBUTTON

RESETBUTTON

BACKUPBATTERY

«RIGHT»USER BUTTON

«LEFT»USER BUTTON

SD/MMC 1SLOTSD/MMC 0

SLOT

USERJOYSTICK

VIDEOOUTPUT

HEADPHONESHEADER

MICROPHONEINPUT

LINEINPUT

LCD DISPLAY LCD EXTENSIONCONNECTORS

ISI/CAMERACONNECTOR

POWERHOSTUSB

HOSTDEVICE

USB



Board Description

Two are alternatives for the SAM9G45 main clock,

One crystal and one crystal oscillator are used for the Ethernet MII/RMII chip,

One crystal is used for the AC97 codec chip, and

One crystal or one crystal oscillator is used for the TV encoder.

4.2.3 Reset Circuitry

The reset sources are:

Power on reset

Push button reset

JTAG reset from an in-circuit emulator interface.

4.2.4 Memory

4.2.4.1 External Memories

The SAM9G45 features a DDR2/LPDDR memory interface and an External Bus Interface (EBI) to permit interfacing to a wide range of external memories and to almost any kind of parallel peripheral.

The SAM9G45-EKES board is equipped with DDR2/LPDDR devices featuring 128 MB of DDR2- SDRAM memory (Micron MT47H64M8B6-3 16Meg*8*4).

The External Bus Interface (EBI) is connected to three kinds of memory devices:

One Parallel Flash AT49SV322DT (not populated by default)

Two DDR2-SDRAM MT47H64M8B6-3

One NAND Flash MT29F2G16ABD (not populated by default) or MT29F2G08ABD (single footprint)

The chip select NCS0, NCS1 and CS3 are used for NOR Flash, DDR2-SDRAM and NAND Flash mem-ories, respectively. Furthermore, a dedicated jumper can disconnect each of these NCS0, NCS1, and NCS3 signals, making them available for other functions.

Table 4-1. Main Components Associated with the Clock Systems

Quantity Description Component assignment

1 Crystal for Internal Clock, 12 MHz Y1

1 Crystal for RTC Clock, 32.768 kHz Y2

1 Oscillator for Ethernet Clock RMII, 50 MHz Y4

1 Crystal for Ethernet Clock MII, 25 MHz Y5

1 Crystal for AC91 Codec Clock, 24.576 MHz Y3

1Crystal for TV Encoder Clock, 13 MHz, or

Oscillator for TV Encoder, 13 MHz

Y7

Y6



Board Description

Figure 4-3. EBI0 - DDR2

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Board Description

Figure 4-4. EBI1 - DDR2 + Flash

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_D6

EB

I1_N

AN

D_F

SH

_D0

EB

I1_N

AN

D_F

SH

_D3

EB

I1_N

AN

D_F

SH

_D4

EB

I1_N

AN

D_F

SH

_D2

EB

I1_N

AN

D_F

SH

_D1

EB

I1_N

AN

D_F

SH

_D5

EB

I1_N

AN

D_F

SH

_D7

EB

I1_N

AN

D_F

SH

_D14

EB

I1_N

AN

D_F

SH

_D8

EB

I1_ N

AN

D_F

SH

_D11

EB

I1_N

AN

D_F

SH

_D12

EB

I1_N

AN

D_F

SH

_D10

EB

I1_N

AN

D_F

SH

_D9

EB

I1_N

AN

D_F

SH

_D13

EB

I1_N

AN

D_F

SH

_D15

EB

I1_D

DR

_D15

EB

I1_D

DR

_D11

EB

I1_D

DR

_D10

EB

I1_D

DR

_D12

EB

I1_D

DR

_D8

EB

I1_D

DR

_D9

EB

I1_D

DR

_D13

EB

I1_D

DR

_D14

EB

I1_D

DR

_D7

EB

I1_ D

DR

_D3

EB

I1_D

DR

_D2

EB

I1_D

DR

_D4

EB

I1_D

DR

_D0

EB

I1_ D

DR

_D1

EB

I1_ D

DR

_D5

EB

I1_D

DR

_D6

EB

I1_F

LAS

H_D

4

EB

I1_F

LAS

H_D

2

EB

I1_F

LAS

H_D

10

EB

I1_F

LAS

H_D

5

EB

I1_F

LAS

H_D

12

EB

I1_F

LAS

H_D

9

EB

I1_F

LAS

H_D

14E

BI1

_FLA

SH

_D15

EB

I1_F

LAS

H_D

3

EB

I1_F

LAS

H_D

0

EB

I1_F

LAS

H_D

6E

BI1

_FLA

SH

_D7

EB

I1_F

LAS

H_D

8

EB

I1_F

LAS

H_D

1

EB

I1_F

LAS

H_D

13

EB

I1_F

LAS

H_D

11

EB

I1_D

DR

_A2

EB

I1_D

DR

_A3

EB

I1_D

DR

_A4

EB

I1_D

DR

_A5

EB

I1_D

DR

_A6

EB

I1_D

DR

_ A7

EB

I1_D

DR

_A8

EB

I1_D

DR

_ A9

EB

I1_D

DR

_A10

EB

I1_D

DR

_ A11

EB

I1_D

DR

_A12

EB

I1_ D

DR

_ A13

EB

I1_ D

DR

_ A15

EB

I1_D

DR

_A14

EB

I1_ D

DR

_A2

EB

I1_D

DR

_A3

EB

I1_ D

DR

_A4

EB

I1_D

DR

_A5

EB

I1_D

DR

_A6

EB

I1_D

DR

_A7

EB

I1_D

DR

_A8

EB

I1_D

DR

_A9

EB

I1_D

DR

_A1 0

EB

I1_D

DR

_A1 1

EB

I1_D

DR

_A12

EB

I1_D

DR

_A13

EB

I1_D

DR

_A15

EB

I1_D

DR

_A14

NC

LK_ E

BI1

CS

_EB

I1

BA

0_E

BI1

BA

1_E

BI1

RA

S_E

BI1

CA

S_E

BI1

WE

_EB

I1

CK

E_E

BI1

CLK

_EB

I 1N

CLK

_EB

I1

CS

_EB

I1

BA

0_E

BI1

BA

1_E

BI1

RA

S_E

BI1

CA

S_E

BI1

WE

_EB

I1

CK

E_E

BI1

VR

EF

1

EB

I1_F

L AS

H_A

1E

BI1

_FL A

SH

_A2

EB

I1_F

L AS

H_A

3E

BI1

_FL A

SH

_A4

EB

I1_F

L AS

H_A

5E

BI1

_FL A

SH

_A6

EB

I1_F

L AS

H_A

7E

BI1

_FL A

SH

_A8

EB

I1_F

L AS

H_A

9E

BI1

_FL A

SH

_A10

EB

I1_F

LAS

H_A

11E

BI1

_FLA

SH

_A12

EB

I1_F

LAS

H_A

15E

BI1

_FLA

SH

_A14

EB

I1_F

LAS

H_A

13

EB

I1_F

LAS

H_A

16

EB

I1_F

LAS

H_A

18E

BI1

_FLA

SH

_A17

VR

EF

1

VR

EF

1

EB

I1_F

L AS

H_A

19E

BI1

_FLA

SH

_A20

EB

I1_F

LAS

H_A

21

CLK

_EB

I1

R_A

[2..1

5]

EB

I1_N

AN

D_F

SH

_D[0

..15]

NC

L K_E

BI1

CLK

_ EB

I1

CS

_EB

I1

RA

S_ E

BI1

CA

S_E

BI1

WE

_EB

I1

CK

E_E

BI1

BA

1 _E

BI1

BA

0_E

BI1

DQ

S0_

EB

I1

DQ

M0 _

EB

I1

DQ

S1_

EB

I1

DQ

M1_

EB

I1

R_D

[0..1

5]

H_ D

[0. .1

5 ]

H_A

[ 1.. 2

1]

EB

I1_N

AN

DO

EE

BI1

_NA

ND

WE

PC

14

PC

8

PC

4P

C5

EB

I1_N

RD

/CF

OE

EB

I1_N

WE

/NW

R0/

CF

WE

EB

I1_N

CS

0

DD

R_V

RE

F

1V8

1V8

1V8

1V8

1V8

1V8

1V8

1V8

1V8

R43

0RR

430R

JP9

JP9

C80

100 n

FC

8010

0 nF

C81

100n

FC

8110

0nF

C8 2

1 00n

FC

8 21 0

0nF

C10

410

0nF

C10

410

0nF

C10

110

0 nF

C10

110

0 nF

R40

470K

R40

470K

MT

47

H6

4M

8C

F-

3

DD

R2

S

DR

AM

MN

8

MT

47

H6

4M

8C

F-

3

DD

R2

S

DR

AM

MN

8

A0

H8

A1

H3

A2

H7

A3

J2

A4

J8

A5

J3

A6

J7

A7

K2

A8

K8

A9

K3

A10

H2

BA

0G

2

OD

TF

9

DQ

0C

8

DQ

1C

2

DQ

2D

7

DQ

3D

3

DQ

4D

1

DQ

5D

9

DQ

6B

1

DQ

7B

9

DQ

SB

7

DQ

SA

8

RD

QS

/ DM

B3

RD

QS

/NU

A2

VD

DH

9

VD

DL1

VD

DL

E1

VR

EF

E2

VD

DQ

C9

VS

SA

3

VS

SE

3

VD

DQ

A9

VD

DE

9

RF

U1

G1

RF

U2

L 3

CK

EF

2

CK

E8

CK

F8

CA

SG

7

RA

SF

7

WE

F3

CS

G8

VD

DQ

C1

VD

DQ

C3

VD

DQ

C7

VS

SQ

B2

VS

SQ

B8

VS

SQ

D2

VS

SQ

D8

VD

DA

1

VS

SJ1

A1 1

K7

BA

1G

3

A12

L2

A1 3

L8

VS

SK

9

VS

SD

LE

7

VS

SQ

A7

RF

U3

L7

R39

100K

R39

100K

R42

0RR

420R

AT

49

SV

32

2D

T

FL

AS

H CB

GA

MN

10

DN

P

AT

49

SV

32

2D

T

FL

AS

H CB

GA

MN

10

DN

P

A0

E1

A1

D1

A2

C1

A3

A1

A4

B1

A5

D2

A6

C2

A7

A2

A8

B5

A9

A5

A10

C5

A11

D5

A12

B6

A13

A6

A14

C6

A15

D6

A16

E6

A17

B2

A18

C3

RD

Y/

BU

SY

A3

A20

D3

A19

D4

WE

A4

RE

SE

TB

4

OE

G1

CE

F1

VP

PB

3

I/00

E2

I /O

1H

2

I/O

2E

3

I/O

3H

3

I/O

4H

4

I/O

5E

4

I/O

6H

5

I/O

7E

5

I/O

8F

2

I/O

9G

2

I/O

10F

3

I/O

11G

3

I/O

12F

4

I/O

13G

5

I/O

14F

5

I/O

15G

6

VC

CG

4

GN

DH

6G

ND

H1

NC

1C

4

NC

F6

R46

470K

R46

470K

JP10

JP10

C87

100n

FC

8710

0nF

MT

29

F2

G0

8A

BD

NA

ND

F

LA

SH

VF

BG

A-

63

MN

11

MT

29F

2G08

AB

DH

C:D

MT

29

F2

G0

8A

BD

NA

ND

F

LA

SH

VF

BG

A-

63

MN

11

MT

29F

2G08

AB

DH

C:D

WE

C7

N.C

6B

9

VC

CH

8

CE

C6

RE

D4

N.C

1 1E

3

WP

C3

N.C

5B

1

N.C

1A

1

N.C

2A

2

N.C

3A

9

N.C

4A

10

N.C

1 2E

4

N.C

13E

5

N.C

14E

6

N.C

15E

7

R/B

C8

N.C

17F

3

N. C

36M

1

I/O

0H

4

N.C

34L 9

N.C

2 5L2

VS

SF

7

N. C

29J5

VC

CJ6

VS

SK

3

ALE

C4

N.C

8D

6N

.C7

B10

N.C

9D

7

N.C

1 0D

8

CLE

D5

N.C

16E

8

N. C

35L1

0

I /O

1J4

I /O

3K

5I /

O2

K4

N. C

28H

5

N. C

30H

6

N.C

3 2H

7

I/O

7J8

I/O

6K

7I/

O5

J7I/

O4

K6

N. C

27J3

N. C

26H

3

VS

SC

5

N.C

2 4L1

VS

SK

8

LOC

KG

5

VC

CD

3

VC

CG

4

N.C

31G

6

N.C

18F

4

N.C

19F

5

N.C

2 0F

6

N.C

2 2G

3N

.C2 1

F8

N.C

3 3G

7

N.C

2 3G

8

N. C

37M

2

N. C

38M

9

N. C

39M

10

C94

1 00n

FC

941 0

0nF

C93

100n

FC

9310

0nF

R45

1KR

451K

MT

47

H6

4M

8C

F-

3

DD

R2

S

DR

AM

MN

9

MT

47

H6

4M

8C

F-

3

DD

R2

S

DR

AM

MN

9

A0

H8

A1

H3

A2

H7

A3

J 2

A4

J 8

A5

J 3

A6

J 7

A7

K2

A8

K8

A9

K3

A1 0

H2

BA

0G

2

OD

TF

9

DQ

0C

8

DQ

1C

2

DQ

2D

7

DQ

3D

3

DQ

4D

1

DQ

5D

9

DQ

6B

1

DQ

7B

9

DQ

SB

7

DQ

SA

8

RD

QS

/DM

B3

RD

QS

/NU

A2

VD

DH

9

VD

DL1

VD

DL

E1

VR

EF

E2

VD

DQ

C9

VS

SA

3

VS

SE

3

VD

DQ

A9

VD

DE

9

RF

U1

G1

RF

U2

L 3

CK

EF

2

CK

E8

CK

F8

CA

SG

7

RA

SF

7

WE

F3

CS

G8

VD

DQ

C1

VD

DQ

C3

VD

DQ

C7

VS

SQ

B2

VS

SQ

B8

VS

SQ

D2

VS

SQ

D8

VD

DA

1

VS

SJ1

A1 1

K7

BA

1G

3

A1 2

L 2

A13

L 8

VS

SK

9

VS

SD

LE

7

VS

SQ

A7

RF

U3

L 7

R41

470K

R41

470K

C83

100n

FC

8310

0nF

C92

1 00 n

FC

921 0

0 nF

C95

100n

FC

9510

0nF

C88

100n

FC

8810

0nF

C10

310

0nF

C10

310

0nF

C90

1 00 n

FC

901 0

0 nF

C10

010

0nF

C10

010

0nF

C10

610

0nF

C10

610

0nF

C89

100n

FC

8910

0nF

R47

DN

PR

47D

NP

C10

210

0nF

C10

210

0nF

C96

1 00n

FC

961 0

0nF

R44

0RR

440R

C97

100n

FC

9710

0nF

C99

100n

FC

9910

0nF

C98

100n

FC

9810

0nF

C10

510

0nF

C10

510

0nF

C91

100n

FC

9110

0nF

C8 6

100n

FC

8 610

0nF

C84

100n

FC

8410

0nF

C85

100n

FC

8510

0nF



Board Description

4.2.5 Power Supplies

The SAM9G45 Board contains four regulated power supplies:

3.3 VDC Supply

1.8 VDC Supply

1.0 VDC Core Supply

1.0 VDC Core UTMI Supply, PLL

The outputs of these regulated power supplies1 are distributed as necessary to each part of the circuit board.

The 3.3 VDC Supply is generated by an LTC1765-3.3 chip. It accepts VIN 5 VCC power and outputs a regulated +3.3 V to most other circuits in the SAM9G45-VB.

The 1.8 VDC Supply (VDDIOM0, VDDIOM1) is generated by an LT1765-1.8. It is powered by VIN 5 VCC power and outputs a regulated +1.8V.

The 1.0 VDC Core Supply (VDDCORE) is generated by a TPS60500 IC. It is powered by the VIN 5 VCC power.

The 1.0 VDC Core Supply (VDDUTMIC, VDDPLLUTMI and VDDPLLA) is generated by a CMOS voltage regulator R1100D series. It is powered by the output of the 3.3 VDC Supply.

Note: 1. Corresponding test points (TP1 to TP4, GND) are used with jumpers (JP1.1 to JP7) to permit probing of these voltages.



Board Description

Figure 4-5. Power Supply and Management Power Block

FO

RC

EP

OW

ER

ON

1V V

DD

UT

MIC

VD

DB

U

VD

DU

TM

IC

SH

DN

VD

DP

LLU

TM

I

VD

DP

LLA

VD

DB

U

VD

DC

OR

E

VD

DU

TM

I I

VD

DA

NA

VD

DO

SC

VD

DIO

P0

VD

DIO

P1

VD

DIO

P2

VD

DIS

I

VD

DIO

M0

VD

DIO

M1

1V3 V3

5 V

1 V8

5 V

5 V

3V3

3V3

1V 1V8

3V3

L3

10uH

150m

A

L3

10uH

150m

A

JP3

JP3

1

2

3

R4 10

K

R4 10

K

C4

1 0uF

C4

1 0uF

C1 8

2 .2u

FC

1 82 .

2uF

C10

2.2u

FC

102.

2uF

R6

68K

R6

68K

J1-2

J1-2

34

C6

2.2n

FC

62.

2nF

C19

1 0pF

C19

1 0pF

C15

2.2n

FC

152.

2nF

C17

1uF

C17

1uF

C24

4.7u

FC

244.

7uF

JP4

JP4

J1-3

J1-3

56

L2

2.2u

H

L2

2.2u

H

C8

4.7u

FC

84.

7uF

C16

1uF

C16

1uF

C14

2.2u

FC

142.

2uF

C2

2 .2u

FC

22 .

2uF

L1

1 0uH

150 m

A

L1

1 0uH

150 m

A MN

3

R11

00D

101C

MN

3

R11

00D

101C

OUT1

VDD2

GND3

MN

1

LT17

6 5- 3

.3

MN

1

LT17

6 5- 3

.3

GND11

BOOST2

SYNC14

SH

DN

11

VIN

13

GND28

GND49

GND516

VIN

24

SW

25

SW

16

NC

17

NC

315

VC13

FB

12

NC

210

GND317

D3

ST

PS

2L30

AD

3S

TP

S2L

30A

JP2

JP2

1

2

3

C1

180n

FC

118

0nF

J 2

2 .1

MM

SO

CK

ET

J 2

2 .1

MM

SO

CK

ET1 2

3

L5

10uH

150m

A

L5

10uH

150m

A

C20

100n

FC

2010

0nF

R3

1RR3

1R

C25

100n

FC

2510

0nF

C5

4 .7u

FC

54 .

7uF

JP5

JP5

1

2

3

J3J3

MN

2

LT17

65-1

.8

MN

2

LT17

65-1

.8

GND11

BOOST2

SYNC14

SH

DN

11

VIN

13

GND28

GND49

GND516

VIN

24

SW

25

SW

16

NC

17

NC

315

VC13

FB

12

NC

210

GND317

J1-4

J1-4

78

C3

100n

FC

310

0nF

C13

2.2u

FC

132.

2uF

R9

1RR9

1R

JP6

JP6

1

2

3

C9

180n

FC

918

0nF

L4

2.2 u

H

L4

2.2 u

H

R5

10K

R5

10K

D5

ST

PS

2L30

AD

5S

TP

S2L

30A

JP1

JP1

1

2

3

R1

1RR1

1R

J1-1

J1-1

12

C21

4.7u

FC

214.

7uF

D1

BA

T20

J

D1

BA

T20

J

21

D4

BA

T20

J

D4

BA

T20

J

21

R8

220K

R8

220K

L6

10uH

150m

A

L6

10uH

150m

A

MN

4

TP

S6 0

500

MN

4

TP

S6 0

500

C1M8

GN

D

9

VO

UT

7

EN

1

VIN

5

C1 P6

C2M3

C2P4

FB

10

PG

2

Q1 S

i156

3ED

H

Q1 S

i156

3ED

H

1 32

456

C23

100n

FC

2310

0nF

JP7

JP7

1

2

3

C7

100n

FC

710

0nF

C11

15pF

C11

15pF

R2

1 00K

R2

1 00K

R7

1RR7

1R

D2

5VD2

5V

C22

22uF

C22

22uF

C12

10uF

C12

10uF



Board Description

4.2.6 Debug Interface

4.2.6.1 JTAG/ICE

Software debug is accessed by a standard 20-pin JTAG connection. This allows connection to a stan-dard USB-to-JTAG in-circuit emulator.

Figure 4-6. JTAG Interface

4.2.6.2 DBGU Com Port

This UART is connected to the DB-9 male socket through an RS-232 Transceiver (TXD and RXD only).

Figure 4-7. DBGU Com Port

ICE INTERFACE

TDI

RTCKTDO

TMSTCK

NTRST

NRST

TCKTMSTDINTRST

NRSTTDORTCK

3V3 3V3

3V3

R85 0RR85 0R

R87DNPR87DNP

R86 0RR86 0R

R84 DNPR84 DNP

RR42100KRR42100K

1

5

2346 7 8

J13J13

12345678910111213151719

14161820

SERIAL DEBUG PORT

PB12

PB13

3V3

3V3

C156100nF

C156100nF

R83 0RR83 0R

C158100nF

C158100nF

C155100nF

C155100nF

J10

MALE RIGHT ANGLE

J10

MALE RIGHT ANGLE

5

4

3

2

1

9

8

7

6

1011

��

��

��

��

��

�

�

�

�

�

MN18

ADM3202ARNZ

��

��

��

��

��

�

�

�

�

�

MN18

ADM3202ARNZ

116

34

5

15

11

10

12

98

13

7

14

2

6R80100KR80100K

C153100nF

C153100nF

C160100nF

C160100nF

R82100KR82100K



Board Description

4.2.6.3 User Serial Com Port

The USART1 is used as a user serial com port. This USART1 is buffered with an RS-232 Transceiver (TXD, RXD and handshake CTS/RTS control) and connected to the DB-9 male socket. Software must assign the appropriate PIO pins (PB5 = RXD1, PB4 = TXD1, PD16 = RTS1, PD17 = CTS1) to enable the UART1 function.

Figure 4-8. User Serial Com Port

Refer to the SAM9G45 datasheet for more information about the SAM9G45 USARTs.

4.2.6.4 USB Port

The SAM9G45-EKES features USB communication ports:

Two Host Ports: Full speed OHCI and High speed EHCI

One Device Port: High speed.

USB Host Port0 is directly connected to the first UTMI transceiver. The second Host Port (Port1) is mul-tiplexed with the USB device High speed and connected to the second UTMI port.

One USB high/full speed type standard A connector

One USB interface Host/Device Micro AB connector

Refer to the SAM9G45 datasheet for detailed programming information.

RS232 COM PORT

PB4

PB5

PD16

PD17

3V3

3V3 C154100nFC154100nF

C161100nFC161100nF

C157100nFC157100nF

R79100KR79

100K

C152100nFC152100nF

��

��

��

��

��

�

�

�

�

�

MN17

ADM3202ARNZ

��

��

��

��

��

�

�

�

�

�

MN17

ADM3202ARNZ

1 16

34

5

15

11

10

12

9 8

13

7

14

2

6

R81100KR81

100K

C159100nFC159100nF

J11

MALE RIGHT ANGLE

J11

MALE RIGHT ANGLE

5

4

3

2

1

9

8

7

6

10 11



Board Description

Figure 4-9. USB Port

4.2.6.5 Ethernet 10/100 (EMAC) Port

The port is compatible with IEEE® Standard 802.3.

The SAM9G45-EKES is equipped with a Davicom DM9161AEP 10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver. It contains the entire physical layer functions of 100BASE-TX as defined by IEEE 802.3u, including the Physical Coding Sublayer (PCS), Physical Medium attachment (PMA), Twisted Pair Physical Medium Dependent Sublayer (TP-PMD), 10BASE-TX Encoder/Decoder (ENC/DEC), and Twisted Pair Media Access Unit (TPMAU).

The Ethernet interface integrates an RJ45 connector with an embedded transformer, and three status LEDs.

The Ethernet interface provides two selectable modes, MII or RMII (Reduced MII), for 100Base-Tx or 10Base-Tx. The MII and RMII interfaces are capable of both 10Mb/s and 100Mb/s data rates as described in the IEEE 802.3u standard. The signals used by MII and RMII interfaces are described in the table below.

USB HOST/DEVICE INTERFACE

USB HOST INTERFACE

(ENA)

(ENB)

(FLGA)

(FLGB)

(VBUS)

(IDUSB)

HDMA

HDPA

HDMBHDPBPD28

PB19

PD3

PD2

PD4

PD1

5V

3V3

L15

BLM21PG221SN1x

L15

BLM21PG221SN1x

C16610pFC16610pF

R88 47KR88 47K

C163100nFC163100nF

L16

BLM21PG221SN1x

L16

BLM21PG221SN1x

R8968KR8968K

MN20

SP2526A-2

MN20

SP2526A-2

ENA1

FLGA2

ENB4

OUTA8

GNG6

FLGB3

IN7

OUTB5

��

J12292303-1

��

J12292303-1

1

4

5

2

3

6

R9047KR9047K

C165

16V33 uFC165

16V33 uF

C164

16V33 uFC164

16V33 uF

VBUS

��

DMDPID

GND

J14

ZX62-AB-5P

VBUS

��

DMDPID

GND

J14

ZX62-AB-5P

12345

7

6

C162100nF

C162100nF

C167100nF

C167100nF



Board Description

Table 4-2. Pin Mapping for Normal MII and Reduced MII

Pin Name Normal MII Mode Reduced MII Mode

SAM9G45 DM9161 SAM9G45 DM9161

ETX0-ETX1 ETX[0:1] transmit data TXD [0:1] ETX[0:1] TXD [0:1]

ETX2-ETX3 ETX[2:3] transmit data TXD [2:3] NC NC

ETXEN ETXEN: transmit enable TXEN ETXEN: transmit enable TXEN

ETXER ETXER: transmit error TXER/TXD[4] NC NC

ETXCK/REFCK ETXCK: transmit clock TXCLK REFCK: reference clock REF_CLK

ERX0-ERX1 ERX[0:1]: receive data RXD [0:1] ERX[0:1]: receive data RXD [0:1]

ERX2-ERX3 ERX[2:3]: receive data RXD [2:3] NC NC

ERXER ERXER: receive errorRXER/RXD[4]/ RPTR/NODE

ERXER: receive error RPTR/NODE

ERXDV ERXDV: receive valid data RXDVECRSDV: carrier sense / data valid

CRS DV

ERXCK ERXCK: receive clock RXCLK NC NC

ECOL ECOL: collision detect COL NC NC

ECRSECRS: carrier sense / data valid

CRS (PHYAD[2:4] NC NC

EMDC EMDC: management data clock MDCEMDC: management data clock

MDC

EMDIOEMDIO: management data input / output

MDIOEMDIO: management data input / output

MDIO

NRST NRST: microcontroller resetRESET# XT1 (25 MHz)

NRST: microcontroller resetRESET# XT1 (REF_CLK 50MHz)



Board Description

Figure 4-10. Ethernet Port

For more information about the Ethernet controller device, refer to the Davicom DM9161 controller man-ufacturer's datasheet.

SP

EE

D 1

00

FU

LL D

UP

LEX

LIN

K&

AC

T

RJ4

5 E

TH

ER

NE

T C

ON

NE

CT

OR

(TX

_CLK

)

(TX

D3)

(TX

D2)

(RX

D1)

(RX

D0)

(RX

_CLK

)(R

X_D

V)

( RX

D2)

(TX

D1 )

(TX

D0 )

( TX

_ EN

)

( RX

D3)

(CO

L)(C

RS

)

( MD

C)

( MD

I O)

( MD

I NT

R)

(TX

_ ER

)(R

X_E

R)

NR

ST

PA

10P

A11

PA

14

PA

12P

A13

PA

15

PA

16

PD

15

PA

1 8P

A19

PA

17

PA

6P

A7

PA

8P

A9

PA

28

PA

27

PA

30P

A29

GN

D_E

TH

GN

D_E

TH

GN

D_E

TH

GN

D_E

TH

GN

D_E

TH

3V3

3V3

3V3

3V3

3V3

3V3

AV

DD

T

AV

DD

T

AV

DD

T

3V3

MN

2 2

DM

9161

AE

P

MN

2 2

DM

9161

AE

P

TX

_ER

/TX

D4

16

CO

L/R

MII

36

MD

C2 4

RX

-4

RX

+3

TX

-8

TX

+7

XT

14 3

RE

F_C

LK/X

T2

4 2

RX

_CLK

/10B

TS

ER

3 4

RX

_DV

/ TE

ST

MO

DE

3 7

RX

_ER

/ RX

D4/

RP

TR

38

TX

_EN

2 1

BG

RE

S4 8

AV

DD

R1

AV

DD

R2

DV

DD

4 1

DG

ND

4 4

DG

ND

1 5

AG

ND

5

AG

ND

6

LED

2/O

P2

13LE

D1/

OP

112

LED

0/O

P0

11

TX

D3

17

TX

D2

18

TX

D0

20T

XD

119

TX

_CLK

/ ISO

LAT

E2 2

RX

D0/

PH

YA

D0

29R

XD

1/P

HY

AD

128

RX

D2/

PH

YA

D2

27R

XD

3/P

HY

AD

32 6

CR

S/P

HY

AD

43 5

MD

IO25

MD

INT

R32

PW

RD

WN

10

DG

ND

3 3

RE

SE

T4 0

AV

DD

T9

DIS

MD

IX39

DV

DD

30

DV

DD

2 3

AG

ND

46

BG

RE

SG

47

CA

BLE

ST

S/ L

INK

ST

S14

N.C

4 5

LED

MO

DE

31

D11

GR

EE

ND

11G

RE

EN

R10

1D

NP

R10

1D

NP

R99

DN

PR

99D

NP

R11

31K

R11

31K

R94

0 RR

940 R

JP16

JP16

C17

410

0nF

C17

410

0nF

� � � � � � � �

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J15

J00-

0061

NL

� � � � � � � �

��

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��

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�

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J15

J00-

0061

NL

1 2 7 83 654

15

16

R10

549

R9

1%R10

549

R9

1%

R10

96.

8K1%R

109

6.8K

1%

D10

GR

EE

ND

10G

RE

EN

R10

649

R9

1%R10

649

R9

1%

R11

11K

R11

11K

C17

710

0nF

C17

710

0nF

C16

810

0nF

C16

810

0nF

R9 3

DN

PR

9 3D

NP

C18

110

0nF

C18

110

0nF

C18

010

0nF

C18

010

0nF

C18

2

10V

10uF

C18

2

10V

10uF

R1 8

50R

R1 8

50R

R10

7D

NP

R10

7D

NP

R10

81.

5KR

108

1.5K

R10

4D

NP

R10

4D

NP

C1 7

110

0nF

C1 7

110

0nF

C17

91 0

0nF

C17

91 0

0nF

RR

4610

KR

R46

10K

1

5

234

678

D9

YE

LLO

WD

9Y

ELL

OW

R97

49R

91%R

9749

R9

1%

Y5

2 5M

Hz

Y5

2 5M

Hz

1

3 2

4

C17

210

0nF

C17

210

0nF

50

M

Hz

��

��

��

��

Y4

CF

PS

- 39I

B 5

0.0M

HZ

50

M

Hz

��

��

��

��

Y4

CF

PS

- 39I

B 5

0.0M

HZ

41

32

R11

50 R

R11

50 R

R96

49R

91%R

9649

R9

1%

L17 74

2792

093

L17 74

2792

093

C16

918

p FC

169

18p F

R10

2D

NP

R10

2D

NP

R91

10K

R91

10K

R1 1

40R

R1 1

40R

C17

310

0nF

C17

310

0nF

C17

018

pFC

170

18pF

R95

DN

PR

95D

NP

R98

DN

PR

98D

NP

C17

6

10V

10uF

C17

6

10V

10uF

R92

0RR92

0R

RR

4 510

KR

R4 5

10K

1

5

234

678

R10

3D

NP

R10

3D

NP

RR

4410

KR

R44

10K

1

5

234

678

C17

810

0nF

C17

810

0nF

R11

20R

R11

20R

R11

01K

R11

01K

C17

5

10V

10uF

C17

5

10V

10uF

RR

4310

KR

R43

10K

1

5

234

678

R10

0D

NP

R10

0D

NP



Board Description

4.2.7 Audio Stereo Interface

The SAM9G45-EKES includes an AD1981B AC97 SoundMAX® CODEC for digital sound input and out-put. This interface includes audio jacks for MIC input (J9), Line audio input (J8), Headphone line output (J7) and a 2-point speaker output connector (JP15).

It is compliant with AC97 Component Specification V2.2.



Board Description

Figure 4-11. Audio Stereo Interface

For more information about the AC97 codec device, refer to the Analog Devices AD1981B controller manufacturer's datasheet.

RA

RB

(see

tabl

e)

OU

T

INOU

T

IN

OU

TI N O

UT

I N

RA

=1K

RB

=1K

CO

DE

C ID

CL

K F

RE

Q

PR

I MA

RY

SE

CO

ND

AR

YP

RI M

AR

YP

RI M

AR

Y

24. 5

76 M

Hz

12. 2

88 M

Hz

48. 0

00 M

Hz

14. 3

18 M

Hz

Loca

l XT

AL

Ext

. BI T

CLK

Ext

. BI T

CLK

(In

t o X

TA

L-IN

)E

x t. B

I TC

LK (

Int o

XT

AL-

IN)

OP

TIO

NA

L M

IC B

IAS

ING

FR

OM

VR

EF

OU

T

LIN

E-I

N

MO

NO

/ S

TE

RE

OM

ICR

OP

HO

NE

INP

UT

HE

AD

PH

ON

EL

INE

-OU

T

CL

OC

K S

EL

EC

TI O

N -

PI N

ST

RA

PI N

G T

AB

LE

OP

TIO

NA

L V

OIC

EF

ILT

ER

CO

MP

ON

EN

TS

SP

EA

KE

R O

UT

PU

T(A

C97

TX

)(A

C97

CK

)

(AC

97R

X)

(AC

97F

S)

(EX

T_ C

LK)

VR

EF

OU

T

VR

EF

OU

T

PD

7

PD

8N

RS

T

PD

9

PD

6

PE

31

AG

ND

_AC

97

AG

ND

_AC

97

AG

ND

_ AC

97

AG

ND

_AC

97

AG

ND

_AC

97

AG

ND

_AC

97

AG

ND

_AC

97

AG

ND

_ AC

97

AG

ND

_AC

97

AG

ND

_AC

97

AGND_AC97

5VA

VD

D_A

C97

AV

DD

_AC

97

AV

DD

_ AC

97

AV

DD

_AC

97

3 V3

AV

DD

_AC

97

C13

947

0pF

C13

947

0pF

C13

847

0pF

C13

847

0pF

L974

2792

093

L974

2792

093

L10

7427

9209

3L1

074

2792

093

�

C11

26V

31 0

0uF

�

C11

26V

31 0

0uF

R64

4.7K

R64

4.7K

R5 7

1KR5 7

1K

C15

1

10V

10uF

C15

1

10V

10uF

JP15

DN

PJP

15D

NP

C11

447

0pF

C11

447

0pF

R69

100R

R69

100R

C14

6

6V3

47uF

C14

6

6V3

47uF

C14

21 0

nFC

142

1 0nF

C14

110

0nF

C14

110

0nF

R77

DN

PR

77D

NP

C11

710

0nF

C11

710

0nF

L14 74

279 2

093

L14 74

279 2

093

R68

4.7K

R68

4.7K

C12

610

0nF

C12

610

0nF

C1 2

2

1 0V

1 0uF

C1 2

2

1 0V

1 0uF

C12

1

10V

10u F

C12

1

10V

10u F

C12

32 2

pFC

123

2 2pF

C12

510

0nF

C12

510

0nF

R65

2.2 K

R65

2.2 K

C13

41u

FC

134

1uF

L12

7427

9209

3L1

274

2792

093

R67

4.7 K

R67

4.7 K

C12

710

0nF

C12

710

0nF

C13

71u

FC

137

1uF

L874

2 792

0 93

L874

2 792

0 93

J93.

5 P

HO

NE

JAC

K S

TE

RE

OJ9

3.5

PH

ON

EJA

CK

ST

ER

EO

2

14

35

J83.

5 P

HO

NE

JAC

K S

TE

RE

OJ8

3.5

PH

ON

EJA

CK

ST

ER

EO

2

14

35

MN

15

AD

198 1

B

MN

15

AD

198 1

B

MONO_OUT37

HP_OUT_L39

HP_OUT_R41

LIN

E_O

UT

_L35

LIN

E_O

UT

_R36

SD

AT

A_I

N8

SPDIF48

XT

L_O

UT

3

AF

ILT

129

AF

ILT

230

AF

ILT

331

AF

ILT

432

VR

EF

27V

RE

FO

UT

28

EAPD47

NC

112

NC42

AV

DD

125

AVDD238

AVDD343

AV

DD

434

DV

DD

11

DV

DD

29

AUX_L14

AUX_R15

CD_ R20CD_GND_REF19CD_L18

LINE_IN_L23

LINE_IN_R24

MIC121

MIC222

PHONE_IN13

ID045 ID146

SD

AT

A_O

UT

5

RE

SE

T11

SY

NC

10

XT

L_IN

2

BIT

_CLK

6

JS017JS116

AV

SS

126

AVSS240

AVSS344

AV

SS

433

DV

SS

14

DV

SS

27

R6 0

DN

PR

6 0D

NP

C13

61u

FC

136

1uF

J73.

5 P

HO

NE

J AC

K S

TE

RE

OJ7

3.5

PH

ON

EJ A

CK

ST

ER

EO

2

14

35

C13

310

0nF

C13

310

0nF

C12

92 7

0pF

C12

92 7

0pF

R6 2

22K

R6 2

22K

C15

0

10V

10uF

C15

0

10V

10uF

C14

5

100n

F

C14

5

100n

F

R56

1KR56

1KC

115

470p

FC

115

470p

F

VD

D

Shu

tdow

n

Byp

ass

GN

D

Vo2

Vo1

+IN- IN

Bi a

s

VD

D/2

Av=

1

MN

16

SS

M22

11

VD

D

Shu

tdow

n

Byp

ass

GN

D

Vo2

Vo1

+IN- IN

Bi a

s

VD

D/2

Av=

1

MN

16

SS

M22

11

6

4 35

28

1

7

C1 2

41 0

0nF

C1 2

41 0

0nF

C11

8

10V

10uF

C11

8

10V

10uF

C14

310

nFC

143

10nF

R63

2.2K

R63

2.2K

R66

4.7K

R66

4.7K

Y3

24.5

7 6M

Hz

Y3

24.5

7 6M

Hz

L13

10u H

150m

A

L13

10u H

150m

A

C1 1

61 0

0nF

C1 1

61 0

0nF

R71

3.9K

R71

3.9K

C13

210

0nF

C13

210

0nF

C13

027

0pF

C13

027

0pF

C11

91 u

FC

119

1 uF

C13

127

0pF

C13

127

0pF

C14

010

0nF

C14

010

0nF

C14

947

0pF

C14

947

0pF

L11

7427

9209

3L1

174

2792

093

R76

470R

R76

470R

JP14

DN

PJP

14D

NP

1

2

3

R74

0RR74

0R

R58

DN

PR

58D

NP

C13

510

0nF

C13

510

0nF

R59

DN

PR

59D

NP

R73

0RR

730R

R78

470R

R78

470R

C12

827

0pF

C12

827

0pF

R61

22K

R61

22K

C12

02 2

p FC

120

2 2p F

R72

3.9K

R72

3.9K

�

C11

36V

310

0uF

�

C11

36V

310

0uF

R70

100R

R70

100R

C14

4

10V

10uF

C14

4

10V

10uF

C14

847

0pF

C14

847

0pF

C14

747

0pF

C14

747

0pF

R75

DN

PR

75D

NP



Board Description

4.2.8 TV-Out Extension

The Chrontel™ CH7024 chip provides an interface between the SAM9G45 LCD Controller and a TV set by converting LCD signals to TV signals.

The CH7024 is a TV encoder device which encodes the video signals and generates synchronization signals for NTSC and PAL standards. Supported TV output formats are NTSC-M, NTSC-J, NTSC-433, PAL-B/D/G/A/I, PAL-M, PAL-N and PAL-60. The CH7024 provides video output support for CVBS or S-video.

Figure 4-12. TV-Out Extension Port

4.2.9 Software Controlled LEDs

Three users LED are provided for general use. The LEDs are connected to PIO port lines, allowing their control through either GPIO or PWM control.

LEDs D6 to D8 are software controlled by PIO pins.

LEDs D9 to D11 indicate Ethernet traffic and link status. These are automatically managed by on-chip microcontroller hardware. See Section 7.1 ”Schematics” .

The frequency accuracy must be +-20ppm or higher.

Composite Video Output

(LCDMOD)

(G4)

(R6)

(B3)

(LCDPWR)

(G5)

(LCDDEN)

(LCDCC)

(R7)(G0)

(B4)

(G6)

(B5)

(R2)

(G7)(B0)

(G1)

(B6)

(R3)

(G2)

(B7)

(R1)

(R4)

(B1)

(G3)

(LCDDOTCK)

(R5)

(R0)

(B2)

(HSYNC)(VSYNC)

(TWDO)(TWCK0)

PE23PE24PE25PE26PE27PE28PE29PE30PE15PE16PE17PE18PE19PE20PE21PE22PE7PE8PE9PE10PE11PE12PE13PE14

PE3PE4PE5PE6

PE6

PE17

PE12

PE28

PE23

PE7

PE1

PE18

PE13

PE29

PE24

PE8

PE2

PE0

PE19

PE3

PE14

PE25

PE9

PE20

PE4

PE15

PE26

PE10

PE21

PE5

PE16

PE11

PE27

PE30

PE22

NRST

PE[0..30]

PA21PA20

1V8

3V3

3V3

3V3

3V3

3V3

L22742792093

L22742792093

J20J203

1

C191100nFC191100nF

C199100pFC199100pF

L241.8uH

L241.8uH

R118 4.7KR118 4.7K

C194100nFC194100nF

C200270pFC200270pF

C198

33pF

C198

33pF

C20710pFC20710pF

MN23

CH7024B-DF-TR

MN23

CH7024B-DF-TR

D71

D82

D93

D104

D115

D126

D137

D148

D159

D1610

D1711

D1812

D1913

D2014

D2115

D2217

D2319

D042

D143

D244

D345

D446

D547

D648

V39

H40

XCLK41

DE20

RESET23

VDDIO38

AVDD_DAC25

DVDD16

AVDD_PLL32

AVDD33

DGND18

AGND_DAC29

AGND_PLL31

AGND36

SPD21

SPC22

NC24

C/CVBS26

Y27

CVBS28

ISET30

XI/

FIN

34

XO

35

P-OUT37

R121

75R

R121

75R

L19742792093

L19742792093

R116

1.2K 1%

R116

1.2K 1%

C193

10V10uFC193

10V10uF

Y7

13MHz

Y7

13MHz

1

3

2

4

C197100nFC197100nF

13 MHz

��

��

��

Y6

SG-8002JC-13.0000M-PCBDNP

13 MHz

��

��

��

Y6


41

32

C195100nFC195100nF

R124 DNPR124 DNP

D13

BAT54SLT1G

D13

BAT54SLT1G

1 2

3

R119

75R

R119

75R

C205DNPC205DNP

L18742792093

L18742792093

R1250RR1250R

L20742792093

L20742792093

C192

10V10uFC192

10V10uF

R12075RR12075R

R117 4.7KR117 4.7K

TP5TP5

R122 DNPR122 DNP

L21742792093

L21742792093

C190100nFC190100nF

C196

10V10uFC196

10V10uF

C20610pFC20610pF



Board Description

Figure 4-13. Software Controlled LEDs

4.2.10 Serial Peripheral Interface Controller (SPI)

The SAM9G45 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface with the on-board serial EEPROM.

Figure 4-14. SPI

Table 4-3. Discrete LEDs

LED Description Comment

D6 Green LED User software controlled

D7 Green LED User software controlled

D8 Red LED User software controlled

D9 Yellow LED Indicates transmission or reception via Ethernet

D10 Green LED Indicates speed 100

D11 Green LED Is lit when a good link test has been detected

POWER LED

USER INTERFACE

UPRIGHTDOWNPUSH

LEFT

JOYSTICK

PB16

PB17

PB18PB14

PB15

PB[14..18]

PD30

PD31

PD0

3V3

3V3

C218

10nF

C218

10nF

C216

10nF

C216

10nF

R15470KR15470K

D7

GREEN

D7

GREEN

D6

GREEN

D6

GREEN

C215

10nF

C215

10nF

Q2IRLML2402Q2IRLML2402

1

3

2R141100RR141100R

R11 470RR11 470R

R10 470RR10 470R

C219

10nF

C219

10nF

BP3BP31

524

3 6

R12470RR12470R

C217

10nF

C217

10nF

D8REDD8RED

SERIAL DATAFLASH WRITE PROTECTNORMALLY OPEN

��

(SPI0_MISO)(SPI0_MOSI)(SPI0_SPCK)(SPI0_NPCS0)

NRST

PB3PB2PB1PB0

3V3

3V3

C110100nFC110100nF

MN14

AT45D321D

MN14

AT45D321D

RESET3

GND7

VCC6

CS4 SCK2 SI1 SO8

WP5

JP11

DNP

JP11

DNP

1

2

3

R53470KR53470K

JP12JP12

R55DNPR55DNP



Board Description

4.2.11 Two Wire Interface (TWI)

The SAM9G45 has a full speed (400 kHz) master/slave I2C Serial Controller. The controller is fully com-patible with the industry standard I2C and SMBus Interfaces. This port is used to interface with the on-board Serial DataFlash, ISI and TV encoder interface.

Figure 4-15. TWI

4.2.12 SD/MMC Interface

The SAM9G45-EKES has two high-speed 8-bit multimedia interfaces MMC/MMCPlus v4.1. The first interface is used as an 8-bit interface (MCI1), connected to a CE-ATA connector footprint and an 8-bit SD/MMC card slot. The second interface is used as a 4-bit interface (MCI0), connected to a 4-bit SD/MMC card slot.

The users must provide their own compatible cards for use with these connectors.

Please note that the power is connected to VCC, which is 3.3 volts.

SERIAL EEPROM

(TWCK0)(TWDO)PA20

PA21

3V3

3V3

JP13JP13

MN13

AT24C512BN-SH25-B

MN13

AT24C512BN-SH25-B

A01

A12

WP7

SCL6

VCC8 A3

3SDA5

GND4

R54

10K

R54

10K

C111100nFC111100nF



Board Description

Figure 4-16. SD/MMC0-MMC1

SD

/MM

CP

lus

CA

RD

INT

ER

FA

CE

- M

CI1

SD

/ MM

C C

AR

D IN

TE

RF

AC

E -

MC

I0

(MC

I0_D

A1)

( MC

I0_ D

A0 )

( MC

I0_ C

K)

(MC

I0_C

DA

)(M

CI0

_DA

3 )(M

CI0

_DA

2)

( MC

I0_ C

D)

(MC

I 1_D

A1)

(MC

I 1_D

A0)

(MC

I1_C

K)

(MC

I1_C

DA

)(M

CI1

_DA

3)(M

CI1

_DA

2)

(MC

I1_D

A4)

(MC

I1_D

A5)

(MC

I1_D

A7)

(MC

I1_D

A6)

(MC

I1_C

D)

(MC

I1_W

P)

PA

1P

A5

PA

4

PA

3P

A2

PA

0

PA

26P

A25

PA

27P

A28

PA

29P

A30

PA

24P

A23

PA

31

PA

22

PD

10P

A[ 0

.. 5]

PA

[ 22 .

.31]

PD

29P

D1 1

3V3

3 V3

3V3

3V3

R18

827

RR

188

27R

R5 2

10K

R5 2

10K

R18

627

RR

186

27R

R19

227

RR

192

27R

R1 8

92 7

RR

1 89

2 7R

7SD

MM

-B0-

2211

J5 7SD

MM

-B0-

2211

J58 57 6 4 3 2 1 9

141516 13 12 11 10

RR

41 68K

RR

41 68K

1

5

234

678

R19

427

RR

194

27R

C10

8 100n

FC

108 10

0nF

R19

527

RR

195

27R

R19

327

RR

193

27R

R20

127

RR

201

27R

RR

34

68K

RR

34

68K

1

5

234

678

R19

727

RR

197

27R

R51

1 0K

R51

1 0K

FP

S0 0

9

J6 FP

S0 0

9

J68 57 6 4 3 2 1 9

101112

R18

727

RR

187

27R

R19

027

RR

190

27R

R19

627

RR

196

27R

C10

9100

n FC

1091

00n F

R19

927

RR

199

27R

R1 9

12 7

RR

1 91

2 7R

R20

027

RR

200

27R

R19

827

RR

198

27R

RR

3568

KR

R35

68K

1

5

234

678

RR

3610

KR

R36

10K

1

5

234

678



Board Description

4.2.13 TFT LCD with Touch Panel

The SAM9G45 features an LCD controller. A 4.3" 480x272 Portrait Mode LCD provides the SAM9G45-EKES with a low power LCD display, back light unit and a touch panel, similar to that used on commer-cial PDAs.

The TFT LCD component is an LG®/PHILIPS®, model number LB043WQ1.

Graphics and text can be displayed on the dot matrix panel with up to 16 million colors by supplying 24-bit data signals (8bitxRGB by default) or 16-bit data signals (5+6+5bitxRGB in option). This allows the user to develop graphical user interfaces for a wide variety of end applications.

Warning: never connect/disconnect the LCD display from the board while the power supply is on. Doing so may damage both units and is not covered by warranty.

The back light voltage is generated from a TPS61161 boost converter. It is powered directly by the VIN 5 VCC power (the control for the back light voltages is separated from the main board voltages due to the specific voltage requirements of the LCD panel).



Board Description

Figure 4-17. TFT LCD

pin1

pin2

pin3

pin2

9

pin4

pin3

7

4.3"

480

x272

TF

T L

CD

DIS

PL

AY

p in3

8pi

n39

pin3

2

pin4

0

pin3

3

pin4

2pi

n43

20

mA

M

AX

(LC

DP

WR

)

p in3

5

9 L

ED

s B

ack

Lig

ht

p in3

6

pin4

1

pin3

4

pin5

pin6

pin 7

pin 8

pin 9

pin 1

0pi

n11

pin1

2pi

n13

pin1

4pi

n 15

pin 1

6pi

n 17

pin 1

8p i

n 19

p in2

0p i

n21

p in2

2p i

n23

p in2

4p i

n25

p in2

6p i

n27

p in2

8

p in3

0p i

n31

pin4

4pi

n45

( pin

xx =

dis

play

pi n

num

b er

)

(LC

DD

EN

)

(G4)

(R6)

(B3)

(LC

DP

WR

)

(G5)

(LC

DD

EN

)

(LC

DC

C)

(R7)

(G0 )

(B4)

(G6)

(B5)

(R2)

(G7)

(B0)

(G1 )

(B6)

(R3)

(G2 )

(B7)

( R1)

(R4)

(B1)

( G3)

(LC

DD

OT

CK

)

(R5)

( R0)

(B2)

( AD

1 Xm

)(A

D3 Y

m)

(AD

0 Xp)

(AD

2 Yp)

( LC

DC

C)

R48

is p

lace

d ne

ar p

roce

ssor

Thi

s R

esis

tor

i s in

ten t

iona

lly m

ount

edin

pla

ce o

f C21

0

YpL

CD

VLE

D-

Xm

LCD

Ym

LCD

VL E

D+

XpL

CD

Ym

LCD

Xm

L CD

Yp L

CD

VLE

D-

VLE

D+

Xp L

CD

BLU

E6

BLU

E7

RE

D0

BLU

E2

BL U

E3

BL U

E4

BL U

E5

BLU

E0

BLU

E1

GR

EE

N5

GR

EE

N6

GR

EE

N7

GR

EE

N2

GR

EE

N3

GR

EE

N4

RE

D6

RE

D7

GR

EE

N0

GR

EE

N1

RE

D2

RE

D3

RE

D4

RE

D5

RE

D1

PE

0LC

DD

OT

CK

PE

2

RE

D3

PE

8P

E1 0

RE

D4

PE

9P

E11

RE

D5

PE

10P

E12

RE

D6

PE

11P

E13

RE

D7

PE

12P

E14

GR

EE

N2

PE

13P

E17

PE

14G

RE

EN

3P

E18

PE

19G

RE

EN

4P

E15

PE

20G

RE

EN

5P

E16

PE

21G

RE

EN

6P

E17

PE

22G

RE

EN

7P

E18

PE

26P

E20

BLU

E3

PE

27B

LUE

4P

E21

PE

28B

LUE

5P

E22

PE

29B

LUE

6P

E23

PE

30B

LUE

7P

E24

PE

7P

E8

PE

9

PE

15P

E16

PE

23P

E24

PE

25

PE

6

PE

6

PE

17

PE

12

PE

28

PE

23

PE

7

PE

1

PE

18

PE

13

PE

29

PE

24

PE

8

PE

2

PE

0

PE

19

PE

3

PE

14

PE

25

PE

9

PE

20

PE

4

PE

15

PE

26

PE

10

PE

21

PE

5

PE

16

PE

11

PE

27

PE

30

PE

22

3V3

3V3

5 V

PE

[0. .3

0]{3

,12}

PD

22{3

,12}

PD

21{3

,12}

PD

23{3

,12}

PD

20{ 3

,12}

LCD

DO

TC

K{1

2}

C18

810

0nF

C18

810

0nF

Conductors onTOP SIDE

PIN

1

PIN

45

LG PHILIPS

Z7

L B04

3WQ

1

Conductors onTOP SIDE

PIN

1

PIN

45

LG PHILIPS

Z7

L B04

3WQ

1R

172

0RR

172

0R

R18

4D

NP

R18

4D

NP

RR

53A

RR

53A

18

RR

49C

RR

49C

36

R15

5D

NP

R15

5D

NP

RR

48A

RR

48A

18

RR

49D

RR

49D

45

RR

53C

RR

53C

36

C21

022

0KC

210

220K

RR

52A

RR

52A

18

C2 0

9D

NP

C2 0

9D

NP

R15

7D

NP

R15

7D

NP

R17

80R

R17

80R

R16

1D

NP

R16

1D

NP

R15

40R

R15

40R

RR

49A

RR

49A

18

R14

80R

R14

80R

RR

50D

RR

50D

45

R16

40R

R16

40R

D12

ST

PS

0 54 0

ZD

12S

TP

S0 5

4 0Z

R13

00R

R13

00R

R17

60R

R17

60R

C20

12.

2uF

C20

12.

2uF

RR

50C

RR

50C

36

R17

50R

R17

50R

R16

00R

R16

00R

R12

310

RR

123

10R

RR

49B

RR

49B

27

RR

48D

RR

48D

45

R14

9D

NP

R14

9D

NP

R18

2D

NP

R18

2D

NP

R15

80R

R15

80R

C18

9

10V

10uF

C18

9

10V

10uF

RR

51D

RR

51D

45

R48

33R

R48

33R

R15

1D

NP

R15

1D

NP

R1 8

01 0

KR

1 80

1 0K

RR

52C

RR

52C

36

RR

53B

RR

53B

27

R15

00R

R15

00R

R15

20R

R15

20R

RR

48B

RR

48B

27

R17

30R

R17

30R

R17

70R

R17

70R

RR

52D

RR

52D

45

R17

40R

R17

40R

RR

50A

RR

50A

18

R15

3D

NP

R15

3D

NP

RR

50B

RR

50B

27

R5 0

2 7R

R5 0

2 7R

R16

80R

R16

80R

R16

9D

NP

R16

9D

NP

R16

20R

R16

20R

R13

64.

7 KR

136

4.7 K

R1 3

710

KR

1 37

10K

RR

51B

RR

51B

27

R18

30R

R18

30R

C2 1

1D

NP

C2 1

1D

NP

R14

40R

R14

40R

C20

322

0nF

C20

322

0nF

R14

5D

NP

R14

5D

NP

R16

60R

R16

60R

R13

30R

R13

30R

R17

90R

R17

90R

R18

10R

R18

10R

R16

7D

NP

R16

7D

NP

RR

51C

RR

51C

36

R16

3D

NP

R16

3D

NP

RR

52B

RR

52B

27

L 23

2 2uHL 2

3

2 2uH

J24

XF

2M4 5

1 51 A

J24

XF

2M4 5

1 51 A

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

R15

9D

NP

R15

9D

NP

R16

5D

NP

R16

5D

NP

RR

53D

RR

53D

45

R13

20R

R13

20R

R15

60R

R15

60R

RR

48C

RR

48C

36

R17

00R

R17

00R

R14

7D

NP

R14

7D

NP

MN

2 5T

PS

6 11 6

1 DR

VT

MN

2 5T

PS

6 11 6

1 DR

VT

SW4

GND3

FB

1C

TR

L5

CO

MP

2

VIN

6

THP7

R13

10R

R13

10RR

R51

AR

R51

A1

8

R17

1D

NP

R17

1D

NP

R14

60R

R14

60R

C20

21u

FC

202

1uF

C20

8D

NP

C20

8D

NP



Board Description

4.2.14 Push Buttons

The SAM9G45-EKES is equipped with two system push buttons, two user push buttons and one joy-stick. The push buttons consist of momentary push button switches mounted directly to the board. When any switch is depressed, a low (zero) appears at the associated input pin.

System push buttons:

– Reset, perform system reset

– Wakeup, perform system wake up

User push button:

– Right click

– Left click

Joystick:

– One touch, 5-way switching,

– Normally open momentary contacts,

– Push down to select in any position.

Figure 4-18. Push Buttons

4.2.15 Expansion Slot

GPIO1 & GPIO2, LCD signals (PIO E) are routed to the connectors extension J23

All I/Os of the SAM9G45 Image Sensor Interface are routed to connectors J17

Touch screen signals and analog I/O are connected to J18

This allows the developer to extend the features of the board by adding external hardware components or boards.

WAKE UP

NRST

RIGHT CLICK

LEFT CLICK

VDDBU

WAKE UP

NRST

PB7

PB6

3V3

R13100KR13100K

BP4BP4

BP5BP5

BP2BP2

C221

10nF

C221

10nF

BP1BP1

R143100RR143100R

R141KR141K

C220

10nF

C220

10nF

R142100RR142100R



Board Description

Figure 4-19. Expansion Slot

IMAGE SENSOR CONNECTOR

CONNECTOR EXTENTION FOR LARGE LCD

(AD1Xm)(AD3Ym) (AD2Yp)

(AD0Xp)

(GPIO2)(GPIO1)

(CTRL1) (CTRL2)

PE27PE29

PE25PE23

PE2

PE3

PE1

PE16

PE20PE18

PE14

PE22

PE10PE12

PE26

PE30PE28

PE24

PE4PE5

PE6

PE7

PE0

PE9PE8

PE11PE13PE15PE17

PE21PE19

PB21PB23PB25PB27PB9PB11

PA21PB31PB29PB30PB28PB20PB22PB24PB26PB8PB10

PA20

PD27 PD26PD25

PD19 PD18

PD24

PD23PD21 PD20

PD22

PD15PD14

VDDISIPD12 PD13

3V3

3V3

3V3

5V

3V3

C184100nFC184100nF

J17J17

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 30

J18

DNPTSM-110-01-L-DV

J18

DNPTSM-110-01-L-DV

1 23 45 67 89 10

11 1213151719

14161820

C187

10V10uFC187

10V10uF

C186100nFC186100nF

J23 TSM-120-01-L-DV

DNP

J23 TSM-120-01-L-DV

DNP

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

R128DNPR128DNP

R129

DNP

R129

DNP



Section 5

Configuration

5.1 JTAG/ICE Configuration

5.2 ETHERNET Configuration

RMII is the factory default mode.

To evaluate the MII mode, the user has to unsolder R92 and solder R93, R98 to R104, R107.

Two types of jumpers are used on the SAM9G45-EKES board:

2-pin jumpers with two possible settings:

– Fitted: the circuit is closed, and

– Not fitted: the circuit is open

3-pin jumpers with two possible positions, for which settings are presented in the following tables.

Table 5-1. JTAG/ICE Configuration

Designation Default Setting Feature

R84 Not populated Disables the ICE NTRST input

R85 Soldered Enables the ICE RTCK return. R87 must be opened

R86 Soldered Enables the ICE NRST input

R87 Not populated Disables TCK <-> RTCK local loop



Configuration

5.3 Jumpers Configuration

Table 5-2. Jumpers Configuration

DesignationDefault Setting Feature

J1 (combined

jumper array)

Closed J1-1 1-2 VDDUTMII 3V3

Closed J1-2 3-4 VDDUTIMC 1V

Closed J1-3 5-6 VDDCORE 1V

Closed J1-4 7-8 VDDPLLUTMI 1V

JP1 1-2 JP11-2 VDDIOP0 3V3

2-3 External power to VDDIOP0 3V3 nominal





JP4 Opened

Forces power on.

To use the software shutdown control, JP4 must be opened.

3V battery backup must be present and JP7 jumper set in position 1-2

JP5 1-2 JP51-2 VDDIOM0 1V8

2-3 External power to VDDIOM0 1V8 nominal

JP6 1-2 JP61-2 VDDIOM1 1V8

2-3 External power to VDDIOM1 1V8 nominal

JP7 1-2 JP71-2 VDDBU Lithium 3V Battery

2-3 VDDBU 3.3V from regulator

JP8 OpenedBMS Enables Boot on the internal ROM; closed selects the boot from the external device connected to NCS0

JP9 Closed Enables chip select access, Boot on the NCS0 (MN10 Flash)

JP10 Closed Enables chip select access, Boot on the NCS3 (MN12 NAND Flash)

JP11 Test point JP11.1: SO JP11.2: SI JP11.3: SCK

JP12 Closed Enables chip select access, Boot on the SPIO_NPCS0 (Serial Data Flash MN14)

JP13 Opened Set address A0 low (MN13 Serial EEPROM), enable Boot access.

JP14 JP14.1 = Line_Out_L JP14.3 = Line_Out_R

JP15 Used to connect a Loudspeaker

JP16 Closed DISMDIX (MN22)



Configuration

5.4 Miscellaneous Configuration Items

N.P = not populated

P = populated

5.5 PIO Configuration

5.5.1 Peripheral Signals Multiplexing on I/O Lines

The AT91SAMG45 product features 5 PIO controllers, PIOA, PIOB, PIOC, PIOD and PIOE, which multi-plex the I/O lines of the peripheral set. Each PIO Controller controls up to 32 lines. Each line can be assigned to one of two peripheral functions, A or B. The multiplexing tables in the following paragraphs define how the I/O lines of peripherals A and B are multiplexed on the PIO Controllers.

Table 5-3. Miscellaneous Configuration

DesignationDefault Setting Feature

R20 N.P JTAGSEL

R21 P Connect TSADVREF to VDDANA (may be used for specific filtering)

R22 P Connect GNDANA to GND (may be used for specific filtering)

R24 P Force TST pin to GND (chip is set in non-test mode = normal operation mode)

R47 N.PWrite protect NAND Flash (mount a 0-ohm resistor to write-protect the NAND Flash device)

R55 N.PWrite protect serial Data Flash (mount a 0-ohm resistor to write-protect the serial Flash device)

R58, R59 N.P Clock selection Audio AC97 (see mapping table in Section 7.1 ”Schematics” )

R60 N.P External clock Audio AC97 (mount a 0-ohm resistor to connect it)

R75, R77 N.P Change bias from VREFOUT (see Section 7.1 ”Schematics” )

R69, R70 Voice filter components

R84,R85R86,R87

ICE interface reset and clocking schemes (see Section 5.1 ”JTAG/ICE Configuration” )

R92, R93, R94, R95, R98, R99

R100, R101

R102,R103R104,R107

R112

Ethernet interface, MII mode (see Section 5.2 ”ETHERNET Configuration” )

Y6, R122, R124

N.P External 13 MHz oscillator (option) for the on-board video composite encoder

TP1 GND Test point

TP2 GND Test point

TP3 GND Test point

TP4 GND Test point



Configuration

5.5.2 Multiplexing on PIO Controller A (PIOA)

"R.Select" = connection selectable via an on-board resistor (default not populated)

Table 5-4. PIO Multiplexing Port A

I/O Peripheral A Peripheral B Function and Comments Power

PA0 MCI0_CK TCLK3 MMCI0 Clock VDDIOP0

PA1 MCI0_CDA TIOA3 MMCI0 Command VDDIOP0

PA2 MCI0_DA0 TIOB3 MMCI0 Data0 VDDIOP0

PA3 MCI0_DA1 TCKL4 MMCI0 Data1 VDDIOP0

PA4 MCI0_DA2 TIOA4 MMCI0 Data2 VDDIOP0


PA6 MCI0_DA4 ETX2 Ethernet MII VDDIOP0

PA7 MCI0_DA5 ETX3 Ethernet MII VDDIOP0

PA8 MCI0_DA6 ERX2 Ethernet MII VDDIOP0

PA9 MCI0_DA7 ERX3 Ethernet MII VDDIOP0

PA10 ETX0 Ethernet RMII Transmit data 0 VDDIOP0

PA11 ETX1 Ethernet RMII Transmit data 1 VDDIOP0

PA12 ERX0 Ethernet RMII Receive data 0 VDDIOP0

PA13 ERX1 Ethernet RMII Receive data 1 VDDIOP0

PA14 ETXEN Ethernet RMII Transmit enable VDDIOP0

PA15 ERXDV Ethernet RMII Receive data valid VDDIOP0

PA16 ERXER Ethernet RMII Receive Error VDDIOP0

PA17 ETXCK Ethernet RMII Transmit Clock VDDIOP0

PA18 EMDC Ethernet RMII Manag.Data Clock VDDIOP0

PA19 EMDIO Ethernet RMII Manag.Data In/Out VDDIOP0

PA20 TWD0 Two Wire Interface Data VDDIOP0

PA21 TWCK0 Two Wire Interface Clock VDDIOP0

PA22 MCI1_CDA SCK3 MMCI1 Command VDDIOP0

PA23 MCI1_DA0 RTS3 MMCI1 Data0 VDDIOP0

PA24 MCI1_DA1 CTS3 MMCI1 Data1 VDDIOP0

PA25 MCI1_DA2 PWM3 MMCI1 Data2 VDDIOP0


PA27 MCI1_DA4 ETXER R.Select MMCI1 Data4 Ethernet MII VDDIOP0

PA28 MCI1_DA5 ERXCK R.Select MMCI1 Data5 Ethernet MII VDDIOP0

PA29 MCI1_DA6 ECRS R.Select MMCI1 Data6 Ethernet MII VDDIOP0

PA30 MCI1_DA7 ECOL R.Select MMCI1 Data7 Ethernet MII VDDIOP0

PA31 MCI1_CK PCK0 MMCI1_clock VDDIOP0



Configuration

5.5.3 Multiplexing on PIO Controller B (PIOB)

Table 5-5. PIO Multiplexing Port B


PB0 SPI0_MISO SPI Slave Out AT45DB642 VDDIOP0

PB1 SPI0_MOSI SPI Slave In AT45DB642 VDDIOP0

PB2 SPI0_SPCK SPI Serial Clock AT45DB642 VDDIOP0

PB3 SPI0_NPCS0 SPI Chip Select AT45DB642 VDDIOP0

PB4 TXD1 USART1 Transmit Data VDDIOP0

PB5 RXD1 USART1 Receive Data VDDIOP0

PB6 TXD2 User Push Button Right click VDDIOP0

PB7 RXD2 User Push Button Left click VDDIOP0

PB8 TXD3 ISI_D8 Image Sensor Data 8 VDDIOP2

PB9 RXD3 ISI_D9 Image Sensor Data 9 VDDIOP2

PB10 TWD1 ISI_D10 Image Sensor Data 10 VDDIOP2

PB11 TWCK1 ISI_D11 Image Sensor Data 11 VDDIOP2

PB12 DRXD DBGU Receive Data VDDIOP0

PB13 DTXD DBGU Transmit Data VDDIOP0

PB14 SPI1_MISO Joystick Left VDDIOP0

PB15 SPI1_MOSI CTS0 Joystick Right VDDIOP0

PB16 SPI1_SPCK SCK0 Joystick Up VDDIOP0

PB17 SPI1_NPCS0 RTS0 Joystick Down VDDIOP0

PB18 RXD0 SPI0_NPCS1 Joystick Push VDDIOP0

PB19 TXD0 SPI0_NPCS2 UsbVbus VDDIOP0

PB20 ISI_D0 Image Sensor Data 0 VDDIOP2








PB28 ISI_PCK Image Sensor Data Clock VDDIOP2

PB29 ISI_VSYNC Image Sensor Vertical Synchro VDDIOP2

PB30 ISI_HSYNC Image Sensor Horizontal Synchro VDDIOP2

PB31 ISI_MCK PCK1 Image Sensor Reference Clock VDDIOP2



Configuration

5.5.4 Multiplexing on PIO Controller C (PIOC)

Table 5-6. PIO Multiplexing Port C


PC0 DQM2 VDDIOM1

PC1 DQM3 VDDIOM1

PC2 A19 Add19 Flash AT49SV322 VDDIOM1

PC3 A20 Add20 Flash AT49SV322 VDDIOM1

PC4 A21/NANDALE ALE Flash AT49SV322 VDDIOM1

PC5 A22/NANDCLE CLE Flash AT49SV322 VDDIOM1

PC6 A23 VDDIOM1

PC7 A24 VDDIOM1

PC8 CFCE1 Ready/Busy NAND Flash VDDIOM1

PC9 CFCE2 RTS2 VDDIOM1

PC10 NCS4/CFCS0 TCLK2 VDDIOM1

PC11 NCS5/CFCS1 CTS2 VDDIOM1

PC12 A25/CFRNW VDDIOM1

PC13 NCS2 VDDIOM1

PC14 NCS3/NANDCS Chip select NAND Flash VDDIOM1

PC15 NWAIT VDDIOM1

PC16 D16 VDDIOM1

PC17 D17 VDDIOM1

PC18 D18 VDDIOM1

PC19 D19 VDDIOM1

PC20 D20 VDDIOM1

PC21 D21 VDDIOM1

PC22 D22 VDDIOM1

PC23 D23 VDDIOM1

PC24 D24 VDDIOM1

PC25 D25 VDDIOM1

PC26 D26 VDDIOM1

PC27 D27 VDDIOM1

PC28 D28 VDDIOM1

PC29 D29 VDDIOM1

PC30 D30 VDDIOM1

PC31 D31 VDDIOM1



Configuration

5.5.5 Multiplexing on PIO Controller D (PIOD)

Table 5-7. PIO Multiplexing Port D


PD0 TK0 PWM3 Command LED2 VDDIOP0

PD1 TF0 Output ENA USB Host VDDIOP0

PD2 TD0 Input FLGA USB Host VDDIOP0

PD3 RD0 Output ENB USB Host VDDIOP0

PD4 RK0 Input FLGB USB Host VDDIOP0

PD5 RF0 Int. Ethernet 10/100 MDINTR VDDIOP0

PD6 AC97RX AC97 Receive Signal VDDIOP0

PD7 AC97TX TIOA5 AC97 Transmit Signal VDDIOP0

PD8 AC97FS TIOB5 AC97 Frame Sync Signal VDDIOP0

PD9 AC97CK TCLK5 AC97 Clock Signal VDDIOP0

PD10 TD1 Card Detect MMCI0 MCI0_CD VDDIOP0

PD11 RD1 Card Detect MMCI1 MCI1_CD VDDIOP0

PD12 TK1 PCK0 CTRL1 Image Sensor Interface VDDIOP0

PD13 RK1 CTRL2 Image Sensor Interface VDDIOP0

PD14 TF1 GPIO1 Large LCD (connector) VDDIOP0

PD15 RF1 GPIO2 Large LCD (connector) VDDIOP0

PD16 RTS1 USART1 Request to Send VDDIOP0

PD17 CTS1 USART1 Clear To Send VDDIOP0

PD18 SPI1_NPCS2 IRQ VDDIOP0

PD19 SPI1_NPCS3 FIQ VDDIOP0

PD20 TIOA0 TSAD0 Touch screen X_Right VDDANA

PD21 TIOA1 TSAD1 Touch screen X_Left VDDANA

PD22 TIOA2 TSAD2 Touch screen Y_Up VDDANA

PD23 TCLK0 TSAD3 Touch screen Y_Down VDDANA

PD24 SPI0_NPCS1 PWM0 GPAD4 General purpose A/D4 VDDANA

PD25 SPI0_NPCS2 PWM1 GPAD5 General purpose A/D5 VDDANA

PD26 PCK0 PWM2 GPAD6 General purpose A/D6 VDDIOP0

PD27 PCK1 SPI0_NPCS3 GPAD7 General purpose A/D7 VDDIOP0

PD28 TSADTRG SPI1_NPCS1 USB Plug-ID IDUSB VDDIOP0

PD29 TCLK1 SCK1 MCI1_WP VDDIOP0

PD30 TIOB0 SCK2 Command Power Led VDDIOP0

PD31 TIOB1 PWM1 Command LED1 VDDIOP0



Configuration

5.5.6 Multiplexing on PIO Controller E (PIOE)

Table 5-8. PIO Multiplexing Port E


PE0 LCDPWR PCK0 LCD Panel Pow.Enab.Ctrl VDDIOP1

PE1 LCDMOD LCD Modulation Signal VDDIOP1

PE2 LCDCC LCD Contrast Control VDDIOP1

PE3 LCDVSYNC LCD Vertical Synch. VDDIOP1

PE4 LCDHSYNC LCD Horizontal Synch. VDDIOP1

PE5 LCDDOTCK LCD Dot Clock VDDIOP1

PE6 LCDDEN LCD Data Enable VDDIOP1

PE7 LCDD0 LCDD2 LCD-Red0 VDDIOP1








PE15 LCDD8 LCDD12 LCD-Green0 VDDIOP1








PE23 LCDD16 LCDD22 LCD-Blue0 VDDIOP1

PE24 LCDD17 LCDD23 LCD-Blue1 VDDIOP1

PE25 LCDD18 LCD-Blue2 VDDIOP1






PE31 PWM2 PCK1 AC97 External Clock VDDIOP1



Section 6

Connectors

6.1 Power Supply

The AT91SAMG45-EKES evaluation board can be powered from a DC 5V power supply via the external power supply jack (J2) shown in Figure 10 1. The positive pole must be on J2 center pin.

Figure 6-1. Power Supply Connector J2

6.2 RS232 Connector with RTS/CTS Handshake Support

Connector J11 is the COM1 connector.

Figure 6-2. RS232 COM1 Connector J11

Table 6-1. Power Supply Connector J2 Signal Description

Pin Mnemonic Signal description

1 Center +5 VCC

2 Gnd



Connectors

6.3 DBGU

Connector J10 is the DBGU connector.

Figure 6-3. RS232 DBGU Connector J10

Table 6-2. Serial COM1 Connector J11 Signal Descriptions


1, 4, 6, 9 NC NO CONNECTION

2 TXD TRANSMITTED DATA RS232 serial data output signal

3 RXD RECEIVED DATA RS232 serial data input signal

5 GND GROUND

7 RTS READY TO SEND Active-positive RS232 input signal

8 CTS CLEAR TO SEND Active-positive RS232 output signal

Table 6-3. RS232 DBGU Connector J10 Signal Descriptions


1, 4, 6, 7, 8, 9 NC NO CONNECTION

2 TXD TRANSMITTED DATA RS232 serial data output signal

3 RXD RECEIVED DATA RS232 serial data input signal

5 GND GROUND



Connectors

6.4 Ethernet

Connector J15 is the RJ-45 Ethernet Connector.

Figure 6-4. Ethernet RJ45 Connector J15

6.5 USB Host

Connector J12 is the USB Host connector.

Figure 6-5. USB Host type A connector J12

Table 6-4. Ethernet RJ45 Connector J15 Signal Descriptions

Pin Mnemonic Pin Mnemonic

1 TxData+ DIFFERENTIAL OUTPUT PLUS 2 Txdata- DIFFERENTIAL OUTPUT MINUS

3 RxData+ DIFFERENTIAL INPUT PLUS 4 Shield

5 Shield 6 RxData- DIFFERENTIAL INPUT MINUS

7 Shield 8 Shield

Table 6-5. USB Host Type A Connector J12 Signal Descriptions


1 Vbus 5v power

2 DM Data minus

3 DP Data plus

4 Gnd Ground

5 Shield Shield



Connectors

6.6 USB Host/Device

Connector J14 is the USB Host/Device connector.

Figure 6-6. USB Host/Device Micro AB connector J14

6.7 JTAG Debugging Connector

Connector J13 is the JTAG/ICE connector.

A SAM-ICE connector is a 20-way Insulation Displacement Connector (IDC) keyed box header (2.54 mm male) that mates with IDC sockets mounted on a ribbon cable.

Figure 6-7. JTAG/ICE Connector J13

Table 6-6. USB Host/Device MicroAB Connector J14 Signal Descriptions


1 Vbus 5v power

2 DM Data minus

3 DP Data plus

4 ID On the Go Identification

5 Gnd Ground



Connectors

Table 6-7. JTAG/ICE Connector J13 Signal Descriptions

Pin Mnemonic Description

1 VTref. 3.3V power

This is the target reference voltage. It is used to check if the target has power, to create the logic-level reference for the input comparators, and to control the output logic levels to the target. It is normally fed from VDD on the target board and must not have a series resistor.

2 Vsupply. 3.3V powerThis pin is not connected in SAM-ICE. It is reserved for compatibility with other equipment. Connect to VDD or leave open in target system.

3nTRST TARGET RESET - Active-low output signal that resets the target

JTAG Reset. Output from SAM-ICE to the Reset signal on the target JTAG port. Typically connected to nTRST on the target CPU. This pin is normally pulled HIGH on the target to avoid unintentional resets when there is no connection.

4 GND Common ground

5TDI TEST DATA INPUT - Serial data output line, sampled on the rising edge of the TCK signal.

JTAG data input of target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TDI on target CPU.

6 GND Common ground

7 TMS TEST MODE SELECT

JTAG mode set input of target CPU. This pin should be pulled up on the target. Typically connected to TMS on target CPU. Output signal that sequences the target's JTAG state machine, sampled on the rising edge of the TCK signal.

8 GND Common ground

9TCK TEST CLOCK - Output timing signal, for synchronizing test logic and control register access.

JTAG clock signal to target CPU. It is recommended that this pin is pulled to a defined state on the target board. Typically connected to TCK on target CPU.

10 GND Common ground

11RTCK - Input Return test clock signal from the target.

Some targets must synchronize the JTAG inputs to internal clocks. To assist in meeting this requirement, a returned and retimed TCK can be used to dynamically control the TCK rate. SAM-ICE supports adaptive clocking which waits for TCK changes to be echoed correctly before making further changes. Connect to RTCK if available, otherwise to GND


13TDO JTAG TEST DATA OUTPUT - Serial data input from the target.

JTAG data output from target CPU. Typically connected to TDO on target CPU.


15 nSRST RESET Active-low reset signal. Target CPU reset signal


17 RFU This pin is not connected in SAM-ICE.


19 RFU This pin is not connected in SAM-ICE




Connectors

6.8 SD/MMC- MCI0

Connector J6 is the SD/MMC connector.

Figure 6-8. SD/MMC0 Connector J6

Table 6-8. SD/MMC0 Connector J6 Signal Descriptions


1 RSV/DAT3 2 CDA

3 GND 4 VCC

5 CLK 6 GND

7 DAT0 8 DAT1

9 DAT2 10 Card Detect

11 GND 12



Connectors

6.9 SD/MMC- MCI1

Connector J5 is the SD/MMC connector.

Figure 6-9. SD/MMC1 Connector J5

6.10 AC97

Connector J7 is the Headphone connector.

Connector J8 is the Line In connector.

Connector J9 is the Line In connector.

Connector JP15 is the Speaker Output connector

Figure 6-10. Audio Connector J7, J8, J9

Table 6-9. SD/MMC1 Connector J5 Signal Descriptions


1 RSV/DAT3 2 CMD

3 GND 4 VCC

5 CLK 6

7 DAT0 8 DAT1

9 DAT2 10 DAT3

11 DAT4 12 DAT5

13 DAT6 14 DAT7

Table 6-10. J7, J8, J9 Signal Description

Pin Mnemonic

Central pin Signal



Connectors

6.11 Image Sensor - ISI

Connector J17 is the ISI connector.

Figure 6-11. ISI Connector J17

Table 6-11. Speaker JP15 Signal Descriptions

Pin Mnemonic

1 Speaker bridge output A

2 Speaker bridge output B

Table 6-12. ISI Connector J17 Signal Descriptions


1 VCC 3v3 2 Gnd

3 VCC 3v3 4 Gnd

5 Ctrl1 6 Ctrl2

7 SCL 8 SDA

9 Gnd 10 ISI_MCK

11 Gnd 12 ISI_VSYNC

13 Gnd 14 ISI_HSYNC

15 Gnd 16 ISI_PCK

17 Gnd 18 ISI_Data0

19 ISI_Data1 20 ISI_Data2





29 ISI_Data11 30 Gnd



Connectors

6.12 Video

Connector J20 is the Video connector

Figure 6-12. Video Connector J20

6.13 Display Devices

6.13.1 LG TFT LCD LG/PHILIPS

Connector J24 is the TFT-LCD connector.

Figure 6-13. TFT LCD Connector J24

Table 6-13. Video Connector J20 Signal Description


1 Center Composite video signal output

Table 6-14. LG TFT LCD Connector J24 Signal Descriptions


1 GND 2 GND

3 VDD 3V3 4 VDD 3V3

5 R0 6 R1

7 R2 8 R3

9 R4 10 R5



Connectors

6.14 Large LCD Extension

Connectors J23 and J18 are for an optional large LCD extension (not populated).

11 R6 12 R7

13 G0 14 G1

15 G2 16 G3

17 G4 18 G5

19 G6 20 G7

21 B0 14 B1

23 B2 16 B3

25 B4 18 B5

27 B6 20 B7

29 GND 30 DCLK

31 DISPON 32 NO CONNECT

33 NO CONNECT 34 LCDEN

35 VDD PWR SEL 36 GND

37 X1 38 Y1

39 X2 40 Y2

41 GND 42 VLED-

43 VLED+ 44 NO CONNECT

45 NO CONNECT

Table 6-14. LG TFT LCD Connector J24 Signal Descriptions


Table 6-15. Connector J23 Signal Description for a Large LCD Extension


1 PE8 RED Data Signal 2 PE7 RED Data Signal (LSB)

3 PE10 RED Data Signal 4 PE9 RED Data Signal

5 PE12 RED Data Signal 6 PE11 RED Data Signal

7 PE14 RED Data Signal (MSB) 8 PE13 RED Data Signal

9 PE16 GREEN Data Signal 10 PE15 GREEN Data Signal (LSB

11 PE18 GREEN Data Signal 12 PE17 GREEN Data Signal

13 PE20 GREEN Data Signal 14 PE19 GREEN Data Signal

15 PE22 GREEN Data Signal (MSB) 16 PE21 GREEN Data Signal

17 PE24 BLUE Data Signal 18 PE23 BLUE Data Signal (LSB)

19 PE26 BLUE Data Signal 20 PE25 BLUE Data Signal

21 PE28 BLUE Data Signal 22 PE27 BLUE Data Signal

23 PE30 BLUE Data Signal (MSB) 24 PE29 BLUE Data Signal



Connectors

25 PE4 LCDHSYNC 26 PE3 LCDVSYNC

27 PE5 LCDDOTCK 28 GND (0V)

29 GND (0V) 30 NC

31 PE6 LCDDEN 32 PE2 LCDCC

33 PE0 DISPON 34 PE1 LCDMOD

35 PD14 GPIO1 36 PD15 GPIO2

37 GND (0V) 38 GND (0V)

39 VCC +3V3 power source 40 NC



1 XM AD1XM 2 XP AD0XP

3 YM AD3YM 4 YP AD2YP

5 GND (0V) 6 GND (0V)

7 PD25 PD25 8 PD24 PD24

9 PD27 PD27 10 PD26 PD26

11 PD19 PD19 12 PD18 PD18

13 GND (0V) 14 GND (0V)

15 GND (0V) 16 +5V

17 GND (0V) 18 GND (0V)

19 VCC +3V3 power source 20 VCC +3V3 power source





Section 7

Schematics

7.1 Schematics

This section contains the following schematics:

Top Level view, block architecture of the design

Power Supply

SAM Processor

Bus impedance adaptor

Main memory

EBI memory

MCI & TWI

Audio AC97

Serial interfaces

Ethernet

LCD

Video interfaces and LCD extension



8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FLA

SHN

AN

DFL

ASH

5 V

DBGU

USB

COM1RS2

32

SERIALDATAFLASH

10/100 FAST ETHERNET

HOSTDEVICE

HOST

EBI0

MM

C S

DS

DIO

CARDREADER

US

ER

'SIN

TER

FAC

E

EBI1

ISI

LCD INTERFACE4.3" 480x272TFT

CAMERA INTERFACE

TOUCH SCREEN

TV INTERFACE

DD

R2

128M

B

SERIALEEPROM

DD

R2

128M

B

PIOCONNECTOR

ICEINTERFACE

MIC

OU

TIN

AUDIO

POWER SUPPLY

"DNP" means the component is not populated by defaultNOTE

RJ

45H

E 10

HE

14

CARDREADER

MM

C S

DS

DIO

HE

15

EB0 DRR2 INTERFACE

ATMEL ARM9 Processor SAM9M10 or SAM9G45 (LFBGA324)

Sheet 4

EB0 DRR2 INTERFACE

EB1 DATA INTERFACE

EB1 DRR2 INTERFACE

EB1 FASH INTERFACE

EB1 NANDFASH INTERFACE

EB1 ADRESSE INTERFACE

RES.ARRAYSEBI0_EBI1 ADAPTER

PIO

PIO

PIO

PIO A,...E

Sheet 2

Sheet 3

Sheet 5

Sheet 6

Sheet 7

Sheet 8

Sheet 9

Sheet 10

Sheet 11 12

EB1 BUS INTERFACE

POWER

3V3

1V8

1V

PIO

PIO A,...E

RC

A

PIOAPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15

PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA27PA28PA29PA30PA31

PIOA PIOB PIOB PIOC PIOCPB0PB1PB2PB3PB4PB5PB6PB7PB8PB9PB10PB11

PB13PB12

PB14PB15

PB16PB17PB18PB19

PB21PB20

PB22PB23PB24PB25PB26PB27PB28PB29PB30PB31

PIO MUXING

PC0

PC2PC1

PC3PC4PC5PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15

PC16PC17PC18PC19PC20PC21PC22PC23PC24PC25PC26PC27PC28PC29PC30PC31

USAGE USAGE USAGEUSAGE USAGE USAGE PIOD PIODPD0PD1PD2PD3PD4PD5PD6PD7PD8PD9PD10PD11PD12PD13PD14PD15

PD20PD21

PD19PD18

PD23

PD16

PD22

PD26

PD30

PD28

PD17

PD27

PD25PD24

PD29

PD31

PE4PE5

PE15

PE3PE2

PE7

PE0PIOE

PE6

PE10

PE14

PE12

PE1

PE11

PE9PE8

PE13

PE17

PE20

PE16

PE23

PE28

PE18

PE26

PE30

PE22

PE24

PE21

PE29

PE25

PIOE

PE19

PE27

PE31

MCI0_CKMCI0_CDAMCI0_DA0

(MCI0_DA3)

MCI0_DA1(MCI0_DA2)

TXD2

TXD0

TXD3

TXD1

RXD2

RXD0

RXD3

RXD1TX_ENRX_DV

TWDO

MCI1_CK

TWCK0MCI1_CDAMCI1_DA0MCI1_DA1MCI1_DA2MCI1_DA3

RX_ER

MCI1_DA4 / TX_ER

TX_CLK

MCI1_DA5 / RX_CLK

MDC

MCI1_DA6 / CRS

MDIO

MCI1_DA7 / COL

BP5_LEFTBP4_RIGHT

ISI_D0

ISI_MCK

ISI_D8

ISI_D10

ISI_D1

ISI_D9

ISI_D11

ISI_D2

DRXD

ISI_D3

DTXD

ISI_D4

BP3_LEFT

ISI_D5

BP3_RIGHT

ISI_D6

BP3_UP

ISI_D7

BP3_DOWN

ISI_PCK

BP3_PUSH

ISI_VSYNC

SPI0_MISO

VBUS

SPI0_MOSISPI0_SPCKSPI0_NPCS0TXD1RXD1

ISI_HSYNC

NOT USEDRDY/BSY

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NCS3

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USEDNOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USEDA19A20NANDALE / A21NANDCLENOT USED

USER_LED_D6ENAFLGAENB

AC97FSAC97CK

FLGBMDINTRAC97RXAC97TX

MCI0_CD(MCI1_CD)CTRL1CTRL2GPIO1GPIO2

AD0XpAD1XmAD2YpAD3YmJ18_8

RTS1CTS1J18_12J18_11

POWER LEDUSER_LED_D7

J18_7J18_10J18_9IDUSB(MCI1_WP)

LCDPWRLCDMODLCDCCVSYNCHSYNC

R2R3

LCDDOTCKLCDDENR0R1

R4R5R6R7G0

G1G2G3G4G5G6G7B0B1B2B3B4B5B6B7EXT_CLK




PB13PB12

PB14PB15

PB16PB17PB18PB19

PB21PB20


PIO MUXING

PC0

PC2PC1




PD20PD21

PD19PD18

PD23

PD16

PD22

PD26

PD30

PD28

PD17

PD27

PD25PD24

PD29

PD31

PE4PE5

PE15

PE3PE2

PE7

PE0PIOE

PE6

PE10

PE14

PE12

PE1

PE11

PE9PE8

PE13

PE17

PE20

PE16

PE23

PE28

PE18

PE26

PE30

PE22

PE24

PE21

PE29

PE25

PIOE

PE19

PE27

PE31


(MCI0_DA3)

MCI0_DA1(MCI0_DA2)

TXD2

TXD0

TXD3

TXD1

RXD2

RXD0

RXD3

RXD1TX_ENRX_DV

TWDO

MCI1_CK


RX_ER

MCI1_DA4 / TX_ER

TX_CLK

MCI1_DA5 / RX_CLK

MDC

MCI1_DA6 / CRS

MDIO

MCI1_DA7 / COL

BP5_LEFTBP4_RIGHT

ISI_D0

ISI_MCK

ISI_D8

ISI_D10

ISI_D1

ISI_D9

ISI_D11

ISI_D2

DRXD

ISI_D3

DTXD

ISI_D4

BP3_LEFT

ISI_D5

BP3_RIGHT

ISI_D6

BP3_UP

ISI_D7

BP3_DOWN

ISI_PCK

BP3_PUSH

ISI_VSYNC

SPI0_MISO

VBUS


ISI_HSYNC

NOT USEDRDY/BSY

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NCS3

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USEDNOT USED

NOT USED

NOT USED

NOT USED

NOT USED



AC97FSAC97CK








R2R3

LCDDOTCKLCDDENR0R1

R4R5R6R7G0





PB13PB12

PB14PB15

PB16PB17PB18PB19

PB21PB20


PIO MUXING

PC0

PC2PC1




PD20PD21

PD19PD18

PD23

PD16

PD22

PD26

PD30

PD28

PD17

PD27

PD25PD24

PD29

PD31

PE4PE5

PE15

PE3PE2

PE7

PE0PIOE

PE6

PE10

PE14

PE12

PE1

PE11

PE9PE8

PE13

PE17

PE20

PE16

PE23

PE28

PE18

PE26

PE30

PE22

PE24

PE21

PE29

PE25

PIOE

PE19

PE27

PE31


(MCI0_DA3)

MCI0_DA1(MCI0_DA2)

TXD2

TXD0

TXD3

TXD1

RXD2

RXD0

RXD3

RXD1TX_ENRX_DV

TWDO

MCI1_CK


RX_ER

MCI1_DA4 / TX_ER

TX_CLK

MCI1_DA5 / RX_CLK

MDC

MCI1_DA6 / CRS

MDIO

MCI1_DA7 / COL

BP5_LEFTBP4_RIGHT

ISI_D0

ISI_MCK

ISI_D8

ISI_D10

ISI_D1

ISI_D9

ISI_D11

ISI_D2

DRXD

ISI_D3

DTXD

ISI_D4

BP3_LEFT

ISI_D5

BP3_RIGHT

ISI_D6

BP3_UP

ISI_D7

BP3_DOWN

ISI_PCK

BP3_PUSH

ISI_VSYNC

SPI0_MISO

VBUS


ISI_HSYNC

NOT USEDRDY/BSY

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NCS3

NOT USED

NOT USED

NOT USED

NOT USED

NOT USED

NOT USEDNOT USED

NOT USED

NOT USED

NOT USED

NOT USED



AC97FSAC97CK








R2R3

LCDDOTCKLCDDENR0R1

R4R5R6R7G0


REV DATEMODIF. DES. DATE VER.

SCALE 1/1 REV. SHEET

This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.

INIT EDITA

AT91SAM9M10-EKESAT91SAM9G45-EKES 1

12E

XX-XXX-XXPP XXX

TOP LEVEL

26-MAY-08B PP 29-JUL-08

02-DEC-08PPC22-jun-09PPD03-sep-09LNE




INIT EDITA


12E

XX-XXX-XXPP XXX

TOP LEVEL

26-MAY-08B PP 29-JUL-08





INIT EDITA


12E

XX-XXX-XXPP XXX

TOP LEVEL

26-MAY-08B PP 29-JUL-08


8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FORCEPOWERON

POWER LED

GND TEST POINT

ADHESIVE FEET

USER INTERFACE

UPRIGHTDOWNPUSH

LEFT

JOYSTICK

1V VDDUTMIC

WAKE UP

NRST

RIGHT CLICK

LEFT CLICK

VDDBU

VDDBU

PB16

PB17

PB18PB14

PB15

PB[14..18]{3}

3V3

1V

3V3

3V3

5V

3V3

1V8

5V

5V

3V3

3V3

1V

1V8

3V3

VDDUTMII {3}

VDDANA {3}

VDDOSC {3}

VDDIOP0 {3}

VDDIOP1 {3}

VDDIOP2 {3,12}

VDDISI {3,12}

VDDUTMIC {3}

VDDPLLUTMI {3}

VDDPLLA {3}

VDDCORE {3}

VDDIOM0 {3}

VDDIOM1 {3}

VDDBU {3}

NRST {3,7,8,9,10,12}

WAKE UP {3}

PB7 {3}

PB6 {3}

PD0 {3}

PD31 {3}

SHDN{3}

PD30 {3}




INIT EDITA


12E

XX-XXX-XXPP XXX

POWER SUPPLY

26-MAY-08B 29-JUL-08PP





INIT EDITA


12E

XX-XXX-XXPP XXX

POWER SUPPLY






INIT EDITA


12E

XX-XXX-XXPP XXX

POWER SUPPLY



L3

10uH 150mA

L3

10uH 150mA

JP3JP3

1

2

3

R4 10KR4 10K

C410uFC410uF

R13100KR13100K

C182.2uFC182.2uF

C102.2uFC102.2uF

C218

10nF

C218

10nF

R668KR668K

J1-2J1-23 4

C62.2nFC62.2nF

C1910pFC1910pF

C152.2nFC152.2nF

C216

10nF

C216

10nF

C171uFC171uF

C244.7uFC244.7uF

JP4JP4

J1-3J1-35 6

R15470KR15470K

Z5

11.1

Z5

11.1

Z4

11.1

Z4

11.1BP4BP4

L2

2.2uH

L2

2.2uH

R12610KR12610K

C84.7uFC84.7uF

BP5BP5TP4TP4

Z2

11.1

Z2

11.1

D7

GREEN

D7

GREEN

C161uFC161uF

BP2BP2

C142.2uFC142.2uF

C22.2uFC22.2uF

TP3TP3

Z3

11.1

Z3

11.1

L1

10uH 150mA

L1

10uH 150mA

MN3

R1100D101C

MN3

R1100D101C

OU

T1

VD

D2

GN

D3

MN1

LT1765-3.3

MN1

LT1765-3.3

GN

D1

1

BO

OS

T2

SY

NC

14

SHDN11

VIN13

GN

D2

8

GN

D4

9

GN

D5

16

VIN24

SW25SW16

NC17

NC315

VC

13

FB12

NC210

GN

D3

17

Z1

11.1

Z1

11.1

D3STPS2L30AD3STPS2L30A

JP2JP2

1

2

3

C1180nFC1180nF

J2

2.1 MM SOCKET

J2

2.1 MM SOCKET

12

3

TP2TP2

L5

10uH 150mA

L5

10uH 150mA

C20100nFC20100nF

D6

GREEN

D6

GREEN

C215

10nF

C215

10nF

R31RR31R

C221

10nF

C221

10nF

C25100nFC25100nF

C54.7uFC54.7uF

JP5JP5

1

2

3

J3J3

MN2

LT1765-1.8

MN2

LT1765-1.8

GN

D1

1

BO

OS

T2

SY

NC

14

SHDN11

VIN13

GN

D2

8

GN

D4

9

GN

D5

16

VIN24

SW25SW16

NC17

NC315

VC

13

FB12

NC210

GN

D3

17

Q2IRLML2402Q2IRLML2402

1

3

2

J1-4J1-47 8

C3100nFC3100nF

C132.2uFC132.2uF

R91RR91R

R141100RR141100R

JP6JP6

1

2

3

C9180nFC9180nF

L4

2.2uH

L4

2.2uH

R510KR510K

D5STPS2L30AD5STPS2L30A

JP1JP1

1

2

3

BP1BP1

R11RR11R

J1-1J1-11 2

C214.7uFC214.7uF

D1

BAT20J

D1

BAT20J

21

D4

BAT20J

D4

BAT20J

21

R8220KR8220K

R11 470RR11 470R

R143100RR143100R

L6

10uH 150mA

L6

10uH 150mA

R10 470RR10 470R

MN4

TPS60500

MN4

TPS60500

C1M

8

GND

9

VOUT7

EN1

VIN5

C1P

6

C2M

3

C2P

4

FB10

PG2

C219

10nF

C219

10nF

Q1

Si1563EDH

Q1

Si1563EDH

1

3

2

4

5

6

BP3BP31

524

3 6

TP1TP1

R141KR141K

C23100nFC23100nF

JP7JP7

1

2

3

R12470RR12470R

C217

10nF

C217

10nF

C7100nFC7100nF

C1115pFC1115pF

C220

10nF

C220

10nF

D8REDD8RED

R2100KR2100K

R71RR71R

D25VD25V

C2222uFC2222uF

C1210uFC1210uF

R142100RR142100R

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BOOT MODE SELECTOpenedClosed NCS0=

Internal ROM BOOT=

PA6

PA1

PA8

PA29

PA14

PA4

PA13

PA26

PA11

PA25

PA2

PA30

PA27

PB5

PB10

PB7

PB19

PB16

PB21

PB17

PB15

PB0

PB18

PB24

PB20

PB23PB22

PB28

PB9

PB31

PB12

PB6

PB1

PB8

PB29

PB14

PB4

PB13

PB26

PB11

PB25

PB2

PB30

PB27

PC5

PC3

PC8

PC14

PC4

PC2PA5

PA10

PA7

PA3

PA19

PA16

PA21

PA17

PA15

PA0

PA18

PA24

PA20

PA23PA22

PA28

PA9

PA31

PA12

PE10

PE7

PE3

PE19

PE16

PE21

PE17

PE15

PE0

PE18

PE24

PE20

PE23PE22

PE28

PE9

PE31

PE12

PE6

PE1

PE8

PE29

PE14

PE4

PE13

PE26

PE11

PE25

PE2

PE30

PE27

PD5

PD10

PD7

PD3

PD19

PD16

PD21

PD17

PD15

PD0

PD18

PD24

PD20

PD23PD22

PD28

PD9

PD31

PD12

PD6

PD1

PD8

PD29

PD14

PD4

PD13

PD26

PD11

PD25

PD2

PD30

PD27

EBI1_A5

EBI1_A10

EBI1_A7

EBI1_A3

EBI1_A15

EBI1_A0

EBI1_A9

EBI1_A12

EBI1_A6

EBI1_A1

EBI1_A8

EBI1_A14

EBI1_A4

EBI1_A13

EBI1_A11

EBI1_A2

EBI1_A16EBI1_A17EBI1_A18

EBI1_D5

EBI1_D10

EBI1_D7

EBI1_D3

EBI1_D15

EBI1_D0

EBI1_D9

EBI1_D12

EBI1_D6

EBI1_D1

EBI1_D8

EBI1_D14

EBI1_D4

EBI1_D13

EBI1_D11

EBI1_D2

TDI

RTCKTDO

TMS

NTRST

PB3

VDDBU

NRST

EBI0_D0EBI0_D1EBI0_D2

EBI0_D5

EBI0_D3EBI0_D4

EBI0_D8

EBI0_D11EBI0_D10EBI0_D9

EBI0_D6EBI0_D7

EBI0_D14EBI0_D15

EBI0_D12EBI0_D13

EBI0_A2


EBI0_A10EBI0_A11


EBI0_A9

EBI0_A12EBI0_A13

EBI0_A0EBI0_A1

TCK

EBI1_A0

PE5

3V3

PA[0..31]{7,10,12}

PC[2..5]{4,6}

EBI0_D[0..15]{4}

EBI0_A[0..13]{4}

EBI1_A[1..18] {4}

EBI1_D[0..15] {4}

PB[0..31] {2,7,9,12}

EBI0_BA0{4}EBI0_BA1{4}

EBI0_CKE{4}EBI0_CLK{4}EBI0_NCLK{4}

EBI0_CS{4}

EBI0_CAS{4}EBI0_RAS{4}

EBI0_WE{4}

EBI0_DQM0{4}EBI0_DQM1{4}

EBI0_DQS0{4}EBI0_DQS1{4}

EBI1_DQM0 {4}EBI1_DQM1 {4}EBI1_DQS0 {4}EBI1_DQS1 {4}

EBI1_RAS {4}EBI1_CAS {4}EBI1_SDWE {4}EBI1_SDA10 {4}EBI1_SDCKE {4}

EBI1_SDCK {4}EBI1_NSDCK {4}

EBI1_NCS0 {6}EBI1_NCS1/SDCS {4}

EBI1_NRD/CFOE {6}EBI1_NWE/NWR0/CFWE {6}

EBI1_NANDOE {6}EBI1_NANDWE {6}

DDR_VREF{5,6}

NTRST{9}TDI{9}TMS{9}TCK{9}RTCK{9}TDO{9}NRST{2,7,8,9,10,12}

WAKE UP{2}

SHDN{2}

HDPA{9}HDMA{9}

HDPB{9}HDMB{9}

VDDOSC{2}

PC8{6}

PC14{6}

PE[0..31]{8,11,12}

PD[0..31] {2,7,8,9,10,11,12}

VDDBU {2}

VDDPLLUTMI {2}

VDDUTMIC {2}

VDDUTMII {2}

VDDIOP0 {2}

VDDIOP1 {2}

VDDIOP2 {2,12}

VDDCORE {2}

VDDIOM0 {2}

VDDIOM1 {2}

VDDPLLA {2}

VDDANA {2}




INIT EDITA


12E

XX-XXX-XXPP XXX

SAM9 chip

26-MAY-0829-JUL-08PPB02-DEC-08PPC22-jun-09PPD03-sep-09LNE




INIT EDITA


12E

XX-XXX-XXPP XXX

SAM9 chip





INIT EDITA


12E

XX-XXX-XXPP XXX

SAM9 chip


MN5EMN5E

PE0/LCDPWR/PCK0G4

PE1/LCDMODF4

PE2/LCDCCG5

PE3/LCDVSYNCF5

PE4/LCDHSYNCG7

PE5/LCDDOTCKH5

PE6/LCDDENG3

PE7/LCDD0/LCDD2H6

PE8/LCDD1/LCDD3G6

PE9/LCDD2/LCDD4H7

PE10/LCDD3/LCDD5H8

PE11/LCDD4/LCDD6G8

PE12/LCDD5/LCDD7J5

PE13/LCDD6/LCDD10H4

PE14/LCDD7/LCDD11J3

PE15/LCDD8/LCDD12J4

PE16/LCDD9/LCDD13J2

PE17/LCDD10/LCDD14J6




PE21/LCDD14/LCDD20K1




PE25/LCDD18K6

PE26/LCDD19K3

PE27/LCDD20K7

PE28/LCDD21K8

PE29/LCDD22L3

PE30/LCDD23L2

PE31/PWM2/PCK1L4

Y232.768 kHzY232.768 kHz

12

R19 39RR19 39R

R23

6.8K

R23

6.8K

MN5CMN5C

PC0/DQM2A8

PC1/DQM3E9

PC2/A19B8

PC3/A20C8

PC4/A21/NANDALEF9

PC5/A22/NANDCLEA7

PC6/A23D8

PC7/A24A6

PC8/CFCE1E8

PC9/CFCE2/RTS2C7

PC10/NCS4/CFCS0/TCLK2B6

PC11/NCS5/CFCS1/CTS2B7

PC12/A25/CFRNWA5

PC13/NCS2D7

PC14/NCS3/NANDCSF8

PC15/NWAITC6

PC16/D16E7

PC17/D17B5

PC18/D18D6

PC19/D19F7

PC20/D20A4

PC21/D21C5

PC22/D22B4

PC23/D23E6

PC24/D24D5

PC25/D25A3

PC26/D26C4

PC27/D27A1

PC28/D28A2

PC29/D29B2

PC30/D30B3

PC31/D31B1

C26 100nFC26 100nF

C3418pFC3418pF

C53100nF

C53100nF

R254.7KR254.7K

C27 100nFC27 100nF

C52100nF

C52100nF

C48 100nFC48 100nF

C32100nFC32100nF

MN5HMN5H

NTRSTN10

TDIR10

TMSP10

TCKU10

RTCKR11

TDOV10

JTAGSELE4

NRSTM10

WK

UP

C3

SHDNF3

VDDBUD4

GNDBUD3

GN

DC

OR

EJ1

0

GN

DC

OR

EG

9

HHSDMAR17 HHSDPAT17

HFSDMAR18 HFSDPAT18

DFSDP/HFSDPBV15

VB

GV

18

VDDOSCU11

VDDPLLAP11

DFSDM/HFSDMBV16

XOUTV11

XINV12

XOUT32D1

XIN32C1

VDDCOREE18

VDDCOREH11VDDCOREG13

VDDIOM0M14VDDIOM0L13VDDIOM0L12VDDIOM0K13

VDDIOM1G11VDDIOM1G10VDDIOM1F6VDDIOM1D16

VDDIOP0K10VDDIOP0K9

VDDIOP1H3

GN

DC

OR

EH

9

GN

DC

OR

EJ9

GN

DIO

MC

16

GN

DIO

MH

12

GN

DIO

MH

13

GN

DIO

MJ1

2

GN

DIO

MJ1

3

GN

DIO

MK

11

GN

DIO

MK

12

GN

DIO

PJ1

1G

ND

IOP

H10

TST

E5

DHSDP/HHSDPBU15

BM

ST1

1

DHSDM/HHSDMBU16

TSADVREFE2

VDDANAE3

GNDANAC2

VDDCOREG12

VDDIOP2V14

GNDOSCU12

VDDPLLUTMIV13

GNDUTMIU17

VDDUTMICU18

VDDUTMIIV17

C31 100nFC31 100nFC30 100nFC30 100nF

C47 100nFC47 100nF

R18 39RR18 39R

MN5GMN5G

EBI0_DDR_D0R16

EBI0_DDR_D1R15

EBI0_DDR_D2T14

EBI0_DDR_D3P15

EBI0_DDR_D4P16

EBI0_DDR_D5P17

EBI0_DDR_D6R14

EBI0_DDR_D7P14

EBI0_DDR_D8N15

EBI0_DDR_D9N16

EBI0_DDR_D10P18

EBI0_DDR_D11N17

EBI0_DDR_D12N18

EBI0_DDR_D13N14

EBI0_DDR_D14M15

EBI0_DDR_D15M16

EBI0_DDR_A0M17

EBI0_DDR_A1L14

EBI0_DDR_A2M18

EBI0_DDR_A3L15

EBI0_DDR_A4L16

EBI0_DDR_A5L18

EBI0_DDR_A6L17

EBI0_DDR_A7K14

EBI0_DDR_A8K15

EBI0_DDR_A9K16

EBI0_DDR_A10K18

EBI0_DDR_A11K17

EBI0_DDR_A12J14

EBI0_DDR_A13J15

EBI0_DDR_VREFA16

EBI0_DDR_DQM0G14

EBI0_DDR_DQM1H16

EBI0_DDR_DQS0G18

EBI0_DDR_DQS1G15

EBI0_DDR_CSH14

EBI0_DDR_CLKJ18

EBI0_DDR_NCLKH18

EBI0_DDR_CKEJ16

EBI0_DDR_RASJ17 EBI0_DDR_CASH17

EBI0_DDR_WEH15

EBI0_DDR_BA0G17

EBI0_DDR_BA1G16

TP6

TESTPOINT

TP6

TESTPOINT

C3818pFC3818pF

C50 100nFC50 100nF

C4515pFC4515pF

Y112 MHzY112 MHz

12

C28 100nFC28 100nF

C36 100nFC36 100nF

C51 100nFC51 100nF

C44 100nFC44 100nF

MN5FMN5F

EBI1_D0A17

EBI1_D1D15

EBI1_D2C15

EBI1_D3B16

EBI1_D4B15

EBI1_D5D14

EBI1_D6C14

EBI1_D7A15

EBI1_D8B14

EBI1_D9D13

EBI1_D10C13

EBI1_D11E13

EBI1_D12B13

EBI1_D13E12

EBI1_D14D12

EBI1_D15C12

EBI1_NBS0/A0F13

EBI1_NBS2/NWR2/A1F14

EBI1_A2F18

EBI1_A3F15

EBI1_A4E14

EBI1_A5F17

EBI1_A6F16

EBI1_A7E17

EBI1_A8E15

EBI1_A9E16

EBI1_A10D18

EBI1_A11D17

EBI1_A12C18

EBI1_A13B18

EBI1_A14A18

EBI1_A15B17

EBI1_BA0/A16C10

EBI1_BA1/A17B10

EBI1_A18C17

EBI1_DQM0B11

EBI1_DQM1D11

EBI1_DQS0A11

EBI1_DQS1E11

EBI1_RASA12

EBI1_CASC11

EBI1_SDWEF12

EBI1_SDA10B9

EBI1_SDCKEB12

EBI1_SDCKA13

EBI1_NCS0A10

EBI1_NCS1/SDCSF10

EBI1_NRD/CFOEF11

EBI1_NWE/NWR0/CFWEC9

EBI1_NBS1/NWR1/CFIORD9

EBI1_NBS3/NWR3/CFIOWA9

EBI1_NANDOED10

EBI1_NANDWEE10

EBI1_NSDCKA14

JP8JP8

C42 100nFC42 100nF

C54

10pF

C54

10pF

R17 39RR17 39R

C40 100nFC40 100nF

MN5AMN5A

PA0/MCI0_CK/TCLK3L1

PA1/MCI0_CDA/TIOA3M1

PA2/MCI0_DA0/TIOB3L5

PA3/MCI0_DA1/TCKL4N1

PA4/MCI0_DA2/TIOA4L6

PA5/MCI0_DA3/TIOB4M2

PA6/MCI0_DA4/ETX2M3

PA7/MCI0_DA5/ETX3M4

PA8/MCI0_DA6/ERX2L7

PA9/MCI0_DA7/ERX3N2

PA10/ETX0M5

PA11/ETX1P1

PA12/ERX0N3

PA13/ERX1P2

PA14/ETXENM6

PA15/ERXDVN4

PA16/ERXERN5

PA17/ETXCKN6

PA18/EMDCR1

PA19/EMDIOP3

PA20/TWD0R2

PA21/TWCK0P4

PA22/MCI1_CDA/SCK3T1

PA23/MCI1_DA0/RTS3P5

PA24/MCI1_DA1/CTS3R3

PA25/MCI1_DA2/PWM3T2

PA26/MCI1_DA3/TIOB2T3

PA27/MCI1_DA4/ETXERU1

PA28/MCI1_DA5/ERXCKU3

PA29/MCI1_DA6/ECRSU2

PA30/MCI1_DA7/ECOLR4

PA31/MCI1_CK/PCK0V1

C4115pFC4115pF

C39 100nFC39 100nFC37 100nFC37 100nF

C49 100nFC49 100nF

R220RR220R

C29 100nFC29 100nF

R2410KR2410K

R210R R210R

C43 100nFC43 100nF

MN5DMN5D

PD0/TK0/PWM3R7

PD1/TF0T7

PD2/TD0L8

PD3/RD0V6

PD4/RK0M8

PD5/RF0V7

PD6/AC97RXN8

PD7/AC97TX/TIOA5U7

PD8/AC97FS/TIOB5P8

PD9/97CK/TCLK5R8

PD10/TD1U8

PD11/RD1T8

PD12/TK1/PCK0V8

PD13/RK1L9

PD14/TF1U9

PD15/RF1M9

PD16/RTS1N9

PD17/CTS1V9

PD18/SPI1_NPCS2/IRQR9

PD19/SPI0_NPCS3/FIQT9

PD20/TIOA0D2

PD21/TIOA1E1

PD22/TIOA2F1

PD23/TCLK0G2

PD24/SPI0_NPCS1/PWM0F2

PD25/SPI0_NPCS2/PWM1G1

PD26/PCK0/PWM2H1

PD27/PCK1/SPI0_NPCS3H2

PD28/TSADTRG/SPI1_NPCS1P9

PD29/TCLK1/SCK1L10

PD30/TIOB0/SCK2T10

PD31/TIOB1/PWM1L11

MN5BMN5B

PB0/SPI0_MISOT4

PB1/SPI0_MOSIV2

PB2/SPI0_SPCKV3

PB3/SPI0_NPCS0U4

PB4/TXD1R5

PB5/RXD1V4

PB6/TXD2T5

PB7/RXD2U5

PB8/TXD3/ISI_D8T12

PB9/RXD3/ISI_D9N11

PB10/TWD1/ISI_D10U13

PB11/TWCK1/ISI_D11M11

PB12/DRXDP6

PB13/DTXDR6

PB14/SPI1_MISOM7

PB15/SPI1_MOSI/CTS0V5

PB16/SPI1_SPCK/SCK0T6

PB17/SPI1_NPCS0/RTS0U6

PB18/RXD0/SPI0_NPCS1N7

PB19/TXD0/SPI0_NPCS2P7

PB20/ISI_D0P12

PB21/ISI_D1T15

PB22/ISI_D2R12

PB23/ISI_D3T16

PB24/ISI_D4N12

PB25/ISI_D5M12

PB26/ISI_D6U14

PB27/ISI_D7M13

PB28/ISI_D8N13

PB29/ISI_VSYNCR13

PB30/ISI_HSYNCT13

PB31/ISI_MCK/PCK1P13

R20 DNPR20 DNP

C33 100nFC33 100nF

R16 39RR16 39R

C35 100nFC35 100nF

C46 100nFC46 100nF

SUP1

SG-BGA-CA89405MFDNP

SUP1

SG-BGA-CA89405MFDNP

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

EBI0EBI1

EBI Bus Impedance Adaptor

(SDA10)

CAUTIONPin assignemts atPCB layout time

(A19)

(A20)

(A21)

DDR_D0

DDR_D1

DDR_D2

DDR_D3

DDR_D7

DDR_D6

DDR_D5

DDR_D4

DDR_D8

DDR_D11

DDR_D10

DDR_D9

DDR_D12

DDR_D15

DDR_D14

DDR_D13

DDR_A3

DDR_A2

DDR_A0

DDR_A1

DDR_A7

DDR_A5

DDR_A4

DDR_A6

DDR_A11

DDR_A9

DDR_A8

DDR_A10

DDR_A13

DDR_A12

EBI1_D0

EBI1_D1

EBI1_D2

EBI1_D3

EBI1_DDR_D1

EBI1_DDR_D0

EBI1_DDR_D3

EBI1_DDR_D2

EBI1_D5

EBI1_D4

EBI1_D7

EBI1_D6

EBI1_DDR_D4

EBI1_D9

EBI1_D8

EBI1_D11

EBI1_D10 EBI1_DDR_D10

EBI1_DDR_D11

EBI1_DDR_D8

EBI1_DDR_D9

EBI1_D13

EBI1_D12

EBI1_D15

EBI1_D14 EBI1_DDR_D14

EBI1_DDR_D15

EBI1_DDR_D12

EBI1_DDR_D13

EBI1_NAND_FSH_D1EBI1_NAND_FSH_D0

EBI1_NAND_FSH_D2EBI1_NAND_FSH_D3EBI1_NAND_FSH_D4EBI1_NAND_FSH_D5






EBI1_FLASH_A1EBI1_FLASH_A2EBI1_FLASH_A3EBI1_FLASH_A4EBI1_FLASH_A5

EBI1_FLASH_A7EBI1_FLASH_A6




EBI1_FLASH_A14EBI1_FLASH_A15EBI1_FLASH_A16EBI1_FLASH_A17EBI1_FLASH_A18

EBI1_FLASH_A1

EBI1_DDR_A2

EBI1_FLASH_A2

EBI1_DDR_A3

EBI1_FLASH_A3

EBI1_FLASH_A5

EBI1_DDR_A5

EBI1_DDR_A4

EBI1_FLASH_A4

EBI1_FLASH_A7

EBI1_DDR_A7

EBI1_FLASH_A9

EBI1_FLASH_A8

EBI1_DDR_A8

EBI1_DDR_A9

EBI1_DDR_A6

EBI1_FLASH_A6

EBI1_FLASH_A11

EBI1_DDR_A11

EBI1_FLASH_A13

EBI1_FLASH_A12

EBI1_DDR_A12

EBI1_DDR_A13

EBI1_FLASH_A16

EBI1_FLASH_A17

EBI1_FLASH_A15

EBI1_FLASH_A14

EBI1_DDR_A10

EBI1_FLASH_A10

EBI1_FLASH_A18

EBI1_FLASH_A19

EBI1_FLASH_A20

EBI1_FLASH_A21

EBI1_FLASH_A19EBI1_FLASH_A20EBI1_FLASH_A21

EBI0_D0

EBI0_D5

EBI0_D6

EBI0_D4

EBI0_D11

EBI0_D9

EBI0_D8

EBI0_D12

EBI0_D13

EBI0_D1

EBI0_D2

EBI0_D3

EBI0_D15

EBI0_D14

EBI0_D10

EBI0_D7

EBI0_A6

EBI0_A11

EBI0_A12

EBI0_A7

EBI0_A5

EBI0_A3

EBI0_A13

EBI0_A8

EBI0_A9

EBI0_A0

EBI0_A2

EBI0_A4

EBI0_A10

EBI0_A1

EBI1_D13

EBI1_D12

EBI1_D15

EBI1_D14

EBI1_D11

EBI1_D7

EBI1_D0

EBI1_D3

EBI1_D10

EBI1_D8

EBI1_D9

EBI1_D4

EBI1_D1

EBI1_D2

EBI1_D6

EBI1_D5

EBI1_FLASH_D1

EBI1_NAND_FSH_D1

EBI1_FLASH_D0

EBI1_NAND_FSH_D0

EBI1_NAND_FSH_D2

EBI1_FLASH_D2

EBI1_NAND_FSH_D3

EBI1_FLASH_D3

EBI1_NAND_FSH_D4

EBI1_FLASH_D5

EBI1_NAND_FSH_D5

EBI1_FLASH_D4

EBI1_FLASH_D6EBI1_FLASH_D6

EBI1_FLASH_D7

EBI1_NAND_FSH_D6

EBI1_FLASH_D9

EBI1_NAND_FSH_D9

EBI1_FLASH_D8

EBI1_NAND_FSH_D8

EBI1_NAND_FSH_D10

EBI1_FLASH_D10

EBI1_NAND_FSH_D11

EBI1_FLASH_D11

EBI1_FLASH_D13

EBI1_NAND_FSH_D13

EBI1_FLASH_D12

EBI1_NAND_FSH_D12

EBI1_NAND_FSH_D14

EBI1_FLASH_D14

EBI1_NAND_FSH_D15

EBI1_FLASH_D15

EBI1_NAND_FSH_D7

EBI1_DDR_D7

EBI1_DDR_D6

EBI1_DDR_D5

EBI1_A16

EBI1_A17

EBI1_A18

EBI1_A1

EBI1_A2

EBI1_A3

EBI1_A4

EBI1_A5

EBI1_A6

EBI1_A7

EBI1_A8

EBI1_A9

EBI1_A10

EBI1_A11

EBI1_A13

EBI1_A16

EBI1_A17

EBI1_A14 EBI1_DDR_A14

EBI1_A15 EBI1_DDR_A15

EBI1_A12

SDA10

SDA10

EBI0_D[0..15]{3} DDR_D[0..15] {5}

EBI1_D[0..15]{3}

EBI1_DDR_D[0..15] {6}

EBI1_NAND_FSH_D[0..15] {6}

EBI0_A[0..13]{3}

EBI0_CKE{3}

EBI0_CLK{3}

EBI0_NCLK{3}

EBI0_BA0{3}

EBI0_BA1{3}

EBI0_WE{3}

EBI0_CS{3}

EBI0_RAS{3}

EBI0_CAS{3}

EBI0_DQM0{3}

EBI0_DQM1{3}

EBI0_DQS0{3}

EBI0_DQS1{3}

DDR_CKE {5}

DDR_CLK {5}

DDR_NCLK {5}

DDR_BA0 {5}

DDR_BA1 {5}

DDR_WE {5}

DDR_CS {5}

DDR_RAS {5}

DDR_CAS {5}

DDR_DQM0 {5}

DDR_DQM1 {5}

DDR_DQS0 {5}

DDR_DQS1 {5}

CKE_EBI1 {6}

CLK_EBI1 {6}

NCLK_EBI1 {6}

BA0_EBI1 {6}

BA1_EBI1 {6}

CS_EBI1 {6}

WE_EBI1 {6}

RAS_EBI1 {6}

CAS_EBI1 {6}

DQM0_EBI1 {6}

DQM1_EBI1 {6}

DQS0_EBI1 {6}

DQS1_EBI1 {6}

EBI1_FLASH_D[0..15] {6}

DDR_A[0..13] {5}

EBI1_SDCKE{3}

EBI1_SDCK{3}

EBI1_NSDCK{3}

EBI1_NCS1/SDCS{3}

EBI1_SDWE{3}

EBI1_RAS{3}

EBI1_CAS{3}

EBI1_DQM0{3}

EBI1_DQM1{3}

EBI1_DQS0{3}

EBI1_DQS1{3}

EBI1_SDA10{3}

EBI1_FLASH_A[1..21] {6}

EBI1_DDR_A[2..15] {6}

EBI1_A[1..18]{3}

PC2{3}

PC3{3}

PC4{3,6}




INIT EDITA


12E

XX-XXX-XXPP XXX

RES.ARRAYS-EBI0_EBI1





INIT EDITA


12E

XX-XXX-XXPP XXX






INIT EDITA


12E

XX-XXX-XXPP XXX



RR2BRR2B2 7

RR21DRR21D4 5

RR32DRR32D4 5

RR9BRR9B2 7

RR9CRR9C3 6

RR25CRR25C3 6

RR17DRR17D4 5

RR28BRR28B2 7

RR8DRR8D4 5

RR22CRR22C3 6

RR33ARR33A1 8

RR7CRR7C3 6

RR1BRR1B2 7

RR13DRR13D4 5

RR30BRR30B2 7

RR28CRR28C3 6

RR11CRR11C3 6

RR4BRR4B2 7

RR16CRR16C3 6

RR3BRR3B2 7

RR11BRR11B2 7

RR29ARR29A1 8

R35 27RR35 27R

RR20DRR20D4 5

RR11DRR11D4 5

RR1DRR1D4 5

RR17CRR17C3 6

RR12BRR12B2 7

RR31CRR31C3 6

RR32CRR32C3 6

RR16ARR16A1 8

RR19DRR19D4 5

RR2CRR2C3 6

RR2ARR2A1 8

RR12ARR12A1 8

RR30CRR30C3 6

RR15ARR15A1 8

RR13BRR13B2 7

RR26CRR26C3 6

RR10CRR10C3 6

RR18BRR18B2 7

RR14BRR14B2 7

RR14ARR14A1 8

RR6BRR6B2 7

R29 27RR29 27R

RR30ARR30A1 8

RR30DRR30D4 5

RR5BRR5B2 7

RR13ARR13A1 8

RR23ARR23A1 8

RR18CRR18C3 6

RR3DRR3D4 5

RR29CRR29C3 6

R27 27RR27 27R

RR9DRR9D4 5

RR32ARR32A1 8

RR33DRR33D4 5

RR27CRR27C3 6

RR10BRR10B2 7

RR12CRR12C3 6

R34 27RR34 27R

RR31DRR31D4 5

RR10DRR10D4 5

RR7BRR7B2 7

RR6ARR6A1 8

RR6CRR6C3 6

RR27ARR27A1 8

RR14CRR14C3 6RR25ARR25A1 8

RR6DRR6D4 5

RR5DRR5D4 5

RR23CRR23C3 6

R26 27RR26 27R

RR12DRR12D4 5

RR29BRR29B2 7

R28 27RR28 27R

RR15DRR15D4 5

RR21ARR21A1 8

RR4ARR4A1 8

RR29DRR29D4 5

RR26BRR26B2 7

RR15CRR15C3 6

RR16BRR16B2 7

R33 27RR33 27R

RR18DRR18D4 5

RR26DRR26D4 5

RR4DRR4D4 5

RR17BRR17B2 7

RR3ARR3A1 8

RR23BRR23B2 7

RR7DRR7D4 5

R31 27RR31 27R

RR4CRR4C3 6

RR14DRR14D4 5

RR27BRR27B2 7

RR25DRR25D4 5

RR8BRR8B2 7

RR16DRR16D4 5

RR11ARR11A1 8

RR8ARR8A1 8

RR1ARR1A1 8

RR5CRR5C3 6

RR22DRR22D4 5

RR21BRR21B2 7

RR15BRR15B2 7

RR13CRR13C3 6

RR2DRR2D4 5

RR33BRR33B2 7

RR19BRR19B2 7

RR28ARR28A1 8

RR24ARR24A1 8

RR19ARR19A1 8

RR21CRR21C3 6

RR28DRR28D4 5

RR7ARR7A1 8

RR22ARR22A1 8

RR32BRR32B2 7

RR1CRR1C3 6

RR20ARR20A1 8

RR24DRR24D4 5

RR20CRR20C3 6

RR20BRR20B2 7

RR26ARR26A1 8

RR25BRR25B2 7

R30 27RR30 27R

RR17ARR17A1 8

RR3CRR3C3 6

RR18ARR18A1 8

RR23DRR23D4 5

RR19CRR19C3 6

RR22BRR22B2 7

RR24BRR24B2 7

RR31ARR31A1 8

RR10ARR10A1 8

RR8CRR8C3 6

RR24CRR24C3 6

RR27DRR27D4 5

RR5ARR5A1 8

RR33CRR33C3 6

R32 27RR32 27R

RR31BRR31B2 7

RR9ARR9A1 8

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RASCAS

NWE

CKE

DDR_D7

DDR_D3DDR_D2

DDR_D4

DDR_D0DDR_D1

DDR_D5DDR_D6

BA0BA1

DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4DDR_A5DDR_A6DDR_A7DDR_A8DDR_A9DDR_A10DDR_A11DDR_A12DDR_A13

CKNCK

CS

DDR_VREF

DDR_VREF DDR_VREF

CKNCK

CS

BA0BA1

RASCAS

NWE

CKE

DDR_D15

DDR_D11DDR_D10

DDR_D12

DDR_D8DDR_D9

DDR_D13DDR_D14

DDR_A0DDR_A1DDR_A2DDR_A3DDR_A4DDR_A5DDR_A6DDR_A7DDR_A8DDR_A9DDR_A10DDR_A11DDR_A12DDR_A13

1V8

1V8

1V8

DDR_D[0..15]{4}

DDR_BA0{4}DDR_BA1{4}

DDR_CKE{4}

DDR_CLK{4}DDR_NCLK{4}

DDR_CS{4}

DDR_CAS{4}DDR_RAS{4}

DDR_WE{4}

DDR_A[0..13]{4}

DDR_DQS0 {4}

DDR_DQM0 {4}

DDR_DQS1 {4}

DDR_DQM1 {4}

DDR_VREF {3,6}




INIT EDITA


12E

XX-XXX-XXPP XXX

EBI0_DDR2

26-MAY-0829-JUL-08PPB02-DEC-08C PP22-jun-09PPD03-sep-09LNE




INIT EDITA


12E

XX-XXX-XXPP XXX

EBI0_DDR2





INIT EDITA


12E

XX-XXX-XXPP XXX

EBI0_DDR2


C66 100nFC66 100nF

C59 100nFC59 100nF

MT47H64M8CF-3

DDR2 SDRAM

MN7

MT47H64M8CF-3

DDR2 SDRAM

MN7

A0H8

A1H3

A2H7

A3J2

A4J8

A5J3

A6J7

A7K2

A8K8

A9K3

A10H2

BA0G2

ODTF9

DQ0C8

DQ1C2

DQ2D7

DQ3D3

DQ4D1

DQ5D9

DQ6B1

DQ7B9

DQSB7

DQSA8

RDQS/DMB3

RDQS/NUA2

VDDH9

VDDL1

VDDLE1

VREFE2

VDDQC9

VSSA3

VSSE3

VDDQA9

VDDE9

RFU1G1

RFU2L3

CKEF2

CKE8

CKF8

CASG7

RASF7

WEF3

CSG8

VDDQC1

VDDQC3

VDDQC7

VSSQB2

VSSQB8

VSSQD2

VSSQD8

VDDA1

VSSJ1

A11K7

BA1G3

A12L2

A13L8

VSSK9

VSSDLE7

VSSQA7

RFU3L7

C60 100nFC60 100nF

C68 100nFC68 100nF

R361RR361R

C69 100nFC69 100nF

C57 100nFC57 100nF

C72 100nFC72 100nFC73 100nFC73 100nF

C79100nFC79100nF

R381.5KR381.5K

C64 100nFC64 100nF

MT47H64M8CF-3

DDR2 SDRAM

MN6

MT47H64M8CF-3

DDR2 SDRAM

MN6

A0H8

A1H3

A2H7

A3J2

A4J8

A5J3

A6J7

A7K2

A8K8

A9K3

A10H2

BA0G2

ODTF9

DQ0C8

DQ1C2

DQ2D7

DQ3D3

DQ4D1

DQ5D9

DQ6B1

DQ7B9

DQSB7

DQSA8

RDQS/DMB3

RDQS/NUA2

VDDH9

VDDL1

VDDLE1

VREFE2

VDDQC9

VSSA3

VSSE3

VDDQA9

VDDE9

RFU1G1

RFU2L3

CKEF2

CKE8

CKF8

CASG7

RASF7

WEF3

CSG8

VDDQC1

VDDQC3

VDDQC7

VSSQB2

VSSQB8

VSSQD2

VSSQD8

VDDA1

VSSJ1

A11K7

BA1G3

A12L2

A13L8

VSSK9

VSSDLE7

VSSQA7

RFU3L7

C55 100nFC55 100nF

C75100nFC75100nF

C56 100nFC56 100nF

C67 100nFC67 100nFC70 100nFC70 100nF

C71 100nFC71 100nF

C65 100nFC65 100nF

C58 100nFC58 100nF

R371.5KR371.5K

C61 100nFC61 100nF

C784.7uFC784.7uF

C62 100nFC62 100nF

C76100nFC76100nF

C77100nFC77100nF

C74 100nFC74 100nF

L7

10uH 150mA

L7

10uH 150mA

C63 100nFC63 100nF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Optional 16bits DATA BUSWith AT29F2G16ABD Micron

(SDA10) (SDA10)

(NCS3)

(RDY/BSY)

(NANDALE)(NANDCLE)

(NCS1)

WP

REWECE

RB EBI1_NAND_FSH_D6

EBI1_NAND_FSH_D0



EBI1_NAND_FSH_D5

EBI1_NAND_FSH_D7

EBI1_NAND_FSH_D14

EBI1_NAND_FSH_D8



EBI1_NAND_FSH_D13

EBI1_NAND_FSH_D15

EBI1_DDR_D15

EBI1_DDR_D11EBI1_DDR_D10

EBI1_DDR_D12



EBI1_DDR_D7


EBI1_DDR_D4



EBI1_FLASH_D4

EBI1_FLASH_D2

EBI1_FLASH_D10

EBI1_FLASH_D5

EBI1_FLASH_D12

EBI1_FLASH_D9

EBI1_FLASH_D14EBI1_FLASH_D15

EBI1_FLASH_D3

EBI1_FLASH_D0

EBI1_FLASH_D6EBI1_FLASH_D7EBI1_FLASH_D8

EBI1_FLASH_D1

EBI1_FLASH_D13

EBI1_FLASH_D11

EBI1_DDR_A2EBI1_DDR_A3EBI1_DDR_A4EBI1_DDR_A5EBI1_DDR_A6EBI1_DDR_A7EBI1_DDR_A8EBI1_DDR_A9EBI1_DDR_A10EBI1_DDR_A11EBI1_DDR_A12EBI1_DDR_A13

EBI1_DDR_A15EBI1_DDR_A14

EBI1_DDR_A2EBI1_DDR_A3EBI1_DDR_A4EBI1_DDR_A5EBI1_DDR_A6EBI1_DDR_A7EBI1_DDR_A8EBI1_DDR_A9EBI1_DDR_A10EBI1_DDR_A11EBI1_DDR_A12EBI1_DDR_A13

EBI1_DDR_A15EBI1_DDR_A14

NCLK_EBI1

CS_EBI1

BA0_EBI1BA1_EBI1

RAS_EBI1CAS_EBI1

WE_EBI1

CKE_EBI1

CLK_EBI1NCLK_EBI1

CS_EBI1

BA0_EBI1BA1_EBI1

RAS_EBI1CAS_EBI1

WE_EBI1

CKE_EBI1

VREF1

EBI1_FLASH_A1EBI1_FLASH_A2EBI1_FLASH_A3EBI1_FLASH_A4EBI1_FLASH_A5EBI1_FLASH_A6EBI1_FLASH_A7EBI1_FLASH_A8EBI1_FLASH_A9EBI1_FLASH_A10EBI1_FLASH_A11EBI1_FLASH_A12


EBI1_FLASH_A16


VREF1

VREF1


CLK_EBI1

1V8

1V8

1V8

1V8

1V8

1V8

1V8

1V8 1V8

EBI1_FLASH_D[0..15]{4}

BA0_EBI1{4}

PC8{3}

EBI1_DDR_D[0..15]{4}

EBI1_FLASH_A[1..21]{4}

EBI1_DDR_A[2..15]{4}

BA1_EBI1{4}

CKE_EBI1{4}

CLK_EBI1{4}NCLK_EBI1{4}

CS_EBI1{4}

CAS_EBI1{4}RAS_EBI1{4}

WE_EBI1{4}

DQS0_EBI1 {4}

DQM0_EBI1 {4}

DQS1_EBI1 {4}

DQM1_EBI1 {4}

EBI1_NCS0{3}

EBI1_NRD/CFOE{3}

DDR_VREF{3,5}

EBI1_NWE/NWR0/CFWE{3}

PC5{3}PC4{3,4}

EBI1_NANDOE{3}EBI1_NANDWE{3}

PC14{3}

EBI1_NAND_FSH_D[0..15]{4}




INIT EDITA


12E

XX-XXX-XXPP XXX

EBI1_MEMORY





INIT EDITA


12E

XX-XXX-XXPP XXX

EBI1_MEMORY





INIT EDITA


12E

XX-XXX-XXPP XXX

EBI1_MEMORY


R43 0RR43 0R

JP9JP9

C80 100nFC80 100nF C81 100nFC81 100nFC82 100nFC82 100nF

C104 100nFC104 100nF

C101100nFC101100nF

R40 470KR40 470K

MT47H64M8CF-3

DDR2 SDRAM

MN8

MT47H64M8CF-3

DDR2 SDRAM

MN8

A0H8

A1H3

A2H7

A3J2

A4J8

A5J3

A6J7

A7K2

A8K8

A9K3

A10H2

BA0G2

ODTF9

DQ0C8

DQ1C2

DQ2D7

DQ3D3

DQ4D1

DQ5D9

DQ6B1

DQ7B9

DQSB7

DQSA8

RDQS/DMB3

RDQS/NUA2

VDDH9

VDDL1

VDDLE1

VREFE2

VDDQC9

VSSA3

VSSE3

VDDQA9

VDDE9

RFU1G1

RFU2L3

CKEF2

CKE8

CKF8

CASG7

RASF7

WEF3

CSG8

VDDQC1

VDDQC3

VDDQC7

VSSQB2

VSSQB8

VSSQD2

VSSQD8

VDDA1

VSSJ1

A11K7

BA1G3

A12L2

A13L8

VSSK9

VSSDLE7

VSSQA7

RFU3L7

R39 100KR39 100K

R42 0RR42 0R

AT49SV322DT

FLASH

CBGA

MN10

DNP

AT49SV322DT

FLASH

CBGA

MN10

DNP

A0E1

A1D1

A2C1

A3A1

A4B1

A5D2

A6C2

A7A2

A8B5

A9A5

A10C5

A11D5

A12B6

A13A6

A14C6

A15D6

A16E6

A17B2

A18C3

RDY/ BUSYA3

A20D3 A19D4

WEA4 RESETB4

OEG1 CEF1 VPPB3

I/00E2

I/O1H2

I/O2E3

I/O3H3

I/O4H4

I/O5E4

I/O6H5

I/O7E5

I/O8F2

I/O9G2

I/O10F3

I/O11G3

I/O12F4

I/O13G5

I/O14F5

I/O15G6

VCCG4

GNDH6GNDH1

NC1C4

NCF6

R46 470KR46 470K

JP10JP10

C87 100nFC87 100nF

MT29F2G08ABD

NAND FLASH

VFBGA-63

MN11

MT29F2G08ABDHC:D

MT29F2G08ABD

NAND FLASH

VFBGA-63

MN11

MT29F2G08ABDHC:D

WEC7

N.C6B9

VCCH8

CEC6

RED4

N.C11E3

WPC3

N.C5B1

N.C1A1

N.C2A2

N.C3A9

N.C4A10

N.C12E4

N.C13E5

N.C14E6

N.C15E7

R/BC8

N.C17F3

N.C36M1

I/O0H4

N.C34L9

N.C25L2

VSSF7

N.C29J5

VCCJ6

VSSK3

ALEC4

N.C8D6 N.C7

B10

N.C9D7

N.C10D8

CLED5

N.C16E8

N.C35L10

I/O1J4

I/O3K5I/O2K4

N.C28H5

N.C30H6

N.C32H7

I/O7J8I/O6K7I/O5J7I/O4K6

N.C27J3N.C26H3

VSSC5

N.C24L1

VSSK8

LOCKG5

VCCD3

VCCG4

N.C31G6

N.C18F4

N.C19F5

N.C20F6

N.C22G3 N.C21F8

N.C33G7

N.C23G8

N.C37M2

N.C38M9

N.C39M10

C94 100nFC94 100nFC93 100nFC93 100nF

R45 1KR45 1K

MT47H64M8CF-3

DDR2 SDRAM

MN9

MT47H64M8CF-3

DDR2 SDRAM

MN9

A0H8

A1H3

A2H7

A3J2

A4J8

A5J3

A6J7

A7K2

A8K8

A9K3

A10H2

BA0G2

ODTF9

DQ0C8

DQ1C2

DQ2D7

DQ3D3

DQ4D1

DQ5D9

DQ6B1

DQ7B9

DQSB7

DQSA8

RDQS/DMB3

RDQS/NUA2

VDDH9

VDDL1

VDDLE1

VREFE2

VDDQC9

VSSA3

VSSE3

VDDQA9

VDDE9

RFU1G1

RFU2L3

CKEF2

CKE8

CKF8

CASG7

RASF7

WEF3

CSG8

VDDQC1

VDDQC3

VDDQC7

VSSQB2

VSSQB8

VSSQD2

VSSQD8

VDDA1

VSSJ1

A11K7

BA1G3

A12L2

A13L8

VSSK9

VSSDLE7

VSSQA7

RFU3L7

R41 470KR41 470K

C83 100nFC83 100nF

C92 100nFC92 100nFC95 100nFC95 100nF

C88 100nFC88 100nF

C103 100nFC103 100nF

C90 100nFC90 100nF

C100100nFC100100nF

C106 100nFC106 100nF

C89 100nFC89 100nF

R47DNPR47DNP

C102100nFC102100nF

C96 100nFC96 100nF

R44 0RR44 0R

C97 100nFC97 100nFC99 100nFC99 100nFC98 100nFC98 100nF

C105 100nFC105 100nF

C91 100nFC91 100nF

C86 100nFC86 100nFC84 100nFC84 100nF C85 100nFC85 100nF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SERIAL EEPROMSERIAL DATAFLASH WRITE PROTECT

NORMALLY OPEN

SD/MMCPlus CARD INTERFACE - MCI1SD/MMC CARD INTERFACE - MCI0

Test point

(MCI0_DA1)(MCI0_DA0)

(MCI0_CK)

(MCI0_CDA)(MCI0_DA3)(MCI0_DA2)

(MCI0_CD)


(MCI1_CK)

(MCI1_CDA)(MCI1_DA3)(MCI1_DA2)



(MCI1_CD)(MCI1_WP)

(SPI0_MISO)(SPI0_MOSI)(SPI0_SPCK)(SPI0_NPCS0)

(TWCK0)(TWDO)

PA1PA5PA4

PA3PA2

PA0

PA26PA25

PA27PA28PA29PA30

PA24PA23

PA31

PA22

3V3

3V3

3V3

3V3

3V3

3V3

3V3

3V3

PB1{3}PB2{3}PB3{3}

PA21{3,12}PB0{3}

PD29{3}PD11{3}PD10{3}

PA20{3,12}

PA[22..31]{3,10}PA[0..5]{3}

NRST{2,3,8,9,10,12}




INIT EDITA


12E

XX-XXX-XXPP XXX

MCI & TWI

26-MAY-0829-JUL-08PPB





INIT EDITA


12E

XX-XXX-XXPP XXX

MCI & TWI






INIT EDITA


12E

XX-XXX-XXPP XXX

MCI & TWI



R188 27RR188 27R

R5210KR5210K

R186 27RR186 27R

JP13JP13

R192 27RR192 27R

R189 27RR189 27R

C110100nFC110100nF

7SDMM-B0-2211

J5

7SDMM-B0-2211

J58

5

76

43219

141516

13121110

RR4168K

RR4168K

1

5

2 3 4678

R194 27RR194 27R

MN13

AT24C512BN-SH25-B

MN13

AT24C512BN-SH25-B

A01

A12

WP7

SCL6

VCC8 A3

3SDA5

GND4

C108100nF

C108100nF

R195 27RR195 27R

MN14

AT45D321D

MN14

AT45D321D

RESET3

GND7

VCC6

CS4 SCK2 SI1 SO8

WP5

R193 27RR193 27R

R201 27RR201 27R

RR34

68K

RR34

68K

1

5

2 3 4678

R197 27RR197 27R

R5110KR5110K

FPS009

J6

FPS009

J68

5

76

43219

101112

R5410KR5410K

R187 27RR187 27R

JP11

DNP

JP11

DNP

1

2

3

C111100nFC111100nF

R190 27RR190 27R

R53470KR53470K

R196 27RR196 27R

C109100nFC109100nF

JP12JP12

R199 27RR199 27R

R191 27RR191 27R

R55DNPR55DNP

R200 27RR200 27R

R198 27RR198 27R

RR3568KRR3568K

1

5

2 3 4678

RR3610KRR3610K

1

5

2 3 4678

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RA

RB

(see table)

OUT

INOUT

IN

OUTINOUTIN

RA=1K RB=1K CODEC ID CLK FREQ

PRIMARYSECONDARYPRIMARYPRIMARY

24.576 MHz12.288 MHz48.000 MHz14.318 MHz

Local XTALExt. BITCLKExt. BITCLK (Into XTAL-IN)Ext. BITCLK (Into XTAL-IN)

OPTIONAL MIC BIASING FROM VREFOUT

TO BIAS FROM VREFOUTCHANGE R71 and R72 to 3k 5%DO NOT INSTALL R76, R78, C150, C151

VREFOUT MUST BE PROGRAMMED TO 3.7VUSING VREFH BIT (REG 76h)

LINE-IN

MONO / STEREOMICROPHONE INPUT

HEADPHONELINE-OUT

CLOCK SELECTION - PIN STRAPING TABLE

OPTIONAL VOICEFILTER COMPONENTS

SPEAKER OUTPUT

WARNING

(AC97TX)(AC97CK)

(AC97RX)

(AC97FS)

(EXT_CLK)

VREFOUT

VREFOUT

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AGND_AC97

AG

ND

_AC

97

5V AVDD_AC97

AVDD_AC97

AVDD_AC97

AVDD_AC97

3V3

AVDD_AC97

NRST{2,3,7,9,10,12}

PD6{3}

PD9{3}

PD8{3}

PD7{3}

PE31{3}




INIT EDITA


12E

XX-XXX-XXPP XXX

AUDIO AC97


02-DEC-08C PP22-jun-09PPD03-sep-09LNE




INIT EDITA


12E

XX-XXX-XXPP XXX

AUDIO AC97






INIT EDITA


12E

XX-XXX-XXPP XXX

AUDIO AC97



C139470pFC139470pF

C138470pFC138470pF

L9742792093

L9742792093

L10742792093

L10742792093

+

C112 6V3100uF

+

C112 6V3100uF

R64 4.7KR64 4.7K

R571KR571K

C151

10V10uFC151

10V10uF

JP15DNP

JP15DNP

C114470pFC114470pF

R69 100RR69 100R

C146

6V347uFC146

6V347uF C142

10nFC14210nF

C141 100nFC141 100nF

R77 DNPR77 DNP

C117100nFC117100nF

L14742792093

L14742792093

R684.7KR684.7K

C126 100nFC126 100nF

C122

10V10uFC122

10V10uF

C121

10V10uFC121

10V10uF

C123 22pFC123 22pF

C125100nFC125100nF

R65 2.2KR65 2.2K

C1341uFC1341uF

L12742792093

L12742792093

R674.7KR674.7K

C127 100nFC127 100nF

C1371uFC1371uF

L8742792093

L8742792093

J93.5 PHONEJACK STEREO


2

1 4

3 5



2

1 4

3 5

MN15

AD1981B

MN15

AD1981B

MO

NO

_OU

T37

HP

_OU

T_L

39H

P_O

UT_

R41

LINE_OUT_L35LINE_OUT_R36

SDATA_IN8

SP

DIF

48

XTL_OUT3

AFILT129AFILT230AFILT331AFILT432

VREF27VREFOUT28

EA

PD

47

NC112

NC

42

AVDD125

AV

DD

238

AV

DD

343

AVDD434

DVDD11

DVDD29

AU

X_L

14

AU

X_R

15

CD

_ R

20C

D_G

ND

_RE

F19

CD

_L18

LIN

E_I

N_L

23

LIN

E_I

N_R

24

MIC

121

MIC

222

PH

ON

E_I

N13

ID0

45ID

146

SDATA_OUT5

RESET11 SYNC10

XTL_IN2

BIT_CLK6

JS0

17JS

116

AVSS126

AV

SS

240

AV

SS

344

AVSS433

DVSS14

DVSS27

R60 DNPR60 DNP

C1361uFC1361uF



2

1 4

3 5

C133 100nFC133 100nF

C129 270pFC129 270pF

R62 22KR62 22K

C150

10V10uFC150

10V10uF

C145

100nF

C145

100nF

R561KR561K

C115470pFC115470pF

VDD

Shutdown

Bypass

GND

Vo2

Vo1+IN

-IN

Bias

VDD/2 Av=1

MN16

SSM2211

VDD

Shutdown

Bypass

GND

Vo2

Vo1+IN

-IN

Bias

VDD/2 Av=1

MN16

SSM2211

6

4

35

28

1

7

C124100nFC124100nF

C118

10V10uFC118

10V10uF

C14310nFC14310nF

R63 2.2KR63 2.2K

R66 4.7KR66 4.7K

Y324.576MHzY324.576MHz

L13

10uH 150mA

L13

10uH 150mA

C116100nFC116100nF

R713.9KR713.9K

C132 100nFC132 100nF

C130 270pFC130 270pF

C1191uFC1191uF

C131 270pFC131 270pF

C140 100nFC140 100nF

C149470pFC149470pF

L11742792093

L11742792093

R76 470RR76 470R

JP14 DNPJP14 DNP

1

2

3

R740RR740R

R58 DNPR58 DNP

C135100nFC135100nF

R59 DNPR59 DNP

R73 0RR73 0R

R78 470RR78 470R

C128 270pFC128 270pF

R61 22KR61 22K

C120 22pFC120 22pF

R723.9KR723.9K

+

C113 6V3100uF

+

C113 6V3100uF

R70 100RR70 100R

C144

10V10uFC144

10V10uF

C148470pFC148470pF

C147470pFC147470pF

R75 DNPR75 DNP

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SERIAL DEBUG PORTRS232 COM PORT

USB HOST/DEVICE INTERFACE

USB HOST INTERFACE

ICE INTERFACE

Take note of layout directive"High speed USB platform design.PDF"

(ENA)

(ENB)

(FLGA)

(FLGB)

(VBUS)

(IDUSB)

TDI

RTCKTDO

TMSTCK

NTRST

NRST

5V

3V3

3V3

3V3

3V3

3V3 3V3

3V3

3V3

PD2 {3}

PD4 {3}

PB13 {3}

PD1 {3}

PB12 {3} PB5{3}

PD17{3}

PB4{3}

PD16{3}

HDMA {3}

HDPA {3}

PD3 {3}

HDMB {3}HDPB {3}PD28 {3}

NTRST {3}

RTCK {3}

TDI {3}TMS {3}TCK {3}

TDO {3}NRST {2,3,7,8,10,12}

PB19 {3}




INIT EDITA


12E

XX-XXX-XXPP XXX

SERIAL INTERFACES


PPC 02-DEC-0822-jun-09PPD03-sep-09LNE




INIT EDITA


12E

XX-XXX-XXPP XXX

SERIAL INTERFACES






INIT EDITA


12E

XX-XXX-XXPP XXX

SERIAL INTERFACES



C154100nFC154100nF

L15

BLM21PG221SN1x

L15

BLM21PG221SN1x

R85 0RR85 0R

C16610pFC16610pF

C156100nF

C156100nF

C161100nFC161100nF

R88 47KR88 47K

C157100nFC157100nF

R79100KR79

100K

C152100nFC152100nF

R83 0RR83 0R

C158100nF

C158100nF

C163100nFC163100nF

C155100nF

C155100nF

L16

BLM21PG221SN1x

L16

BLM21PG221SN1x

R8968KR8968K

MN20

SP2526A-2

MN20

SP2526A-2

ENA1

FLGA2

ENB4

OUTA8

GNG6

FLGB3

IN7

OUTB5

��

J12292303-1

��

J12292303-1

1

4

5

2

3

6

R87DNPR87DNP

R9047KR9047K

R86 0RR86 0R

J10

MALE RIGHT ANGLE

J10

MALE RIGHT ANGLE

5

4

3

2

1

9

8

7

61011

C1+

V+

VCC

C1-C2+

C2- V-

T

T

R

R

GND

MN17

ADM3202ARNZ

C1+

V+

VCC

C1-C2+

C2- V-

T

T

R

R

GND

MN17

ADM3202ARNZ

1 16

34

5

15

11

10

12

9 8

13

7

14

2

6

R81100KR81

100K

C1+

V+

VCC

C1-C2+

C2-V-

T

T

R

R

GND

MN18

ADM3202ARNZ

C1+

V+

VCC

C1-C2+

C2-V-

T

T

R

R

GND

MN18

ADM3202ARNZ

116

34

5

15

11

10

12

98

13

7

14

2

6R80100KR80100K

C153100nF

C153100nF

C165

16V33 uFC165

16V33 uF

C164

16V33 uFC164

16V33 uF

VBUS

SHD

DMDPID

GND

J14

ZX62-AB-5P

VBUS

SHD

DMDPID

GND

J14

ZX62-AB-5P

12345

7

6

R84 DNPR84 DNP

C159100nFC159100nF

C162100nF

C162100nF

J11

MALE RIGHT ANGLE

J11

MALE RIGHT ANGLE

5

4

3

2

1

9

8

7

6

10 11

C160100nF

C160100nF

R82100KR82100K

RR42100KRR42100K

1

5

2346 7 8

J13J13

12345678910111213151719

14161820

C167100nF

C167100nF

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SPEED 100

FULL DUPLEX

LINK&ACT

RJ45 ETHERNET CONNECTOR

Take note of layout directive"DM9161-LG-V11-011401S.PDF"

(TX_CLK)

(TXD3)(TXD2)

(RXD1)(RXD0)

(RX_CLK)(RX_DV)

(RXD2)

(TXD1)(TXD0)(TX_EN)

(RXD3)

(COL)(CRS)

(MDC)(MDIO)(MDINTR)

(TX_ER)(RX_ER)

GND_ETH

GND_ETH

GND_ETH

GND_ETH

GND_ETH

3V3

3V3

3V3

3V33V3

3V3

AVDDT

AVDDT

AVDDT

3V3

PD5{3}

PA29{3,7}PA30{3,7}

PA16{3}

PA15{3}PA28{3,7}

PA12{3}PA13{3}PA8{3}PA9{3}

PA17{3}

PA7{3}PA6{3}PA11{3}PA10{3}PA14{3}

PA27{3,7}

PA18{3}

NRST{2,3,7,8,9,12}

PA19{3}




INIT EDITA


12E

XX-XXX-XXPP XXX

RMII ETHERNET





INIT EDITA


12E

XX-XXX-XXPP XXX

RMII ETHERNET





INIT EDITA


12E

XX-XXX-XXPP XXX

RMII ETHERNET


MN22

DM9161AEP

MN22

DM9161AEP

TX_ER/TXD416

COL/RMII36

MDC24

RX-4

RX+3

TX-8

TX+7

XT143

REF_CLK/XT242

RX_CLK/10BTSER34

RX_DV/TESTMODE37

RX_ER/RXD4/RPTR38

TX_EN21

BGRES48

AVDDR1

AVDDR2

DVDD41

DGND44

DGND15

AGND5

AGND6

LED2/OP213LED1/OP112LED0/OP011

TXD317

TXD218

TXD020 TXD119

TX_CLK/ISOLATE22

RXD0/PHYAD029 RXD1/PHYAD128 RXD2/PHYAD227 RXD3/PHYAD326

CRS/PHYAD435

MDIO25

MDINTR32

PWRDWN10

DGND33

RESET40

AVDDT9

DISMDIX39

DVDD30

DVDD23

AGND46

BGRESG47

CABLESTS/LINKSTS14

N.C45

LEDMODE31

D11GREEN

D11GREEN

R101 DNPR101 DNP

R99 DNPR99 DNP

R1131K

R1131K

R94 0RR94 0R

JP16JP16

C174 100nFC174 100nF

1

2

3

6

4

5

7

8

75

75

7575

1nF

TD+

TD-

CT

NC

RD-

CT

TX+

TX-

RX+

RX-

RD+

J15

J00-0061NL

1

2

3

6

4

5

7

8

75

75

7575

1nF

TD+

TD-

CT

NC

RD-

CT

TX+

TX-

RX+

RX-

RD+

J15

J00-0061NL

1

2

7

8

3

6

5

4

15 16

R10549R91%

R10549R91%

R1096.8K1%

R1096.8K1%

D10GREEN

D10GREEN

R10649R91%

R10649R91%

R1111K

R1111K

C177100nFC177100nF

C168100nFC168100nF

R93 DNPR93 DNP

C181 100nFC181 100nF

C180 100nFC180 100nF

C182

10V10uFC182

10V10uF

R185 0RR185 0R

R107 DNPR107 DNPR108 1.5KR108 1.5K

R104 DNPR104 DNP

C171100nFC171100nF

C179 100nFC179 100nF

RR4610KRR4610K

1

5

2 3 4678

D9YELLOW

D9YELLOW

R9749R91%

R9749R91%

Y5

25MHz

Y5

25MHz

1

3

2

4

C172 100nFC172 100nF

50 MHz

VDD

VSS OUT

OE

Y4

CFPS-39IB 50.0MHZ

50 MHz

VDD

VSS OUT

OE

Y4

CFPS-39IB 50.0MHZ

41

32

R115 0RR115 0R

R9649R91%

R9649R91%

L17742792093

L17742792093

C16918pFC16918pF

R102 DNPR102 DNP

R91 10KR91 10K

R114 0RR114 0R

C173100nFC173100nF

C17018pFC17018pF

R95 DNPR95 DNP

R98 DNPR98 DNP

C176

10V10uFC176

10V10uF

R920RR920R

RR4510KRR4510K

1

5

2 3 4678

R103 DNPR103 DNP

RR4410KRR4410K

1

5

2 3 4678

C178 100nFC178 100nF

R112 0RR112 0R

R1101K

R1101K

C175

10V10uFC175

10V10uF

RR4310KRR4310K

1

5

2 3 4678

R100 DNPR100 DNP

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

pin1pin2pin3

pin29

pin4

pin37

4.3" 480x272 TFT LCD DISPLAY

pin38pin39

pin32

pin40

pin33

pin42pin43

20mA MAX

(LCDPWR)

pin35

9 LEDs Back Light

pin36

pin41

pin34

pin5pin6pin7pin8pin9pin10pin11pin12pin13pin14pin15pin16pin17pin18pin19pin20pin21pin22pin23pin24pin25pin26pin27pin28

pin30pin31

pin44pin45

(pinxx = display pin number )

(LCDDEN)

(G4)

(R6)

(B3)

(LCDPWR)

(G5)

(LCDDEN)

(LCDCC)

(R7)(G0)

(B4)

(G6)

(B5)

(R2)

(G7)(B0)

(G1)

(B6)

(R3)

(G2)

(B7)

(R1)

(R4)

(B1)

(G3)

(LCDDOTCK)

(R5)

(R0)

(B2)

(AD1Xm)(AD3Ym)(AD0Xp)

(AD2Yp)(LCDCC)

R48 is placed near processor

This Resistoris intentionally mountedin place of C210

YpLCD

VLED-XmLCDYmLCD

VLED+

XpLCDYmLCDXmLCD

YpLCD

VLED-VLED+

XpLCD

BLUE6BLUE7

RED0

BLUE2BLUE3BLUE4BLUE5

BLUE0BLUE1

GREEN5GREEN6GREEN7

GREEN2GREEN3GREEN4

RED6RED7GREEN0GREEN1

RED2RED3RED4RED5

RED1

PE0LCDDOTCK

PE2

RED3PE8PE10

RED4PE9PE11

RED5PE10PE12

RED6PE11PE13

RED7PE12PE14

GREEN2PE13PE17

PE14GREEN3 PE18

PE19GREEN4PE15

PE20GREEN5PE16

PE21GREEN6PE17

PE22GREEN7PE18

PE26PE20

BLUE3

PE27BLUE4PE21

PE28BLUE5PE22

PE29BLUE6PE23

PE30BLUE7PE24

PE7PE8PE9

PE15PE16

PE23PE24PE25

PE6

PE6

PE17

PE12

PE28

PE23

PE7

PE1

PE18

PE13

PE29

PE24

PE8

PE2

PE0

PE19

PE3

PE14

PE25

PE9

PE20

PE4

PE15

PE26

PE10

PE21

PE5

PE16

PE11

PE27

PE30

PE22

3V3

3V3

5V

PE[0..30] {3,12}

PD22 {3,12}PD21 {3,12}PD23 {3,12}PD20 {3,12}

LCDDOTCK{12}




INIT EDITA


12E

XX-XXX-XXPP XXX

LCD & ISI & VIDEO INTERFACE






INIT EDITA


12E

XX-XXX-XXPP XXX







INIT EDITA


12E

XX-XXX-XXPP XXX




C188100nFC188100nF

Con

duct

ors

o

nTO

P S

IDE

PIN 1

PIN 45

LG P

HIL

IPS

Z7

LB043WQ1

Con

duct

ors

o

nTO

P S

IDE

PIN 1

PIN 45

LG P

HIL

IPS

Z7

LB043WQ1R172 0RR172 0R

R184 DNPR184 DNP

RR53ARR53A1 8

RR49CRR49C3 6

R155 DNPR155 DNP

RR48ARR48A1 8

RR49DRR49D4 5

RR53CRR53C3 6

C210220KC210220K

RR52ARR52A1 8

C209DNPC209DNP

R157 DNPR157 DNP

R178 0RR178 0R

R161 DNPR161 DNP

R154 0RR154 0R

RR49ARR49A1 8

R148 0RR148 0R

RR50DRR50D4 5

R164 0RR164 0R

D12STPS0540Z

D12STPS0540Z

R130 0RR130 0R

R176 0RR176 0R

C2012.2uFC2012.2uF

RR50CRR50C3 6

R175 0RR175 0R

R160 0RR160 0R

R12310RR12310R

RR49BRR49B2 7

RR48DRR48D4 5

R149 DNPR149 DNP

R182 DNPR182 DNP

R158 0RR158 0R

C189

10V10uFC189

10V10uF

RR51DRR51D4 5

R48 33RR48 33R

R151 DNPR151 DNP

R18010KR18010K

RR52CRR52C3 6

RR53BRR53B2 7

R150 0RR150 0R

R152 0RR152 0R

RR48BRR48B2 7

R173 0RR173 0R

R177 0RR177 0R

RR52DRR52D4 5

R174 0RR174 0R

RR50ARR50A1 8

R153 DNPR153 DNP

RR50BRR50B2 7

R50 27RR50 27R

R168 0RR168 0RR169 DNPR169 DNP

R162 0RR162 0R

R1364.7KR1364.7K

R13710KR13710K

RR51BRR51B2 7

R183 0RR183 0R

C211DNPC211DNP

R144 0RR144 0R

C203220nFC203220nF

R145 DNPR145 DNP

R166 0RR166 0R

R133 0RR133 0R

R179 0RR179 0R

R181 0RR181 0R

R167 DNPR167 DNP

RR51CRR51C3 6

R163 DNPR163 DNP

RR52BRR52B2 7

L23

22uH

L23

22uH

J24

XF2M45151A

J24

XF2M45151A

123456789

101112131415161718192021222324252627282930313233343536373839404142434445

R159 DNPR159 DNP

R165 DNPR165 DNP

RR53DRR53D4 5

R132 0RR132 0R

R156 0RR156 0R

RR48CRR48C3 6

R170 0RR170 0R

R147 DNPR147 DNP

MN25 TPS61161DRVTMN25 TPS61161DRVT

SW

4

GN

D3

FB1 CTRL

5

COMP2

VIN6

TH

P7

R131 0RR131 0R

RR51ARR51A1 8

R171 DNPR171 DNP

R146 0RR146 0R

C2021uFC2021uF C208

DNPC208DNP

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

IMAGE SENSOR CONNECTOR

The frequency accuracy must be +-20ppm or higher.

Composite Video Output

CONNECTOR EXTENTION FOR LARGE LCD

(LCDMOD)

(G4)

(R6)

(B3)

(LCDPWR)

(G5)

(LCDDEN)

(LCDCC)

(R7)(G0)

(B4)

(G6)

(B5)

(R2)

(G7)(B0)

(G1)

(B6)

(R3)

(G2)

(B7)

(R1)

(R4)

(B1)

(G3)

(LCDDOTCK)

(R5)

(R0)

(B2)

(HSYNC)(VSYNC)

(TWDO)(TWCK0)

(AD1Xm)(AD3Ym) (AD2Yp)

(AD0Xp)

(GPIO2)(GPIO1)

(ISI_PCK)

(ISI_D2)

(ISI_VSYNC)

(ISI_D8)

(ISI_D3)

(ISI_D0)

(ISI_HSYNC)

(ISI_D10)

(ISI_D4)

(ISI_MCK)

(ISI_D09)

(ISI_D5)

(ISI_D11)

(ISI_D6)(ISI_D7)

(ISI_D1)

(CTRL1) (CTRL2)

R49 is placed near processor

PE27PE29

PE25PE23

PE2

PE3

PE1

PE16

PE20PE18

PE14

PE22

PE10PE12

PE26

PE30PE28

PE24

PE4

PE6

PE7

PE0

PE9PE8

PE11PE13PE15PE17

PE21PE19

PE23PE24PE25PE26PE27PE28PE29PE30PE15PE16PE17PE18PE19PE20PE21PE22PE7PE8PE9PE10PE11PE12PE13PE14

PE3PE4

PE6

PE6

PE17

PE12

PE28

PE23

PE7

PE1

PE18

PE13

PE29

PE24

PE8

PE2

PE0

PE19

PE3

PE14

PE25

PE9

PE20

PE4

PE15

PE26

PE10

PE21

PE5

PE16

PE11

PE27

PE30

PE22

PB28

PB23

PB11

PB24

PB29

PB25

PB8

PB30

PB26

PB21PB20

PB9

PB31

PB27

PB22

PB10

PB21PB23PB25PB27PB9PB11

PA21PB31PB29PB30PB28PB20PB22PB24PB26PB8PB10

PA20

PE5

3V3

3V3

1V8

3V3

3V3

3V3

3V3

3V3

3V3

5V

3V3

PE[0..30]{3,11}

PA21{3,7}

NRST{2,3,7,8,9,10}

VDDISI{2,3}

PD25{3}PD27{3}PD19{3}

PD24 {3}PD26 {3}PD18 {3}

PD15 {3}PD14{3}

PD21{3,11}PD23{3,11}

PD20 {3,11}PD22 {3,11}

PA20{3,7}

PB[8..11]{3}

PB[20..31]{3}

PD12{3} PD13 {3}

LCDDOTCK{11}




INIT EDITA


12E

XX-XXX-XXPP XXX







INIT EDITA


12E

XX-XXX-XXPP XXX







INIT EDITA


12E

XX-XXX-XXPP XXX




J20J203

1

L22742792093

L22742792093

C191100nFC191100nF

C184100nFC184100nF

R118 4.7KR118 4.7K

L241.8uH

L241.8uH

C199100pFC199100pF

C198

33pF

C198

33pF

C200270pFC200270pF

C194100nFC194100nF

R121

75R

R121

75R

MN23

CH7024B-DF-TR

MN23

CH7024B-DF-TR

D71

D82

D93

D104

D115

D126

D137

D148

D159

D1610

D1711

D1812

D1913

D2014

D2115

D2217

D2319

D042

D143

D244

D345

D446

D547

D648

V39

H40

XCLK41

DE20

RESET23

VDDIO38

AVDD_DAC25

DVDD16

AVDD_PLL32

AVDD33

DGND18

AGND_DAC29

AGND_PLL31

AGND36

SPD21

SPC22

NC24

C/CVBS26

Y27

CVBS28

ISET30

XI/F

IN34

XO

35

P-OUT37

J17J17

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 30

C20710pFC20710pF

R116

1.2K 1%

R116

1.2K 1%

L19742792093

L19742792093

C197100nFC197100nF

Y7

13MHz

Y7

13MHz

1

3

2

4

C193

10V10uFC193

10V10uF

C195100nFC195100nF

13 MHz

VDD

VSS OUT

OE

Y6


13 MHz

VDD

VSS OUT

OE

Y6


41

32 R124 DNPR124 DNP

D13

BAT54SLT1G

D13

BAT54SLT1G

1 2

3

J18

DNPTSM-110-01-L-DV

J18

DNPTSM-110-01-L-DV

1 23 45 67 89 10

11 1213151719

14161820

C186100nFC186100nF

C205DNPC205DNP C187

10V10uFC187

10V10uF

R119

75R

R119

75R

R1250RR1250R

L18742792093

L18742792093

R49 33RR49 33R

R117 4.7KR117 4.7K

R12075RR12075R

C192

10V10uFC192

10V10uF

L20742792093

L20742792093

R128DNPR128DNP

J23 TSM-120-01-L-DV

DNP

J23 TSM-120-01-L-DV

DNP

1 23 45 67 89 10

11 1213151719

14161820

21 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

R129

DNP

R129

DNP

L21742792093

L21742792093

R122 DNPR122 DNP

TP5TP5

C190100nFC190100nF

C20610pFC20610pF

C196

10V10uFC196

10V10uF

Section 8

Revision History

8.1 Revision History

Table 8-1.

Document CommentsChange Request Ref.

6481A First issue.

6481BFigure 4-17, ” TFT LCD” updated.

Section 7.1 ”Schematics” updated.6833




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