AMITY SCHOOL OF DISTANCE LEARNINGPost Box No. 503, Sector-44

Noida – 20130 Computer Architecture &Parallel Processing

(MCA)Assignment A

Marks 10Answer all questions.

1. Explain Flynn's classification of computer architecture using neat block diagram.

2. Write about the classification of operating system. Ho chuka final3. Discuss different types of Interconnection Networks.4. Explain the conditions for partitioning and parallelism with example.5. What are the Characteristics of CISC and RISC Architecture?

Computer Architecture & Parallel Processing (MCA)

Assignment B Marks 10

Answer all questions.

1. What is pipeline computer? Explain the principles for Pipelining.2. Discuss SIMD Architecture in detail with its variances.3. What is a Vector Processor? Compare Vector and Stream Architecture.4. Read he case study given below and answer the questions given at the end.

Case Study The key to higher performance in microprocessors for a broad range of applications is the ability to exploit fine-grain, instruction-level parallelism. Some methods for exploiting fine-grain parallelism include:1. Pipelining2. Multiple Processors3. Superscalar implementation4. Specifying multiple independent operations per instruction.

Pipelining is now universally implemented in high-performance processors. Little more can be gained by improving the implementation of a single pipeline. Using multiple processors improves performance for only a restricted set of applications. Superscalar implementations can improve performance for all types of applications. Superscalar means the ability to fetch, issue to execution units, and complete more than one instruction at a time. Superscalar implementations are required when architectural compatibility must be preserved, and they will be used for entrenched architectures with legacy software, such as X 86 architecture that dominates the desktop computer market.Specifying multiple operations per instruction creates a very-long instruction word architecture or VLIW. AVLIW implementation has capabilities very similar to those of a superscalar processor—issuing and completing more than one operation at a time—with one important exception: the VLIW hardware is not responsible for discovering opportunities to execute multiple operations concurrently. For the VLIW implementation, the long instruction word already encodes the concurrent operations. This explicit encoding leads to dramatically reduced hardware complexity compared to a high-degree superscalar implementation of a RISC or CISC.The big advantage of VLIW, then, is that a highly concurrent (parallel) implementation is much simpler and cheaper to build than equivalently concurrent RISC or CISC chips. VLIW is a simpler way to build a superscalar microprocessor.Questions1. Why do we need VLIW Architecture?

2. Compare VILW with CISC and RISC? 3. Discuss Software instead of Hardware implementation advantages of VLIW.

Computer Architecture &Parallel Processing (MCA)

Assignment C Marks 10

Answer all questions.Tick mark(√) the most appropriate answer

1. Multi-computers are--a) Distributed address space accessible by local processorsb) Simultaneous access to shared variables can produce inconsistent results.c) Requires message filtering for more than 1 computer.d) Share the common memory.

2. Multi-Processors are--a) Share the common memory.b) Systems contain multiple processors on a single machine.c) Consists of a number of processors accessing other processors.d) Multiprocessor implementation for Non-embedded systems.

3. Multivector is --a) A manufacturer of Process Controlb) An element of a vector space V. A,c) unique High-Expression (HExTM) technology platformsd) Pair End Reads. Faster, Easier.

4. SIMD computers are--a) Computer consists of limited identical processors.b) A modern supercomputer is almost always a cluster of MIMD machinesc) Single instruction with multiple data.d) General instruction in computer.

5. Program Partitioning and Scheduling Lines are defined as those lines which are coplanar and do not intersect, is the Condition of--

a) Partitioning b) Parallelism.c) Schedulingd) Multiprocessing

6. VLSI stands for--a) Very Large Scale Integrationb) Variable length serial mask.c) Virtual limit of sub interface.d) Very last stack instruction.

7. Which Parallel Algorithms is used for multiprocessor--a) SIMDb) VLSIc) APSTd) NDPL

8. IEEE standard backplane bus specification is for --a) Multilevel architecturesb) Multiprocessor architecturesc) Multipath architectures.d) Multi programming architecture.

9. Hierarchical memory system technology uses--

a) Cache memoryb) Memory sticks.c) Hdd.d) Virtual memory.

10. An arbitration protocol governs the--.a) Interrupt b) I/Oc) H/wd) Parity.

11. In which of the following order of program execution explicitly stated in user programs?a) Program Flow Mechanismsb) Control Flow mechanismc) Data Flow mechanismd) Reduction flow mechanism

12 shared memory, program counter, control sequencer are features of --

a) Data Flowb) Program Flowc) Control Flow mechanismd) Reduction flow mechanism

13. ………Instruction address (es) effectively replaces the program counter in a control flow machine.a) Dataflow Architectureb) Demand-Driven Mechanismsc) Data Reduction Mechanism.d) Reduction mechanism.

14. APT is --a) Advanced processor technologyb) Advertise poster trend.c) Addition part of tech.d) Actual planning of tech.

15. Addressing Modes on the Y86 are used in--a) ISA.b) APT.c) VLSId) ISMD

16. The crossbar switch was most popular from --a) 1950 to 1980b) 1980-2000c) 1970-1990d) 1960-2000

17. A memory shared by many processors to communicate among is termed as--a) Multiport memoryb) Multiprocessor memory.c) Multilevel memory.d) Multidevice memory.

18. A switching system for accessing memory modules in a multiprocessor is called--a) Combining n/w.b) Combining processors.c) Combining devices.d) Combining cables.

19. What does the following diagram show?

a) Process Hierarchyb) Memory Hierarchyc) Accessing of Memory d) CPU connections.

20. …….. is the first super computer produced by India. a) PARAMb) Intel 5000c) super Indiad) none of these

21. SIMD stands for--a) Single Instruction Multiple Data streamb) Synchronous Instruction Multiple Data streamc) Single Interface Multiple Data streamd) Single Instruction Multiple Data signal

22. SISD stands for--a) Single Instruction Several Data stream.b) Single Instruction Single Data streamc) Single Instruction Several Document streamd) none of these

23. MIMD stands for --a) Multiple Instruction Multiple Data stream.b) Multiple Instruction Meta Data stream.c) Multiple Instruction Modular Data stream.d) none of these

24. MISD stands for --a) Multiple Instruction Single Data stream.b) More Instruction Single Data stream.c) Multiple Instruction Simple Data stream.d) none of these

25. Which one is true about MISD? a) Is not a practically existing model.b) Practically existing model.c) c.Meta instruction single datad) All above are true

26. SISD is the example of --a) Distributed parallel processor system.b) Sequential systemc) Multiprocessing systemd) None of these

27. VLIW is stand for--a) Variable length Instruction wallb) Vary large instruction wordc) Vary long instruction wordd) None of these

28. RISC stands for-- a) Rich instruction set computers.

b) Rich instruction serial computers.c) Real instruction set computers.d) none of these

29. SIMD has following component--a) PEb) CUc) AUd) All of Above

30. CISC stands for --a) Complex instruction set computersb) Complete instruction set computersc) Core instruction set computersd) None of these

31. The ALU and control unit of most of the microcomputers are combined and manufactured on a single silicon chip. What is it called?

a) Monochipb) Microprocessorc) Alud) Control unit 

32. Which of the following registers is used to keep track of address of the memory location where the next instruction is located?

a) Memory Address Registerb) Memory Data Registerc) Instruction Registerd) Program Register

  33. A complete microcomputer system consist of--

a) Microprocessorb) Memoryc) Peripheral equipmentd) All of above

  34. CPU does perform the operation of--

a) Data transferb) Logic operationc) Arithmetic operationd) All of above

  35. Pipelining strategy is called implementing--

a) Instruction executionb) Instruction prefetchc) Instruction decodingd) Instruction manipulation

36. What is the function of control unit in a CPU?a) To transfer data to primary storageb) To store program instructionc) To perform logic operationsd) To decode program instruction

37. Pipeline implements--a) Fetch instructionb) Decode instructionc) Fetch operandd) Calculate operande) Execute instruction

f) All of above

38. Memory access in RISC architecture is limited to instructions like--a) CALL and RETb) PUSH and POPc) STA and LDAd) MOV and JMP

39. The most common addressing techniques employed by a CPU is--a) Immediateb) Directc) Indirectd) Registere) All of the above

40. A shared memory SIMD model is …….. than distributed memory model.a) More complexb) Less complexc) Equally complexd) Can’t say