Embed Size (px)
DESCRIPTION
Assembly language. .ORIG x3000 AND R2, R2, #0 ; R2 is a counter initialize to 0 LEA R3, PTR; PTR is start address of a file Trap x23 ; get input character to R0 input char AGAINLDR R1, R3, #0 ; get char from a file - PowerPoint PPT Presentation
Citation preview
11/22/2005 SSST: CS130 F. Hadziomerovic 1
Assembly language
.ORIG x3000 AND R2, R2, #0 ; R2 is a counter initialize to 0 LEA R3, PTR ; PTR is start address of a fileTrap x23 ; get input character to R0 input char
AGAIN LDR R1, R3, #0 ; get char from a fileADD R4, R1, #-4 ; check the end of file ‘eot’ = 4BRz OUTPUTNOT R1, R1ADD R1, R1, #1ADD R1, R1, R0 ; file char vs input charBRnp NEXTADD R2, R2, #1 ; char found increment counter
NEXT ADD R3, R3, #1 ; increment pointer in a fileBRnzp AGAIN
OUTPUT LD R0, ASCII ; ASCII offsetADD R0, R0, R2 ; count in ASCIITRAP x21 ; display count (R0)TRAP x25 ; halt
ASCII .FILL x0030 ; ASCII_offset PTR .STRINGZ "Hello world" ; file
.END
11/22/2005 SSST: CS130 F. Hadziomerovic 2
Assembly format
label opcode operands ; comment
AGAIN LDR R1, R3, #0 ; get char from a file
Pseudo-ops (Assembler Directives)
.ORIG x3100 ; (x – hexadecimal, # - decimal) PC = x3100
.FILL #10 ; this location will be filled with decimal 10
.BLKW 11 ; 11 successive locations are reserved
.STRINGZ “Hello” ; 5 successive locations are loaded with char string
.END ; end of assembly program
.EXTERNAL ; cross-reference
11/22/2005 SSST: CS130 F. Hadziomerovic 3
How assembler works
.ORIG x3000 AND R2, R2, #0 ; initialize counter R2 to 0
LEA R3, PTR ; PTR is start address of a fileTrap x23 ; get input char to R0
AGAIN LDR R1, R3, #0 ; get char from a fileADD R4, R1, #-4 ; check the end of file ‘eot’ =
4BRz OUTPUTNOT R1, R1ADD R1, R1, #1ADD R1, R1, R0 ; file char vs input charBRnp NEXTADD R2, R2, #1; char found incr counter
NEXT ADD R3, R3, #1; increment pointer in a fileBRnzp AGAIN
OUTPUT LD R0, ASCII ; ASCII offsetADD R0, R0, R2 ; count in ASCIITRAP x21 ; display count (R0)TRAP x25 ; halt
ASCII .FILL x0030 ; ASCII_offset PTR .STRINGZ "Hello world" ; file
.END
Two passes:
First pass: Make a symbol table
Symbol Address
AGAIN x3003
NEXT x300B
OUTPUT x300D
ASCII x3011
PTR x3012
Second pass: Translate mnemonicusing symbol table
x3000 0101 010 010 1 00000x3001 1110 011 000010000 (x3012 – x3002 = x10) X3002 1111 0000 00100011X3003 0110 001 011 000000X3004 0001 100 001 1 11100X3005 0000 010 000000111 (x300D – x3006 = x07)X3006 1001 001 001 111111X3007 0001 001 001 1 00001X3008 0001 001 001 0 00 000Etc.
11/22/2005 SSST: CS130 F. Hadziomerovic 4
.EXTERNAL ; beyond a single assembly program
1. .ORIG x3000 2. AND R2, R2, #0 ; initialize counter R2 to 0 3. LD R3, PTR ; PTR is start address of a file4. Trap x23 ; get input char to R0 5. AGAIN LDR R1, R3, #0 ; get char from a file6. ADD R4, R1, #-4 ; check the end of file ‘eot’ = 47. BRz OUTPUT8. NOT R1, R19. ADD R1, R1, #110. ADD R1, R1, R0 ; file char vs input char11. BRnp NEXT12. ADD R2, R2, #1; char found incr counter13. NEXT ADD R3, R3, #1; increment pointer in a file14. BRnzp AGAIN15. OUTPUT LD R0, ASCII ; ASCII offset16. ADD R0, R0, R2 ; count in ASCII17. TRAP x21 ; display count (R0)18. TRAP x25 ; halt19. ASCII .FILL x0030 ; ASCII_offset 20. .EXTERNAL STARTofFILE21. PTR .FILL STARTofFILE21. .END
22. .ORIG x400023. STARTofFILE .STRINGZ "Hello World"24. .FILL x0425. .END
Assembler does not know STARTofFILE location and .EXTERNAL tells it that this will be linked later.When linker is called then cross-references (unresolved labels) are filled in from other Symbol Tables.
11/22/2005 SSST: CS130 F. Hadziomerovic 5
Memory mapped Input/Output (I/O)
x0000
xFE00
xFDFF
xFFFF
DDR
15 8 7 0
DSR
KBDR
15 14 0
xFE06
xFE04
15 8 7 0
xFE02
xFE00KBSR
15 14 0
KBSR[15] = 1; new char in KBDR
DSR[15] = 1 ; DDR is ready for new char.
memory
I/O registers
11/22/2005 SSST: CS130 F. Hadziomerovic 6
Memory mapped Input/Output (I/O) architecture
Memory
E
AddressControl
MIO.EN KBDR
KBSR DSR
DDR
MAR
MDR
LD.MARGateMDR
R.W
2
LD.MDR
bus
keyboard display
DDR
15 8 7 0
DSR
KBDR
15 14 0
xFE06
xFE0415 8 7 0
xFE02
xFE00KBSR
15 14 0
KBSR[15] = 1; new char in KBDRDSR[15] = 1 ; DDR is ready for new char.
setre set
testtest
11/22/2005 SSST: CS130 F. Hadziomerovic 7
I/O service routines
DDR
15 8 7 0
DSR
KBDR
15 14 0
xFE06
xFE04
15 8 7 0
xFE02
xFE00KBSR
15 14 0
KBSR[15] = 1; new char in KBDR
DSR[15] = 1 ; DDR is ready for new char.
; input service routineSTART LDI R1, A
BRzp STARTLDI R0, BBRnzp NEXT_TASK
A .FILL xFE00B .FILL xFE02
;keyboard echoSTART LDI R1, KBSR
BRzp STARTLDI R0, KBDR
ECHO LDI R1, DSRBRzp ECHOSTI R0, DDRBRnzp NEXT_TASK
KBSR .FILL xFE00KBDR .FILL xFE02DSR .FILL xFE04DDR .FILL xFE06
; output service routineSTART LDI R1, A
BRzp STARTSTI R0, BBRnzp NEXT_TASK
A .FILL xFE04B .FILL xFE06
11/22/2005 SSST: CS130 F. Hadziomerovic 8
LC-3 keyboard input routine
1. Start ST R1, SaveR1 ; save registers2. ST R2, SaveR23. ST R2, SaveR24. LD R2, Newline5. L1 LDI R3, DSR6. BRzp L1 ;loop until display ready7. RTI R2, DDR ;display newline8. LEA R1, Prompt9. Loop LDR R0, R1, #010. BRz Input11. L2 LDI R3, DSR12. BRzp L2 ;wait for monitor ready13. STI R0, DDR ;write next prompr char.14. ADD R1, R1, #115. BRnxp Loop16. Input LDI R3, KBSR17. BRzp Input ;wait for char18. LDI R0, KBDR ;get input char19. L3 LDI R3, DSR20. BRzp L3 ;wait for monitor21. STI R0, DDR ;display char22. L4 LDI R3, DSR23. BRzp L4 ;wait for monitor24. STI R2, DDR ;move cursor to new line25. LD R1, SaveR126. LD R2, SaveR227. LD R3, Save R328. BRnzp Next_Task
29. SaveR1 .BLKW 130. SaveR3 .BLKW 131. DSR .FILL xFE0432. DDR .FILL xFE0633. KBSR .FILL xFE0034. KBDR .FILL xFE0235. Newline .FILL x000A36. Prompt .STRINGZ “Input a character>”
Critique:Loops L1, L2, L3, L4 wait until display ready.Loop Input waits until char available – gross.
For instance 1 char per sec means wait of1 million instruction executions – waste ofcomputer time.
Solution: interrupt: processor is interruptedonly when the character is ready. Generallyprocessor is interrupted when peripheral deviceneeds service.
11/22/2005 SSST: CS130 F. Hadziomerovic 9
Interrupt
DSR
15 14 13 0
xFE04xFE00KBSR
15 14 13 0
PL of running program
PL1 PL2
Priority decision
Other device priorities
Interrupt line to processor
Interrupt is tested before every FETCH cycle. If interrupt priority is larger than running program priority Interrupt is granted: 1. PC and PSR are saved on stack and jump is made to interrupt service routine. 2. Interrupt service routine must end up with RTI (Return from Interrupt) instruction which loads PC and PSR back from the stack.
running program
interrupt
ISR (InterruptService Routine)
RTI
running program
Jump to ISR
Return from ISR
