Asif Islam Khan

ContactInformation

Dept. of Electrical Engineeringand Computer Sciences, (510) 604-8219University of California, asif@EECS.berkeley.EDUBerkeley, CA 94720 http://inst.eecs.berkeley.edu/~asif/

ResearchInterests

– Novel nanoelectronic devices, beyond-CMOS devices, sub-60 mV/dec transistors.– Complex oxides, ferroelectrics/multiferroics, correlated and multifunctional materials.– Thin film epitaxy, heterogeneous integration of complex oxides with semiconductors.– Physics and applications of negative capacitance, phase transitions.– Transistor-less passive amplification, adaptive electronics, energy efficient computing.– Interface and domain wall nanoelectronics.

Education University of California, Berkeley, CAPh.D. Candidate, Electrical Engineering, Expected graduation date: December 2014.Dissertation: “Ferroelectric Negative Capacitance for Ultra-low Power Computing.”Advisor: Sayeef Salahuddin

Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh

Bachelor of Science in Electrical & Electronic Engineering, June 2007.

ResearchExperience

Graduate Student Researcher, University of California, Berkeley (8/2008-present)PIs: Sayeef Salahuddin, Ramamoorthy Ramesh & Chenming Calvin Hu.– Studied the negative capacitance phenomenon in complex oxides, which led to the ex-

perimental demonstration and the first direct measurement of this effect in archetypalferroelectric oxides.

– Discovered a new type of elastic switching, in which an out-of-plane electric field in-duces ferroelastic rotation of unit cells without a concurrent ferroelectric switching inPb(Zr0.2Ti0.8)O3.

– High quality epitaxial growth of complex oxides (Pb(Zr0.2Ti0.8)O3, (Ba0.8Sr0.2)TiO3,SrTiO3, LaAlO3, BiFeO3 etc.) and their heterostructures and superlattices using thepulsed laser deposition technique; epitaxial strain tuning of ferroelectrics.

– Monolithic integration of complex oxides with Si using SrTiO3 buffer layers.– Epitaxial transfer of ferroelectrics/multiferroics on semiconductors.– Characterization of ferroelectric transistors fabricated using epitaxial transfer techniques.– Design of negative capacitance transistors using hybrid TCAD-Landau simulations, which

led to a design framework of such devices based on capacitance matching.

Graduate Student Intern, Intel Corp., Hillsboro, Oregon (6/2013-8/2013)Mentors: Tahir Ghani, Dmitri E. Nikonov, S. Manipatruni & I. A. Young.– Proposed a new type of energy efficient spintronic device, called the strain assisted spin

transfer torque (STT) random access memory, where combined effects of magnetostrictionand STT dramatically reduce the energy dissipation.

– Implemented a code for simulating the magnetization dynamics in a piezoelectric- ferro-magnetic heterostructure based on a strain coupled Landau-Lifshitz-Gilbert frameworkincorporating the influence of thermal noise.

(Short descriptions of the research projects are available in the appendix.)

Peer-reviewedPublications

1. A. I. Khan, K. Chatterjee, B. Wang, S. Drapcho, L. You, C. Serrao, S. R Bakaul, R.Ramesh, & S. Salahuddin.“Negative capacitance in a ferroelectric capacitor,” NatureMaterials, 2014 (advanced online publication). (Press coverage by the National ScienceFoundation, CITRIS-UC, Phys.org, etc.)

2. A. I. Khan, D. Bhowmik, Pu Yu, S. J. Kim, X. Pan, R. Ramesh, & S. Salahud-din.“Experimental evidence of ferroelectric negative capacitance in nanoscale heterostruc-tures,” Appl. Phys. Lett. 99, 113501 (2011). (cover article, most notable 50 APLpapers in 2009-11, press coverage at UCBerkeley NewsCenter, CNET.com, Phys.org, etc.)

3. A. I. Khan, C. W. Yeung, C. Hu, & S. Salahuddin. “Ferroelectric negative capacitanceMOSFET: Capacitance tuning & antiferroelectric operation,” Proc. Intl. ElectronDevices Meeting (IEDM) 2011.

4. A. I. Khan, X. Marti, C. Serrao, & S. Salahuddin, “Voltage controlled ferroelasticswitching in Pb(Zr0.2Ti0.8)O3 thin films,” Nano Lett., (under review).

5. A. I. Khan, P. Yu, M. Trassin, M. J. Lee, L. You, & S. Salahuddin.“The effects of strainrelaxation on the dielectric properties of epitaxial ferroelectric Pb(Zr0.2Ti0.8)TiO3 thinfilms,” Appl. Phys. Lett. 105, 022903 (2014).

6. A. I. Khan, D. E. Nikonov, S. Manipatruni, T. Ghani, & I. A. Young.“Voltage inducedmagnetostrictive switching of nanomagnets: Strain assisted strain transfer torque randomaccess memory,” Appl. Phys. Lett. 104, 262407 (2014).

7. W. Gao, A. I. Khan, X. Marti, C. Nelson, C. Serrao, J. Ravichandran, R. Ramesh, &S. Salahuddin.“Room-temperature negative capacitance in a ferroelectricdielectric super-lattice heterostructure,” Nano Lett. 14, 5814 (2014).

8. C. Yeung, A. I. Khan, J.-Y. Cheng, S. Salahuddin & C. Hu, “Low Power NegativeCapacitance FETs for Future Quantum-Well Body Technology,” Proc. Intl. Conf.VLSI Technology, Systems, and Applications (VLSI-TSA) (2013). (Best paperaward.)

9. C. Yeung, A. I. Khan, J.-Y. Cheng, S. Salahuddin & C. Hu, “Non-Hysteretic NegativeCapacitance FET with Sub-30mV/dec Swing over 106× Current Range and ION of 0.3mA/µm without strain enhancement at 0.3 V VDD,” Proc. Intl. Conf. Simulationof Semiconductor Processes and Devices (SISPAD) (2012).

10. K. Liu, D. Fu, J. Cao, J. Suh, K. X. Wang, C. Cheng, D. F. Ogletree, H. Guo, S. Sengupta,A. I. Khan, C. W. Yeung, S. Salahuddin, M. M. Deshmukh, & J. Wu, “Dense electronsystem from gate-Controlled surface metal-insulator transition,” Nano Lett., 12, 6272(2012).

11. S.C. Kehr, Pu Yu, Y.M. Liu, M. Parzefall, A. I. Khan, R. Jacob, M.T. Wenzel, H.-G. Ribbeck, M. Helm, X. Zhang, L.M. Eng, & R. Ramesh. “Microspectroscopy onperovskite-based superlenses,” Opt. Mat. Express 1, 1051 (2011).

12. A. I. Khan, M. K. Ashraf, & A. Haque, “Wave function penetration effects in doublegate metal-oxide-semiconductor field-effect-transistors: impact on ballistic drain currentwith device scaling,” J. Appl. Phys. 105, 064505 (2009).

13. M. K. Ashraf, A. I. Khan, & A. Haque, “Wave function penetration effects on ballisticdrain current in double gate MOSFETs fabricated on (100) and (110) silicon surfaces,”Solid. State Electron. 53, 271 (2009).

14. A. I. Khan, N. Nusrat, S. M. Khan, M. Hasan, & M. H. A. Khan. “Quantum realiza-tion of some ternary circuits using Muthukrishnan-Stroud gates,” Proc. Intl. Symp.Multiple-Valued Logic (ISMVL) (2007).

• A. I. Khan, X. Marti, K. Chatterjee, C. Serrao, & S. Salahuddin, “Polarization-straincoupling in epitaxially strained ultra-thin Pb(Zr0.2Ti0.8)O3 films,” (in preparation).

• S. R. Bakaul, M. J. Lee, C. Serrao, A. I. Khan, C. W. Yeung, R. Ramesh, & S. Salahud-din, “Complex oxide ferroelectrics on silicon for transistor applications,” (in preparation).

BookChapter

A. I. Khan, and S. Salahuddin, “Extending CMOS with negative capacitance,” in CMOSand Beyond: Logic Switches for Terascale Integrated Circuits, T.-J. K. Liu and K. Kuhn,Eds., Cambridge University Press, (in production).

Patents S. Manipatruni, D. E. Nikonov, A. I. Khan, R. Kim, T. Ghani, I. A. Young. “Strainassisted spin torque switching spin transfer torque memory.” (pending.)

InvitedTalks &Workshops

1. “Negative capacitance: Exploiting stored energy in ferroelectric materials to break fun-damental barriers of energy efficiency in electronic devices,” The 32nd Intl. Conf.Physics of Semiconductors (ICSP), University of Texas, Austin. Aug. 13, 2014.

2. “Recent progress in the investigation of negative capacitance effect for ultra-low PowerComputing,” MSD-FCRP e-Workshop. April 19, 2012.

3. “Negative capacitance for ultra-low power beyond-CMOS devices,” Solid State Technol-ogy and Devices Seminar, Berkeley. Dec. 5, 2014.

ProfessionalActivities &Services

The International Technology Roadmap for Semiconductors.– Participated in the ITRS ERD Emerging Logic Device Assessment workshop as an advo-

cate for negative capacitance transistor, Albuquerque, NM, August 27-28, 2014.– Co-wrote the position paper on negative capacitance transistors for ITRS 2015 edition.

Peer Reviewing: IEEE Trans. Electron Devices (1/2011-Present), 2008 Intl. Symp.Multiple Valued Logic, 2014 Intl. Conf. Electrical & Comp. Engineering.

Press on ourwork

2014:– The National Science Foundation: “New discovery opens door for radical reduction

in energy consumed by digital devices.” (December 15, 2014) Also highlighted in theirnewsletter.

– The Center for Information Technology Research in the Interest of Society(CITRIS) at the University of California: “New discovery opens door for radicalreduction in energy consumed by digital devices.” (December 15, 2014)

– Phys.org: “Discovery advances ferroelectrics in quest for lower power transistors.” (De-cember 17, 2014)

2011:– UC Berkeley NewsCenter: “Ferroelectrics could pave way for ultra-low power com-

puting.” by Sarah Yang, Media Relations, the University of California at Berkeley. (Sep12, 2011)

– CNET.com: “New materials promise ultra-low-power computing” by D. Ngo. (Sep 12,2011)

Fellowships& Awards

1. Qualcomm Innovation Fellowship, 2012-13.2. Silver Award, 5th TSMC Outstanding Research Award, 2011.3. Best paper award at the 2013 Intl. Conf. VLSI Technology, Systems, and Applications

(VLSI-TSA) (co-author).4. University Gold Medal, Bangladesh U. Engg. Tech (BUET) for obtaining the highest

GPA (4.00/4.00) in the class of 2007 among all the departments, conferred by the Hon’blePresident of Bangladesh in 2011.

5. Kintar-Ul-Haque Gold Medal, 2007.6. Delegate to the 58th Lindau Meeting of Physics Nobel Laureates, 2008.7. First Place, IEEE Region 10 Undergraduate Student Paper Competition, 2006.8. Second Place, IEEE International Student History Paper Contest, 2004.

LeadershipExperience

Research Mentorship, 9/2009-Present.I mentored 4 graduate (EE and MSE majors) and 9 undergraduate students (EE and MSEmajors) at Berkeley. Their projects focused on epitaxial growth, structural and electricalcharacterization of complex oxides and ferroelectric device modeling and simulation.

Graduate: K. Chatterjee (Berkeley, 8/2013-present), C. Y. Lin (Berkeley, 4/2014-present),B. Wang (Berkeley, 9/2012-5/2013), M. J. Lee (Berkeley, 1/2011-5/2012).

Undergraduate: S. Christopher (NYU, 5/2014-8/2014), S. Drapcho (MIT, 5/2012-8/2013),M. Molina (UC Riverside, 5/2012-8/2012), S. Mecklar (Penn. State. U., 5/2011-8/2011),J. Resasco (U. Oklahoma, 5/2011-8/2011), H. Romo (UC Santa Cruz, 5/2010-8/2010), S.Nasir & I. Fattouh (Berkeley, 1/2010-5/2010) E. Lam (Berkeley, 9/2009-12/2009).

Seminar/Journal Club Coordinator, NSF E3S Center. 5/2011-8/2012.My responsibility was to identify potential research topics for the bi-weekly seminars/journalclubs and to arrange speakers. The journal club was formed as a vehicle for knowledgetransfer of research undertaken outside the center and I was its first coordinator.

TeachingExperience

Graduate Student Instructor at University of California, Berkeley, 1/2014-5/2014.Served as a graduate student instructor for the integrated circuit devices course (EE130/230A),enrollment ∼40 students. Led two one-hour discussion sections and held an hour long officehour per week and occasionally taught the main class.

Lecturer at Bangladesh University of Engineering and Technology, 7/2007-7/2008.Taught one theory course (control systems) and instructed multiple laboratory courses (in-troductory electronic circuits, electronic circuits simulations, digital signal processing).

References Academia:

Sayeef Salahuddin Ramamoorthy RameshAssociate Professor, Plato Malozemoff Professor,Dept. of Electrical Eng. & Computer Sciences, Dept. of Mater. Sci. & Eng. and Physics,University of California, Berkeley. University of California, Berkeley.(510)-642-4662 (510)-643-8202sayeef@berkeley.edu rramesh@berkeley.edu

Chenming C. HuProfessor in the Graduate School,Dept. of Electrical Eng. & Computer Sciences,University of California, Berkeley.(510) 642-3393hu@eecs.berkeley.edu

Industry:

Tahir GhaniIntel Fellow,Director, Transistor Technology &Integration Group,Intel Corp., Hillsboro, Oregon.tahir.ghani@intel.com

APPENDIX

Short Descriptions of Projects

A. NegativeCapacitancein EpitaxialFerro-electrics

A1. Direct measurement of negative capacitance of ferroelectrics capacitors.

Ch

an

ne

l 2C

ha

nn

el 1

(a)

Pu

lse

fu

nc

tio

n

ge

ne

rato

r +

-

+

PZTSRO Substrate

Au

-

VS

Series resistor R

−6 −4 −2 0 2 4 6−1

−.5

0

.5

1

Voltage Across the ferroelectric (V)

Ch

arg

e (

C/m

2)

Negative

Capacitance

Region

(b)

Fig. 1: (a) Experimental setup. (b) Mea-sured charge-voltage characteristics of a 60nm ferroelectric Pb(Zr0.2Ti0.8)O3 capaci-tor.

We reported the first direct measurement technique ofthe unstable negative capacitance in an isolated ferro-electric capacitor at room temperature. We showedthat when a voltage pulse is applied across a se-ries combination of an ferroelectric Pb(Zr0.2Ti0.8)O3

capacitor and an external resistor, the ferroelectricvoltage is found to be decreasing with time—in ex-actly the opposite direction to which voltage for aregular capacitor should change. In fig. 1(b), thenegative capacitance regions in the measured charge-voltage characteristics of the ferroelectric are shownby the dashed boxes, where the slope of the charge-voltage curve is negative. This technique could serveas a canonical test for negative capacitance in ferro-electrics as well other negative capacitance systemssuch as piezoelectrics and interacting 2-DEGs.

[Publication: A. I. Khan et al. Nature Materials, 2014 (in press).]

A2. Capacitance enhancement in ferroelectric-dielectric heterostructures andsuperlattices due to the negative capacitance effect.

PZT

STO

SRO1 nm

STO

Substrate

SRO

STO

PZT

Au(a)

(b)

Fig. 2: (a) High resolution TEM image of theepitaxial ferroelectric Pb(Zr0.2Ti0.8)O3 anddielectric SrTiO3 heterostructure. (b) Com-parison of the capacitance-voltage character-istics of PZT-STO capacitor and a STO ca-pacitor. The capacitance of a PZT (28 nm)-STO(48 nm) is larger than that of the con-stituent 48 nm STO capacitor, indicating thatthe 28 nm PZT acts as a negative capacitor.

A21. Pb(Zr0.2Ti0.8)O3-SrTiO3 Heterostructure: Wereported the first proof-of-concept demonstration ofnegative capacitance effect in a nanoscale epitaxialsingle crystalline ferroelectric-dielectric heterostruc-ture. In a bilayer of ferroelectric Pb(Zr0.2Ti0.8)O3

and dielectric SrTiO3, the composite capacitancewas observed to be larger than the constituentSrTiO3 capacitance at above 250 ◦C, indicat-ing an effective negative capacitance of the con-stituent Pb(Zr0.2Ti0.8)O3 layer in that temperaturerange. Pb(Zr0.2Ti0.8)O3-SrTiO3 heterostructureswere grown on SrRuO3 buffered SrTiO3 substratesusing the pulsed laser deposition technique. Temper-ature was shown to be an effective tuning parameterfor the ferroelectric negative capacitance and the de-gree of capacitance enhancement in the heterostruc-ture. Landau’s mean field theory based calculationsshowed qualitative agreement with observed effects.

[Publication: A. I. Khan et al. Appl. Phys. Lett. 99,113501 (2011). (cover article, most notable 50 APLpapers during 2009-11, press coverage at CNET.com, PhysOrg.com, ScienceDaily etc.)]

A. NegativeCapacitancein EpitaxialFerro-electrics(continued)

STO

Substrate

SRO

LAO

BSTO

(a)

(b)

Fig. 3: (a) High resolution TEM image of theepitaxial ferroelectric (Ba0.8Sr0.2)TiO3 anddielectric LaAlO3 superlattice. (b) The ca-pacitance of a LAO (2.9 nm)-BSTO (7.5 nm)×10 superlattice grown on SrRuO3 bufferedGdScO3 (110) substrate is larger than thatof the constituent dielectric LAO (29 nm) be-tween 23-75 ◦C.

A22. (Ba0.8Sr0.2)TiO3-LaAlO3 Superlattices: Wedemonstrated room-temperature negative capaci-tance in a ferroelectric-dielectric superlattice het-erostructure. In epitaxially grown superlattice offerroelectric Ba0.8Sr0.2)TiO3 (BSTO) and dielectricLaAlO3 (LAO), capacitance was found to be largercompared to the constituent LaAlO3 (dielectric) ca-pacitance. This enhancement of capacitance in a se-ries combination of two capacitors indicates that theferroelectric was stabilized in a state of negative ca-pacitance (similar to our previous observation in thePb(Zr0.2Ti0.8)O3-SrTiO3 heterostructures). Nega-tive capacitance was observed for superlattices grownon three different substrates (SrTiO3 (001), DyScO3

(110), and GdScO3 (110)) covering a large range ofsubstrate strain. These results demonstrated the ro-bustness of the effect in sub-10 nm thick ferroelectricsas well as the potential for controlling the negativecapacitance effect using epitaxial strain. The super-lattices were grown using RHEED assisted pulsedlaser deposition technique. The project was initiallyled by myself and J. Ravichandran (2011) and waslater led by W. Gao (since late 2012).

[Publication: W. Gao, A. I. Khan et al. Nano Lett. 14, 5814 (2014).]

PTO

STO

SRO

5 nm

(a) (b)

Fig. 4: (a) High resolution TEM imageof a epitaxial ferroelectric PbTiO3-dielecticSrTiO3 heterostructure. (b) The capacitanceof a PTO(32 nm)-STO(32 nm) bilayer is largerthan that of the constituent dielectric STO (32nm) at above 100 ◦C.

A23. PbTiO3-SrTiO3 Heterostructure: An enhance-ment of the capacitance of ferroelectric PbTiO3

(PTO)-dielectic SrTiO3 (STO) heterostructures overthat of the constituent STO capacitors was observedat above 100 ◦C due to the negative capacitance ef-fect from the ferroelectric PTO layer. We grew PTO-STO heterostructures on SrRuO3 buffered SrTiO3

substrates using the pulsed laser deposition tech-nique. These results indicated that by using a fer-roelectric material with low Curie temperature, thetemperature range of the negative capacitance ef-fect in a ferroelectric-dielectric heterostructure canbe lowered.

B. StrainEffects inFerro-electrics

B1. Strain relaxation in epitaxial Pb(Zr0.2Ti0.8)TiO3 thin films

0.24 0.26 0.28

0.7

0.72

0.74

0.76

0.78

STO(103)

Qz (1

/Å)

Qx (1/Å)

SRO(103)

PZT (103)

0.24 0.25 0.26 0.27

0.72

0.73

0.74

0.75

0.76

0.77

STO(103)

SRO(103) PZT

(103)

Qx (1/Å)

Qz (1

/Å)

Relaxed PZT Strained PZT

Fig. 5: Comparison of the reciprocal spacemaps of a strained PZT and a relaxed PZTfilm grown on SrRuO3 buffered SrTiO3 sub-strate.

We studied the effects of strain relaxation onthe dielectric properties of epitaxial 40 nmPb(Zr0.2Ti0.8)TiO3 (PZT) films. A drastic increasein the defect and dislocation density due to strainrelaxation was observed in PZT films with tetrago-nality c/a < 1.07 grown on SrTiO3 (001) substrates,which results in significant frequency dispersion ofthe dielectric constant and strong Rayleigh type be-havior in those samples. This combined structural-electrical study provides a framework for investigat-ing strain relaxation in thin films and could provide useful insights into the mechanisms offatigue in ferroelectric materials.

[Publication: A. I. Khan et al. Appl. Phys. Lett. 105, 022903 (2014).]

B. StrainEffects inFerro-electrics(continued)

B2. Voltage Controlled Ferroelastic Switching in Pb(Zr0.2Ti0.8)O3 thin films

SubstrateSrRuO3

Pb(Zr0.2

Ti0.8

)O3

a-domain

c-domainc-domain

Metallic SrRuO3

GdScO3 Substrate

As grown -2 V +4 V

-2 V+4 V

(a)

(b)

Fig. 6: (a) Cross-sectional TEM image of a40 nm PZT film grown on GSO substrate. (b)Piezo-response force microscopy snapshots ofa 300 nm× 200 nm region, where an a-domain(indicated by the white arrow) is reversiblycreated and annihilated by applying a voltagesequence -2 V→+4 V →-2 V→+4 V locally.

We reported the first observation of electric field in-duced reversible creation and annihilation of the fer-roelastic a-domain without a concurrent ferroelec-tric 180◦ switching of the neighboring c-domain ma-trix in archetypal Pb(Zr0.2Ti0.8)O3 (PZT) continu-ous films as thin as 40 nm grown on GdScO3 sub-strate. The decoupling of the ferroelectric and fer-roelastic switching allows us to understand how themobility of a ferroelastic domain wall is influencedby epitaxial strain. Such high domain wall mobilitysystems could lead to ferroelectric based nanoelec-tronic platforms similar to the magnetic domain walllogic and race-track memories and could be usefulfor many applications, including MEMS, multiferroicspintronics and straintronics.

[Publication: A. I. Khan et al. Nano. Lett. (underreview).]

B3. Polarization-strain coupling in epitaxially strained Pb(Zr0.2Ti0.8)O3 films

We studied the correlation between structural and electrical properties in the epitaxial strainvariants of ferroelectric Lead Zirconate Titanate (Pb(Zr0.2Ti0.8)O3, PZT) thin films in thetetragonality range c/a = 1.041-1.089. Epitaxial PZT thin films (∼40 nm) were strainedby coherent metallic SrRuO3 buffered substrates, namely SrTiO3 (100), DyScO3 (110) andGdScO3 (110), which correspond to -0.65%, +0.33% and +0.96% strain on PZT respectively.We found that while, in the tetragonality range c/a = 1.05-1.089, PZT remnant polarizationis nearly independent of the tetragonality, as it has been reported previously, in the range c/a= 1.041-1.05, remnant polarization is found to show a much stronger functional dependence.

[Publication: A. I. Khan et al. (to be submitted).]

−1 −0.5 0 0.5 165

70

75

80

85

90

−2000 −1000 0 1000−100

−50

0

50

100PZT on STO

PZT on DSO

PZT on GSO

Electric Field (kV/cm)

P (μ

C/c

m2 )

(a)

P0 (μ

C/c

m2 )

Strain (%)

STODSO

GSO

(b)

42 43 44 45 46 47 48

Inte

nsi

ty (a

.u.) STO

(002)PZT (002)

DSO(002)

pc

GSO (002)

pc

SRO(002)

SRO(002)

SRO(002)

c=~4.25 Å

c=~4.14 Å

c=~4.13 Å

Θ (0)Fig. 7: (a) X-ray diffraction spectrum of 40 nm PZT thin films grown on SRO buffered STO, DSO, and GSOsubstrates. (b) Ferroelectric polarization (P )-electric field (E) characteristics of PZT samples grown on differentsubstrates. (c) Remnant polarization measured from PUND measurements P0 as a function of epitaxial strain.

C.Integrationof ComplexOxides withSemiconduc-tors

C1. Heteroepitaxy of ferroelectric complex oxides on Silicon-On-Insulator sub-strates

Epitaxial growth of SrTiO3 on silicon by molecular beam epitaxy has opened up the route tothe integration of functional complex oxides and perovskites on a silicon platform. Towardsthat end, we studied the monolithic integration of epitaxial ferroelectrics (Pb(Zr0.2Ti0.8)O3

and PbTiO3) on SrTiO3 templated Silicon-On-Insulator (SOI) substrates. An 8 nm SrTiO3

buffer layer was grown on Si wafer by kinetically controlled molecular beam epitaxy by Prof.R. Droopad at Texas Tech. University, on top of which we grew epitaxial ferroelectrics usingthe pulsed layer deposition technique. X-ray based structural characterization of the PZT(60nm)/STO(8 nm)/SiO2(4 nm)/Si heterostructure showed that the STO layer was fully re-laxed with in-plane lattice parameter aSTO=3.905 A (fig. 8(a)). The PZT layer was found tobe coherently strained to the STO layer with an out-of-plane lattice parameter cPZT= 4.1 A.The PZT layer was c-axis oriented with no secondary phases. The PZT film retained strongferroelectric properties evident from the piezo-response force microscopy studies (fig. 8(e)),the piezoelectric coefficient measurements (fig. 8(f)) and the capacitance-voltage character-istics measurements (fig. 8(g)). We also designed and implemented perovskite compatibleprocess flows to fabricate ferroelectric gate oxide Silicon-On-Insulator transistors using suchferroelectric-Si heterostructures (fig. 9). This project was done as a part of the QualcommInnovation Fellowship program 2012-13 by the team comprising of myself and C. Yeung.

−0.3 −0.25 −0.2

0.75

0.8

0.85

0.9

0.95

−2 0 20

0.2

0.4

0.6

0.8

1

Inte

nsity (

a.u

.)

Δ ω (o)

−2 0 20

0.2

0.4

0.6

0.8

1

Inte

nsity (

a.u

.)

Δ ω (o)

Qz (1

/Å)

Qx (1/Å)

40 45 50 55 60 65 70 75

Inte

nsity (

a.u

.)

θ (o)

PZT (002)STO (002)

Si (004)

PZT (002) Rocking Curve

STO (002) Rocking Curve

θ−2θ Spectrum Reciprocal Space Map

Si (115)

STO (103)

PZT (103)

(a) (b)

(c)

0 nm

2 nm

Roughness=1.65 Å

(d)

Tip Voltage (V)

Surface Topography

Out-of-PlanePiezoresponse

Piezo-phase Response

−2 0 20

0.05

0.1

0.15

0.2

V (V)

C (

μF

/cm

2)

(e)

(f )

(g)Capacitance-Voltage

Characteristics

f=100 kHz

FWHM=0.40

FWHM=0.40

-4 V

x

.

Fig. 8: (a) Reciprocal space map of a PZT(60 nm)/STO(8 nm)/SiO2(4 nm)/Si(001) heterostructure aroundSi (115) and PZT(102) reflections measured using the X-ray diffraction technique. (b) θ − 2θ spectrum of theheterostructre. (c) Rocking curve measurements around PZT (002) and STO (002) reflections. The full-width-at-the-half-maximum for both of the films are ∼4◦. (d) Topography of the sample (2µm×2µm) shows a smooth

surface with a RMS roughness of ∼1.65 A. (e) Out-of-plane piezo-response force microscope image of 2µm×2µmarea where the polarization of the center region was switched to out-of-plane direction (dark contrast) from the as-grown in-to-the-plane (white contrast) by applying a -4 V. The relative directions of the out-of-plane polarizationare indicated by x© and .©. (f,g) The characteristic ferroelectric hysteresis loop in the piezophase-voltage (f) andthe capacitance-voltage curves (g) of the PZT(60 nm)/STO(8 nm)/SiO2(4 nm)/Si(001) heterostructure.

Ferroelectric

FET (~100 mV/dec)

Control FET: L=50 micron, W= 50 micron

Ferroelectric FET: L=50 micron, Q=20 micron

Control FET (annealed, ~65 mV/dec)

Control FET

(~120 m

V/dec)

VDS

=-0.5 V

(a) (b)

100 nm p-Si86 nm p-Si

30 nm SiO2 30 nm SiO2

30 nm SiO230 nm SiO2

30 nm SiO2

86 nm n-Si

86 nm n-Si

40 nm n-Si40 nm n-Si

PZTSTO

PZTPZTSTO

STO

40 nm n-Si 40 nm n-Si

Au

Thermal

Oxidation

Ion

Implantation

Oxide Etching &

OxidationS/D Ion

Implantation

Activation,

Solid Phase

Epitaxy

SiO2 Etching, STO

& PZT DepositionMesa

Etch

Spacer, Oxidation, Annealing,

Gate Electrode Deposition

200 nm

Buried Oxide

200 nm

Buried Oxide

200 nm

Buried Oxide

200 nm

Buried Oxide

200 nm

Buried Oxide 200 nm

Buried Oxide

200 nm

Buried Oxide

200 nm

Buried Oxide200 nm

Buried Oxide

Fig. 9: (a) Process flow of monolithically integrated ferroelectric gate oxide FET. (b) Comparison of ID-VG

characteristics of the ferroelectric gate oxide FET and the control FET without ferroelectric.

D. Design &Simulationof NegativeCapacitanceFETs

D1. The concept of capacitance matching for Negative Capacitance FET design

(a) (b)

Fig. 10: Capacitive model of a ferroelectricnegative capacitance transistor.

We presented a design framework of ferroelectric(FE) negative capacitance FETs (NCFET) based onthe concept of capacitance matching. Based on thecapacitive model of a NCFET (fig. 11), we showedthe steepest turn on characteristics is obtained, whenthe ferroelectric capacitance is matched with the ca-pacitance of the MOS structure including the ef-fects of the source/drain coupling. Using hybrid 2DTCAD-1D Landau equation based simulations, weexplored the design space for different device parameters (FE thickness, EOT, source/drainoverlap and gate length). A new mode of NCFET operation, called the “antiferroelectricmode”, was proposed, which, besides achieving sub-60mV/dec subthreshold swing, couldsignificantly boost the on-current in exchange for a nominal hysteresis. The results alsosuggested that relative improvement in device performance due to FE negative capacitancebecomes more significant in very short channel length devices because of a better capacitancematching due to the increased drain-to-channel coupling.

[Publication: A. I. Khan et al. Proc. IEDM, 2011. ]

D2. Capacitance Matched Ultra-thin Body Negative Capacitance FETs

(a) (b)

VG (V)

I D (

A/m

)

0 0.1 0.2 0.3 0.4

10−3

10−1

100

101

103

VG=100 mV

VG=400 mV

22 mV/dec

Fig. 11: (a) Ultra-thin Body Negative Ca-pacitance FETs. (b) ID-VG characteristics ofan ultra-thin body negative capacitance FETwith 22 mV/dec of subthreshold-swing.

A new transistor concept was proposed that syner-gistically combines two important trends of futuretransistors: ultra-thin body to suppress the short-channel effects and sub-60mV/decade operation todrastically reduce power consumption. We showedthat by using an ultra-thin body Si channel (fig.12(a)), the non-linearity of MOS capacitance can besignificantly reduced resulting in a better matchingbetween MOS and ferroelectric capacitances. Hybrid2D TCAD-1D Landau equation based simulationspredicted subthreshold swings of ∼20 mV/dec over6-7 orders of magnitude of current (e.g. 10 pA/µA-30µA/µA) with on-currents as high as ∼1 mA/µA at VDD =0.4 V with off current = 1 nA/µm(fig. 12(b)) for such devices.

[Publications: 1. C. Yeung, A. I. Khan et al. Proc. VLSI-TSA, 2013 (best paper award).2. C. Yeung, A. I. Khan et al. Proc. SISPAD, 2012.]

E. StrainAssistedSpinTransferTorqueDevices

−1

0

1

−1

0

1−1

−0.5

0

0.5

1

mx

my

mz

Final m

Initial m

(b)

(a)

Fig. 12: (a) Hybridferromagnetic- piezoelectricstructure. (b) The trajectory ofmagnetization upon the applica-tion of a bi-axial stress σ=200MPa.

A novel spintronic device, called the “strain assisted spintransfer torque (STT) random access memory (RAM),” wasproposed by combining the magnetostriction effect and thespin transfer torque effect, which could result in a dramaticimprovement in the energy dissipation relative to a conven-tional STT-RAM. Magnetization switching in a piezoelectric-ferromagnetic heterostructure via the combined magnetostric-tion and STT effect was simulated by solving the Landau-Lifshitz-Gilbert equation incorporating the influence of ther-mal noise. Pb(ZrxTi1−x)O3 was considered as the piezoelec-tric and magnetostrictive Co0.6Fe0.4 was takes as the ferro-magnet. The simulations showed that, in such a device, eachof these two mechanisms (magnetostriction and spin transfertorque) provides in a 90◦ rotation of the magnetization leadinga deterministic 180◦ switching with a critical current signifi-cantly smaller than that required for spin torque alone. Sucha scheme is an attractive option for writing magnetic RAMcells. This project was done during an internship at IntelCorp. under the mentorship of T. Ghani, D. E. Nikonov, S.Manipatruni and I. A. Young.

[Publication: A. I. Khan et al. Appl. Phys. Lett. 104, 262407 (2014).]