Applications of microcontrollers in security systems.

Ramjee prasad

RH6802B54

10804900

B.Tech (LEET)

ECE-310

A Low-Power Low-Cost Microcontrollerfor Security Systems:

ABSTRACT:

The aim of this paper is to describe the implementation of a low power, low-cost 16-bit RISC microcontroller that will act as the core of a stand-alone security system. The controller is designed to provide moderate-high security at very low cost and to be able to operate independent of a database. It is designed using 1.5-mm SCMOS process from MOSIS and operates at a frequency of 12.5MHz.

INTRODUCTION:

Current access control systems that authorize access to a building or a room are either relatively insecure or costly to implement and set up. Many of the security systems used to provide secure access to a site require database access to check the authentication status of the user, which requires the system to have network compatibility. This increases not only the setup cost of the security system but also the implementation cost of the microcontroller used in the security system. Besides, such systems are vulnerable to network failures and congestion, which may be quite disconcerting to the users if not critical to the security and successful operation of the system. On the other hand, many of the existing stand-alone systems fail to provide a high level of security. These systems usually only consist of a single cardreader. If the card user is authorized to access the site, access will be granted without requiring any further identification. There are systems that require some kind of identification, such as fingerprint matching, but these systems are too costly to implement.

The aim of this paper is to present a microcontroller that will provide high security without the need for any database access, hence eliminating the high cost disadvantage of a network based system but providing a moderate to high level of security depending on the data encryption algorithm used. The microcontroller is designed for consumers that need moderate to high degree of security without the need for a networked access control system. The microprocessor is also designed as a low power system using the low power static CMOS design with several chip-specific low-power components and features.

OPERATION:

The microcontroller-based system described in this paper is to be set up at the site which needs authorization before entry. The user needs to swipe his/her card through the card reader and then enter a 4-digit PIN on the keypad in order to enter the site. The users of the site are to be given a card, which is preloaded with a 32-bit. When the card is swiped, the data on the card is read serially via an RS-232 interface into two special registers inside the microcontroller. After reading in the data, the controller waits for the user to enter the 4-digit PIN. If the PIN is not entered in a specific amount of time determined by the program running on the microcontroller, the card reader ignores the data in the card registers and waits for another swipe. If the PIN is entered in time, the microcontroller reads in the PIN via the serial RS-232 interface, converts each digit to a 4-bit number in two’s complement and stores the whole PIN in a single special register. Then the controller operates on the input data from the card as well as the PIN and carry out a decryption process. If the result of the decryption matches

the processed PIN entered by the user, access to the site will be granted by sending an “open” signal to the door which lasts for 10 seconds.

Data Encryption/Decryption Algorithms:

It is obvious that the security of such a system highly depends on the encryption algorithm used in the process of assigning PIN’s to the site users. The requirement of a PIN (password) after the user swipes the card is an important high-security feature of the system. In case the card is stolen or lost, any unauthorized user will not be able to enter the system without the acknowledgment of the password. This feature is similar to the authentication mechanisms used in the bank ATM’s to provide more security than a bare card reader, but different from the ATM’s in that it does not require a network for access authorization.

SAMPLE ALGORITHM:

In our system, we employ a data encryption scheme based on the DES (Data Encryption Standard) algorithm. The original DES algorithm is targeted to encode and decode a 64-bit number, encoding and decoding in 16 steps each. However, in our system we operate on 32-bit numbers since the code coming from the card is 32-bit. We limit the number of steps to 4 since this level of encryption provides us with sufficient level of security in our system (For more security, more sophisticated techniques can be used). For our application, the 32-bit number, acquired when the user swipes his/her card, is split into 16 left-hand bits (L1) and 16 right-hand bits (R1). At each step, the 16 right-hand bits are assigned to be the 16 left-hand bits of the next step. The 16 righthand bits of the next step come from the current 16 left-hand bits added to the current 16 right-hand bits processed with a key (Kn). This Kn is a function of the current step. The equations we use are as follows:For n=2, 3, 4 5.Ln=Rn-1 (Eq. 1)Rn=Ln-1 + (Rn-1 Å Kn) (Eq. 2)where K2, 3, 4, 5= {0x000a, 0x00a0, 0x0a00, 0xa000},Respectively. After completion of these four steps, we obtain a 32-bitencrypted version of the original reading. We can then a 16-bit

number by taking the alternating bits of this encrypted version. Logically shifting this number three bits to the right will ensure that four decimal digits are sufficient to represent the result, which is password of the card user. Finally, in order to compare the result of encryption with the keypad entry we need to convert the BCD number storing in the key-input register into a binary number. Using this scheme, we can determine 32-bit codes and map them into 4-digit passwords. Although there is considerable redundancy in this mapping, our simulations proved that we could obtain at least 350 of these unique code-password pairs

ARCHITECTUREOverviewThe chip proposed is built as a 16-bit load-store architecture which uses two-operand instructions. The ISA for the processor is shown in Table 1. Memory operations use register indirect addressing. PC-relative addressing is used by conditional and unconditional branches. Several instructions are to be noted in the ISA. ADDC (add with carry) and SUBC instructions are implemented in order to be able to manipulate 32-bit quantities on our 16-bit architecture. This allows the processor to decrypt the 32-bit data more easily. Arithmetic shift instructions (ASHU, ASHUI) are included in the instruction set to allow the use of more complex decryption schemes. There is also a multiply instruction which will speed up the complex decryption process.

Table 1. Instruction Set Architecture:

Instruction type(uses) COMMENTS

ADD, ADDI Arithmetic (alu)

ADDU,ADDUI

Arithmetic (alu)

Does not affect psr

ADDC,ADDCI

Arithmetic (alu)

Add with carry

MUL, POSMUL

Multiplier Only register ops.

SUB, SUBI Arithmetic (alu)

SUBC, SUBCI

Arithmetic (alu)

Subtract w/ carry

CMP, CMPI Arithmetic (alu)

Compare

AND, ANDI Logic (ALU)OR, ORI Logic (ALU)XOR, XORI Logic (ALU)MOV, MOVI Data Manip.

LSH, LSHI Shifter Logical left/right

ASHU, ASHUI

Arithmetic left/right

LUI Load upper imm.

LOAD Data manip Load from mem.

STOR Data manip Store to mem.

Bcond Reg+displacem

16 conditions

Jcond Reg. Indirect 16 conditions

JAL Reg. Indirect Jump and link

KRD Special Input ready

PEND Special Switch to idlemode

The processor has eight general purpose registers and three special purpose registers. Two of the special registers are used to hold the 32-bit input from the card, whereas the third one is used to hold the input from the keypad. These special purpose registers cannot be used as general purpose registers. Our RISC processor is two-stage pipelined. In the first stage, instruction is fetched from memory and in the second stage it is decoded and executed, and register file or memory is accessed for write or read operation. For the specific modules in each stage please refer to the system-level block diagram of Figure 1.

Architectural Components:The datapath of the processor was designed using a full-custom design technique in order

to achieve low power consumption, higher speed (for fast decryption), and smaller area. Included in the datapath are the program counter, instruction register, register file, ALU, and shifter (See Figure 1 and 2). The ALU of the processor embodies a carry-lookahead adder to increase the clock frequency at which the processor can run at. Although this makes the area occupied by the ALU larger, it is necessary that we make fast the decryption process, which heavily relies on the ALU.

Low-Power Features:

Aside from the low-power characteristics of the static CMOS family used for most of the parts in the microprocessor, there are several

components and features that are specifically customized for low energy consumption. The shifter used is a power-on/off logarithmic shifter. Since the shifter consumes unnecessary power when it is not being used, it is turned on only when the instruction is a shift. This reduces the overall dynamic power consumption of the chip by zeroing out the unnecessary switching activity in the shifter when no shift is being executed. The same mechanism is used to avoid unnecessary energy consumption by turning off the counters in the serial input interface when the serial input is not performed. To further reduce the power consumption of the processor, two operation modes are introduced. In the idle mode, the processor executes NOOP’s, which reduces the switching activity to a minimum according to the following average power estimation equation for CMOS and hence reduces the power consumption. Pav = CLVDD2 f ,where f is operating frequency.

The shifter is also turned off in the idle mode. The processor starts in the idle mode and stays in that mode until the user swipes the card and enters the PIN. Once all the required data is placed in the special registers, the processor starts to execute the program. KRD instruction is used to check whether all required data is ready. When the data is ready, an interrupt signal is sent to the PC and the instruction register to start executing the decryption program. The processor returns to idle mode after the execution of the PEND (program end) instruction, which sends another interrupt signal to the instruction register.

Our processor also performs simple static branch prediction in order to reduce power dissipation. Although branch prediction is used to increase performance in deeply-pipelined high performance general purpose microprocessors, it can also serve toreduce the power consumption in application specific processors. Branches are assumed not taken in our system. When a branch is predicted correctly, the processor will not incur the overhead of inserting a noop after the branch. Hence, the overall power consumption in the flow of the program will be reduced. The effectiveness of this approach depends on the behavior of branches in the program. If most of the branches are taken, then the

usefulness of such a prediction scheme is minimal. More complicated branch prediction mechanism is not implemented because that requires considerable amount of logic, which is unfeasible for a two-stage pipelined application-specific processor.

Memory:The microcontroller includes an on-chip DRAM-based memory of 512 words. An on-chip memory is included to facilitate the data manipulations during the decryption process and also perhaps to store the input from the card temporarily. The proposed system does not need a large amount of storage, because it is mainly used for data manipulation. Therefore, having an off-chip data memory and interfacing it to the chip is not cost efficient. For that reason, a small-sized on-chip memory is preferred. The memory used is a word-addressible DRAM of 1 Kbytes.

On the other hand, the instruction memory of the system is kept off the chip. The suggested instruction memory to be used by the microcontroller is an EEPROM (Electrically Erasable Programmable Read Only Memory) memory so that it can easily be re-programmed in case encryption/decryption algorithm is to be changed. As there is a possibility that these algorithms (hence the programs) need to be changed, it is more feasible to leave the instruction memory off-chip to increase the flexibility of the system. An EEPROM instruction memory meets the flexibility and low-cost goals of our design. The size of the instruction memory depends on the encryption scheme used in the program, but a memory of 8 Kbytes would suffice. Serial I/O:

The microcontroller receives serial input from two different devices. One is the card reader which sends the 32-bit information stored in the card. The other is the keypad, which sends the 4 characters PIN in ASCII format. It is necessary that the card reader and the keypad interfaced to the system using the RS-232 protocol. The ASCII input sent by the keypad is converted into a binary representation of each number by truncating the higher 4 bit of the ASCII code and then storing the resulting 16 bits in a special register for further manipulation.Multiplier

A two’s complement 8-bit by 8-bit multiplier is included in the microcontroller in order to facilitate the password decryption process. The multiplier uses a modified version of Booth’s algorithm to produce a series of partial products, which are then summed by a Wallace-tree adder circuit.

Timing Information:The proposed system has a critical path delay of 48 ns. However, in order to synchronize the system clock with the frequency of the serial input, we have decided to run the system at a slower rate which is 12.5 MHz. The timing information of the critical path is in shown below.

The multiplier, which has a delay of 45 ns, is not included in the critical path, because we allow the multiply instruction to take two clock cycles to complete in exchange of a faster clock speed. SMART CARD READER WITH MICROCONTROLLER AND SECURITY COMPONENT:

Smart card readers dedicated to a particular application use both a microcontroller whose read only memory determines the running of the application, and a security component executing, under the control of the microcontroller, subroutines related to the security of the application (authentication, confidential programs, etc.). So that the manager of the application can have access to certain memory areas of the security component, provision is made for the microcontroller to be able to pass

automatically to a so-called “transparent” mode, when a specific access code issued by a test card is recognized. In this mode, the read or write instructions for a memory area, issued by the test card, are interpreted by the microcontroller as being read or write instructions for a memory area of the security component rather than the microcontroller. Description:

A smart card reader comprising: an input connector that interfaces with a smart card; a microcontroller; and a security component executing programs under the control of the microcontroller, the microcontroller having a normal operating mode in which the microcontroller executes a program contained in a read only memory of the microcontroller, wherein the microcontroller also has a transparent operating mode that is automatically set upon receipt of a specific code on the input connector, and wherein the microcontroller receives from the input connector addressing instructions for memory areas and executes these instructions, interpreting them as instructions for access to memory areas of the security component, wherein the security component has an electrically programmable memory, and the transparent operating mode permits access to this memory in order to modify the content of areas which are not modifiable by the program executed in normal mode.

A card reader according to claim 1, wherein the security component can communicate with the input connector only by means of the microcontroller and under the command thereof.

A card reader according to claim 2, wherein the reader is dedicated to a given application whose execution is defined by the program contained in the read only memory of the microcontroller, this application not having any possibility of access to certain memory areas of the security

component.

A card reader according to claim 2, wherein the transparent operating mode has four principal instructions, which are respectively: powering up of the security component; reading of a data item at a memory address; writing of a data item to a memory address; switching off the security component.

A card reader according to claim 1, wherein the reader is dedicated to a given application whose execution is defined by the program contained in the read only memory of the microcontroller, this application not having any possibility of access to certain memory areas of the security component.

A card reader according to claim 3, wherein the transparent operating mode has four principal instructions, which are respectively: powering up of the security component; reading of a data item at a memory address; writing of a data item to a memory address; and switching off the security component.

A card reader according to claim 1, wherein the transparent operating mode has four principal instructions, which are respectively: powering up of the security component; reading of a data item at a memory address; writing of a data item to a memory address; and switching off the security component.

WORKING:

For this purpose, the invention proposes a smart card reader whose microcontroller has two operating modes, a normal operation, for the use of a standard user, for executing the fixed application program to which the reader is dedicated, and a “transparent” operation, of which the standard user does not have use, in which the microcontroller can receive a smart

card or a probe simulating a smart card, access instructions which it interprets not as instructions for access to its own memories, but as instructions for access to the memories of the security component.

More precisely, the invention proposes a card reader having an input connector, a microcontroller, and a security component executing programs under the control of the microcontroller, the microcontroller having a normal operating mode in which it executes a program contained in its read only memory, characterized in that the microcontroller also has a so-called “transparent” operating mode, in which it sets itself automatically to receive a specific code on the input connector and in which it receives from the input connector addressing instructions for memory areas and executes these instructions, interpreting them as being instructions for access to memory areas of the security component.

Thus, although the security component cannot be in direct communication with the input connector, it becomes possible to gain access to memory areas of this component: after going into transparent mode, an address for access to a memory area ceases to be interpreted as a memory address of the microcontroller and becomes a memory address of the security component. The microcontroller will then execute an addressing subroutine for the security component. Conversely, in normal mode, an instruction for addressing a memory area supplied by the input connector is always interpreted as being an addressing instruction for a memory area of the microcontroller.

In practice, the transparent operating mode has four main instructions, which are respectively:

Powering up of the security component;

Reading a data item at a memory address;

Writing a data item to a memory address;

Switching off the security component.

If the security component has an electrically programmable non-volatile memory, notably for reasons of customisation, it will be possible

to have access to this memory, for the application manager but not for the standard user, in order to change the data thereof. The transparent operating mode will therefore make it possible to modify the content of the areas which cannot be modified by the program executed in normal mode.

MICRO CONTROLLER BASED SECURITY SYSTEM USING SONAR:

The use of SONAR in a security system, as used in our project, is a novel idea, and as far as we could determine, extremely difficult, if not impossible, to evade. The infrared beams have the disadvantages of covering just a limited area in a room and to cover a whole room requires many of these beams. This makes this technology very expensive. Temperature sensors can also be evaded as they can either be made extremely sensitive and risk false tripping of the alarm due to changes in ambient temperature or made less sensitive at the risk of allowing evasion. The use of SONAR offers us many advantages. It is nearly foolproof, albeit it be at the expense of being extremely sensitive to the point that the only way to avoid tripping of the alarm is to make sure that the room it is covering is free from any movements. In this project we have designed and developed a unique security system that utilises the capabilities of microcontroller and a special purpose SONAR module. It is also extremely cost-effective when compared to similar systems currently in use.The principle of operation:

This project has got a SONAR module mounted on a stepper motor . As the stepper motor rotates, SONAR module sends out ultrasonic waves and scans the area. So, if this product is placed in the center of a room, it can scan the whole room and the range of scanning depends on the SONAR module used. With a Polaroid 6500 series sonar ranging module, the range is about 6" to 35ft.

The inspiration for the product was from the idea used in MTI RADAR. In MTI RADAR, targets are determined by comparing the echo pulses obtained from successive scanning. In this project we intend to use a SONAR module. This is a Polaroid 6500 series

SONAR ranging module. This SONAR module sends out ultrasonic waves when initiated by a pulse at its input pin INIT, and when it receives back the ECHO, the ECHO pin goes high. A single pin of a port of the microcontroller can be used to initiate the SONAR. When the SONAR is initiated, a counter is started in a register in the microcontroller. And once the reflected back waves reach the transducer of the SONAR module the ECHO pin goes high. Now this high pulse is inverted using a 7404 NOT gate and then apllied at the INTO(negative edge-triggered) pin of the microcontroller. INTO is an interrupt pin. So when a negative edge appears at the pin, the control of the microcontroller goes to an interrupt subroutine located at 0003H. After executing the interrupt subroutine(given in the code) the counter stops. Now, the content of the counter is stored in a memory location. Then stepper motor is rotated by a step. Then again thesame process as described above is repeated. The value of the counter in this case is stored in next memory location. Thus, when the stepper motor completes one complete rotation, data (counter value) are stored in as many memory locations as the number of steps taken by the stepper motor to complete one rotation. The number of steps taken by the stepper motor depends on the angle the stepper motor deflects for each steps. In usually available (in college labs) stepper motor, if the angle of deflection is 1.8 degrees, then the number of steps taken =360/1.8 = 200 steps, and if it is 0.9 degrees, number of steps taken = 360/0.9 = 400 steps. In this project, we used a deflection of 1.8 degrees, which can be programmed in the microcontroller. The output pins of port 1- i.e., P1.0, P1.1, P1.2, P1.3 are used to control the stepper motor.

Now as the stepper motor has completed one rotation. Now the stepper motor is ready to rotate in the directions opposite to that of the previous rotation (this is to avoid stretching of the wire connections between the main PCB and the SONAR module mounted on the stepper motor).Again SONAR is initiated, value of the counter at the time ECHO pin goes HIGH is compared with the memory locationwhere the data for the same position of the stepper in the previous rotation stored. If there is a difference in value of the memory location

and the present counter value, we can assume that an intruder has intruded in to that position scanned by the SONAR. Now the pin P3.4 of the microcontroller goes HIGH and switches on the FM transmitter and thus the buzzer in the FM receiver at the hands of the security starts beeping signalling about the intrusion. If there is no difference between the memory and counter values, stepper motor is further deflected by a step, then againSONAR is initiated, counter is started and then stopped at HIGH on the ECHO pin, then the value of counter is compared with the content of the corresponding memory location for the same position of stepper during the previous rotation. And this continues until an intrusion occurs. So, a suitable program for the above processes has to be written in to the ROM of the microcontroller.

HOME SECURITY SYSTEM:

Introduction:

Protect our family and valuables with this microcontroller based security system knowing that should anyone trying to break into our home, an alarm will go ON and the police will be alerted immediately. The microcontroller based security system consists of transmitter, receiver, phase locked loop and processing section.

The transmitter section continuously transmits IR rays which are received by the receiver section. The received signal is further

amplified and given to the PLL section, where its frequency is locked to the transmitted frequency. The transmitter and receiver are arranged such that the transmitted IR rays fall directly onto the phototransistor LI4GI of the receiver. The signal received by T2 is amplified by transistor T3 and operational amplifier µA741 (IC2). Series input resistor R8 and feedback resistor R9 determine the gain of op amplifier IC2. The amplified single so applied to pin 3 of PLLLM567 (IC3) through capacitor C4.

ICLM567 is highly stable PLL with synchronous AM lock detection and power output circuitry it is primarily used as frequency decoder which drives a load whenever a sustained frequency falling within its detection band is present in its self biased input. The centre frequency of the determined by external components.

In the absence of any input single, the center frequency of PLL’s eternal free running, current control oscillator is determined by resistor R12 abed capacitor C8.

Preset VR2 is used for tuning IC3 to the desired center frequency in the 6-10 kHz range,

Which should match the modulating frequency of the transmitter? Capacitor C6 and C7 are used as low pass filter. Ned out filter respectively when the received signal is locked to frequency of transmitter signal pin 8 of IC3 goes low and LED 1 glows. Since pin 8 is connected to the base of transistor T4 through R13 its collector voltage rises. As a result T5 is forward biased to energies the relay RL5 the pole and normally closed contact of really contact of RL5 are connected to +5v.

When the IR signal is interrupted, the microcontroller starts working as per the program burnt into the EPROM and control the siren, telephone and cassette player via the respective relays.

Circuit Description:

 Transmitter Section:

In the transmitter section, NE555(ICI) is wired as an actable multivibrator whose oscillating freq is decided by resistors R1 and R2, preset VR1 and capacitor c1, C3  bypasses the noise to ground, preventing any change in calculated pulse-width.

 

The out put of ICI is fed to the base of the transistor t1, which drives an IR LED to transmit the modulated IR signal. R4 limits the current flowing through the IR LED. Preset VR1 is used to vary the modulating frequency.

Receiver Section:

The transmitter and receiver are arranged such that the transmitted IR rays fall directly onto the phototransistor LI4GI of the receiver. The signal received by t2 is amplified by transistor t3 and operational amplifier µA741 (IC2). Series input resistor R8 and feedback resistor R9 determine the gain of op amplifier IC2. The amplified single so applied to pin 3 of PLLLM567 (IC3) through capacitor c4.

ICLM567 is highly stable PLL with synchronous AM lock detection and power output circuitry it is pre merely used as frequency decoder which drives a load whenever a sustained frequency falling within its detection band is present in its self biased input. The centre frequency of the determined by external components.

In the absence of any input single, the centre frequency of PLL’s eternal free running, current control oscillator is determined by resistor R12 abed capacitor C8. Preset VR2 is used for tuning IC3 to the desired centre frequency in the 6-10 kHz range, which should match the modulating frequency of the transmitter? Capacitor C6 and C7 are used as low pass filter. Ned out filter respectively when the received signal is locked to frequency of transmitter signal pin 8 of IC3 goes low and LED 1 glows. Since pin 8 is connected to the base of transistor T4 through R13 its collector.

Working of the Circuit:

The transmitting IR LED1 and phototransistor T2 of the receiver are fitted to the gate such the IR rays emitted by the LED directly fall on the phototransistor.

The IR LED transmits a train of IR pulses. These pulses are received by the receiver and amplified by IC2. Output pin 8 of the PLL (IC3) is low when the PLL network is locked to the transmitter frequency and relay RL5 energies to make PA line of IC7 low.

When someone walks through the gate to enter your home, the transmitted signal is interrupted.  Output pins 8 of the PLL network goes high and relay RL5 de-energies to make PA0 line of IC7 high. Now the microprocessor starts working as per the program loaded in the EPROM.

Relay RL4 energies to activate the siren. At the same time, relay RL3 energizes to emulate lifting the telephone handset off the cradle to provide the dial tone. After a few seconds, relay RL2 energies to short the redial button contacts. After the loaded number is dialled, it switches off relay RL2. Then relay RL1 turns on the audio player.

Here we have provided the same polarity-reversal detection facility so that the audio player turns on only when polarity-reversal is detected.

The actual-size, double-size track lay-outs for solder and component sides of the PCB for the 8085 microprocessor-based home security system are shown in figs5 and figs6, respectively, and their component layout.

As a result T5 is forward biased to energies the relay RL5 the pole and normally closed contact of really contact of RL5 are connected to +5v.

The low order multiplex address  and data lines AD0 though AD7 of IC4 are connected to the EPROM (IC5) through the  latch(IC6), while its high order address line A8 through A10 are directly  connected to the EPROM. Address lines A0 through A7. Are separated from data lines D0 through D7 by latch enable single.

Address latch – enable pin 30 of the microcontroller is connected to latch enable pin 11 Ic6. When ale high the latch us transparent. The output changes according the input data when ALE goes low, the low order address is latched at the input of IC6.

 Data lines D0 throughD7 of microcontroller are connected to dated lines of IC5 and IC7 each. Chip sleets signal for IC5 is generated by RD and IO/M lines with the help of NAND gate. The inverted IO/M signal provides CS signal through IC7.

 IC AT89C51 is general purpose programmable device compatible with most microcontrollers. It has three programmable ports, any of which can be ports and the remaining eight bits as port c.

The eight bits of ports c can be used as individual bits or grouped in two 4-bits ports namely, c (upper) and c (lower). Ports A and C are configured  as input ports and port B is configured as output port A. is used for inter detection,portB for activating the siren, cassette player, telephone cradle switch and redial button and port C for polarity reversal detection.

 The circuit for detecting the polarity reversal detection the telephone line is built around optocoupler IC8 and IC9. Normally, TIP is positive with respect to RING lead of telephone line. With the handset in off position a nominal loop current of 10 mA is assumed to flow through the telephone line. Resistor R23 is selected as 120 ohms to develop the voltage of 1.2v. When the dc lines voltage polarity reversal occurs, optocoupler IC8’s internal LED conducts and LED3 glows to indicate polarity reversal occurs. Simultaneously, optocoupler IC9’s internal LED goes off and its pin 5 (collector) goes high to provide line –reversal sense signal to AT89C51.

Fig.3 shows the power supply circuit. The AC mains are stepped down by transformer X1 to deliver a secondary output of 12V AC at 300 ma. The transformer output is rectified by a full-wave bridge rectifier.

 Comprising diodes D7 through D10. Capacitor C12 acts as a filter to eliminate ripples. IC10 and IC11 provide regulated 5v and 9V power supplies, respectively. Capacitors C13 and C14 bypass any ripple present in the regulated out-us. Switch S2 acts as an ‘on’/’off’ switch.

Used Components:

AT89C2051

NE555

uA741 Operational Amplifier

MCT2E Optocoupler

Regulator (7805,7809)

BC 548 NPN Transistor

L14G1 Photo Transistor

1N4148 Switching Diode

LED’s ( Red, IR)

Resistor’s

Capacitor’s

Relay’s

Battery’s

CONCLUSION:In this paper, a low-cost low-power microcontroller for a standalone security access control system is presented. This system is proposed to be a convenient alternative to other systems for consumers that need moderate to high level security without any networking considerations and at a low cost. It is crucial to reiterate that the level of security provided by such a system heavily depends on the security of the encryption algorithm used in the encryption/decryption process. Therefore, a good selection of the encryption algorithm, similar to the one proposed in this paper is essential for the reliability of the security system.

References:1. http://www.123eng.com/projects/

microcontroller_based_home_security_pr

oject.html

2. http://www.atmel.com

3. http:// www.electronics4u.com

4. http:// www.ttransenergie.com.au