Application of SpaceWire to Future Satellite Data

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Application of SpaceWire to Future

Satellite Data Processing System

Kenji Matsuda, Kazunori Masukawa, Shigeru Ishii,

Yo Watanabe, Yoshikatsu Kuroda (MHI),

Motohide Kokubun, Masanobu Ozaki, Tadayuki Takahashi (JAXA),

Masaharu Nomachi (OSAKA UNIV.)

17-19 September 2007

International SpaceWire Conference 2007 @ Dundee, UK

(MHI)

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Agenda

(1) Big concerns in development of satellite

(2) Why? How to resolve?

(3) One proposal

(4) Benefit

(5) Summary

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Big concerns in managing development of satellite

Development period

Cost

Human resource

Quality

etc…

How to reduce the risk ?

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For the best performance, many types of DPU

(Data Processing Unit) and communication protocol

To design, manufacture and verify…

Many types of DPU

Communication protocol for each line

Analogue Sensor

Component A

Satellite Bus

System

Dedicated

I/F：

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

Dedicated Data

Processing Unit

for Each Sensor

DPU

A

DPU

B

DPU

C

DPU

D

DPU

X：

DPU

E

Memory

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MHI’s proposal in developing satellite

- To use SpW protocol as the only one protocol

- To develop common hardware

- To link DPU together

- To use TRON-OS

The basic concept to resolve the issue is

to standardize as many component as possible

HARDWARE

and

SOFTWARE

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- All protocol is SpW

- The same hardware (SpW Card) is used for

each DPU to reduce risk and cost

Overall system (1)

Group of Data

Processing Units

： SpaceWire I/F Common Hardware

Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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To link DPU to form a ring (ring topology)

Add at least one DPU as redundancy for fault-tolerance

Overall system (2)

Group of Data

Processing Units


Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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An example of fault-tolerance

Group of Data

Processing Units


Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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Group of Data

Processing Units


Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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Group of Data

Processing Units


Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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Group of Data

Processing Units

Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

： SpaceWire I/F Common Hardware：

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Group of Data

Processing Units

Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D


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An example of fault-toleranceGroup of Data

Processing Units

Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

Group of Data

Processing Units

Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D


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Group of Data

Processing Units


Satellite Bus

System

Analogue Sensor

Component A

Analogue Sensor

Component B

Analogue Sensor

Component C

Analogue Sensor

Component D

：

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Construction of analogue sensor component

SpW I/F section and user section

SpW

SpW I/F

Logic

SpW I/F Section

SpW FPGA

Memory

Bu

sMaster L

og

ic

Mu

ltiplex

er

BusEnable

Request

Grant

Ack

Addr

Data

Write

Read

Clk

Digital

Filter 0

User Section

Amp0

Amp1

Amp2

User FPGA

Detector

0

Detector

1

Detector

2

Digital

Filter 0

Digital

Filter 0

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To handle many component,

We introduce SpW based standard component

- SpaceWire Card -

Space

Wire

Router

SD-

RAM

I/F

SDRAM

RISC

Memory

I/F

EEP

ROM

SRAM

Space

Wire

Router

SpW FPGA

SOI-SOC

SpW I/F

SpW I/FTRON-OS

Based on MHI’s leading edge SOI technology

SpaceWire Card

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SOI-SOC (Silicon on Insulator – System on Chip)

-Processor

32 bit RISC Processor, 100MIPS

FPU

Cache (Icache = 16kB, Ocache = 16kB)

MMU

-External Interface

SpW I/F = 3ch, Routing

Memory I/F (SDRAM, SRAM, EEPROM, FlashROM)

DMAC

UART = 1ch

-Power Supply

Core = 1.8V IO = 1.8V (3.3V)

-Radiation Characteristics

SEU 40MeV/(mg/cm2)

SEL free

Visit our Booth to See This Chip

New!!

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Summary

SpW I/F for all communication line

Common hardware and software

Connect components to form a ring

To shorten development period

To reduce cost, human resource and risk

To get redundancy

This concept will be applied to the NeXT (New X-ray Telescope) Satellite,

which is scheduled to be set off in 2013 by JAXA

NeXT Satellite

Documents

Application of SpaceWire to Future Satellite Data