APPLICATION NmE

I I 'C Intel Corporation 1975

Contents . . . . . . . . . . . . . . . . . . . . . . . . INTRODUCTION 1

. . . . . . . . . . . . . . . . . . . DEVICE DESCRIPTION 1 Device Operation . . . . . . . . . . . . . . . . . . . . . . . 2

STORAGECELL . . . . . . . . . . . . . . . . . . . . . . 2 . . . . . . . . . . . . . . . . . . . Designing Nan-Volatile ADDRESS BUFFER 2

. . . . . . . . . . . . . . . . . . . . . . . . . . Memory Systems DECODERS 3

INTERNAL DATA SENSING . . . . . . . . . . . . . . 3 OUTPUTBUFFER . . . . . . . . . . . . . . . . . . . . . 3

. . . . . . . . . . . . . . . . . . . . with inters 5101 RAM Device Specifications 4 . . . . . . . . . . . . . . . . . . . . . . . . READCYCLE 4 . . . . . . . . . . . . . . . . . . . . . . . WRITECYCLE 5

D.C. OPERATING CHARACTERISTICS . . . . . . . 6 LOW VCC DATA RETENTION . . . . . . . . . . . . . 6

. . . . . . . . . . . . . SYSTEMS CONSIDERATIONS 7 Low Power Standby Operation . . . . . . . . . . . . 7

. . . . . . . . . . . . . . . . . . . . . . . Power Switching 7 Power Loss Detect . . . . . . . . . . . . . . . . . . . . . . 8 Batteries For Non-Volatile Semiconductor

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Memories PRIMARY BATTERIES (NON-RECHARGEABLE)

Voltage Boost . . . . . . . . . . . . . . . . . . . . . SECONDARY BATTERIES (RECHARGEABLE)

Nickel-Cadmium . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . .

. . . . . Trickle Charge Nickel-Cadmium Fast Charge Nickel-Cadmium . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . Lead-Calcium ~ e l / ~ e l l @ Characteristics . . . . . . . . . . . Trickle Charge Lead-Calcium . . . . . . . . Summary : Lead-Calcium . . . . . . . . . . . 14

System Implementation . . . . . . . . . . . . . . . . . . 15 1K X 16 MEMORY SYSTEM . . . . . . . . . . . . . . 15

TTL Interface . . . . . . . . . . . . . . . . . . . . . 15 CMOS Interface . . . . . . . . . . . . . . . . . . . . 17

1K X 1 6 MEMORY ARRAY LAYOUT AND CARD ASSEMBLY . . . . . . . . . . . . . . . . . . . . . . . . . . 17

. . . . . . . 5101 ORGANIZATION ADVANTAGES 17 SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 BIBLIOGRAPHY . . . . . . . . . . . . . . . . . . . . . . . . 18 APPENDIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Non-Volatile Memory Using the Intelm MCS-4oT' With the 5101 RAM. by Chon Hock Leow . . . 4-1

5101 SPECIFICATIONS . . . . . . . . . . . . . . . . . . . A-5

1 Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product . N o other circuit patent licensesare implied .

Photcjmicrograph of 5101 CMOS RAM

April 1976, INTEL CORPORATION, 3065 Bowers Avenue, Santa Clara, California 95051 (408) 246-7501

Printed in U.S.A./MMC-041-0476/5K