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    Questions

    Question 1

    Animation: addressing 16 8 bit ROM memory

    This question consists of a series of images (one per page) that form an animation. Flip the pages withyour fingers to view this animation (or click on the next button on your viewer) frame-by-frame.

    The following animation shows how setting the input (address) switches in particular combinationsselects individual memory cells inside the ROM, resulting in data stored within those cells to appear atthe output (data) lines. Questions to ponder:

    What is the organization of this particular ROM chip? (e.g. 256 4, 1k 1, etc.) What is the relationship between the hexadecimal numbers stored inside each cell and the alphabetical

    characters shown below the chip? What code is being used to represent these characters? What character is represented by the hexadecimal code 20? (Hint: this code is used twice in the sequence

    shown.)

    1

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0

    1

    0

    0

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C

    0

    0

    0

    1

    1

    1

    0

    M

    2

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    1

    0

    0

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C

    0

    0

    1

    1

    01

    Me

    1

    0

    3

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    1

    0

    0

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C

    0

    0

    1

    1

    0

    1

    1

    1

    Mem

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

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    D5

    D6

    D7

    1

    0

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C

    0

    0

    1

    1

    1

    1

    1

    11

    Memo

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

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    D5

    D6

    D7

    1

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    1

    1

    0

    0

    1

    0

    0

    0

    Memor

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    1

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    1

    1

    0

    1

    0

    01

    1

    Memory

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    1

    0

    0

    0

    1

    Memory

    0

    0

    0

    0

    8

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    1

    0

    0

    1

    0

    0

    1

    1

    1

    Memory I

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    1

    0

    0

    1

    1

    0

    0

    0

    1

    1

    Memory Is

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    0

    00

    0

    1

    Memory Is

    1

    0

    0

    0

    0

    11

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    00

    0

    1

    1

    0

    0

    1

    1

    1

    Memory Is U

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    00

    1

    1 0

    1

    1

    11

    1

    Memory Is Us

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    0

    1

    1

    0

    1

    1

    1

    0

    0

    0

    Memory Is Use

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

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    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    0

    1

    1

    0

    1

    1

    1

    0

    0

    1

    Memory Is Usef

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    0

    1

    1

    0

    1

    1

    1

    0

    1

    1

    Memory Is Usefu

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    VDD ROM memory IC

    VDD

    A0

    A1

    A2

    A3

    D0

    D1

    D2

    D3

    D4

    D5

    D6

    D7

    0 1 2 3

    4 5 6 7

    8 9 10 11

    12 13 14 15

    4D 65 6D 6F

    72 79 20 49

    73 55 73

    65

    20

    66 75 6C0

    1

    0

    1

    1

    0

    1

    1

    1

    1

    1

    0

    Memory Is Useful

    file 03244

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    Answers

    Answer 1

    Nothing to note here!

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    Notes

    Notes 1

    The purpose of this animation is to let students study the behavior of this switch circuit and reachtheir own conclusions. Similar to experimentation in the lab, except that here all the data collection is donevisually rather than through the use of test equipment, and the students are able to see things that areinvisible in real life.

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