Andrew LukefahrCurriculum Vitae

InterestsEnergy-efficient computation, heterogeneous mobile processors, embedded systems, architectures for IoT systems,teaching, and engineering pedagogy

Current Position2017–Present Assistant Professor, Indiana University, Bloomington, IN.

Education2011–2016 Ph.D. Computer Science & Engineering, The University of Michigan, Ann Arbor, MI.

{ Thesis Title: Improving Energy Efficiency Through Fine-Grained Heterogeneity2010–2011 M.S.E. Computer Science & Engineering, The University of Michigan, Ann Arbor, MI.2005–2010 B.S. Computer Engineering, The University of Missouri, Columbia, MO.2005–2010 B.S. Electrical Engineering, The University of Missouri, Columbia, MO.

Prior Experience2016–2017 LEO Lecturer I, University of Michigan, Ann Arbor, MI.

{ Taught “Programming and Introductory Data Structures”{ Researched energy saving techniques for neural-networks

2010–2016 Research Assistant, University of Michigan, Ann Arbor, MI.{ Researched & developed novel energy-efficient mobile processor designs{ Taught “Introduction to Computer Organization”

2012 Research Intern, ARM Ltd., Austin, TX.{ Designed methods for fine-grained switching for ARM’s future heterogeneous multicore products{ Evaluated performance/energy tradeoffs for heterogeneous multicore vs. dynamic voltage and

frequency scaling (DVFS)2009-2010 Research Assistant, University of Missouri, Columbia, MO.

{ Worked on a compilation system to automatically map security kernels expressed in a high-levellanguage onto physical hardware

{ Built an embedded kernel with support for virtual memory for the MicroBlaze soft-core processor2008-2009 Research Assistant, University of Missouri - Research Reactor, Columbia, MO.

{ Developed firmware and user interface for an automatic sample irradiation system{ Wrote a client program that communicated to the irradiation system using TCP/IP

Andrew Lukefahr — Curriculum Vitae150 S Woodlawn Ave – Bloomington, IN, 47405

H 734.531.9479 • B lukefahr@indiana.edu • Í lukefahr.org 1/4

Awards and Honors2013 Best Hardware Presentation - CSE Graduate Student Honors Competition, Computer

Science and Engineering, The University of Michigan.

ResearchResearch Interests

I have always been excited by how computers work, and I enjoy pushing the limits of theircapabilities. My past research has been focused on improving energy efficiency in mobileprocessors through both architecture design and application scheduling. My future researchinterests lie primarily in architecture and system design for IoT systems.

Journal ArticlesIEEE TC 1. “Exploring Fine-Grained Heterogeneity with Composite Cores”, Andrew Luke-

fahr, Shruti Padmanabha, Reetuparna Das, Faissal Sleiman, Ronald G. Dreslinski, ThomasF. Wenisch, Scott Mahlke, IEEE Transactions on Computers (Volume:65, Issue:2), January,2016.

Conference ProceedingsMICRO’17 2. “ Mirage cores: the illusion of many out-of-order cores using in-order hardwarea”,

Shruti Padmanabha, Andrew Lukefahr, Reetuparna Das, and Scott Mahlke, The InternationalSymposium on Microarchitecture (MICRO-50), Dec. 2017.{ Acceptance Rate 61/327 ≈ 18%

ISCA’17 3. “Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism”, JiecaoYu, Andrew Lukefahr, David Palframa, Ganesh Dasika, Reetuparna Das, Scott Mahlke., TheInternational Symposium on Computer Architecture (ISCA-44), June 2017.{ Acceptance Rate 54/322 ≈ 17%

MICRO’15 4. “DynaMOS: Dynamic Schedule Migration for Heterogeneous Cores”, Shruti Padman-abha, Andrew Lukefahr, Reetuparna Das, and Scott Mahlke, The International Symposiumon Microarchitecture (MICRO-48), Dec. 2015.{ Acceptance Rate 61/283 ≈ 22%

PACT’14 5. “Heterogeneous Microarchitectures Trump Voltage Scaling for Low-Power Cores”,Andrew Lukefahr, Shruti Padmanabha, Reetuparna Das, Ronald G. Dreslinski, Thomas F.Wenisch, and Scott Mahlke, The International Conference on Parallel Architectures and Com-pilation Techniques (PACT-23), Aug. 2014.{ Acceptance Rate 37/144 ≈ 25%

MICRO’13 6. “Trace-Based Phase Prediction for Tightly-Coupled Heterogeneous Cores”, ShrutiPadmanabha, Andrew Lukefahr, Reetuparna Das, and Scott Mahlke, The International Sym-posium on Microarchitecture (MICRO-46), Dec. 2013.{ Acceptance Rate 39/239 ≈ 16%

MICRO’12 7. “Composite Cores: Pushing Heterogeneity into a Core”, Andrew Lukefahr, ShrutiPadmanabha, Reetuparna Das, Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch,and Scott Mahlke, The International Symposium on Microarchitecture (MICRO-45), Dec.2012.{ Acceptance Rate 40/228 ≈ 18%

Andrew Lukefahr — Curriculum Vitae150 S Woodlawn Ave – Bloomington, IN, 47405

H 734.531.9479 • B lukefahr@indiana.edu • Í lukefahr.org 2/4

ERSA’11 8. “Towards Semantics-directed System Design and Synthesis”, William L. Harrison,Benjamin Schulz, Adam Procter, Andrew Lukefahr and Gerard Allwein, The InternationalConference on Engineering of Reconfigurable Systems and Algorithms (ERSA), July 2011.

WorkshopsPRISM’15 9. “Adaptive Cache Partitioning on a Composite Core”, Jiecao Yu, Andrew Lukefahr,

Shruti Padmanabha, Reetuparna Das, and Scott Mahlke, The PRISM-3 Workshop at TheInternational Symposium on Computer Architecture (ISCA-45), June, 2015.

GEM5’12 10. “Performance Prediction Models" , Shruti Padmanabha, Andrew Lukefahr, Reetu-parna Das, and Scott Mahlke, Gem5 Users Workshop at The International Symposium onMicroarchitecture (MICRO-45), Dec, 2012.

PatentsUS 15/063651 11. Controlling Transition Between Using First and Second Processing Circuitry, An-

drew Lukefahr, Shruti Padmanabha, Jiecao Yu, Reetuparna Das, and Scott Mahlke, US PatentApplication #15/063651, Issued: September 14, 2017.

US 14/323040 12. Control of Switching Between Executed Mechanisms, Shruti Padmanabha, AndrewLukefahr, Reetuparna Das, and Scott Mahlke, US Patent Application #14/323040, Issued:January 7, 2016.

US 14/093042 13. Control of Switching Between Execution Mechanisms, Shruti Padmanabha, AndrewLukefahr, Reetuparna Das, and Scott Mahlke, US Patent Application #14/093042, Issued:June 6, 2015.

US 14/093090 14. Heterogeneity Within A Processor Core, Andrew Lukefahr, Shruti Padmanabha,Reetuparna Das, and Scott Mahlke, US Patent Application #14/093090, Issued: May 2, 2017.

Research Mentoring{ Jiecao Yu, Ph.D. Student{ Advisor: Scott Mahlke{ Topic: Neuromorphic computing on embedded-scale processors

TeachingTeaching Interests

My background in embedded systems and processor design, coupled with my teaching experience,positions me to teach a wide variety of both software and hardware courses. At the undergraduatelevel, this includes introductory programming, data structures, object-oriented programming,digital-logic design, computer organization, embedded sytem design, and computer architecture.At the graduate level, this includes advanced computer architecture and energy-efficient hardwaredesign. Additionally, I have experience as a primary instructor, which included managing supportstaff and developing curriculum.

Courses TaughtCSCI-P536 Advanced Operating Systems, Fall, 2017, Indiana University.

Course Description: Advanced topics in operating systems, such as: multi-tasking, synchronizationmechanisms, distributed system architecture, client-server models, distributed mutual exclusion andconcurrency control, agreement protocols, load balancing, failure recovery, fault tolerance, cryptography,multiprocessor operating systems.

Andrew Lukefahr — Curriculum Vitae150 S Woodlawn Ave – Bloomington, IN, 47405

H 734.531.9479 • B lukefahr@indiana.edu • Í lukefahr.org 3/4

EECS 280 Programming and Introductory Data Structures, Fall 2016, University of Michigan.Course Description: Techniques and algorithm development for effective programming, top-downanalysis, structured programming, testing, and program correctness. Program language syntax andstatic and runtime semantics. Scope, procedure instantiation, recursion, abstract data types, andparameter passing methods. Structured data types, pointers, linked data structures, stacks, queues,arrays, records, and trees.

EECS 281 Data Structures and Algorithms, Winter 2017, University of Michigan.Course Description: Introduction to algorithm analysis and O-notation; Fundamental data structuresincluding lists, stacks, queues, priority queues, hash tables, binary trees, search trees, balanced treesand graphs; searching and sorting algorithms; recursive algorithms; basic graph algorithms; introductionto greedy algorithms and divide and conquer strategy. Several programming assignments.

EECS 370 Introduction to Computer Organization, Winter 2015, University of Michigan.Course Description: Provides the basic concepts of how instructions are executed within a processor core.Using simple assembly-language instructions programs, this course teaches both datapath and controlflow for multiple implementations of a processor. Topics covered include instruction-set architecture(ISA), linking/loading, pipelining, caches, prefetching, virtual memory, basic input/output devices, andperformance evaluation.

Selected CommentsResponses to “Overall, the instructor was an excellent teacher”Full student evaluations available upon request.

- “... has a great talent for teaching, communicated very well with students, was very knowledgeableabout the subject ...”

- “... engaged the class and you felt connected to the material because of him”- “I’ve had lots of good professors at Michigan, but I think the best lecturer I’ve had is Lukefahr...”- “... always makes sure he slows down and explains concepts again when students have difficulty

understanding them (instead of rushing up to cover a lot of material at the expense of thestudents’ understanding of fundamental concepts)...”

- “... went over the specific examples in more depth and he wrote on the slides which made it wayeasier to review material because it would be in the lecture recordings.”

Professional Activities and ServiceJournal Reviewer

{ TACO, CAL, & JETCConference Reviewer

{ ISCA, MICRO, HPCA, PACT, CASES, CGO, & DACCluster Administrator

{ Built and maintained a 300 core research cluster

Andrew Lukefahr — Curriculum Vitae150 S Woodlawn Ave – Bloomington, IN, 47405

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