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ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems
Lec 5: September 16, 2020Delay and RC Response
Penn ESE370 Fall2020 – Khanna
Delay is RC Charging
2Penn ESE370 Fall2020 – Khanna
Gate Delay is RC Charging
Strategy:! Use zero-order model
to understand switch state
! Break into output/input stages
! For each stage" Understand Rdrive" Understand Cload
3Penn ESE370 Fall2020 – Khanna
Today
! RC Charging" RC Step Response Curve
! What is the C?" Capacitive load on logic gate output node
! What is the R?" Equivalent output resistance on the current path driving
the output node
! Approximating and Measuring Delay" Tau estimate!
4Penn ESE370 Fall2020 – Khanna
90% Rise Time? (preclass 1ab)
What is final Vmeasure?What is time constant, τ?
5Penn ESE370 Fall2020 – Khanna
Governing Equations? (KCL)
! KCL @ Vmeasure" Kirchoff’s Current Law
" Sum of all currents into a node = 0" Current entering a node = current exiting a node
" IR=IC
IC
IR
6Penn ESE370 Fall2020 – Khanna
Governing Equations? (KCL)
IC
IR
IR = ICVRR =C dVCdt
Vin −VmeasureR =C dVmeasuredt
7Penn ESE370 Fall2020 – Khanna
Governing Equations? (KCL)
IC
IR
IR = ICVRR =C dVCdt
Vin −VmeasureR =C dVmeasuredt
0 = dVmeasuredt + 1RCVmeasure −
VinRC
Vmeasure =Vin 1− e−t/RC( )( )τ = RC
8Penn ESE370 Fall2020 – Khanna
What does look like?
Vmeasure =Vin 1− e−t/RC( )( )9Penn ESE370 Fall2020 – Khanna
Shape of Curve (preclass 1c)
t (in ps) e-t/RC 1-e-t/RC0
0.112
2.3
Vmeasure =Vin 1− e−t/RC( )( )Vin=1
10Penn ESE370 Fall2020 – Khanna
Rise Time: 10—90%
trise ~= 2.2ps ~= 2.2τ11Penn ESE370 Fall2020 – Khanna
Shape of Curve (preclass 1d)
t (in ps) e-t/RC 1-e-t/RC0 1 0
0.1 0.9 0.11 1/e = 0.37 0.662 1/e2 = 0.14 0.86
2.3 0.1 0.9
Vmeasure =Vin 1− e−t/RC( )( )Vin=1
10%
90%
12Penn ESE370 Fall2020 – KhannaAt what time is Vmeasure 50% of its value?
Delay Time: 50% (in)—50% (out)
tPLH ~= .69ps ~= .69τ13Penn ESE370 Fall2020 – Khanna
Propagation Delay Definitions
14
t
Penn ESE370 Fall2020 – Khanna
Rise/Fall Times
15Penn ESE370 Fall2020 – Khanna
Delay Time: 50% (in)—50% (out)
tPLH ~= .69ps ~= .69τ16Penn ESE370 Fall2020 – Khanna
τ = RC
Voltage Waveform at Output/Input Node
Rdrive from looking into output stages
Cload from looking into input stages
17Penn ESE370 Fall2020 – Khanna
Voltage Waveform at Output/Input Node
Rdrive from looking into output stages
and wires
Cload from looking into input stagesand wires
18Penn ESE370 Fall2020 – Khanna
What is C?
19Penn ESE370 Fall2020 – Khanna
Capacitance
! Wire! Fanout -- Total gate load
" Logical Gate" MOSFET gate
20Penn ESE370 Fall2020 – Khanna
Fanout
! Number of things to which a gate output connects
21Penn ESE370 Fall2020 – Khanna
Fanout in Circuit
! Output routed to many gate inputs
22Penn ESE370 Fall2020 – Khanna
Fanout in Circuit (preclass 2)
! Maximum fanout?! Second?! Min?
23Penn ESE370 Fall2020 – Khanna
MOSFET Capacitance
! “load of 1”?" Capacitive
Out
1
2
1
2
1
2
1
2
A
B
24Penn ESE370 Fall2020 – Khanna
MOSFET Capacitance
! “load of 1”?" Capacitive
Out
1
2
1
2
1
2
1
2
A
B
25Penn ESE370 Fall2020 – Khanna
Lumped Capacitive Load
Cload = CGii∈ fanout∑ + Cwi
i∈wires∑
26Penn ESE370 Fall2020 – Khanna
What is R?
27Penn ESE370 Fall2020 – Khanna
Resistance
! Wire resistance" From supply (Vdd or Gnd) to transistor source" From transistor output to gate it is driving
! Transistor equivalent resistance (Ron)
28Penn ESE370 Fall2020 – Khanna
Equivalent Resistance
Out
1
2
1
2
1
2
1
2
A
B
29Penn ESE370 Fall2020 – Khanna
Equivalent Resistance (prelcass 3)
Out
1
2
1
2
1
2
1
2
A
B
! What resistances might transistors contribute?" How many cases?" Assume Ron=Ron,p=Ron,n
30Penn ESE370 Fall2020 – Khanna
Equivalent Resistance (prelcass 3)
Out
1
2
1
2
1
2
1
2
A
B
! What resistances might transistors contribute?" How many cases?" Assume Ron=Ron,p=Ron,n
Input Rout00011011
31Penn ESE370 Fall2020 – Khanna
Rise/Fall Times
Out
1
2
1
2
1
2
1
2
A
B
! Rise and Fall time may differ" Why?" What is worst case?" What is best case?
Input Rout00 Ron/201 Ron10 Ron11 2Ron
32Penn ESE370 Fall2020 – Khanna
Lumped Resistive Source
Rdrive = Rtr,net + Rwii∈wires∑
Rtr,net = transistor network resistance = parallel and series combination of Rtr
33Penn ESE370 Fall2020 – Khanna
Voltage Waveform at Output/Input Node
Rdrive from output stages
and wires
CLoad from input stages and wires
34Penn ESE370 Fall2020 – Khanna
Measuring Delay
35Penn ESE370 Fall2020 – Khanna
Measuring Gate Propagation Delay
! Next stage starts to switch before first finishes! Measure from 50% of input swing to 50% of output
swing
67ps 80ps tplh = 13ps
36Penn ESE370 Fall2020 – Khanna
Characterizing Gate/Technology
! Delay measure of a logic gate will be " Function of load on logic gate" Function of input signal rise time
" Which, in turn, may be a function of input loading from the driving logic gate
37Penn ESE370 Fall2020 – Khanna
Delay vs. Risetime
! If we didn’t know the input rise time, we wouldn’t know what a 13ps delay meant
10ps delay 20ps delay
1ps input rise 100ps input rise
38Penn ESE370 Fall2020 – Khanna
Characterizing Gate/Technology
! Delay measure will be" Function of load on gate" Function of input signal rise time
" Which, in turn, may be a function of input loading
! Want to understand typical delay times" Allows us to compare designs with a (somewhat)
normalized delay metric
39Penn ESE370 Fall2020 – Khanna
Standard Measurement for Characterization
! Drive with a gate " Not an ideal source" Input rise time typically would see in circuit
! Measure loaded gate" Typical loading – FO4
Function Generator Oscilloscope
40Penn ESE370 Fall2020 – Khanna
Not realistic measurement
HW2 Measurement Setup
41Penn ESE370 Fall2020 – Khanna
Driving gate
Gate under test
Loading gate
Loading gate
Measurement for Characterization
! Drive with a gate " Not an ideal source (how does delay change if drive is
ideal?)" Input rise time typically would see in circuit
! Measure loaded gate" Typical loading – FO4
42Penn ESE370 Fall2020 – Khanna
Measurement for Characterization
! Drive with a gate " Not an ideal source" Input rise time typically would see in circuit
! Measure loaded gate" Typical loading – FO4 (how does delay change if gate is
unloaded?)
43Penn ESE370 Fall2020 – Khanna
Ring Oscillator (If time)
44Penn ESE370 Fall2020 – Khanna
Ring Oscillator (If time)
45Penn ESE370 Fall2020 – Khanna
Ring Oscillator (If time)
46
tPHL2 tPHL1tPLH2tPHL3
tPLH3 tPLH1
t
= SYM INV
SYM INV => tPHL = tPLHPenn ESE370 Fall2020 – Khanna
47
SYM INV => tPHL = tPLH = tp
f = 1T=16τ p
=1
2nτ p
→ τ p =12nf
Ring Oscillator (If time)
Penn ESE370 Fall2020 – Khanna
Admin
! HW 2 due 9/21" If you haven’t started, start now!" Office hours W, Th, F, Sa
" Raul’s Friday OH moved to Saturday (this week only)" See Piazza for time on Sat
! Setup Spice Work Flow" access to electric, setup for spice, run ngspice
" See tool guides on website" https://www.seas.upenn.edu/~ese370/#tools
" read spice style guide on webpage:" https://www.seas.upenn.edu/~ese370/fall2020/handouts/s
pice_style_guide.pdf
48Penn ESE370 Fall2020 – Khanna