Abhijit R. Asati

Email id: abhijit_asati@bits-pilani.ac.in

Operational AmplifiersHistory:

Initial Application: Analog Computation and sophisticated instrumentation

Why OPAMP? (Used to perform many mathematical operations)Early OPAMP was discrete ( vacuum tubes, transistors & resistors)

Cost: Prohibitively high ( tens of dollars)1960: First IC OPAMP by Fairchild ( A 709), designed by Robert J. Widler

Within span of few years high quality OPAMP available at extremely low price due to versatility of application.

VVV

VVdBA

satin

sat

2.11012

1210140

7)(

7

===

==

2&

2

2

21

21

2

1

VVV

VVV

VVV

VVV

cm

id

idcm

idcm

+==

=

+=

0

0

==

==

cmid

od

idcm

oC

VwhenVVA

VwhenVVA

C

d

AACMRR =

iddo

C

iddcmCo

VAVAOPAMPidealforVAVAV

==

+=0

&

Representing the input signals to a differential amplifier in terms of their differential and common-mode components.

Differential Input: Differential Input:

Characteristic of the Ideal OPAMP: (Practical Values)

Infinite input impedance (1-10M)Zero output impedance (25-150)Infinite open loop gain A (100-140dB)Zero Common- mode gain or infinite common mode rejection (100dB)

Zero input offset voltage (20-200 mv at output)Zero input bias Current (nA to A)Infinite bandwidth (unity gain) (10 MHz)Infinite Slew rate dVo/dt | max (0.5 V/sec to 50 V/sec )PSRR=Vo/V=0 (20v/v)

An important characteristic of OPAMP is that they are direct-coupled or dc amplifier. This property allows it to use in many application.

The inverting closed-loop configuration:

The inverting closed-loop configuration:

Finding Input and Output Resistance of inverting Amplifier:

R2

R1

Let us find Rin, Rout and closed loop gain without going in to the intricacies of the feedback.

1)(21

2)(2

)||(

)(1

:

RRRRR

lowveryA

RR

TheoremMillerApplyingnceresistainputaldifferentiR

inputidin

input

id

+=+=

=Finding Input Resistance :

Feedback reduces the input impedance

Finding Output Resistance :

ooout

oout

RRRRA

ARRR

TheoremMillerApplying

=+=2

2

||1

||

:

Feedback reduces the output impedance

o

ooo

oe

ooe

RVAV

RRVI

VAAV

VVRR

RV

accuratelyMore

+++==

=+=

210

21

1

:

21

21

0

||1

111

RRAR

RA

RRIV

o

o

o

++=

+++=

Effect of finite open-loop gain in inverting Amplifier:

Io

Io

oIo

oI

oo

oo

oI

oI

vRR

ARR

v

vRR

ARR

Av

vARRv

RR

AvR

RAvv

Avv

RiAvv

RAvv

RAvv

i

1

21

2

1

2

1

2

1

2

1

22

1

21

111

)1(1

)11(

)(

=

++

=++

=

+=

=

+=

=

12

1

2

1

2

1

21

2

,

)1(1

)1(1

RRGAAs

ARR

RR

vvG

vRR

ARR

v

I

o

Io

++

==

=

++

Feedback reduces the gain

Closed-Loop gain calculation using infinite open-loop gain:

00

)(0

1

2

12

12

===

==

vv

vv

AAsAvvv o

Q

Concept of Virtual Ground:

For high input resistance R1 should be large.For high gain R2/R1 should be large.Therefore R2 becomes impracticable.For R1=1MGain=100R2=100 M (impracticable)Remedy: Example 1

Gain Expression: Analysis given in diagram

1

2

RR

vv

i

o =

Assuming the OPAMP to be ideal, derive an expression for the closed loop gain Vo/ VI of the circuit shown below. Use this Circuit to design an inverting amplifier with a gain of 100 and an inputresistance of 1M. Assume that for practical reasons it is required not to use resistors greater than 1M. Compare your design with that based on the inverting configuration

EXAMPLE 1

The circled numbers indicate the sequence of the steps in the analysis.

Solution

amplifiercurrentasactRR

Rviii

RRvR

Rviii

RRvR

Rvi

vRRR

RvRivv

Rvii

Rv

Rvi

vAvv

I

II

Ix

II

x

I

II

oo

+=+=

+=+=

==

===

==

==

===

)1(

)6(

)5(0

)4(0

)3(

)2(0

)1(0

3

2

1324

31

2

1324

31

2

33

1

22

1221

112

111

1

VVK

Mvv

KRMRMRMRLet

RR

RR

RR

vv

RRRR

RR

RR

vv

RRRvR

Rvv

RRv

Rivv

I

o

I

o

I

o

IIIo

xo

/03.1002.10

111

2.10&,1,1,1,

)7(1

3

421

3

4

2

4

1

2

31

42

1

4

1

2

431

2

11

2

44

=

++==

===

++=

=

+=

=

electrical output Range: Industrial Standard Output for instruments ( 4mA-20mA transmitters)

5V0VLogic 1Logic 0

20mA4mA15psi3psi

Pressure Reading

).....(

).....(

).....(

321

321

33

22

11

3

3

2

2

1

1

no

nF

nn

FFFFo

Fn

no

Fo

vvvvvRRRRR

vRRv

RRv

RRv

RRv

RRv

Rv

Rv

Rvv

iRv

+++=====

+++=

+++==

K

A Summing Amplifier:

Applications:

9Digital to Analog Converter9Implementing summing coefficients of both signs.

A Weighted Summer:

.......125.0,25.0,5.0

&

...

)&(2

....22

:

321

321

122

11

===

====

==++=

=

RR

RR

RR

vvvvvLet

LSBBMSBBBBBD

whereDvv

fff

refn

nnn

refo

Constraint: All the summing coefficient are of the same sign

).....( 33

22

11

nn

ffffo vR

Rv

RR

vRR

vRR

v +++=

Digital to Analog Converter:

Resolution=1/16=0.0625

-.0.9375Vref1111

-.0625Vref1000

-0.5Vref0001

VoB4(LSB)

B3B2B1(MSB)

44

33

22

11 )()( R

RvRRv

RR

RRv

RR

RRvv cc

b

ca

b

cao +=

Implementing summing coefficients of both signs:

4321 8.05.025.04.0 vvvvvo +=

Implementing summing coefficients of both signs:

2k

4k

2.5k

2k

2k

5k

8k

The Non-inverting configuration:

1

21RR

vv

I

o +=ooout

Vso

oout

RRRRIVR

==

=

2

0

||

idin RR

12

21

1

)(0

RR

vv

RRvvv

AforAvv

I

o

IIo

oId

+=

+=

===

1

2

21

1

1

,

RR

vv

RRRvv

divisionpotentialngUsi

I

o

oI

+=

+=

Effect of finite open-loop gain:

211

2

21

)(

)(

RRvv

ARRv

Avv

RRAvv

Avvv

AforAvv

II

ooo

oI

oIo

oId

+=++

+=

=

Effect of finite open-loop gain:

+

++

+=

+=++

1

2

1

2

1

2

1

2

1

2

1,

)1

1(

1

)1()11(

RR

vvAAs

AR

RRR

vv

vRRv

ARR

A

I

o

I

o

Io

(a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

The Voltage Follower:

Open-loop gain of a typical general-purpose internally compensated op amp.

Effect of finite open-loop gain and Bandwidth on circuit Performance:

)()(

bandwidthgainunityfAf loopopenbot

=

Frequency Response of Closed Loop Amplifiers:

MHzkHzkHzfgain

RRMHf

HfAR

R

sR

R

sVsV

amplifierinvertingFor

dB

I

Fzt

Zb

I

F

tdB

dB

I

F

i

o

5.0,10,1&1,99,999

1,99,999&1

10&10

1

1)()(

:

3

50

3

3

==

====

+=

+

Frequency Response of Closed Loop Amplifiers:

MHzMHzKHzKHzfgain

RRMHzffor

RRwhere

sR

R

sR

R

VV

amplifierinvertingnonFor

dB

I

Ft

I

F

tdB

dB

I

F

dB

I

F

i

o

1,5.0,10,1&1,2,100,1000

0,1,99,999&1,

1,

1

1

1

1

:

3

3

33

=++++===

+=

++

=++

=

9The non-inverting amplifier has a higher gain bandwidth product than inverting amplifier.

9As close loop gain decreases by factor of 100 as compared to Ao then closed loop 3db frequency increases by factor of 100 as compared to ft.

A difference amplifier. (Combining Inverting and Non-Inverting Amplifier

A single OPAMP Difference Amplifier:

**

*1

1

2

3

4

3214

32421424

12

2

34

4

1

2

1

12

34

4

1

2

1

2

34

4

==

+=++=+

=

+

+

=

++

RR

RR

RRRRRRRRRRRR

RRR

RRR

RR

RRR

RRR

RR

RR

RRR

A single OPAMP Difference Amplifier: (contd)

Difference amplifier should not give output for common mode signal

Gain of non-inverting path + gain of inverting path=0

IF RRRRRRRR

RR

=====

1324

1

2

3

4

&

)( 21 VVRRV

I

Fo =

Iid

iIiIid

i

idid

RRiRiRV

KVLApplyingiVR

20

:

=++=

=

1i

1i

idV

Analysis of the difference amplifier to determine its common-mode gain:

==

==+==

+=++=

+=

+=+=

CMRRA

RRRRselectingRR

RR

RRR

vvA

vRR

RR

RRRv

vRR

RRRv

RRRv

RivRR

Rv

vRR

RR

i

vRR

RvR

i

cm

Icm

ocm

Icmo

IcmIcmo

Icmo

Icm

IcmIcm

0&

)1(

)1(

)1(1

][1

2413

4

3

1

2

34

4

4

3

1

2

34

4

34

3

1

2

34

4

2234

4

34

3

11

34

4

11

Differential Input Differential Output Amplifier:

inF

o

Foo

Fo

Fo

VRRv

VVRRvv

VRRv

VRRv

+=

+=

+=

+=

1

211

21

21

2

11

1

1

)(1

1

1

The Instrumentation amplifier: (Chapter 3)

Instrumentation amplifier is closed loop gain amplifier that has differential input and single ended output.

Simple Instrumentation amplifier:

)( 211

VVRRV Fo =

1i

1iidV

Finding the input resistance of the difference amplifier:

)(2

0

1

11

lowRivR

iRiRv

I

Idid

IIId

==++=

Ido VRRV

1

2=

In this configuration we use two additional OPAMPS to achieve High input resistance.

But achieving high input impedance is not only the goal otherwise we would have connected two OPAMPS in Voltage follower configuration.

In addition we want to achieve high gain, therefore OPAMPS are connected in the non-inverting configuration as shown in figure.

Achieving high gain in the first stage lowers the burden on second stage.

Second stage does the job of differencing function and rejecting the common mode signal.

(a) Initial approach to the circuit

A superior Circuit: The Instrumentation Amplifier:

)sec(0

)1()(

sec

)1(

)1())(1(

:

1

2

3

4

3

4

1

21

1

212

1

21

stageondofactionngdifferencitodueA

RR

RR

vvAgainlOveral

RRstageondofgain

RR

vv

vRRvv

RRv

stagefirstofvoltageoutput

c

Id

od

Id

o

IdIIo

=+==

=

+=

+=+=

The Disadvantage Instrumentation amplifier shown in fig a:

Since VICM is amplified by the first stage, the difference amplifier of second stage has to deal with large common mode signal. Therefore CMRR may reduce.

A1 & A2 must be perfectly matched otherwise spurious signal may appear at their outputs, which may be amplified by difference amplifier.

To vary differential gain Ad, two resistor say R1 should be varied simultaneously and these two resistors should be perfectly matched. (A difficult task!)

All these problems can be solved with a very simple wiring change.

9Lumped R1 and R2 together into a single resistor 2R1A superior Circuit: The Instrumentation Amplifier:

The two resistors R1 and R1 lumped together, this simple wiring change dramatically improves performance;

Since first stage simply propagates VICM , the difference amplifier of second stage has to deal smaller common mode signal. Therefore CMRR improves.

1222

1

211

2

2

RRvvv

RRvvv

IdIo

IdIo

+=

=

)1(

)1(

)22(

)()22

(

:

1

2

1

2

1

2

121

2

1

212

RR

vv

vRRv

vvRR

vvRRv

RRvvv

stagefirstofGain

Id

o

Ido

IdId

IIIdId

oo

+=

+=

+=

++=3

4secRRstageondofgain =

3

4

1

2 )1()(RR

RR

vvAgainOverallId

od +==

)sec(0

)1()(

:)(

1

'22

3

4

2

stageondofactionngdifferencitodueA

RRR

RRAgainOverall

matchnotdoRwhenAgainOverall

c

d

d

=

++=

In place of 2R1 if we take variable resistance as R1 then gain will be:

3

4

1

2 )21()(RR

RR

vvAgainOverallId

od +==

)21()(

)()21(

,,

12

1

234

avvAgainOverall

VVa

v

thenaRR

andRRRR

Let

Id

od

o

+==

+=

=

===

Bridge Amplifier:

The change in resistance of the transducer is converted into proportional voltage change.

REFREF

REFo

REFREFo

REFREFo

ooo

vRRv

RRv

RRv

vR

RRvR

RRv

vR

RRvR

RRv

vvv

22

22

2)1(

21

=+=

+=

++=+=

m

2)1(2

1

REFo

REFo

vR

RRv

vR

RRv

+=

=

9The op-amp A741 A has output short circuit current of 10mA to 40 mA.

9The built in short circuit protection guaranteed to withstand 25 mA of current in protecting the op amp.

9In a Solar cell sunlight varies from darkness to maximum brightness.

9A current 0 to 0.25 A is to be converted to 0-5V.

9Design a circuit to monitor this current on 100 A, 800 full scale deflection current meter.(Design based on CCVS)

=== 2025.055AI

RSC =

+=+=

kRKRAV

RRAV

S

S

MS

2.49)8.0(1005

)(1005

0 0.25 A

5V

Design a dc electronic voltmeter (EVM) with an input impedance of 1 M and capable of measuring dc voltages of 1 V, 10 V and 100 V with a basic 10 V full-scale deflection dc voltmeter.

R1

R2

1M-(R1-R2)

== KRRMVV 10

11001 11

==++=

KR

KRRRRMVV

90

100)()(1101

2

2121

(Design based on VCVS)

Problem on voltmeter design:

mARVI

RmvVRVI

io

i

io

1

100&100

====

=

Current-meter

Current meter of 0-1mA can read voltages of 0-100 mV.

(Design based on VCCS)

Problem: Design a sensitive dc voltmeter with full-scale voltage ranges from 1 mV to 1 V being indicated in a 100 A full-scale deflection dc current meter in figure.

Problem on voltmeter design:

Design a dc milli-voltmeter which must be able to read 0-100 mV with a current meter of 0-1 mA.

The milli-voltmeter should have an input impedance of 100K.

(Design based on CCCS)

21

2

1

1

)(0

100

RR

II

RIRII

RVI

kRR

i

o

iio

s

ii

ins

+=

+=

===

===+

1.100,100

1000)1(

21

2

1

RkRRR

100011

1100

100100

(max)

(max)

(max)

==

===

AmA

II

AKmVI

mVVfor

i

o

i

in

SUMMARY OF VOLT-METER DESIGN

VCVS based

CCVS based

V to I ConversionVin

Rin

SUMMARY OF VOLT-METER DESIGN (Contd)

VCCS based

CCCS based

For multi-range replace R2 with this N/W.

1M

Voltage-to-current converter for grounded load

324

1

224

1

2222

3

244

1

222

4

2

3

24

1

2220

2

02

1

2

4

2

3

24

4

2

3

2

4

3

2

4

2

)(

)(

)()(

:

)2()(

&

)1()(

RVR

RVVR

IR

RVVR

VVRVRIR

RVVR

VRV

RVIR

VinatingimelR

VVRVV

RVV

RVV

RV

RVIRV

RV

RVI

RV

RVI

RVV

refL

refL

refL

o

ref

ref

LoLo

Lo

=

=++

=++

=

=++=++=

+=

32

41

22

41

2

3

2

41

22 )(RV

RRVR

RRVR

RV

RRVVR

I refrefL +==

3241: RRRRingchoos =

3

3

2

3

2

3

RV

I

RV

RV

RV

I

refL

refL

=

+=

Differential voltage-to-current converter

)1(2 2

2

=

=

VVVRVV

RVV

Lo

oLL

RVVI

RVVI

RVV

RVVVI

RVV

RVVI

RVV

L

LL

L

LLL

L

LL

L

21

21

21

01

)2(

=

++=

+=

+=

21 VVIL

L

LEs

Z

Icurrentampop

IIRV

=

=mAAIcurrentampop

AVRVII

L

s

ZLE

1100

1.0

1.0505

===

===

Constant high current source

10V

10V

5V

9.3V

10V

Digitally controlled 420 mA current source

mAI

VVONQQV

VV

L

in

K

20100

2

2:&1

215152

)100(

21

)2(

====

==

mAI

VVOFFQQV

L

in

4500

2

2:&0

)500(

21

====

13V

13V

2V

13V

12.3V

Reference Voltage Sources:

ZI

Fo VR

RV )1( += ZI

Fo VR

RV =

Circuit model for an op amp with input offset voltage VOS.

DC Imperfections:

Effect of DC Offset Voltage on inverting and non-inverting amplifiers:

9The op-amp A741 A has input bias current of 30nA to 80 nA, while input offset current of 3nA to 30 nA.

The op-amp input bias and Offset currents:

21

21

2BBOS

BBB

III

III

=

+=

In BJT,

IB~100nA & IOS=10nA

In FET, IB ~ few pA

Effect of op-amp input bias currents on inverting and non-inverting amplifiers:

Reducing the effect of op-amp input bias currents on inverting and non-inverting amplifiers:

1

321 R

RII BB

1

32

RRIB 221

213

)(

||

RIIVthen

RRR

BBo =

=

21

322132

21

32132 )(

RRRIRIRIV

RRRIIRIV

BBBo

BBBo

+=

+=

[ ]21221

21212

21

221

21

122

221

2221

21

212

1

2

21

21221

21

212

BBo

BBo

BBBo

BBBo

BBBo

IIRVRRRRIIRV

RRRII

RRRIRV

RRR

RIRIRRRRIV

RR

RRRRIRI

RRRRIV

=

++=

+++=

+++=

+++=

21

21213 ||

,

RRRRRRR

Let

+==

Combining both the effects of input offset voltage and input bias current :

2211

2 )()1( RIIVRRV BBOSo ++=

21

2 )1( RIVRRV OSOSo ++=

23

1 5

6

IC 741

DC Offset balancing techniques in IC741:

DC Offset balancing techniques by connecting an external source:

2RRb

Effect of DC Offset Voltage on Capacitively coupled inverting amplifier:

Capacitor is open for dc input, therefore it acts as voltage follower for dc input offset voltage.

21 BBOS III =

Capacitor is open for dc input, therefore IB1 flows through R2 Vo1= IB1 R2

Due to IB2 VNIT= VO2 = -IB2 R2 (voltage follower)

Vo= Vo1+ Vo2= IB1 R2 - IB2 R2Vo= (IB1 -IB2) R2

Reducing the effect of op-amp input bias currents on capacitivelycoupled inverting amplifiers:

IB1

IB2

Illustrating the need for a continuous dc path for each of the op-amp input terminals. Specifically, note that the amplifier will not work without resistor R3.

Drawback: R3 lowers the input impedance of amplifier.

21 BBOS III =

Reducing the effect of op-amp input bias currents on ac coupled non-inverting amplifiers: Capacitor is open for dc

input, therefore IB1 flows through R2

Vo1= IB1 R2Due to IB2

Vo2= -IB2 R2 (voltage follower).

Vo= Vo1+ Vo2= IB1 R2-IB2 R2

Vo= (IB1 -IB2) R2

Slew-rate:

Maximum rate of change possible at the output of real OPAMP is known as Slew- Rate.

Slew rate is distinct from finite op-amp bandwidth that limits the frequency response of the closed loop amplifier.

The limited bandwidth is a linear phenomenon and does not result in a change in the shape of an input sinusoid. i.e. it does not lead to non-linear distortion.

But, slew rate limitation can cause non-linear distortion.

(a) Unity-gain follower.

maxdtdvSR o=

)1()(

1

1

to

t

i

o

teVtv

sVV

=+

=

The initial slope of this exponentially rising function is tV.

slew-rate: (contd)

Input step waveform.

slew-rate: (contd)

Linearly rising output waveform obtained when the amplifier is slew-rate limited.

slew-rate: (contd)

SRVt >When V is large:

Exponentially rising output waveform obtained when V is sufficiently small.

slew-rate: (contd)

SRVt

op

op

VrateSlewf

VrateSlew

=

=

2max

max

voltagepodundistorteaximummVwhere

op /:

=

Vop(max) = Maximum rated amplitude of sinusoid

Full Power Bandwidth:

(max)max

(max)max

2 op

op

VrateSlewf

VrateSlew

=

=

Isolation Amplifier:There are many situations where low-level signals must be detected and amplified in the presence of potentially

dangerous voltages.

Examples: In remote sensing, motor control, data acquisition and medical monitoring

Manufacturers of bioelectric amplifiers, especially EEG and ECG equipment, use isolation amplifiers that provide as

much as 1012 of isolation between the patient and the ac power line mains cord.

GainIMRRV

CMRRVVV ISOCMSIGo

=

Isolation-mode rejection ratio: The IMRR is a measure of how well the isolation device rejects isolation-mode voltage.

Common-mode rejection ratio: The CMMR measures how well the device rejects common-mode signals.

Isolation device technology:

A number of barrier arrangements and signal modulation schemes are available.

The three techniques in common use are:9 optical isolation, 9inductive or transformer isolation,9 and capacitive isolation.

Optical isolation.

Analog Coupling:

The input signal modulates the LED The photo-detector converts the light back into currentDisadvantage: Non-linearity (harmonics present)

Digital Coupling: The signal can be:

9 digitized9 passed across the barrier9converted back to an analog signal with a D/A converter

Inductive isolationNon-linearity is reduced compared to optical isolators

Transformer isolation.

(dc)(dc)

Capacitor isolation:

Transformers are generally impossible to produce in an IC, so a capacitor circuit was developed to couple the modulated signal across the barrier.

Capacitive devices have lower transient immunity performance since some fast (high slew rate) transient common-mode pulses pass across the coupling capacitor and can be accepted as the signal for a single-capacitive barrier device.

So dual-capacitor differential circuits have been developed to minimize errors.

Differential

Amplifier

PROGRAMMABLE GAIN AMPLIFIER (PGA)

Charge Amplifier:

Cancels the effect of parasitics.

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