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Analog Circuits and Systems Professor K. Radhakrishna Rao Department of Mechanical Engineering Indian Institute of Science Bangalore Module No # 08 Lecture No # 37 Frequency Locked Loop (Popularly Known As PLL) (Refer Slide Time 00:46) Today we are going to have out thirty-seventh lecture on frequency locked loop. Let us just consider what we have already done in the last class, that is the thirty-sixth lecture on phase locked loop. We considered the true phase locked loop is something that has only the phase lock to a specific value. Phase difference between input and its output is locked to a specific frequency. I mean at a given frequency to a specific value of phase shift of for say for example 90 degrees quadrature. Irrespective of the incoming frequency it is only locked to 90-degree phase shift. That is what is truly called a phase locked loop. Which is what is mostly commonly used in tuning filter or obtaining multi-phase signal from a single phase. So this phase locked loop. We have seen how it can be converted into by a minor modification by replacing the voltage controlled phase generator by VCO, an independent oscillator within the loop. So into a frequency locked loop. Which is no popularly called ok as phased locked loop ok. The other phase locked is, even though used for tuning, is not all that popular. Now we saw that that particular phase locked loop, true phase locked loop is a first order system ok if it is

Analog Circuits and Systems Professor K. Radhakrishna Rao ...textofvideo.nptel.ac.in/117108107/lec37.pdf · ratio. That into 1 + S by omega LP over here. So this whole thing in this

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Analog Circuits and SystemsProfessor K. Radhakrishna Rao

Department of Mechanical EngineeringIndian Institute of Science Bangalore

Module No # 08Lecture No # 37

Frequency Locked Loop (Popularly Known As PLL)

(Refer Slide Time 00:46)

Today we are going to have out thirty-seventh lecture on frequency locked loop. Let us just

consider what we have already done in the last class, that is the thirty-sixth lecture on phase

locked loop. We considered the true phase locked loop is something that has only the phase

lock to a specific value. Phase difference between input and its output is locked to a specific

frequency. I mean at a given frequency to a specific value of phase shift of for say for

example 90 degrees quadrature.

Irrespective of the incoming frequency it is only locked to 90-degree phase shift. That is what

is truly called a phase locked loop. Which is what is mostly commonly used in tuning filter or

obtaining multi-phase signal from a single phase. So this phase locked loop. We have seen

how it can be converted into by a minor modification by replacing the voltage controlled

phase generator by VCO, an independent oscillator within the loop.

So into a frequency locked loop. Which is no popularly called ok as phased locked loop ok.

The other phase locked is, even though used for tuning, is not all that popular. Now we saw

that that particular phase locked loop, true phase locked loop is a first order system ok if it is

an integral controlled system. And it becomes a second order if the comparator that is used

within the op amp used within in the integral control has a finite gain bandwidth product. So

basically it is an integral controlled system for locking the phase.

(Refer Slide Time 02:54)

Now today we will see all about the frequency locked loop. So as I already explained, what is

common to both these loops is the phase detector. Which is at present we are using the

multiplier low pass filter configuration for the phase detection. And if you want to increase

the loop gain you can put an amplifier with KA as the gain, amplifier gain. And it is

compared with the V reference here.

And this error is amplifier. So ultimately just like any other control loop integral proportional

PID control, we have this steady state error coming to 0 if the loop gain is very large. That

means this voltage sets itself to V reference. V reference is 0, then we have seen that cos phi.

V average at this point ok has to be zero. That mean phi should be pi by 2. That aspect is

followed here also ok. So it is the same topology except that this VC voltage controlled phase

generator is replaced by VCO. Where KVCO is the sensitivity factor of the VCO, which is

now becoming part of the loop gain. So let us see what happens in this case in terms of

understanding the frequency locking.

(Refer Slide Time 04:45)

We know that omega naught by omega I we have shown ok is equal to delta phi naught by

delta phi I here ok. The phase difference is phi ok. If this delta phi I and this is delta phi

naught, we know that in this phase locked loop we have this as KPD divided by 1 + S by

omega LP. Where omega LP is 1 / RC. So and then this has KA as the amplification factor.

And then this is KVCP. This whole thing forms the loop gain. So 1 by 1+1 over loop gain is

what is equal to delta phi naught by delta phi I. If this is delta phi naught, this is delta phi I.

And if that is divided by delta T, common. Then by definition delta phi naught / delta T is

omega naught.

And delta phi I by delta T is omega I. Rate of change of phase is frequency, radian frequency.

This is how we are proving that in the case of frequency as input and frequency as output ok.

Output frequency is going to follow the input frequency. That is why this is a frequency

follower or phase locked loop or frequency locked loop. So that is how we have to discuss the

first effect in terms of whenever frequency change occurs small to a small extent.

We have to consider it as a change in phase. And say that output phase change is going to be

same as input phase change. And that is why output frequency is going to be equal to input

frequency. And the transfer function for omega naught by omega I is also 1 by 1+1 over GL.

This is how we indirectly show that phase locked like this in this case is a frequency locked

loop ok.

So omega naught by omega I now we have shown is delta phi naught by delta phi I =1 / 1+1

over GL. What is this GL? So as far as the phase detector is concerned it takes on the same

sensitivity factor KPD ok. It is converting phase to voltage with the help of the low pass filter

whose transfer function is this. And amplifier is concerned it is KA. Only that part of VCO

since VCO is something that converts the DC voltage input to a frequency.

This is now defined as KVCO. And what we are interested in as far as phase detector is

concerned it is delta phi naught ok which is of interest to us. So delta phi naught that takes

place because the frequency is delta phi naught by delta omega naught ok; delta omega

naught by delta VC. So change of phase with respect to frequency. This is nothing but 1 over

S integration.

So that means this is nothing but KVCO. So VCO can be represented with the output is

exchanged in phase ok by KVCO by S as the transfer function. So that is what is done here

KVCO by S is the transfer function of the VCO when output change in phase is what is

considered ok. So the overall loop gain therefore is KPD KA KVCO which is called the DC

loop gain, GLO but please remember that this is not the ratio.

This is nothing but a frequency in dimension, radians per second. So that divided by S is a

ratio. That into 1 + S by omega LP over here. So this whole thing in this GLO is what is

called the DC loop gain of the phase locked loop, KPD KA into KVCO. So omega LP equal

to 1 over RC.

(Refer Slide Time 10:26)

In which case 1 by 1+1 over loop gain is now going to come as S by GLO into 1 + S by

omega LP. So 1 by 1 + S by GLO plus S squared by GLO into omega LP. So this is a second

order system, 1 / 1 + S by omega N, natural frequency of the system into Q of the system + S

by omega N squared. So the P the PLL, the basic PLL has against the true PLL that we had

discussed earlier.

It is a second order system whereas the basic PLL earlier considered was the first order

system ok. And the omega natural frequency of the PLL is square root of GLO into omega

LP, comparing it. And quality factor is by comparison root of GLO by omega LP. Normally

the GLO is made very high compared to omega LP.

And therefore Q of the PLL is essentially a high Q system. So just like any other control

system which we had considered earlier. We might have to introduce a 0 in the transfer

function ok the low pass filter such that this Q can be brought down to manageable value of 1

or so ok. So the design of the entire system is following exactly same as that of the amplifier,

feedback amplifier or any feedback system. Once you consider it in terms of a phase

following action.

(Refer Slide Time 12:28)

So let us now consider the lock range of this PLL. When VI, input voltage is 0 nothing is

applied to the input. It is an S grounded ok. That is, let us go back to the loop. So here the

input is not connected. Then what happens? This is a multiplier so if 1 input is 0,

theoretically, output has to be 0. That means nothing happens here other than remaining in

whatever state earlier it was or quiescent state ok. And this will remain at a quiescent state.

So VC is at a certain quiescent state ok by design. So let us say it is at VCQ. So the output

frequency is going to be something corresponding to this VCQ which is called omega naught

Q let us say. So if is having an output frequency of omega naught Q, only 1 input is applied.

The other input is not applied. So the multiplier output is 0.

There is some feedthrough. It will be some component of omega naught coming through ok.

But the low pass filter will eliminate it. So nothing happens here. It continues to remain at the

quiescent state of VCQ. And that is called the free running frequency of the PLL.

So that is what is stated here. VI equal to 0, VC is equal to VCQ. Output of the linear VCO, it

is not VCO. This is nothing but VCO is an AC signal with frequency of KVCO into VCQ, if

it a linear VCO. And that is omega naught Q. This frequency is called the free running

frequency of the PLL, FLL and depends upon the gain of the amplifier, its input offset ok and

V reference etc. of the amplifier input.

(Refer Slide Time 14:46)

So quiescent state of the FLL is defined as VI equal to 0 and VC in the operating range. So

VC key Q, setting the VCQ ok such that it is free running at the desirable frequency. We will

just see what the desirable frequency of free running should be later. Is called tuning the PLL.

So setting a desirable omega naught Q is called tuning the PLL. This can be done by setting

the VCQ value or setting the value of RLC that determines the free running frequency of the

VCO. Output of the VCO, once again VCO, has to be VP some VP dash omega naught Q T

plus phi ok. So this is the quiescent state of existence ok.

(Refer Slide Time 16:04)

Now, what is lock range is what we are going to consider. V average is VP VP dash by 20 cos

phi. And therefore now if we apply and input voltage omega, that is input frequency omega I

= omega naught Q. So what is now happening is apply omega I equal to omega naught Q. So

that is what is done.

Then the output frequency can be VP dash sine omega naught QT + phi. It has to be that,

continuing to be that because incoming frequency is same as omega naught Q. So what can

happen? Only the phase shift can be something different. So if phi is the phase shift. No we

have omega I equal to omega naught Q, and omega naught equal to omega naught Q but with

a phase shift of phi; omega naught QT + phi VP dash sine. So this is sine omega naught QT

VP. So the incoming frequency corresponds to VP sine omega naught QT.

Omega naught corresponds to VP dash sine omega naught QT + phi. So the frequency has

remained the same as incoming frequency we have. Only the phase shift. Then output

average is going to be of the low pass filter VP VP dash / 20 cos phi, this V. But this has to be

0 because the frequency should remain same as omega naught Q ok. It should not change.

For it not to change nothing should change at the input of the VCO. That means input of the

VCO should be at VCQ. That means actually this average should have no effect at the output

of the amplifier. That means cos VP VP dash by 20 cos phi should be 0 or cos phi should

automatically get adjusted to pi / 2. Now let us see what happens when omega I changes

away from omega I is not equal to omega naught Q but close to omega naught Q. It can be

higher or lower.

And VC should change around VCQ by an amount = omega naught Q - omega I / KVCO.

That is by definition the linear VCO. So omega naught Q minus omega I is the change in

frequency that is brought about at the output because output frequency should be same as

input frequency. So omega naught Q minus omega I by KVCO is the change in voltage above

VCQ or below VCQ depending upon whether omega I is higher or lower than omega naught

Q.

Input to the amplifier therefore should change by omega naught Q - omega I / KVCO into

KA, the DC gain of the amplifier. This change in V average can be at most be KPD into pi by

2 if it is a linear phase detector. So by definition, the phase can change around pi / 2 on one

side up to pi, on the other side up to 0. That means the extent of total change on either of pi /

2. Pi / 2 is the quiescent phase. So this pi / 2 has to change, can change all the way up to pi.

That mean by an extent of pi / 2 on this side, and pi / 2 on the other side ok.

So KPD into pi / 2 is the maximum change that the linear phase detector is capable of

sustaining ok on either side of the quiescent. So that means this KPD into pi / 2 should be

equal to omega naught Q minus the limit of omega I on either side. So that is called the lock

range, delta omega L which is KVCO KPD KA into / by 2. KPD into pi / 2 into KCVO into

KA. Which is nothing but GLO.

This we have called as the DC loop gain into pi by 2. So that is called the lock range. It is

nothing but the DC loop gain into pi by 2. This is under the circumstance that the amplifier

does not go to saturation before that and the VCO continues to act as a linear VCO all the

way up to that range without any problem. In such a situation the maximum error ok lock

range is going to be this if it is a linear phase detector. So this the best 1 can have as the lock

range on either side of the let us say free running frequency ok.

(Refer Slide Time 22:09)

So once again KPD into pi by 2 is in our case VP VP dash by 10 if VP is the input incoming

frequency magnitude sine wave and VP dash is the output that is square wave. And VP dash

is the output square wave. So both are assumed to be square wave because it is a linear phase

detector we have assumed. So VP VP dash by 10 is the maximum value. So remember that

the lock range depends upon the magnitude of VP VP dash.

For the linear phase detector for a change of maximum phase shift of + or - pi / 2 around pi /

2. This is what I have explained. Amplifier input gets this as the maximum input change

right. So KA into VP VP dash / 10 is the amplifier output change.

Therefore VCO change will be that into KVCO ok around F naught Q. So F naught Q plus or

minus KA into VP VP dash / 10 into KVCO ok. Or it is nothing but ok the delta FL is going

to be plus minus KA KPD KVCO pi by 2 GLO into pi / 2. Which is the lock range around F

naught Q.

(Refer Slide Time 23:57)

So an example has been chosen here. A lock rage is given above if VCO can oscillate in that

range. If the amplifier does not saturate then that is the maximum lock range. So in our case

let us say we had chosen ok VCQ of 10 / 2, 5 volts. That is because in our arrangement ok we

have made the VCO ok this amplifier is removed ok. We are just having no amplifier put

there. We can make the loop gain high by which increasing the KVCO and KPD and

controlling the VP VP dash.

(Refer Slide Time 24:55)

So this is the actual PLL that we are trying out. So 5K 5K attenuator has been put ok. So this

10 volts DC is going to have a quiescent voltage here of 5 volts, 5K 5K so 5 volts is the

quiescent voltage. This is out VCQ ok. And this is going to the VCO that has been designed.

Just in the lecture on VCO we have formulated this Schmitt trigger 2.2K and 1K ok. R2 is

2.2k, R1 is 1K.

And frequency of oscillation of this F naught Q is going to be VCQ by 40 RC into R2 by R1.

This is 2.2K. This is 1K. This R is 1K. This C is 0.1 microfarad. With all this the whole thing

has been designed.

(Refer Slide Time 26:27)

So this will give you sort of F naught Q of 2.75 kilohertz at VCQ of 5 volts. So this is the

example that we have tried. You can see here F naught Q is equal to VCQ by 40 RC into R2

by R1. So this becomes F naught Q as 2.75 kilohertz for the example that we have chosen.

And what is done is VC as VCQ. Cos phi has to be 0 so phi has to be pi / 2. So if I now apply

a phi = 2.75 kilohertz, the phase shift could automatically adjust itself to pi / 2 so that cos pi

is 0.

So this is what is done ok. And delta FL is calculated. It is VP VP dash / 10 ok. That is the

maximum change ok of DC from VCQ that can occur ok at the output of the phase detector

average right. Its input is VP VP dash / 10 ok. And that into half because there is an attenuator

there.

So this also gets attenuated in the loop. So essentially the KPD is going to hogged here, and

then applied to the V VCO. So that into KVCO is the lock range, into KVCO is the lock

range. So you have KVCO as 2.2 ok by 40 into RC, so it is 2.34 by calculation. So the lock

range is 2.75 kilohertz + or -2.34 kilohertz, which is 5 point naught 9 kilohertz ok to 0.41

kilohertz ok. That is the range ok.

(Refer Slide Time 29:17)

So this is what is done VI = 0. Input is connected to ground. Then output frequency happens

to be 2.75 kilohertz. That is what it is. Output frequency is 2.5 and the quiescent voltage we

can see here is nothing but 5 volts, slightly less than 5 volts right. So this is the situation of

the quiescent condition right. You can measure the output frequency. It is close to 2.75

kilohertz.

(Refer Slide Time 29:56)

Now what is happening is FI is going to be made equal to F naught Q. So what should

happen? The phase shift should automatically adjust itself to be 90 degree. So we have this

input adjusted to 10 volts square wave. That is the input waveform, 10 volts square wave.

And this is the output waveform of the VCO ok and you can see that these are exactly in

quadrature with one another, or 90 degree phase shift. So you can see this as the phase locked

at 90 degrees, pi / 2. And you have the 2 omega component at the output of the low pass filter

as expected (())(30:52) triangular waveform. Charging and discharging ok. And causing an

average which is close to the quiescent state ok.

So earlier when it was a DC it was just flat here. And you can see that this is remaining at the

same level ok as the quiescent. But now it is phase locked ok. Now what is done is FI is

changed away from the quiescent frequency of 2.75 kilohertz. So what happens then is what

is described here.

(Refer Slide Time 31:33)

So it is changed to 1.9 kilohertz from 2.75 kilohertz. It has now gone over to 1.9 less ok than

the quiescent. So automatically you can see from the quiescent value of 5 volts it has gone

down. But it is still double the frequency which is appearing at the output of the low pass

filter. And this phase change you can see. Earlier it was 90 degree.

Now it is trying to go out of phase away from 90 degrees right. So that is the change in phase.

That means it is trying to go out of phase because ultimately if it goes to this, this will be 180

degree right. So it is going towards pi on this side.

So this is the output frequency right so. We have purposely made this output different from

the input to show the distinct difference between output and input waveforms. And we have

applied a I think 10 volt supply. So whereas the op amp cannot go all the way up to 10 volts.

It goes up to about some 8.5 volts or so.

(Refer Slide Time 33:11)

Now the frequency is changed to still lower to 1.2 kilohertz, so it goes further down the DC.

So the control voltage is keeping on changing to change the output frequency to the same

value as the input frequency. And the phase shift now again goes towards pi more towards pi

ok. This is the input waveform. This is the output waveform. So you can see it is going

towards pi, almost close to pi, so 1.2 kilohertz.

(Refer Slide Time 33:56)

1.1, just gone out of lock. You can see no longer is it a double the frequency right. It is just

not in sync with the incoming that is the output, incoming frequency is totally different from

the free running frequency. It goes back to the free running frequency and this is the

variation.

This is the beat frequency that is produced ok. That is nothing but omega I - omega naught Q,

beat frequency, which is the output of the low pass filter. That is you can very clearly see that

it is not any longer a DC with double the frequency ok. So this is the incoming frequency

which is much lower than the free running frequency. So this goes back to the free running

frequency.

(Refer Slide Time 35:07)

And now the incoming frequency is above the free running frequency. 2.75 is the free

running frequency and 3.5 is the frequency kilohertz is the frequency of the input. So you can

again see the beautiful locking. And it has gone above 5 volts. Again this is double the

frequency, riding over the average which is close to 7.5 volts.

And you can find out the frequency of oscillation which is close to the incoming frequency of

3.5 kilohertz. Exactly it is in synchronization with the incoming frequency now. Locking is

taking place. What has happened to the phase shift? Now it is coming to be in phase, from the

90 degree quiescent it is coming to be in phase going towards 0 phase. Output, input sorry

input and output.

(Refer Slide Time 36:22)

So again at FI = 3.6 kilohertz. This is 3.5, this is 3.6 kilohertz. It has gone out of lock. So this

is again the beat frequency. It has come back to the free running frequency right. And it is

producing the beat frequency around the free running frequency this way. And then this is the

incoming waveform. So you can see the FM kind of thing right.

(Refer Slide Time 37:09)

Now that is what happens in the capture range. Let us dwell on this for some time. So what

has happened? This is out VC ok, the input to the VCO or the output of the low pass filter

here ok is what is given here versus incoming frequency. So when the incoming frequency is

same as the free running frequency this is at VCQ. VC is at VCQ, so this is the operating

point.

So there this is omega naught Q corresponding to VCQ. And this is nothing but KVCO ok, 1

over KVCO. So if you are now changing giving an input which is same as omega naught Q it

will be VCO input will be at VCQ. So if it higher then this is the change in DC that is

produced which corresponds to omega I - omega naught Q. That is the change ok in

frequency divided by KVCO.

So the slope of this is 1 over KVCO. So it will go on like this all the way up to the lock

range. Then go out of lock. This is what we saw. And on the other side, it will go on all the

way up to this and go out of lock. So first you have to start with omega equal to omega

naught Q to achieve this.

So if it is going out of lock then once it goes out of lock right. This is coming into free run at

omega naught Q right. So this has come down ok. So just let us consider omega I either much

greater than omega naught Q or omega I much less than omega naught Q. This whole thing

was the lock range.

If you start with omega equal to omega naught Q, go all the way up to this. And without

getting lost ok loss of lock, come back ok. You can go all the way. So you can keep swinging

from here to here without any problem as long as you are not going out of lock. But suppose

you go out of lock, there is free running at omega naught Q.

Now if the frequency is in this range, beyond the lock range, obviously, omega I - omega

naught Q or omega naught Q - omega I ok. Both these frequencies are much greater than the

omega LP. Please understand this. Both this omega I minus omega naught Q and omega

naught Q - omega I both these are much greater than omega LP. That means these

components correspond to high frequency.

So whether you are starting at this point or at this point, the difference in frequency

corresponds to a frequency which is much greater than omega LP. Then what happens? No

output change can occur in the low pass. No output can change right. Because low pass filter,

cut off frequency is such that it will not allowing any change.

That means VCO is going to free continue to free run at omega naught Q. So capture cannot

take place. This is the phenomena of capture we are discussing right. We have discussed lock,

range as the range where you start with omega equal to omega naught Q and go on either side

of this where the lock is maintained. But now we are considering a frequency beyond the lock

range.

And if omega I - omega naught Q is much greater than omega LP, until this difference in

frequency ok which is the average ok becomes low enough to let something happen at the

output of the low pass filter. VCO will not change ok. So the capture phenomena is going to

take place mostly depending upon the low pass filter cut off frequency setting. That is though

low pass filter cut off frequency is very low, the capture range is very low around omega

naught Q.

That means until capture takes place ok and lock occurs ok thereafter omega naught is always

following omega I ok. And the low pass filter will let that ok lock all the way up to its limit of

lock range on either side. So this is the capture phenomena. Capture takes place when lock

continues until it goes out of lock.

On this side again, until you come close to omega naught Q ok such that the low pass filter

lets something out so that ok the VCO starts swinging. Until it captures the incoming

frequency and the locking continues all the up to the limit of the lock range on this side. So

this way it comes captures, keeps the lock, and goes out of lock. Again on this side, captures.

So capture range is this range of frequencies. So first for it lock, it has to come within the

capture range. Then it can lock and maintain itself in the lock range ok. So please remember

this. Capture rang is always less than the lock range.

(Refer Slide Time 43:44)

So we are now trying to establish mathematically by making drastic approximations how the

capture range can be roughly evaluated. So closely follow what I am trying to explain.

Omega naught Q minus omega I if it close enough to omega LP, then output of the low pass

filter, if the input to that is assumed to be a sine wave. Which is not the case really because

this is an assumption, drastic assumption in order to simplify the analysis.

So if it is a sine wave of magnitude VP sine omega naught Q - omega IT right. That is the

only component, low frequency component which will be having some effect at the output of

the low pass filter. So what happens to this, this frequency? So this gets attenuated. You call

this as delta omega by square root of 1 plus delta omega CR square.

Because that is the low pass filter, 1 / 1 + SCR; S = J omega. What is J omega? J omega is

now the difference in frequency component delta omega ok. So this is replaced by J delta

omega. So that gets attenuated by this. And it will get subjected to some phase.

That we are not bothered. However this sine wave says that the peak magnitude of change at

the output of the V average is going to be VP divided by square root of this; going to be

attenuated by this much ok. Now this is going to be the input to the VCO around VCQ. So the

VCO frequency is going to change from omega naught Q by plus minus this VP divided by

square root of 1 plus delta omega C CR squared ok into KA into KVCO.

So that is clear, that by definition. So this whole this ok is going to be equal to the limit if this

particular swing of VCO is such that it can at least at some point of time become equal to the

incoming frequency. The probability of capture is high. So this is the maximum swing around

omega naught Q that can take place. So when the maximum swing reaches the incoming

frequency, it is when capture can take place.

Probability of capture is high. If you consider that, then that is the capture range, omega I

minus omega naught Q is the delta omega C limit. This delta omega is also delta omega C. So

this is what the capture range is. VP is strictly speaking nothing by KPD into pi / 2. The

maximum DC voltage that can on either side of quiescent occur.

That is what we have defined earlier. So this is nothing but the lock range as we had earlier

defined. So this delta omega C is therefore + or - the lock range divided by, GL naught into pi

by 2 is the lock range, divided by square root of 1 + capture range squared into CR squared.

So if let us say delta omega C squared into C squared R squared. Which is strictly speaking

nothing but omega LP ok, 1 over CR is omega LP.

So this if it is much greater than 1, this 1 can be ignored. Then delta omega C squared ok is

equal to delta omega L into omega LP. Or capture range is simply square root of lock range

into omega LP. It depends up omega LP and therefore capture range is nothing but square

root of lock range into omega LP if this assumption is valid.

You can assume that this is so and then evaluate it this way and check whether this is so or

not; that is easier. Otherwise you have to solve a quadratic equation here ok.

(Refer Slide Time 48:46)

Now the process of capture or the capture time. This is more complex. So let us again

consider VC versus time. So when a signal comes within the capture range how the capture

takes place is what. That means let us consider that it is at omega naught Q. And an input

frequency which is within the capture range is applied as a step input at the input of the PLL.

A step frequency change. Then how does the capture take place. So at T = 0, what happens is

that omega I ok minus omega naught Q is the instantaneous frequency that is found here. So

that instantaneous frequency change at the output of the low pass filter or the input of the

VCO keeps producing a DC progressively going towards another value.

Corresponding to which the frequency is omega I. So this is the new value ok of DC. Finally

settling down at the output of the low pass or input of the VCO. So that is the settling DC

voltage. But how the DC voltage is generated is that omega I minus omega naught keeps on

changing.

Omega naught keeps one getting adjusted ok such that it produces a DC progressively going

towards the final value. So that means this area is minimal. And this area is ok large ok so

that instantaneously the frequency change occurs this way in order to produce a DC on this

side ok. This time for it to change from this quiescent to the final value is called capture time,

90% of that ok. So from 10% of this to 90 % is the capture time. That also depends upon the

low pass filter, capacitor and time constant.

(Refer Slide Time 51:31)

So coming to the application of the PLL. So VCO is nothing but the FM generator or FSK

generator. This is the FM generator or FSK generator. So this is going to the transmission line

and being received here and applied to the phase detector. Amplifier plus low pass filter and

VCO.

So according to us, if this is an FM, this will be the same FM ok. So this is the FM. So if the

carrier is, now this is an important thing, being received here at a certain value then we have

to tune our VCO such that omega naught Q of this is equal to the omega carrier. Then we

have the maximum deviation possible around omega naught Q. So the phase shift can change

all the way from pi / 2 to, 0 to pi ok.

So that means tuning the PLL in malls, tuning the VCO such that the carrier frequency

corresponds to the omega naught Q. Then what happens here is that, this being put in the

feedback loop. In order to produce the same FM as this, this should have generated the

modulating frequency at the input. So we have here FM detected or FSK detected output.

So if this is a sine wave of certain frequency, the sine wave of same frequency with same

deviation has to be produced here. So we have recovered the modulating frequency at this

point. So FM detection can take place. So we have seen this happening in our system design

lecture on how a feedback can perform the inverse function. So if it a FM generator which is

put in the feedback pa it actually does FM detection.

(Refer Slide Time 53:57)

So this is demonstrated here. You can see that input FM generator is a square wave of

amplitude 250 hertz. And we have the F naught Q of the whole system ok at 2.75 kilohertz

the previous example. To that we have applied the same VCO here with the modulating

frequency here which is nothing but a square wave in this case. Sorry, sine wave in this case.

So of I think we have applied a sine wave here. So of frequency 250 hertz, low enough. So

that this is the modulating input, and this is the output. You can see the amplitudes are the

same ok. So if it is low enough, the amplitudes will be the same ok. That means actually

speaking if you consider F naught by FI.

It is going to be 1, but it can peak and come down. That means the rate of change of phase

should be occurring or frequency should be occurring at a frequency much less than the

natural frequency of the system. Which is nothing but ok omega N is root of DC loop gain

into the what is it, the lock range. Sorry, it is nothing but that into the omega LP. This we had

shown earlier. Please check that, much before.

We had shown here root of GL naught into omega LP is the natural frequency. So the rate of

change of frequency ok. That is the omega M that we have applied should be low enough

compared to omega N. That is the requirement for it to be acting as a frequency follower.

Otherwise distortion will occur ok. This in an important function of the phase locked loop in

FM detection or FSK detection right. It could be a square wave. Again it will produce the

square wave exactly ok with little bit of distortion because of the low pass filter.

(Refer Slide Time 57:09)

Transmission line. So this is what is done. What is signal conditioning here? Actually this is

what is called as repeater station. We have a transmission line carrying the microwave signal

from 1 station to another. But before that it accumulates lot of noise ok as it comes through

the microwave line.

And gets distorted because of the transmission line characteristic. So you have to restore the

signal to noise ratio in increase the signal to noise ratio. So you just put a PLL here, so that

you take the output of the VCO. This is the VCO output here. So it is the same FM or FSK

that is transmitted in the transmission line that is received here. And but restored in strength,

that means power.

And devoid of the additional noise ok. It can further go to a greater distance ok if you have

the repeater station. So this is called the signal conditioning. This is another important

application of the PLL. So you can have many such PLLs containing the different what is that

data from different modems. Put together, received here and restored to higher level of power

and devoid of noise, retransmitted.

(Refer Slide Time 58:59)

Frequency synthesis is what is called as the primary application of the PLL which was first

used by the microwave people. Because they had difficulty in generating stable frequency

sources at that high frequency. So they had to start with crystal frequency and go on to higher

frequencies. So that required the help of efficient multipliers, frequency multipliers. So this is

what comes into picture.

Let us say we have a frequency counter here divide by N counter. This is easily designed and

available. So this FI comes here as FI by N. This is the input frequency to the PLL which also

contains a VCO cascaded with another counter. Divide by M counter let us say.

So this is going to be I mean the new VCO which is the earlier VCO with a divide by M

counter which is programmable ok. Then we have this frequency divided by M becoming

equal to FI by N. This frequency is traced by this output in the PLL ok. So output frequency

is same as input frequency. And this frequency divided by M ok is what is equal to FI by N.

So this frequency is nothing but FI into M by N. So we have F output ok divided by M equal

to FI by N. So F output is M by N into FI. So the such an easy technique of multiplying by an

integer M, and dividing by an integer N. You can get any non-integer value for M by N. So

theoretically you can synthesize highly accurate output frequencies using this.

(Refer Slide Time 01:01:21)

But efficiently you can do it ok for any frequency by incorporating multiplication and

frequency translation together to form a complete accurate frequency synthesis. How do you

do frequency translation? It is simple. Omega I is the input. Omega naught is the output.

This responds to omega I minus omega naught. Omega I plus omega naught is got rid of by

the low pass filter. And if you have an input frequency of delta omega shift that used to be

achieved, this output will be omega I - omega naught + or -, we do not know, delta omega.

Any 1 of these can be sustained.

Any 1 only can be sustained. That means if 1 of this becomes equal to 0, that is DC, that is

ultimately the what the low pass filter lets out, only the DC. Then that is the steady state. That

means omega I can be omega naught can be either equal to omega I ok + delta omega or

omega I - delta omega.

That means it can achieve a highly accurate shift in frequency by delta omega. So it is 1 of

theses components that is sustained as DC. So this is the frequency translation loop combined

with frequency multiplication. It becomes a powerful tool to synthesis accurately ok

frequency components for use in transmitters and receivers.

(Refer Slide Time 01:03:12)

Speed control motors. This is the important application in the present-day speed controls.

Here it is nothing but the PLL. This is the reference oscillator divide by N counter just as

before. So you can get any frequency com as let us say F reference by N. So then we have a

phase detector here as before.

Then the loop filter and the power driver. The motor field grinding so that the speed can be

controlled ok. This con outputs a set of pulses. How is it done? You have a motor, rotor

connected to a disc. This shaft is connected to a disc with perforations here at the

circumference of the disc.

Equidistance, that should be done. So is done by photolithography. This is called optical

tacho. These are available ok. You put a let us say what is called as opto optocoupler, is

nothing but an light emitting diode with a photo transistor in a package. So this produces

nothing but a set of pulses as the light gets caught by the optocoupler right.

It produces pulses and number of pulses produced per second based on the rotation of the

motor will be equivalent to nothing but a VCO right. Voltage controlled oscillator here. So

this again forms a phase locked loop. And the current day speed drives etc. are controlled

essentially by a frequency reference.

Which is much better than voltage reference ok and potential divider arrangement. This is a

very stable input ok. And the future electronics will most probably shifting from voltage or

current reference to frequency or time references. So this 1 such block which is using the

principle of phase locking ok for speed control application.

(Refer Slide Time 01:06:28)

So AM detection also can be carried out in a similar fashion. So what is done here is that the

AM ok comes through a limiter so that amplitude modulation and noise is removed. So

essentially it has the carrier frequency and this gets applied to the phase detector. Comes out

right amplifier + low pass filter. And then the VCO. So VCO now has the carrier frequency

right.

This shifted in phase because there will be in quadrature if omega naught Q is same as the

carrier right. There will be a phase shift of pi / 2. So if there is a phase shift of pi / 2 and then

you multiply ok. Then nothing is detected because 1 is sine phi, another is cos phi. So

whereas we want this to go into the multiplier after a phase shift, preferably of 90 degrees.

So that this is cos omega T and this also is cos omega T; cos squared omega T ok. So it

produces an average corresponding to the detected signal. AM detection is possible. Low pass

filter is put so that the double D frequency component is removed. Only the low frequency

component corresponding to the modulating signal is allowed.

So this is the AM detection scheme. So essentially it is a frequency selective AM detection

right. So it removes the noise here ok. And then generates the (())(01:08:43) carrier with the

in phase component ok, otherwise it is quadrature phase. And then multiplies again to detect

the AM, is synchronized detection.

Synchronization is again the obvious application in television and other receivers, particularly

television receivers, video receivers ok. We have the synchronization pulses necessary,

horizontal and vertical area. Those can be recovered ok from the signal composite video

signal ok using PLLs ok.

So in conclusion, this block PLL is an important block which is essential in present-day

electronic system understanding. Clock recovery also is done as a digital PLL because the

phase detector need not be necessarily the analog multiplier. It can be an xor gate ok and edge

detection can be done in order to find out the phase.

Ok so those digital PLLs and delay locked loop is equivalent to the true PLL that we

discussed earlier. These are the ones which are coming to picture in the present-day era of

pocket switching and clock recovery. Thank you very much.