AN3387 - USB-to-I2S™ Bridging with Microchip USB249xx Hubsww1.microchip.com/downloads/en/Appnotes/AN3387-USB-to-I2... · 2020-02-18 · AN3387 DS00003387A-page 2 2020 Microchip

2020 Microchip Technology Inc. DS00003387A-page 1

INTRODUCTIONThe I2S™ (Inter-IC-Sound) bus is the standard interface for connecting audio devices, such as audio codecs.The USB Audio/Video (AV) Device Class Definition describes among other things the methods used to communicatewith devices containing sound-related functionality. This includes digital and analog audio data with its associated meta-data and the functionality used to control the audio environment, such as volume controls.Microchip USB hubs provide a bridge from USB to an audio device codec via I2S. These devices support only USBDevice Class Definition for Audio Devices Release 1.0. The I2S interface is a five-wire connection to the ADAU1961codec. There is sufficient configuration flexibility to change the settings of Analog Devices ADAU1961 or to implementa different codec.While the audio data to and from the audio codec is through the I2S interface, USB Audio Device control data are trans-ferred through the I2C (master) interface of the hub.For more details regarding the implementation, refer to the device data sheets listed in the References section.

SectionsGeneral Information on page 2Codec Control on page 5Codec Initialization on page 12Run-Time Change on page 14

ReferencesConsult the following documents for details on the specific parts referred to in this document.• Microchip USB24913P Data Sheet• Microchip USB24915P Data Sheet• Microchip USB24915C Data Sheet• Microchip USB24926P Data Sheet• Microchip USB24926C Data Sheet• Microchip Application Note “Configuration of the USB249xx”• UM10204, I2C-bus specification and user manual• USB Device Class Definition for Audio Devices Release 1.0• ADAU1961 Data Sheet• I2S bus specification

AN3387USB-to-I2S™ Bridging with Microchip USB249xx Hubs

Author: Jeffrey HuntMicrochip Technology Inc.

https://www.nxp.com/docs/en/user-guide/UM10204.pdf

https://usb.org/

https://www.analog.com/en/products/adau1961.html

https://www.sparkfun.com/datasheets/BreakoutBoards/I2SBUS.pdf

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DS00003387A-page 2 2020 Microchip Technology Inc.

GENERAL INFORMATIONMicrochip hub USB-to-I2S Bridging features work via host commands sent to an embedded Hub Feature Controller(HFC) within the device, located on an additional internal USB port. In order for the bridging features to work correctly,this internal HFC must be enabled by default. Table 1 provides details on default HFCs settings per device that containsthe I2S Bridge implementation described in this document.

Supported I2S™ Bridge FeaturesIn basic operation, the I2S Bridging interface enumerates as a USB device, which complies with USB Device Class Defi-nition for Audio Devices Release 1.0.By default, the I2S Bridge supports the following audio features:• 48 kHz• 6 bits/sample• Stereo Audio• ADAU1961 audio codecThe I2S Bridge can also be configured by OTP for different audio features and settings or even for a different codec.Communication between the hub and the audio codec takes place over two protocols:• The I2S interface through which the Audio data are transferred• The I2C interface for executing the Initialization and Control operations

CONFIGURABLE FEATURES OF I2S™ BRIDGETable 2 lists the configurable features of the I2S Bridge.

TABLE 1: DEFAULT SETTINGS FOR HUB FEATURE CONTROLLER ENABLEPart Number Part Summary HFC Default SettingUSB24913P 2-Port USB2.0 Multi-Host Reflector PD Hub Enabled by default on Port 3USB24915P 4-Port USB2.0 Multi-Host Reflector PD Hub Enabled by default on Port 5USB24913C 4-Port USB2.0 Multi-Host Reflector Hub Enabled by default on Port 5USB24926P 4-Port USB2.0 Dual Upstream PD Hub Enabled by default on Port 5USB24926C 4-Port USB2.0 Dual Upstream Hub Enabled by default on Port 5

TABLE 2: CONFIGURABLE FEATURES OF I2S™ BRIDGEParameter Supported Values

Sampling Frequency (fs) 8 kHz, 11.025 kHz, 12 kHz, 16 kHz, 22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, and 48 kHz

MCLK Frequency (Multiple of Sampling frequency)

From 1*fs to 1024*fsMCLK can be any arbitrary multiple of fs up to 1024 times fs. How-ever, because the I2S LRCLK signal is derived from the MCLK source, it is recommended that only even-integer-multiples of fs be used.

Audio Sample size 16-bits/sample, 24-bits/sample, and 32-bits/sampleI2S Audio Interface Format I2S mode, Left Justified mode, Right Justified modeI2C Master Control Interface Frequency 100 kHz and 400 kHzAudio channels Mono mode and Stereo modeEnabling and disabling the I2S Bridge interfaces Audio Out only (Speaker Interface)

Audio IN only (Mic Interface)Audio IN and Audio Out (Line Interface)Jack Detection Interface

Jack Detection Audio jack insertion-detection can be enabled or disabled


AN3387PROG Pin AssignmentTable 3 shows the possible PROGx pin connections for I2S signals in USB249xx. This table applies to all USB249xxSKUs. For pin numbers, refer to the corresponding USB249xx data sheet.

Implementation of an Alternative CodecADAU1960/1961 is the default example used with the I2S Bridge, but other codecs can also be used. The followingchecklist can be used to determine if a codec is compatible with the I2S Bridge. In order to be compatible with the I2SBridge, a codec must meet all of the criteria in the I2S™ Bridge Codec Compatibility Checklist section.

I2S™ BRIDGE CODEC COMPATIBILITY CHECKLISTTo be compatible with the I2S Bridge, the codec:• supports I2S Slave mode.• supports configuration via I2C (Slave mode).• does not require an external MCLK signal, or the I2S Bridge is capable of supplying the CLK frequency that the

codec requires.• can accept a LCRLK sampling frequency that the I2S Bridge can provide.• can accept a sample width that the I2S Bridge can support.• has either one or two audio channels.

TABLE 3: PROG PIN ASSIGNMENTSignal Name PROG Pin Assignment

I2S_SDI PROG29/func3, PROG20/func4I2S_SDO PROG32/func3I2S_MCLK PROG30/func3, PROG21/func4I2S_LRCK PROG31/func3, PROG22/func4I2S_SCK PROG28/func3, PROG19/func4I2C_MST_BR_SCL PROG7/func2, PROG10/func2, PROG12/func2, PROG14/func2, PROG16/func2,

PROG18/func2, PROG23/func2, PROG25/func2, PROG31/func2, PROG33/func2I2C_MST_BR_SDA PROG8/func2, PROG11/func2, PROG13/func2, PROG15/func2, PROG17/func2,

PROG24/func2, PROG26/func2, PROG27/func2, PROG32/func2, PROG34/func2MIC_DET (Jack Detection) Can be assigned as an input to any available PROG pin

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FIGURE 1: CODEC COMPATIBILITY IDENTIFICATION

Does codec support I2S Slave mode?

Does codec support configuration via I2C slave?

Does codec require MCLK signal?

Can USB49xx support chosen Sampling Frequency (LRCLK)?

Can USB49xx support chosen Audio Sample width?

Are there more than two Audio channels?

Yes

Yes

No

Yes

Yes

Codec can be supported

X

I2S Slave mode not supported

X

No

Can USB249xx generate MCLK Signal Frequency?

No I2C support

X

X

X

Yes, NOT a Stereo/Mono

Mono/Stereo Audio

No

Yes

Yes

X No

No

Refers to “Codec is not compatible”X


AN3387CODEC CONTROLThe external audio codec is configured through the I2C interface during the Initialization phase. The Initialization proce-dure is a sequence of codec register configurations identified from the codec data sheet. Each register configuration isdone through I2C transaction.The Codec Initialization Buffer (CODEC_INIT_BUFFER_xx) provides memory for storing the data of maximum 75 I2Ctransactions. Each I2C transaction can carry up to 11 bytes of data (not including the Slave address). Byte 0 of eachtransaction indicates the number of bytes that is contained in that transaction.After Initialization, additional codec settings can be modified using CODEC_CUSTOMIZATION registers. CODEC_CUSTOMIZATION registers are located at specific addresses (rather than in a buffer).The names of both the Codec Initialization Buffer and the Codec Customization Registers begin with the letters“CODEC_”.TABLE 4: MODULE REGISTER SUMMARY

Offset Register Name R/W Description0x00 MODULE_IDENTIFIERZ RO Unique Module Identifier0x04 I2S_FEATURE_SEL_REGISTER R/W I2S feature selection register0x08 I2S_OUT_TUNE_REGISTER R/W I2S Out tuning register0x0C CODEC_SPEAKER_LVOL_REGISTER R/W Left channel volume0x10 CODEC_SPEAKER_RVOL_REGISTER R/W Right channel volume0x14 CODEC_SPEAKER_LMUTE_REGISTER R/W Left channel mute0x18 CODEC_SPEAKER_RMUTE_REGISTER R/W Right channel mute0x1C CODEC_SPEAKER_VOL_RESOLUTION_REG R/W Speaker volume resolution0x20 RESERVED (8 Bytes) R/W Do not write0x28 CODEC_I2C_FREQ R/W I2C Frequency0x2A CODEC_SPEAKER_VOL_MIN R/W Minimum volume0x2C CODEC_SPEAKER_VOL_MAX R/W Maximum volume0x2E CODEC_SPEAKER_ZEROVAL_DB_REG R/W Zero volume0x30 CODEC_SPEAKER_INIT_LVOL R/W Initial left volume0x32 CODEC_SPEAKER_INIT_LVOL R/W Initial right volume0x34 RESERVED (4 Bytes) R/W Do not write0x38 CODEC_I2C_SLAVE_ADDR R/W I2C slave address fields0x39 CODEC_I2C_COMMAND_COUNT R/W I2C command count0x3A CODEC_REG_ADDR_SIZE R/W Codec register address size0x3B CODEC_REG_ADDRFIELD_SIZE R/W Address field size0x3C CODEC_SPEAKER_VOL_FIELD_BITSIZE R/W Volume field bit size0x3D CODEC_SPEAKER_MUTE_CONTROL_BITVALUE R/W Speaker mute control bit value0x3E CODEC_SPEAKER_LVOL_FIELD_STARTBIT_POS R/W Left volume field Start bit posi-

tion0x3F CODEC_SPEAKER_RVOL_FIELD_STARTBIT_POS R/W Right volume field Start bit posi-

tion0x40 CODEC_SPEAKER_LMUTE_FIELD_STARTBIT_POS R/W Left mute Start bit position0x41 CODEC_SPEAKER_RMUTE_FIELD_STARTBIT_POS R/W Right mute Start bit position0x42 CODEC_ENABLE R/W Codec enable (supported codec)0x43 Reserved (padding) — —

0x44 ~ 0x107 I2S_AUDIO_INTERFACE_DESCRIPTOR R/W I2S Interface Descriptor0x108 ~ 0x123 I2S_HID_INTERFACE_DESCRIPTOR R/W I2S HID Interface descriptor0x124 ~ 0x143 I2S_STRING_DESC R/W I2S String Descriptor

0x144 CODEC_INIT_BUFFER_xx R/W Code Initialization bufferNote 1: All I2S register addresses are offset from I2S Base Address 0xBF80C000.

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Module Register Details

TABLE 5: MODULE IDENTIFIER REGISTERMODULE_IDENTIFIEROFFSET: 0x00RESET VALUE: 0x10100100

Module unique identifier and version number

Bit Name R/W Description31:16 MODULE_ID RO Always read as 0x101015:0 MODULE_VERSION RO Always read as 0x0100

TABLE 6: I2S™ FEATURE SEL REGISTER I2S_FEATURE_SEL_REGISTEROFFSET: 0x04 RESET VALUE: 0x00

Bit Name R/W Description31:16 RESERVED R/W RESERVED15:8 HID_FEATURE_UNIT_SEL R/W This field controls what units are governed by the HID inter-

face if I2S functionality is enabled through programmable function pins.0x00 - No HID control for speaker and microphone0x01 - Reserved0x02 - HID interface controls only speaker mute0x03 - HID interface controls both speaker mute and micro-phone muteAll other values are reserved.

7:0 I2S_FEATURE_UNIT_SEL R/W This field controls the features exposed out of the I2S interface if enabled through programmable function pins.0x00 - I2S is completely disabled regardless of the state of PF pins.0x01 - Audio IN through microphone is enabled.0x02 - Audio OUT through speaker is enabled.0x03 - Both Audio IN and OUT through microphone and speaker are enabled, respectively.All other values are reserved.

TABLE 7: I2S™ OUT TUNE REGISTERI2S_OUT_TUNE_REGISTEROFFSET: 0x08RESET VALUE: 0x00

Bit Name R/W Description31:16 RESERVED R/W Reserved15:8 I2S_OUT_TUNE_STEPS R/W Configures the amount by which the ROTRIM field will be

incremented or decremented by the firmware on each tune.For example, if ROTRIM is 500 and I2S_OUT_TUNE_STEPS is 10, then upon the next tune, the ROTRIM will be set to 490 or 510 as required.

7:0 I2S_OUT_TUNE_SWING R/W Limits how much ROTRIM field of the REFOTRIM register could be incremented or decremented by the firmware from the initialized value.For example, if the initial value of ROTRIM is 500, a value of 100 in this register limits the firmware to set ROTRIM between 400 to 600.


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Eight bytes are reserved here for backward compatibility.

TABLE 8: CODEC SPEAKER LEFT VOLUME REGISTERCODEC_SPEAKER_LVOL_REGISTEROFFSET: 0x0CRESET VALUE: 0x4023

Bit Name R/W Description31:0 SPEAKER_LVOL_REG_ADDR R/W Address of Left channel Volume register

TABLE 9: CODEC SPEAKER RIGHT VOLUME REGISTERCODEC_SPEAKER_RVOL_REGISTEROFFSET: 0x10RESET VALUE: 0x4024

Bit Name R/W Description31:0 SPEAKER_RVOL_REG_ADDR R/W Address of Right channel Volume register

TABLE 10: CODEC SPEAKER LEFT CHANNEL MUTE REGISTERCODEC_SPEAKER_LMUTE_REGISTEROFFSET: 0x14RESET VALUE: 0x4023

Bit Name R/W Description31:0 SPEAKER_LMUTE_REG_ADDR R/W Address of Left channel Mute register

TABLE 11: CODEC SPEAKER RIGHT CHANNEL MUTE REGISTERCODEC_SPEAKER_RMUTE_REGISTEROFFSET: 0x18RESET VALUE: 0x4024

Bit Name R/W Description31:0 SPEAKER_RMUTE_REG_ADDR R/W Address of Right channel Mute register

TABLE 12: CODEC SPEAKER VOLUME RESOLUTION REGISTER CODEC_SPEAKER_VOL_RESOLUTION_REGOFFSET: 0x1CRESET VALUE: 0x3F800000

Bit Name R/W Description31:0 SPEAKER_VOL_RESOLUTION R/W Speaker Volume Resolution

TABLE 13: CODEC I2C CLOCK FREQUENCY REGISTERCODEC_I2C_FREQOFFSET: 0x28RESET VALUE: 0x0A0D

Bit Name R/W Description15:0 CODEC_I2C_FREQ R/W I2C Clock frequency that is to be used for communication

between the codec and the hub. Supported values are:0x3131 - 100 kHz0x0A0D - 400 kHz

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Four bytes are reserved here.

TABLE 14: CODEC SPEAKER MINIMUM VOLUME REGISTER CODEC_SPEAKER_VOL_MINOFFSET: 0x2ARESET VALUE: 0xFFC7

Bit Name R/W Description15:0 SPEAKER_VOL_MIN R/W Minimum volume for the current codec expressed in (dB/256)

TABLE 15: CODEC SPEAKER MAXIMUM VOLUME REGISTER CODEC_SPEAKER_VOL_MAXOFFSET: 0x2CRESET VALUE: 0xFFFE

Bit Name R/W Description15:0 SPEAKER_VOL_MAX R/W Maximum volume for the current codec expressed in (dB/256)

TABLE 16: CODEC SPEAKER ZERO VOLUME DB REGISTER CODEC_SPEAKER_ZERO_VOL_DBOFFSET: 0x2ERESET VALUE: 0xFFC7

Bit Name R/W Description15:0 SPEAKER_ZERO_VOL_DB R/W Volume level in (dB/256) that corresponds to value 0 in codec

volume register

TABLE 17: CODEC SPEAKER INITIAL LEFT CHANNEL VOLUME REGISTER CODEC_SPEAKER_INIT_LVOLOFFSET: 0x30RESET VALUE: 0xFFF7

Bit Name R/W Description15:0 SPEAKER_INIT_LVOL R/W Initial Volume level in (dB/256) to be set for Left channel

TABLE 18: CODEC SPEAKER INITIAL RIGHT CHANNEL VOLUME REGISTER CODEC_SPEAKER_INIT_RVOLOFFSET: 0x32RESET VALUE: 0xFFF7

Bit Name R/W Description15:0 SPEAKER_INIT_RVOL R/W Initial Volume level in (dB/256) to be set for Right channel

TABLE 19: CODEC I2C SLAVE ADDRESS REGISTER CODEC_I2C_SLAVE_ADDROFFSET: 0x38RESET VALUE: 0x38

Bit Name R/W Description7:0 I2C_SLAVE_ADDR R/W I2C slave address of the codec


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TABLE 20: CODEC I2C COMMAND COUNT REGISTERCODEC_I2C_COMMAND_COUNTOFFSET: 0x39RESET VALUE: 0x11

Bit Name R/W Description7:0 I2C_COMMAND_COUNT R/W Number of I2C commands in the I2C Initialization table. Maxi-

mum allowed value is 75.

TABLE 21: CODEC REGISTER ADDRESS SIZE REGISTERCODEC_REG_ADDR_SIZEOFFSET: 0x3ARESET VALUE: 0x02

Bit Name R/W Description7:0 CODEC_REG_ADDR_SIZE R/W Size of the register address of the codec, expressed in bytes.

TABLE 22: CODEC REGISTER ADDRESS FIELD SIZE REGISTERCODEC_REG_ADDRFIELD_SIZEOFFSET: 0x3BRESET VALUE: 0x01

Bit Name R/W Description7:0 CODEC_REG_ADDRFIELD_SIZE R/W Size of the address field within the register address of the

codec, expressed in bytes.

TABLE 23: CODEC SPEAKER VOLUME FIELD BIT SIZE REGISTERCODEC_SPEAKER_VOL_FIELD_BITSIZEOFFSET: 0x3CRESET VALUE: 0x06

Bit Name R/W Description7:0 CODEC_SPEAKER_VOL_FIELD_BITSIZE R/W Size of the volume field within the volume register

of the codec, expressed in bits.

TABLE 24: CODEC SPEAKER MUTE CONTROL BIT VALUE REGISTERCODEC_SPEAKER_MUTE_CONTROL_BITVALUEOFFSET: 0x3DRESET VALUE: 0x00

Bit Name R/W Description7:0 CODEC_SPEAKER_MUTE_CONTROL_BITVALUE R/W 0x00 - Codec is not muted.

0x01 - Codec is muted.

TABLE 25: CODEC SPEAKER LEFT CHANNEL VOLUME FIELD START BIT POSITION REGISTERCODEC_SPEAKER_LVOL_FIELD_STARTBIT_POSOFFSET: 0x3ERESET VALUE: 0x02

Bit Name R/W Description7:0 SPEAKER_LVOL_FIELD_STARTBIT_POS R/W Starting bit position of the volume field within the

Left channel volume register of the codec

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TABLE 26: CODEC SPEAKER RIGHT CHANNEL VOLUME FIELD START BIT POSITION REGISTER

CODEC_SPEAKER_RVOL_FIELD_STARTBIT_POSOFFSET: 0x3FRESET VALUE: 0x02

Bit Name R/W Description7:0 SPEAKER_RVOL_FIELD_STARTBIT_POS R/W Starting bit position of the volume field within the

Right channel volume register of the codec

TABLE 27: CODEC SPEAKER LEFT CHANNEL MUTE FIELD START BIT POSITION REGISTERCODEC_SPEAKER_LMUTE_FIELD_STARTBIT_POSOFFSET: 0x40RESET VALUE: 0x01

Bit Name R/W Description7:0 SPEAKER_LMUTE_FIELD_STARTBIT_POS R/W Starting bit position of the mute field within the Left

channel mute control register of the codec

TABLE 28: CODEC SPEAKER RIGHT CHANNEL MUTE FIELD START BIT POSITION REGISTERCODEC_SPEAKER_RMUTE_FIELD_STARTBIT_POSOFFSET: 0x41RESET VALUE: 0x01

Bit Name R/W Description7:0 SPEAKER_RMUTE_FIELD_STARTBIT_POS R/W Starting bit position of the mute field within the

Right channel mute control register of the codec

TABLE 29: CODEC ENABLE ADAU1961 REGISTERCODEC_ENABLE_ADAU1961OFFSET: 0x42RESET VALUE: 0x01

Bit Name R/W Description7:0 ENABLE_ADAU1961 R/W 0x00 - Non-ADAU1961 codec

0x01 - ADAU1961 codec


AN3387I2S™ Interface Descriptors

Codec Initialization BufferThere are 75 instances of CODEC_INIT_BUFFER as defined in the following tables.

TABLE 30: I2S™ INTERFACE DESCRIPTORSOffset Sub-descriptors Descriptor

0x44~0x107 INTERFACE_ASSOCIATION_DESC

I2S_AUDIO_INTERFACE_DESCRIPTOR

AUDIO_CONTROL_INTERFACE_DESCAUDIO_HEADER_DESCAUDIO_IN_TERMINAL1_DESCAUDIO_OUT_TERMINAL1_DESCAUDIO_CLASS_FEATURE1_DESCAUDIO_IN_TERMINAL2_DESCAUDIO_OUT_TERMINAL2_DESCAUDIO_CLASS_FEATURE2_DESCAUDIO_STREAM_INTERFACE1_ALT0_DESCAUDIO_STREAM_INTERFACE1_ALT1_DESCAUDIO_STREAMING1_DESCAUDIO_FORMAT1_DESCAUDIO_ISOC_OUT_EP_DESCAUDIO_SPECIFIC_EP_DESC1AUDIO_STREAM_INTERFACE2_ALT0_DESCAUDIO_STREAM_INTERFACE2_ALT1_DESCAUDIO_STREAMING2_DESCAUDIO_FORMAT2_DESCAUDIO_ISOC_IN_EP_DESCAUDIO_SPECIFIC_EP_DESC

0x108~0x123 HID_INTERFACE_DESCI2S_HID_INTERFACE_DESCRIPTORHID_SPECIFIC_DESC

HID_IN_EP_DESC0x124~0x143 STRING_DESCRIPTOR I2S_STRING_DESC

TABLE 31: CODEC INITIALIZATION BUFFER REGISTERCODEC_INIT_BUFFER_XXOFFSET: XX RESET VALUE: XX

Bit Name R/W Description11:1 CODEC_DATA R/W Register Address in the codec + Data to be config-

ured0 CODEC_TRANSACTION_LENGTH R/W Length of Transaction 1

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CODEC INITIALIZATION

EXAMPLE 1: DEFAULT INITIALIZATION SEQUENCEThe following sequence was performed using an engineering sample of USB24915P.This initialization sequence had been created in ROM firmware by placing default values into the Codec InitializationBuffer.This sequence may not be identical for other hubs, or production versions of USB24915P. The sequence is always sub-ject to change and is provided as a typical implementation.The sequence is presented in order of operation and in the order that they appear in the Codec Initialization Buffer, whichare the same. For this ADAU1961 codec, the first operation (address 0x4000) must occur first, but after that the orderis not critical.

TABLE 32: CODEC INITIALIZATION BUFFER ORGANIZATIONAddress Offset Codec Transaction Byte 0 - (Maximum up to 11) Byte 1 to Byte 11

0x144 CODEC_INIT_BUFFER_1 Length of Transaction 1 Register Address in the codec + Data to be configured

0x150 CODEC_INIT_BUFFER_2 Length of Transaction 2 Register Address in the codec + Data to be configured

0x15C CODEC_INIT_BUFFER_3 Length of Transaction 3 Register Address in the codec + Data to be configured

: — Length of Transaction 4 Register Address in the codec + Data to be configured




— — …. —0x4BC CODEC_INIT_BUFFER_75 Length of Transaction 75 Register Address in the codec + Data to

be configured— — —

TABLE 33: DEFAULT INITIALIZATION SEQUENCE

Address Data R/W Register Name: Description(see the ADAU1961 data sheet for additional details)

0x4000 0x01 Write Clock control: Core Enable0x4015 0x80 Write Serial Port Control 0: Dither Enable0x4016 0x20 Write Serial Port Control 1: 32 bits per LRCLK frame0x400A 0x01 Write Record Mixer Left Control 0: Mixer1 Enable0x400B 0x05 Write Record Mixer Left Control 1: Auxiliary Input Gain = 0 dB0x400C 0x01 Write Playback Mixer Left Control 0 Register: Mixer3 Enable0x400D 0x05 Write Playback Mixer Left Control 1: Bypass Gain = 0 dB0x4017 0x00 Write Converter Control 0: Default settings0x4019 0x13 Write ADC Control: Microphone polarity swapped, both ADCs on0x401C 0x21 Write Playback Mixer Left Control 0: Mixer unmuted and enabled


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EXAMPLE 2: MODIFIED INITIALIZATION SEQUENCETo modify the initialization sequence from the default, it is necessary to replace the default Codec Initialization Bufferwith the new, desired values. It is also necessary to replace the entirety of default values, not only the values that areto be changed. A custom initialization sequence must contain at least as many transactions as the default sequence forthe device.In this example, the ADAU1961 codec is initialized with digital microphones enabled.The desired changes are:Register 0x4019 is to contain 0x14.Register 0x4008 is to contain 0x20.

0x401E 0x41 Write Playback Mixer Right Control 0: Mixer 4 unmuted and enabled0x4023 0xC3 Write Playback Headphone Left Volume Control: -17 dB, headphone mute, head-

phone volume enabled

0x4024 0xC3 Write Playback Headphone Right Volume Control: -17 dB, headphone muted, headphone volume enabled

0x402A 0x03 Write DAC Control 0: Both DACs on0x4029 0x03 Write Playback Power Management: Both playback channels enabled0x4022 0x01 Write Playback L/R Mixer Mono Output Control: Mixer 7 enabled0x4023 0xC3 Read Playback Headphone Left Volume Control: -17 dB, headphone muted,

headphone volume enabled

0x4023 0xC1 Write Playback Headphone Left Volume Control: -17 dB, headphone unmuted, headphone volume enabled

0x4024 0xC3 Read Playback Headphone Right Volume Control: -17 dB, headphone muted, headphone volume enabled

0x4024 0xC1 Write Playback Headphone Right Volume Control: -17 dB, headphone unmuted, headphone volume enabled

0x4014 0x60 Write ALC Control 3: ADC muted, Noise Gate enabled

TABLE 34: MODIFIED INITIALIZATION SEQUENCE EXAMPLEBase Address: 0xBF80C000

Offset Length Transaction (hex)0x144 3 40 00 010x15C 3 40 15 800x174 3 40 16 200x18C 3 40 0A 010x1A4 3 40 0B 050x1BC 3 40 0C 010x1D4 3 40 0D 050x1EC 3 40 17 000x204 3 00 19 130x21C 3 40 1C 210x234 3 40 1E 410x24C 3 40 23 C3

TABLE 33: DEFAULT INITIALIZATION SEQUENCE (CONTINUED)

Address Data R/W Register Name: Description(see the ADAU1961 data sheet for additional details)

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RUN-TIME CHANGE

EXAMPLE 3: RUN-TIME CHANGEThe following sequence was performed using an engineering sample of USB24915P.This sequence was initiated by a change in play volume on the host. The host communicated with the USB24915PAudio Device control endpoint through USB in accordance with the USB Audio Device 1.0 Specification, and the I2Sbridge in the USB24915P converted the USB transfers into appropriate codec register controls. The host determinesthe USB transfers that are appropriate for the audio device. For modern hosts, drivers for Audio Device (under USBdefinitions 1.0) are mature and will not require modification.

Note 1: The 0x4023 and 0x4024 register addresses are the default contents of the CODEC_SPEAKER_LVOL_REGISTER and CODEC_SPEAKER_RVOL_REGISTER registers.

0x264 3 00 24 C30x27C 3 40 2A 030x294 3 40 29 030x2AC 3 40 22 010x2C4 3 40 23 C30x2DC 3 40 23 C10x2F4 3 40 24 C30x30C 3 40 24 C10x324 3 40 14 600x33C 3 40 08 20

TABLE 35: RUN-TIME VOLUME CHANGE EXAMPLEAddress Data R/W Data Register name: Description

0x4023 0x01 Read 0xC3 Playback Mixer Left: gain is -9 dB0x4023 0x80 Write 0xC7 Playback Mixer Left: gain is +3 dB0x4024 0x20 Read 0xC3 Playback Mixer Right: gain is -9 dB0x4024 0x01 Write 0xC7 Playback Mixer Right: gain is +3 dB

TABLE 34: MODIFIED INITIALIZATION SEQUENCE EXAMPLE (CONTINUED)Base Address: 0xBF80C000

Offset Length Transaction (hex)


AN3387The USB transfers that caused those register changes to the codec are shown in Figure 2:

Interpretation of USB TransfersThe Audio Device control endpoint had been assigned Address 39 (not shown).• Transfer 2 sets the volume of the Left channel:

- bRequest = 0x01 is the code for SET_ CUR (Set a current attribute).- wValue = 0202 specifies Control Selector 02 (which is Volume Control) and Control Channel 02.- wIndex = 0301 specifies the Output Terminal and Control Channel 01.- wLength = 2 is the length of the data field to follow.- Data = 72 F7 is the code for 114.96 dB of speaker volume.

• Transfer 3 sets the volume of the Right channel:- bRequest = 0x01 is the code for SET_ CUR (Set a current attribute).- wValue = 0201 specifies Control Selector 02 (which is Volume Control) and Control Channel 01.- wIndex = 0301 specifies the Output Terminal and Control Channel 01.- wLength = 2 is the length of the data field to follow.- Data = 72 F7 is the code for 114.96 dB of speaker volume.

• Transfer 4 assures that Mute is off:- bRequest = 0x01 is the code for SET_ CUR (Set a current attribute).- wValue = 0100 specifies Control Selector 01 (Which is Mute Control).- wIndex = 0301 specifies the Output Terminal and Control Channel 01.- wLength = 1 is the length of the data field to follow.- Data = 00 is the code for Mute Off.

There are many audio device attributes and controls in addition to the ones in these three transfers. Refer to USB DeviceClass Definition for Audio Devices Release 1.0 for detailed descriptions of these and other attributes.

FIGURE 2: USB TRANSFERS RESULTING IN VOLUME CHANGE

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APPENDIX A: APPLICATION NOTE REVISION HISTORY

TABLE A-1: REVISION HISTORY

Revision Level & Date Section/Figure/Entry Correction

DS00003387A(02-18-20)

Initial release


AN3387NOTES:

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CUSTOMER CHANGE NOTIFICATION SERVICEMicrochip’s customer notification service helps keep customers current on Microchip products. Subscribers will receivee-mail notification whenever there are changes, updates, revisions or errata related to a specified product family ordevelopment tool of interest.To register, access the Microchip website at www.microchip.com. Under “Support”, click on “Customer Change Notifi-cation” and follow the registration instructions.

CUSTOMER SUPPORTUsers of Microchip products can receive assistance through several channels:• Distributor or Representative• Local Sales Office• Field Application Engineer (FAE)• Technical SupportCustomers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local salesoffices are also available to help customers. A listing of sales offices and locations is included in the back of thisdocument.Technical support is available through the website at: http://microchip.com/support

http://www.microchip.com




Information contained in this publication regarding device applications and the like is provided only for your convenience and may besuperseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NOREPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Micro-chip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and holdharmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly orotherwise, under any Microchip intellectual property rights unless otherwise stated.

TrademarksThe Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo,CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch,MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo,PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. andother countries.

APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero,motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux,TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in theU.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM,ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain,Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net,PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher,SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks ofMicrochip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. inother countries.GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in othercountries.

All other trademarks mentioned herein are property of their respective companies.

© 2020, Microchip Technology Incorporated, All Rights Reserved.

ISBN: 978-1-5224-5634-6

Note the following details of the code protection feature on Microchip devices:• Microchip products meet the specification contained in their particular Microchip Data Sheet.

• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

• Microchip is willing to work with the customer who is concerned about the integrity of their code.

• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.

www.microchip.com/quality


AMERICASCorporate Office2355 West Chandler Blvd.Chandler, AZ 85224-6199Tel: 480-792-7200 Fax: 480-792-7277Technical Support: http://www.microchip.com/supportWeb Address: www.microchip.comAtlantaDuluth, GA Tel: 678-957-9614 Fax: 678-957-1455Austin, TXTel: 512-257-3370 BostonWestborough, MA Tel: 774-760-0087 Fax: 774-760-0088ChicagoItasca, IL Tel: 630-285-0071 Fax: 630-285-0075DallasAddison, TX Tel: 972-818-7423 Fax: 972-818-2924DetroitNovi, MI Tel: 248-848-4000Houston, TX Tel: 281-894-5983IndianapolisNoblesville, IN Tel: 317-773-8323Fax: 317-773-5453Tel: 317-536-2380Los AngelesMission Viejo, CA Tel: 949-462-9523Fax: 949-462-9608Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510New York, NY Tel: 631-435-6000San Jose, CA Tel: 408-735-9110Tel: 408-436-4270Canada - TorontoTel: 905-695-1980 Fax: 905-695-2078

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EUROPEAustria - WelsTel: 43-7242-2244-39Fax: 43-7242-2244-393Denmark - CopenhagenTel: 45-4450-2828 Fax: 45-4485-2829Finland - EspooTel: 358-9-4520-820France - ParisTel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - GarchingTel: 49-8931-9700Germany - HaanTel: 49-2129-3766400Germany - HeilbronnTel: 49-7131-72400Germany - KarlsruheTel: 49-721-625370Germany - MunichTel: 49-89-627-144-0 Fax: 49-89-627-144-44Germany - RosenheimTel: 49-8031-354-560Israel - Ra’anana Tel: 972-9-744-7705Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781Italy - PadovaTel: 39-049-7625286 Netherlands - DrunenTel: 31-416-690399 Fax: 31-416-690340Norway - TrondheimTel: 47-7288-4388Poland - WarsawTel: 48-22-3325737 Romania - BucharestTel: 40-21-407-87-50Spain - MadridTel: 34-91-708-08-90Fax: 34-91-708-08-91Sweden - GothenbergTel: 46-31-704-60-40Sweden - StockholmTel: 46-8-5090-4654UK - WokinghamTel: 44-118-921-5800Fax: 44-118-921-5820

Worldwide Sales and Service

05/14/19

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