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An Inexpensive High Speed Modem for the Universal Serial Bus (USB) Thomas Sailer, HB9JNX/AE4WA, and Johannes Kneip, DG3RBU August 3, 1999 Abstract This article describes a simple and inexpensive modem intended to link end users at 76.8kBit/s to the high speed backbone network. The modem can be connected to standard PC’s using the Universal Serial Bus (USB). 1 Introduction ok rigymus specification 102

An Inexpensive High Speed Modem for the Universal Serial Bus … · 2020. 3. 24. · An Inexpensive High Speed Modem for the Universal Serial Bus (USB) Thomas Sailer, HB9JNX/AE4WA,

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Page 1: An Inexpensive High Speed Modem for the Universal Serial Bus … · 2020. 3. 24. · An Inexpensive High Speed Modem for the Universal Serial Bus (USB) Thomas Sailer, HB9JNX/AE4WA,

An Inexpensive High Speed Modem for the Universal SerialBus (USB)

Thomas Sailer, HB9JNX/AE4WA,and

Johannes Kneip, DG3RBU

August 3, 1999

Abstract

This article describes a simple and inexpensive modem intended to link end users at 76.8kBit/s tothe high speed backbone network. The modem can be connected to standard PC’s using the UniversalSerial Bus (USB).

1 Introduction

ok rigymus specification

102

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3 DESIGN CONSIDERAT/ONS

2 Design Goals

(xlr @ w3s to provide a flexible design that supfmts a wick vxkty of ~lidol7s witbut sacrificing

1 .

2.

3.

4 .

1

ISK (CSRW amqatible) fkm9.6 l&Sit/s up to alxmt 300 l&Sit/s

12CDOAFSK

3 Design Consi

3.1 Microcontroller selection

The U!3B bus specification requires the devims to be able to respond to relatively am#.icatd inquiries.Thisrmcessitatesati~~~~mthedevicedrrakestheinpl~ ‘onofanuSBaDntrdlerma F%GA! inkasible. In 4xill999, we thexefm surveyed the m&et for suitable rdmxmtmllm withbuilt-in fdl speed (12 MBit/s) USB in&Cm engines (table 1).

The AMD 186CC looks i&al for our pqmse on first si@. It is howzver quite emsive, and sinceitdoesdtamtain ~yI-rr=rrpryond-rip,~e~~and~~es,~iteven

“‘Field Programmable Gate Array”: programmable logic devices [I]

103

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104

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3 DESIGN CONSIDERATIONS

Aml%;cx3: 8086Anchorchips AN2131 8 0 5 1 EM3 SRAM, no Wolatile

- -7(X4213, pxqgxietary 8k-B -=sRAM,7a543 13 l~rnsRAn/5-

DMAiIltOl3FOSRAM

Infineon SAB- 8051 8kBRoMJ56BsRfiMCWlU

not yet available,siqde X

Tklel: April 1999rrzkketsurveyforni~II~withusBinterface~

3.2 Power Supply Considerations

2only if the device is connected to a self powered hub

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3.3 Firm ware Download

3.3 Firmware Download

3.4 The FSK Mode

Page 6: An Inexpensive High Speed Modem for the Universal Serial Bus … · 2020. 3. 24. · An Inexpensive High Speed Modem for the Universal Serial Bus (USB) Thomas Sailer, HB9JNX/AE4WA,

3 DESIGN CONSIDERATIONS

P C -USB USB Microcontroller

AN2131Q

b b J

T7F Remote I - -__ - _- - - - -- - - - - - -- -

Control - 11 1 1 -

a wI AnchorChips Interface I+ - RSSI ADC

I t t 1 111 :II FIFO FIFO

I 32x9BitI

32xlOBit ,

FPGA

tt _ 1 t 1HDLC HDLC 1

Decoder Encoder /

t t t 1I

0Descram bler Scrambler IDiff. Decoder Diff. Encoder* ’ __ External

t t t ’ t I ModemI

I i I I I

Analog Circuitry

Diagramofthel3Kmck

3.5 The AFSK Mode

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3.6 Modification of the analog circuitry for AFSK demodulation

alilcR!c~0 1 EXZXR!! -t8CRCbits.Babytesuppkdisdodtcare.10 F!xJxu!w Tmnsnit 8 mw bits, i.e. tithmt feeding thmu@ shdRng

andCR!Cgery=ratcllr. Gnbeusedtotmmrritflags.1 1 ISmmR! Iike1o,additicmdlyi.rIitializesthecRcregistesto~oraes.

low pass filter comparator

3.6 Modification of the analog circuitry for AFSK demodulation

3it is always possible to perfectly fit a straight line through two points

108

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3 DESIGN CONSIDERATIONS

i I

A D / A f--

zd -________- ---+

0 fSl2

Figm 5: SC-c plot ofthequantisahonrwise

J;-

t I-

F------------ --- ---- --I

&A1I ] Decimation Filter ! !

112 vcc, I_----- ----

: FPGAI

I

II LJI Sequencer 1\----------/

109

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3.7 The Demodulator

-30-40-50

-80

-70-80

-90

-1000 low 2ooo

I 1

I I

DDS oscillator

FQut~6sh~madi~oftbeAID~ LChedigitallawpass~mfilter ismalisedasan“m and dun@ ar “boxcar filter”. This filter has m strong sicHd3es in the stop band, but thesesidelcbl~are~l~c~thefilterisvayeasyto~~Figure8showsthe~oftbeckuit inloopbackconfiguration. TIE CXQX& signal aftk ALDamvatm afk the lowpass filter was fedtotldYAcmnmtm inthetranaritpath?hecirccritwasexcitedwitha~s~signalattheinpzt,andtheoutputw rrmsumdusingaltit48kSarrples/sA/D~ Thesignzihmpl~usinga

3.7 The Demodulator

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5 STATE OF THE PROJECT

3.8 The Modulator

The IIKIo&&~~ (figure 9) iq31~ a sine ggmmZmz Because can only in+mznt RDWfs tith very fewaddress M efficiently, the difkulty of this tasklies in producing a gXl simz with only smJl tables. Thet i t aIpfmxim sin(lx-+A] z sinx+~co6x.

3.9 Microcontroller Interface

4 The Analog IO mode

5 State of the Project

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6 Conclusion

7 Outlook

112

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REFERENCES

References

[lo] Hblger l%ka& DEQIQ h!kmdm& m 7h.l?fW?3K-Trmceiver 77F

[ll] Nimpalenxp, Iv3NWy YetA?wtkr9k6ilBmkrnhttp://j~iter.~host~g,cam/-Ilicopal/~/

[12] Janus C chndy, an&Gabor C Tm, C%erxznpZing~~for~dL)/A Ccwtversion, IEEE?Circuits and System society, 1992, ISBNO-87942-285-8

113