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AN ABSTRACT OF A DISSERTATION
ULTRA-WIDEBAND (UWB) IMPULSE RADIO COMMUNICATIONSYSTEM DESIGN AND PROTOTYPING
Qiang (John) Zhang
Doctor of Philosophy in Engineering
Ultra-Wideband (UWB) radio is a revolutionary, power-limited, and rapidlyevolving technology, which employs short pulses with ultra low power for communica-tion and ranging. A UWB impulse radio system does have several advantages, such ashigh data rate, high precision ranging, fading robustness, and low cost transceiver im-plementation. UWB is very promising for low-cost sensor networks. This dissertationdocuments three primary contributions to the UWB state-of-the-art:
The generalized RAKE receiver that estimates and compensates for per-pathpulse waveform distortion has been proposed for UWB communications. The gen-eralized RAKE receiver employs an FIR filter to reconstruct the per-path impulseresponse of a UWB channel, then matches to the composite channel impulse re-sponse. The generalized RAKE receiver can achieve the optimum performance, andits performance is improved significantly in both of single user case and multiple usercase compared with the traditional RAKE receiver.
The MISO time reversal system with an extremely simple receiver has beenproposed to support high data rate transmission in severe multipath environmentsfor robust communications. The system can achieve the performance comparableto coherent reception due to time reversal’s temporal and spatial focusing. Energydetection is chosen as a low-complexity reception technique which eliminates the needfor channel estimation and precise synchronization. The discrete channel models andBER formulas for the energy detector receiver over intersymbol interference (ISI)channels are derived.
The general purpose UWB radio wireless communication testbed with over-the-air synchronization has been built using off-the-shelf components. The develop-ment of the testbed is motivated by the need for low-complexity UWB transceiversfor a wide range of applications, and by the intention to study and validate new con-cepts and ideas on UWB systems. System level design, board level design, FPGAdesign and implementation, and system integration are reported. Two challengingissues, the ultra-high speed (up to GHz) connection between ADC and FPGA andsynchronization for energy detection, have been solved.
ULTRA-WIDEBAND (UWB) IMPULSE RADIO COMMUNICATION
SYSTEM DESIGN AND PROTOTYPING
A Dissertation
Presented to
the Faculty of the Graduate School
Tennessee Technological University
by
Qiang (John) Zhang
In Partial Fulfillment
of the Requirements for the Degree
DOCTOR OF PHILOSOPHY
Engineering
December 2007
Copyright c© Qiang (John) Zhang, 2007
All rights reserved
CERTIFICATE OF APPROVAL OF DISSERTATION
ULTRA-WIDEBAND (UWB) IMPULSE RADIO COMMUNICATION
SYSTEM DESIGN AND PROTOTYPING
by
Qiang (John) Zhang
Graduate Advisory Committee:
Robert Qiu, Chairperson date
Mohamed Abdelrahman date
Jeffrey Austen date
Yung-Way Liu date
Kwun-lon Ting date
Approved for the Faculty:
Francis OtuonyeAssociate Vice President forResearch and Graduate Studies
Date
iii
ACKNOWLEDGMENTS
I would like to express my sincere gratitude to my advisor Dr. Robert Qiu
for guiding my research, allowing me to take on a high-risk hardware project, and
providing me with the resources necessary to carry it out. I would also like to thank
Dr. Mohamed Abdelrahman, Dr. Jeffrey Austen, Dr. Nasir Ghani, Dr. Yung-Way
Liu, and Dr. Kwun-lon Ting for their service on my graduate committee.
I am grateful to my labmates in the Wireless Networking Systems Laboratory,
Chenming (Jim) Zhou, Zhen Hu, Peng Zhang, Yu Song, Satish Kaza, Abiodun E.
Akogun, Martha A. Calderon, and Dalwinder Singh. I appreciate Dr. Terry Guo for
his insightful discussions and help on my research. The dissertation could not have
been accomplished without their support.
I would like to acknowledge Center for Manufacturing Research (CMR) and
Department of Electrical and Computer Engineering (ECE) for providing me with
such an inspirational research environment. I am indebted to Army Research Labo-
ratory (ARL), Office of Naval Research (ONR), National Science Foundation (NSF)
and CMR for their financial support.
Finally, I would like to thank my parents and family for their support and
encouragement.
iv
TABLE OF CONTENTS
Page
LIST OF TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ix
LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x
Chapter
1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Overview of Ultra-Wideband Communication . . . . . . . . . 1
1.2 Motivations . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 Original Contributions . . . . . . . . . . . . . . . . . . . . . 6
1.5 Organization of the Dissertation . . . . . . . . . . . . . . . . 7
2. UWB Generalized RAKE Receiver . . . . . . . . . . . . . . . . . . 10
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 Physics-based Channel Model . . . . . . . . . . . . . . . . . 11
2.3 Generalized RAKE Receiver Structure . . . . . . . . . . . . 15
2.4 Generalized RAKE Receiver for Single User with IntersymbolInterference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.4.1 Signal Detection . . . . . . . . . . . . . . . . . . . . . . 16
2.4.2 Channel Estimation . . . . . . . . . . . . . . . . . . . . 19
2.4.3 Equalizer Coefficients Estimation . . . . . . . . . . . . . 21
2.4.4 Numerical Results . . . . . . . . . . . . . . . . . . . . . 22
v
vi
Chapter Page
2.5 Generalized RAKE Receiver for Multiuser Detection . . . . . 26
2.5.1 Optimum Detection of Signals . . . . . . . . . . . . . . . 26
2.5.2 Channel Estimation . . . . . . . . . . . . . . . . . . . . 30
2.5.3 Numerical Results . . . . . . . . . . . . . . . . . . . . . 32
2.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3. UWB MISO Time Reversal with Energy Detector Receiver over ISIChannels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
3.2 Background Review of the Time Reversal Technique . . . . . 39
3.3 Energy Detection . . . . . . . . . . . . . . . . . . . . . . . . 40
3.3.1 System Description . . . . . . . . . . . . . . . . . . . . . 40
3.3.2 Performance Analysis . . . . . . . . . . . . . . . . . . . . 41
3.4 Energy Detection with Time Reversal . . . . . . . . . . . . 46
3.4.1 System Description . . . . . . . . . . . . . . . . . . . . . 46
3.4.2 Performance Analysis . . . . . . . . . . . . . . . . . . . . 48
3.5 Measurement and Analytical Results . . . . . . . . . . . . . 49
3.6 Implementation Issues of Time Reversal . . . . . . . . . . . . 52
3.7 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
4. General Purpose UWB Radio Testbed Design . . . . . . . . . . . . 55
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.2 Major System Design Considerations . . . . . . . . . . . . . 55
4.2.1 Pulse Generator . . . . . . . . . . . . . . . . . . . . . . . 56
vii
Chapter Page
4.2.2 Modulation Schemes and Receiver Strategies . . . . . . . 56
4.2.3 Synchronization . . . . . . . . . . . . . . . . . . . . . . . 57
4.2.4 Other Issues . . . . . . . . . . . . . . . . . . . . . . . . . 58
4.3 General Purpose Testbed Design . . . . . . . . . . . . . . . . 60
4.3.1 System Design . . . . . . . . . . . . . . . . . . . . . . . 60
4.3.2 Board Level Design . . . . . . . . . . . . . . . . . . . . . 62
4.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
5. General Purpose UWB Radio Testbed Prototyping . . . . . . . . . 69
5.1 Testbed Configuration . . . . . . . . . . . . . . . . . . . . . 70
5.2 High Speed Data Interface . . . . . . . . . . . . . . . . . . . 71
5.2.1 High Speed Analog to Digital Converter . . . . . . . . . 71
5.2.2 Positive Emitter Coupled Logic . . . . . . . . . . . . . . 74
5.2.3 High Speed Interface between ADC and FPGA . . . . . 75
5.3 Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.3.1 Frame Structure . . . . . . . . . . . . . . . . . . . . . . 81
5.3.2 Synchronization Procedure . . . . . . . . . . . . . . . . . 82
5.4 FPGA Coding and Implementation . . . . . . . . . . . . . . 84
5.4.1 Transmitter Coding . . . . . . . . . . . . . . . . . . . . . 84
5.4.2 Receiver Coding . . . . . . . . . . . . . . . . . . . . . . 88
5.5 System Verification . . . . . . . . . . . . . . . . . . . . . . . 95
5.5.1 Measurement Results in the Transmitter . . . . . . . . . 96
viii
Chapter Page
5.5.2 Measurement Results in the Receiver . . . . . . . . . . . 97
5.5.3 System Performance . . . . . . . . . . . . . . . . . . . . 98
5.6 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6. Summary and Future Work . . . . . . . . . . . . . . . . . . . . . . 102
6.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
6.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
VITA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
LIST OF TABLES
Table Page
3.1 Energy ratio (TI = 6 ns). . . . . . . . . . . . . . . . . . . . . . . . 52
4.1 Link budget. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.1 Transmitter FPGA device utilization summary. . . . . . . . . . . . 86
5.2 Receiver FPGA device utilization summary. . . . . . . . . . . . . 95
ix
LIST OF FIGURES
Figure Page
1.1 FCC Spectral Mask for UWB Indoor Communication. . . . . . . . 2
2.1 Pulse distortion in a high-rise building environment. . . . . . . . . 12
2.2 Comparison of the transmitted and received waveform. . . . . . . . . 13
2.3 Generalized RAKE receiver. . . . . . . . . . . . . . . . . . . . . . . 15
2.4 FIR filter implementation. . . . . . . . . . . . . . . . . . . . . . . . 16
2.5 The number of taps affects the accuracy of the FIR representationof the distorted pulse waveform. . . . . . . . . . . . . . . . . . . 23
2.6 Performance comparison in case of no ISI. . . . . . . . . . . . . . . 24
2.7 Performance comparison in case of ISI. . . . . . . . . . . . . . . . 25
2.8 Generalized RAKE for multiuser detection. Estimated channelimpulse response is used in forming the signature waveform gk(t)for the kth user. . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.9 Performance comparison based on decorrelating detector for MUD. 34
2.10 Performance comparison based on MMSE detector for MUD. . . . 35
3.1 Energy detector receiver. . . . . . . . . . . . . . . . . . . . . . . . 41
3.2 MISO configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . 47
3.3 Waveforms at the receive antenna’s output. . . . . . . . . . . . . . 51
3.4 BER comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.1 Transmitter and receiver architectures. . . . . . . . . . . . . . . . 62
4.2 Transmitter FPGA block diagram. . . . . . . . . . . . . . . . . . 67
x
xi
Figure Page
4.3 Receiver FPGA diagram. . . . . . . . . . . . . . . . . . . . . . . 68
5.1 UWB testbed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
5.2 Testbed configuration. . . . . . . . . . . . . . . . . . . . . . . . . 71
5.3 MAX108 simplified function diagram. . . . . . . . . . . . . . . . 72
5.4 MAX108 evaluation board. . . . . . . . . . . . . . . . . . . . . . 73
5.5 PECL output structure. . . . . . . . . . . . . . . . . . . . . . . . 74
5.6 FPGA’s LVPECL receiver termination. . . . . . . . . . . . . . . 75
5.7 Interface board PCB layer stack. . . . . . . . . . . . . . . . . . . 76
5.8 Interface board top layer layout. . . . . . . . . . . . . . . . . . . 77
5.9 Signal waveform with proper termination. . . . . . . . . . . . . . 78
5.10 Signal waveform without proper termination. . . . . . . . . . . . 79
5.11 Clock waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.12 Data eye diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . 80
5.13 Frame structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
5.14 Chip level synchronization. . . . . . . . . . . . . . . . . . . . . . 82
5.15 Transmitter flowchart. . . . . . . . . . . . . . . . . . . . . . . . . 85
5.16 Transmitter behavioral simulation. . . . . . . . . . . . . . . . . . 86
5.17 Rounted FPGA design for the transmitter. . . . . . . . . . . . . 87
5.18 State transition diagram. . . . . . . . . . . . . . . . . . . . . . . 88
5.19 Receiver RTL schematics. . . . . . . . . . . . . . . . . . . . . . . 89
xi
xii
Figure Page
5.20 Receiver flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . 90
5.21 Receiver signal arrival detection. . . . . . . . . . . . . . . . . . . 91
5.22 Receiver synchronization flowchart. . . . . . . . . . . . . . . . . . 92
5.23 Receiver signal processing. . . . . . . . . . . . . . . . . . . . . . . 93
5.24 Receiver behavioral simulation. . . . . . . . . . . . . . . . . . . . 94
5.25 Rounted FPGA design for the receiver. . . . . . . . . . . . . . . . 95
5.26 Transmitter output waveform. . . . . . . . . . . . . . . . . . . . . 97
5.27 Transmitted signal spectrum. . . . . . . . . . . . . . . . . . . . . 98
5.28 Receiver output. . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.29 Receiver output. . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
5.30 System output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.1 UWB testbed roadmap. . . . . . . . . . . . . . . . . . . . . . . . 105
xii
CHAPTER 1
INTRODUCTION
1.1 Overview of Ultra-Wideband Communication
Ultra-Wideband (UWB) radio is a revolutionary, power-limited, and rapidly
evolving technology for short to medium range communications and positioning ap-
plications. UWB technology has been around since 1960s, when it was mainly used
for radar and military applications. Stimulated by the United States Federal Com-
munications Commission (FCC)’s move that allows UWB waveforms to overlay over
other systems, UWB technology has recently attracted a great deal of attention from
academia, industry, and global standardization bodies [1], [6], [16] - [32], [56] - [59].
In 2002, FCC allocated limited use of a huge chunk of spectrum between
3.1 GHz and 10.6 GHz to allow UWB systems overlaying over existing narrowband
systems. UWB transmitter is defined by the FCC as an international radiator that,
at any point in time, has a fractional bandwidth equal to or greater than 0.2 or has
a UWB bandwidth equal to or greater than 500 MHz, regarding less of the fractional
bandwidth. The UWB bandwidth is the frequency band bounded by the points that
are 10 dB below the highest radiated emission, as based on the complete transmission
system including the antenna. The upper boundary is designated fH , and the lower
boundary is designated fL. The fractional bandwidth Bf is defined as
Bf = 2fH − fL
fH + fL(1.1)
FCC Part 15 regulations limit the emitted power spectral density (p.s.d) from
a UWB source measured in a 1 MHz bandwidth at the output of an isotropic transmit
1
2
antenna at a reference distance. The FCC spectral mask for UWB indoor commu-
nication is shown in Fig. 1.1 below. For indoor systems, the average output power
spectral density is limited to -41.3 dBm per MHz, which complies with the long
standing Part 15 general emission limits to successfully control radio interference.
Figure 1.1. FCC Spectral Mask for UWB Indoor Communication.
A typical UWB impulse radio employs short pulses with ultra low power for
communication and ranging. UWB impulse radio system does have several advantages
over other conventional systems [54]:
3
• High data rate wireless transmission - Due to the ultra-wide bandwidth of
several GHz, UWB systems can support more than 500 Mb/s data trans-
mission rate within the range of 10 m, which enables various new services
and applications.
• High precision ranging - Due to the sub-nano second duration of typical
UWB pulses, UWB systems have good time-domain resolution and can
provide sub-centimeter accuracy for location and tracking applications.
• Low loss penetration - UWB systems can penetrate obstacles and thus
operate under both line-of-sight (LOS) and non-line-of-sight (NLOS) envi-
ronments.
• Fading robustness - UWB systems are immune to multipath fading and
capable of resolving multipath components even in dense multipath environ-
ments. The transceiver complexity can be reduced by taking the advantages
of the fading robustness. The resolvable paths can be combined to enhance
system performance.
• Security - For UWB signal, the power spectral density is very low. Since
UWB systems operate below the noise floor, it is extremely difficult for
unintended users to detect UWB signals. Low probability of intercept is
achieved naturally in UWB. The UWB system is also difficult to be inter-
fered with because of its huge bandwidth.
• Coexistence - The unique character of low power spectral density allows
UWB system to coexist with other services such as cellular systems, wireless
local area networks (WLAN), global positioning systems (GPS), etc.
• Low cost transceiver implementation - Because of low power of UWB sig-
nals, the RF chip and baseband chip can be integrated into a single chip
4
using CMOS technology. The up-converter, down-converter, and power
amplifier commonly used in a narrowband system are not necessary for
UWB systems. The UWB noncoherent reception can provide a low cost
transceiver solution for high data rate transmission.
These benefits allow UWB radio to become a very attractive solution for future
wireless communications and many other applications, including logistics, security ap-
plications, medical applications, control of home appliances, search-and-rescue, family
communications and supervision of children, and military applications.
Industrial standards such as IEEE 802.15.3a (TG3a) [58] and IEEE 802.15.4a
(TG4a) [59] have been introduced within 802.15 WG to develop standards based on
UWB technology. The TG3a group was formed in January 2003 with the objec-
tive of providing an higher speed physical layer (PHY) enhancement amendment to
IEEE 802.15.3. The group aimed to develop PHY standards to support data rates
between 110 - 450 Mb/s over short ranges (i.e., ≤ 10 m). Among many proposed
UWB systems for IEEE 802.15.3a are two major proposals: the Multi-Band OFDM
Alliance (MBOA) proposal and the direct-sequence UWB (DS-UWB) proposal. The
MBOA system employs orthogonal frequency-division multiplexing (OFDM) modula-
tion to solve the severe multipath problem. The DS-UWB system uses direct-sequence
spread-spectrum technology and relies on the RAKE receiver to capture signal en-
ergy dispersed over a large number of paths. After 3 years of fighting between two
proposals, TG3a group decided to disband the group in 2006. The TG4a group
was formed in March 2004 with the objective of providing an amendment to IEEE
802.15.4 for an alternative PHY. The aim was to provide communications and high
precision ranging/location capability (1 meter accuracy and better), high aggregate
5
throughput, and ultra low power. The baseline consisted of two optional PHYs con-
sisting of a UWB Impulse Radio (operating in unlicensed UWB spectrum) and a
Chirp Spread Spectrum (operating in unlicensed 2.4 GHz spectrum). In March 2007,
P802.15.4a was approved as a new amendment to IEEE Std 802.15.4-2006 by the
IEEE-SA Standards Board.
However, there are some technical challenges that remain to be solved in order
to develop a UWB system, such as optimum UWB reception, transceiver structure,
UWB pulse generation, power amplifier, antenna, low noise amplifiers, auto-gain
control loop, ultra-high speed (GHz) analog to digital converter (ADC), timing ac-
quisition and synchronization, coding and modulation, ultra-high speed digital signal
processing. Generally speaking, the difficulty of UWB system design and development
is to handle the ultra-wide bandwidth and face the conflict of low complexity/cost
vs. high performance.
1.2 Motivations
Sensor networks with wireless communication and positioning capability be-
come increasingly important for applications in the RF harsh environments, such as
factories, warehouses, intra-vehicles, mines, tunnels and ships. Sensor networks al-
low for efficient control and organization of manufacturing processes and logistics,
cost reduction and increased workplace safety, etc. In the RF harsh environments,
the existing narrowband wireless communication systems suffer from the deep and
fast fading. A system capable of overcoming fading may be expensive. In addition,
the positioning accuracy of narrowband systems is low. The UWB technology with
communication and ranging capability is very promising for low-cost sensor networks.
6
1.3 Objectives
The dissertation is aimed at investigating UWB communication system perfor-
mance of coherent and noncoherent receptions, propose a practical UWB communi-
cation system with high performance and low complexity for sensor networks, design
and prototype a UWB general purpose testbed to support research in the field.
1.4 Original Contributions
The following list highlights the original contributions of the dissertation:
• UWB generalized RAKE receiver - A generalized RAKE receiver that
estimates and compensates for pulse distortion has been proposed and in-
vestigated for UWB communications. It can achieve optimum performance,
while a traditional RAKE receiver suffers from performance degradation
caused by pulse distortion.
• UWB time reversal system with multiple input single output antennas
(MISO) and energy detector - The proposed MISO time reversal system
with an extremely simple receiver can support high data rate transmission
in severe multipath environments for robust communication. The system
satisfies the marketing demand for low cost high-data-rate wireless net-
works, such as sensor networks.
• General purpose UWB radio testbed - The first general purpose UWB radio
wireless communication testbed with over-the-air synchronization has been
built using off-the-shelf components and designed to be flexible enough to
accommodate a number of features. The testbed provides a hardware plat-
form for researchers to study and validate new concepts/ideas on UWB
7
system design. The testbed itself is a complete low-complexity UWB
communication system suitable for a wide range of applications. The im-
plemented FPGA design also serves to prototype a UWB baseband chipset.
1.5 Organization of the Dissertation
The dissertation is organized as follows:
In Chapter 2, the coherent reception is considered for UWB receiver because
of its ability to coherently exploit the rich multipath of the UWB channel and ro-
bustness to intersymbol interference (ISI) and co-channel interference. However, the
performance of RAKE receiver, commonly used in narrowband systems for coherent
detection, will be degraded in UWB if no compensation for pulse distortion is carried
out. This chapter first introduces per-path pulse distortion for UWB communications,
then a generalized RAKE receiver is proposed to estimate and compensate for the
per-path pulse distortion. When an FIR filter representation of the per-path impulse
response is used for generalized RAKE receiver, the new channel estimation problem
has been reduced to a problem that can be handled by an existing signal processing
algorithm, such as successive channel estimation. The generalized RAKE receiver
structure approaches the optimum receiver that is matched to the composite channel
impulse response. The new structure greatly improves the system performance in
both of multiuser case and single user case. With four users considered in simulations
for a high-rise building environment, it is found that the average performance of the
generalized RAKE using MMSE detection is improved over the conventional RAKE
by 1.8 dB. Both synchronous and asynchronous transmission schemes for decorre-
lating detector and minimum mean-square-error detector are examined. The main
drawbacks of the coherent detection are high system complexity, GHz sampling rate,
8
expensive channel estimation and RAKE combining, precise timing synchronization
(typically ±10 ps), and relatively high power consumption. An alternative is to use
a time reversal mirror to compensate for pulse distortion and reduce ISI and inter-
user interference. The scheme of time reversal mirror results in a receiver of low
complexity.
The noncoherent detection is studied in Chapter 3, because it can be realized
without expensive channel estimation and RAKE combining, and the timing require-
ment is also relaxed considerably. The main drawback of the energy detection, one
of noncoherent detection, is the noise and interference enhancement. A UWB MISO
time reversal system with energy detector receiver is proposed and investigated over
ISI channel. The system can achieve the performance comparable to coherent re-
ception due to time reversal’s temporal and spatial focusing. On-off-keying (OOK)
modulation and energy detection are considered due to the low complexity of the re-
ceiver. The discrete channel models and bit error rate (BER) formulas for the energy
detector receiver over ISI channels are derived. The use of a time-reversal technique,
combined with MISO and an energy detector, leads to the extremely simple UWB
receiver structure.
Chapter 4 and Chapter 5 describe the design and prototyping of a general
purpose UWB radio testbed. The testbed is a useful tool to study the UWB system
performance, test schemes and algorithms, verify theoretical and simulation results,
and remove uncertainties caused by channels, hardware and software. System level
design, board level design, FPGA design and system integration are covered. Energy
detection is chosen as a low-complexity reception technique which eliminates the
need for channel estimation and precise synchronization. The dissertation deals with
key blocks associated with system design and prototyping, such as antenna, low noise
9
amplifier (LNA), automatic gain control (AGC) loop, high speed ADC converter, high
speed data interface, FPGA coding and implementation, modulation scheme, timing
acquisition, and adaptive thresholding. The general purpose UWB radio wireless
communication testbed with over-the-air synchronization has been built and tested in
the Wireless Networking Systems Laboratory at Tennessee Technological University.
The dissertation is concluded in Chapter 6. In addition, further work to ad-
vance the testbed is highlighted.
CHAPTER 2
UWB GENERALIZED RAKE RECEIVER
2.1 Introduction
Early research on UWB communications was based on impulse radio. The
channel model for the UWB system is unique due to the frequency dependency of
path attenuation in the multipath channel. Pulse distortion is a challenging problem
in UWB communications [2] - [6]. It has become practically significant after the
concept of frequency dependency was adopted in IEEE 802.15.4a [7].
When a short pulse propagates through a channel, multiple pulses are received
via multipath. The received UWB pulse has pulse shape different from the inci-
dent UWB short pulse. This phenomenon is called pulse waveform distortion. Pulse
distortion can be caused by frequency dependency of the propagation channel and
antennas. The per-path impulse response is introduced to describe pulse distortion
for each individual path. The impact of pulse distortion on the baseband transmission
has been investigated [2] - [6]. It is found that pulse distortion can greatly degrade
the system performance if no compensation is carried out. However, these papers are
restricted to the single user case. Now the previous framework will be extended to
single user with ISI case and the multiuser case. In general, the narrowband results
cannot be directly used in the UWB analysis without reexamination of their valid-
ity. In addition, multiuser detection (MUD) for UWB in absence of pulse waveform
distortion has been considered [12].
The results for MUD in the narrowband and UWB systems in the past are
under the assumption of using a matched filter in the receiver front-end [10], [11]. In
10
11
the single user scenario [4] - [6], the receiver front-end may or may not be matched to
the received distorted pulses at the receiver. The mismatched receiver front-end will
degrade the system performance. As a result, it is natural to compensate for the pulse
distortion to obtain better performance. When pulse distortion is present for each
received pulse in a multipath channel, a generalized RAKE structure is proposed
where pulse distortion is considered in the channel estimation. When multipaths
present, and no pulse waveform distortion is compensated for, a conventional RAKE
receiver structure is reached.
2.2 Physics-based Channel Model
One big challenge of UWB is the per-path pulse distortion caused by the
channel and antennas. Mathematically the generalized channel model is expressed by
h(τ) =
P∑
n=1
Anhn(τ) ∗ δ(τ − τn) (2.1)
where P generalized paths are associated with amplitude An, delay τn, and per-path
impulse response hn(τ) [1] - [6]. The hn(τ) represents an arbitrary function with
finite energy. δ(x) is the Dirac Delta function. The symbol “∗” denotes a convolution
operation defined as
f ∗ g (t) =
∫ +∞
−∞
f(τ)g(t− τ)dτ. (2.2)
Turin’s model, widely used for narrowband channels and some UWB channels, is a
special case of Eq. (2.1) if hn(τ) = δ(τ), ∀n. The per-path impulse response can be
12
expressed as
hn(τ) =An
Γ(−αn)τ−(1+αn)u(τ), Hn(ω) = (jω)αn (2.3)
where αn is a negative real number, and Γ(.) and u(.) are the Gamma function and
the unit step function, respectively. In a special case of αn = α, ∀n, this model
results in the frequency dependency model recently accepted in IEEE 802.15.4a. In
other words, the pulse waveform distortion for all paths is identical in IEEE 802.15.4a
channel model.
UWB
Pulse
Distorted
Pulse r(t)=p(t) h(t)∗
p(t)
d
α
th
Tx
bh
1D
td rd rd
2D
θ
rh rh
Local
Screen
Rx
2rβ
Figure 2.1. Pulse distortion in a high-rise building environment.
Now a general case of Eq. (2.1) is investigated where pulse distortion for two
received paths are different. Since the statistical model of such a form is currently
not available, a physics-based channel model is adopted. As an example, the high-rise
13
building environment, widely studied for a narrowband system [8] - [9], is investigated
for a UWB system. The detailed formulation and simulation are reported in [2]. The
propagation environment illustrated in Fig. 2.1 can be represented by a channel model
in a general form of Eq. ( 2.1). The hn(τ) in Eq. (2.1) causes many challenges in the
signal processing for equalization and MUD. All existing formulation for equalization
and MUD is only valid for the conventional Turin’s model. We need to extend the
current framework to deal with the channel model in Eq. (2.1) where the received
pulse shapes are different from the incident pulse shape shown in Fig. 2.2.
0.5 1 1.5 2 2.5−0.01
−0.005
0
0.005
0.01
Time(ns)
Am
plit
ud
e
0.5 1 1.5 2 2.5−0.01
−0.005
0
0.005
0.01
Time(ns)
Am
plit
ud
e
0 5 10 15 20 25 30 35−0.01
−0.005
0
0.005
0.01
Time(ns)
Am
plit
ud
e
Received pulse1(TD)Received pulse2(FD+IFFT)Transmitted pulse
Received pulse1(TD)Received pulse2(FD+IFFT)Transmitted pulse
FD+IFFTTD
Figure 2.2. Comparison of the transmitted and received waveform.
14
Starting from the physics-based channel model, a FIR filter can be used to
represent the per-path impulse response hn(τ) in Eq. (2.1):
hn(τ) =
M∑
m=1
βmnδ(τ − τmn), (2.4)
where the FIR filter is assumed to have M taps with tap spacing Ts. The received
signal is sampled every Ts seconds. Consequently, the two-dimensional tap-delayed
line channel model is obtained and is rewritten as
h(τ) =
P∑
n=1
M∑
m=1
amnδ(τ − τmn) (2.5)
where amn = Anβmn is the real amplitude of each tap corresponding to τmn, P is the
total number of the generalized paths. With a mapping, the two-dimensional model
is reduced to a one-dimensional discrete model
h(τ) =
L∑
l=1
alδ(τ − τl) (2.6)
where
L = MP,
τl = τ[m+(n−1)M ] = τmn,
al = amn = Anβmn,
15
Receiver front end
P(-t) +
FIR 1
FIR 2
FIR P
T 10
T 20
T P0
r(t ) Y[n] X[n]
Y 1 [n]
Y 2 [n]
Y L [n]
Figure 2.3. Generalized RAKE receiver.
l = m + (n − 1)M, m = 0, 1, . . ., M, n = 0, 1, . . ., P.
The one-dimensional discrete model makes the channel estimation algorithms
used for conventional RAKE receiver applicable to the generalized RAKE receiver.
So, a lot of channel estimation algorithms can be used for the generalized RAKE
receiver.
2.3 Generalized RAKE Receiver Structure
Based on above two-dimensional tap-delayed line channel model, a generalized
RAKE receiver is proposed in Fig. 2.3 to compensate for per-path pulse distortion.
It consists of a front-end filter and a bank of filters associated with delay lines. The
frond-end filter is matched to the transmitted pulse, p(t), which is Gaussian. The
delay Tn for 1 ≤ n ≤ P in Fig. 2.3 is equal to τ1n in Eq. (2.5), which is the delay
16
T m2
T m1
T m(N-1)
X X X
+
X[n]
Y m [n]
m1 m2 mN
Figure 2.4. FIR filter implementation.
for the 1st term signal representation of the nth path signal of channel output. The
per-path signal generation and RAKE combining are implemented by a bank of FIR
filters. The kth FIR filter is implemented in Fig. 2.4. For the delay, Tkj = τk(j+1)−τkj
for 1 ≤ j ≤ M−1, τkj is the delay for the jth term signal representation of the kth path
signal of channel output; αkj is the amplitude for the jth term signal representation
of the kth path signal of channel output. The generalized RAKE mixes the analog
and digital devices. An analog front-end filter can be used. After the front-end filter,
all parts are digital.
2.4 Generalized RAKE Receiver for Single User with Intersymbol
Interference
2.4.1 Signal Detection
Generally, UWB signal is a nonsinusoidal signal with duration less than 1 ns.
The second derivative of the Gaussian pulse is chosen as the UWB pulse and is defined
17
as
p(t) =[
1 − 4π [(t − 0.5T0)/α]2]
e−2π[(t−0.5T0)/α]2 , (2.7)
where α controls the width of the pulse. The pulse is centered at T0/2. Letting α =
0.2 and T0 = 1, the transmitted pulse has duration of 1 ns and bandwidth of 1 GHz
centered at 4 GHz. Let bk be the data sequence consisting of +1 and -1. For binary
phase-shift keying (BPSK) modulation, a modulated signal can be expressed by
s(t) =
∞∑
k=0
bkp(t − kTs), (2.8)
where Ts is the symbol duration.
The received signal r(t) at the front end of receiver can be expressed by
r(t) = h(t) ∗ s(t) + n(t), (2.9)
where h(t) is the channel impulse response, n(t) is white Gaussian noise with zero
mean and variance N0/2.
The output of the matched filter is expressed by
x(t) = r(t) ∗ p(−t), (2.10)
where p(−t) is the time reversal of p(t), the transmitted pulse. The symbol “∗”
denotes the convolution operation.
18
After matched filter, x(t) is sampled at the sampling rate 1/∆. The discrete
output x[n] is expressed as
x[n] = x(n∆), n = 0, 1, 2... (2.11)
where ∆ is chosen to be less than the minimum time difference among rake fingers.
The output of the kth FIR filter yk[n] is expressed by
yk[n] =x[n] ∗ hk[n]
=M∑
i=1
αkix[n − τki], (2.12)
where hk[n] is the impulse response of the kth FIR filter.
After combining, the output y[n] can be expressed by
y[n] =P∑
i=1
yi[n − Ti], (2.13)
where Ti is the delay on the ith branch, and it is equal to τ1i defined in Eq. (2.5).
The rake combining is implemented by a bank of FIR filters. The rake combining
used in the paper is equivalent to equal gain combining (EGC). The parameters of
FIR filters and delay lines can be obtained by channel estimation.
A linear equalizer with 2N +1 taps is used to handle the intersymbol interfer-
ence. The output of the equalizer b[n] is
b[n] =
N∑
k=−N
Cky[n − k] (2.14)
where Ck is the equalizer coefficients.
19
After thresholding, the decision b[n] is made by
b[n] = sgn(b[n]), (2.15)
where sgn(.) is the sign function.
2.4.2 Channel Estimation
All RAKE receivers require knowledge of the channel parameters in order
to detect properly the signal. The channel must be estimated prior to the actual
detection. We use a data-aided (DA) approach [13] [14] where the data frame begins
with a pilot signal sequence bp consisting of Np known pilot symbols. The received
signal r is defined in Eq. (2.9). The covariance matrix C has terms of noise variance
on its diagonal and zeros elsewhere. The successive channel estimation is used for the
one-dimensional discrete channel model. The estimated delay and amplitude are
τ = arg max
∣
∣
∣ξ′(τ)C−1r|2
ξ′(τ)C−1ξ(τ)
, (2.16)
a =ξ′(τ)C−1r
ξ′(τ)C−1ξ(τ)(2.17)
where
[ξ(τ)]m =
NP−1∑
i=0
bP (i)p(mTs − iT − τ), 1 ≤ m ≤ M.
20
Here p(t) with duration T is the transmitted pulse. The above scheme can be
performed iteratively for the multipath channel defined in (2.6). The algorithm is
summarized by the following four steps in [13], originally in [14]:
1. Initialization: set threshold and c (τ) = 0 for τmin ≤ τ ≤ τmax;
2. Perform the searching for the strongest tap τ and calculate α by using the
above equations,
c (τ ) ⇐ c (τ ) + α ,
r ⇐ r − αξ (τ) ;
3. If α ≥ threshold, go to step 2; otherwise set h (τ) = c (τ) and stop.
Using the above successive channel estimation algorithm, the channel impulse
response h(τ) is obtained.
With Eq. (2.4) and Eq. (2.5), the FIR representation of the per-path impulse
response is estimated as hn(τ). When the pulse waveform p(τ) is transmitted, the
estimated received signal is p(τ) ∗ h(τ). For the nth path, the pulse waveform is
qn(τ) = p(τ)∗ hn(τ). If one tap is used in Eq. (2.4), the generalized RAKE receiver is
exactly the conventional RAKE receiver used in narrowband systems. If several taps
(say M) are used in Eq. (2.4), then hn(τ) =M∑
m=1
βmnδ(τ − τmn). Thus, the received
pulse waveform for the nth path is estimated as
qn(τ) =
M∑
m=1
βmnp(τ − τmn). (2.18)
21
The generalized RAKE receiver is designed to match qn(τ), instead of p(τ). The
impulse response of the nth FIR filter is equal to hn(τ).
2.4.3 Equalizer Coefficients Estimation
After channel estimation, the output of generalized RAKE receiver yp can be
expressed by
yp[n] =
P∑
i=0
ypi [n − Ti], (2.19)
for 0 ≤ n ≤ Np − 1. For a MMSE equalizer with 2M + 1 taps , by minimizing mean
square error
1
Np
Np−1∑
n=0
[
M∑
k=−M
Ckyp[n − k] − bp[n]
]2
, (2.20)
the coefficients of the MMSE equalizer are given by
C = R−1r Rxr, (2.21)
where Rr and Rxr are correlation matrix and vector, respectively, defined as
Rr =
Rr(0) · · · Rr(M) · · · Rr(2M)
Rr(−1) · · · Rr(M − 1) · · · Rr(2M − 1)
· · · · · · · · · · · · · · ·
Rr(−2M + 1) · · · Rr(−M + 1) · · · Rr(1)
Rr(−2M) · · · Rr(−M) · · · Rr(0)
(2.22)
22
and
Rxr =
[
Rxr(−M) · · ·Rxr(−1), Rxr(0), Rxr(1) · · ·Rxr(M)
]T
(2.23)
where
Rr(k − l) =1
Np
Np−1∑
n=0
yp[n − l]yp[n − k] (2.24)
and
Rxr(k) =1
Np
Np−1∑
n=0
bp[n]yp[n − k]. (2.25)
2.4.4 Numerical Results
In simulation, the sampling frequency is 80 GHz. The transmitted pulse wave-
form is chosen as the template for the successive channel estimation algorithm.Although
there can be many ways to select a template for the SC algorithm and even multiple
templates can be employed, the general criterion is to choose a template waveform
which has high similarity with the received pulse waveforms. The threshold for this
algorithm is 30 dB down from the maximum amplitude. To achieve an energy cap-
ture loss of less than 4% at around Eb/N0 = 5 dB, if 80 taps are used in the FIR
representation of pulse distortion, a total of 512 pilot symbols is found to be sufficient
in using the successive channel estimation.
Shown in Fig. 2.5 is the impact of the number of terms on the FIR represen-
tation of the first received pulses q1(τ), where q1(τ) is plotted in absence of noise. It
is observed that the number of taps has visible impact on pulse representation, and
23
the distorted pulse at the receiver can be represented by the three strongest terms in
Eq. (2.4) to achieve good fitting accuracy in term of mean squared error.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8−0.02
−0.015
−0.01
−0.005
0
0.005
0.01
0.015
0.02
Time index (ns)
Am
plitu
de
Input pulseReceived signal (no noise)Reconstructed (80 terms)Reconstructed (3 terms)Reconstructed (1 term)
Figure 2.5. The number of taps affects the accuracy of the FIR representationof the distorted pulse waveform.
Illustrated in Fig. 2.6 is the performance comparison in case of no ISI, where
the data rate is 35.1 Mb/s. The performance of the generalized RAKE using different
numbers of taps are bounded by the matched filter bound and conventional RAKE
bound. The matched filter bound is obtained with perfect channel estimation in
Eq. (2.1). The conventional RAKE bound is obtained where the received filter
matches the input pulse waveform, which implies that the pulse distortion is not
24
0 2 4 6 8 10
10−4
10−3
10−2
10−1
100
Eb/No (dB)
BE
R
Matched filter boundGeneralized rake (80 terms)Generalized rake (3 terms)Conventional rakeTheoretical BER for conventional rake
Figure 2.6. Performance comparison in case of no ISI.
considered. The performance of the generalized RAKE receiver with 80 taps is close to
the matched filter bound. The curve of conventional RAKE (one tap representation)
agrees very well with its theoretical curve and is 1.3 dB away from that of the matched
filter bound at BER = 10−3 . The generalized RAKE with there taps representation
is 1.1 dB better than the conventional RAKE.
Fig. 2.7 illustrates the performance of the generalized RAKE receiver with
and without equalizer in case of ISI. The data rate is 40 Mb/s. The same MMSE
equalizer with 25 taps is used for both of the generalized RAKE and the conventional
RAKE receiver. It is observed that the curve of the generalized RAKE with three
25
4 6 8 10 12 14 16
10−4
10−3
10−2
10−1
100
Eb/No (dB)
BE
R
Generalized Rake+Eq.(3 terms)Generalized Rake(3 terms)Conventional Rake+Eq.Conventional Rake
AWGN
Figure 2.7. Performance comparison in case of ISI.
taps representation is 5.6 dB away from the matched filter bound and is 1.0 dB better
than that of the conventional RAKE at BER = 10−3. The equalizer is necessary for
both of the generalized RAKE and the conventional RAKE receiver if ISI occurs.
26
2.5 Generalized RAKE Receiver for Multiuser Detection
2.5.1 Optimum Detection of Signals
Let us consider a DS-CDMA UWB channel that is shared by K simultaneous
users. Each user is assigned a signature waveform g0k(t) of duration T, where T is
the symbol interval. A transmitted signature waveform for the k-th user may be
expressed as
g0k(t) = p(t) ∗
Nc−1∑
n=0
ck(n)δ(t − nTc), 0 ≤ t ≤ T (2.26)
where ck(n), 0 ≤ n ≤ Nn − 1 is a pseudonoise (PN) code sequence consisting of Nc
chips that take values ±1, p(t) is a pulse of duration Tc, the chip interval. Without
loss of generality, it is assumed that K signature waveforms have unit energy.
For simplicity, it is further assumed that binary antipodal signals are used to
transmit the information from each user. Consider a block of N consecutive bits for
each user in an observation window. Let the information sequence of the kth user
be denoted by bk(m), where the value of each information bit may be ±1. It is
convenient to consider the transmission of a block of some arbitrary length, say N.
The data block from the kth user is
bk =√
Ek[bk(1) · · · bk(N)]T (2.27)
27
where Ek is the transmitted energy of the kth user for each bit. The transmitted
waveform is
xk(t) =√
Ek
N∑
i=1
bk(i)g0k(t − iT ) (2.28)
The composite transmitted signal for the K users is
x(t) =
K∑
k=1
xk(t − Tk) =
K∑
k=1
√
Ek
N∑
i=1
bk(i)g0k(t − iT − Tk) (2.29)
where Tk are the transmission delays, which satisfy the condition 0 ≤ Tk ≤ T for
1 ≤ k ≤ K. Without loss of generality, we assume that 0 ≤ T1 ≤ T2 ≤ · · · ≤ TK < T .
This is the model in an asynchronous mode. For synchronous mode, Tk = 0 for
1 ≤ k ≤ K. We assume that the receiver knows Tk.
At the receiver end, the received waveform may be expressed as
r(t) = y(t) + n(t) (2.30)
where n(t) is AWGN, with power spectral density of N0/2. The received signal is
y(t) =√
Ek
K∑
k=1
N∑
i=1
bk(i)gk(t − iT − Tk) (2.31)
where gk(t) is the received signature waveform given by
gk(t) = g0k(t) ∗ h(k)(t) =
[
p(t) ∗ h(k)(t)]
∗Nc−1∑
n=0
ck(n)δ(t − nTc) (2.32)
28
where h(k)(t) is the impulse response of the kth user given in Eq. (2.1). Denoted by
y(k)(t) = p(t) ∗ h(k)(t), the impulse response of the front-end filter is used in forming
gk(t).
When h(k)(t) = δ(t), for all k, Eq. (2.32) reduces to the conventional case [11]
and the conventional RAKE is thus reached. In simulations, the estimated channel
impulse response, h(k)(t), will be used to replace the h(k)(t). With pulse distortion
included in h(k)(t), the receiver structure shown in Fig. 2.8 is called the generalized
RAKE receiver for multiuser detection.
Figure 2.8. Generalized RAKE for multiuser detection. Estimated channelimpulse response is used in forming the signature waveform gk(t) for the kth user.
The optimum receiver is defined as the receiver that selects the most probable
sequence of bits bk(n), 0 ≤ n ≤ N, 1 ≤ k ≤ K given the received signal r(t) observed
over the time interval 0 ≤ t ≤ NT + 2T .
The cross-correlation between pairs of signature waveforms plays an important
role in the metrics for the signal detector and on the performance. The pulse distortion
affects the system through the cross-correlation. We define, where 0 ≤ τ ≤ T and
29
i < j,
ρij(τ) =
∫ T
τ
gi(t)gj(t − τ)dt
ρji(τ) =
∫ τ
0
gi(t)gj(t + T − τ)dt (2.33)
Similarly, we may define
ρ0ij(τ) =
∫ T
τ
g0i (t)g
0j (t − τ)dt
ρ0ji(τ) =
∫ τ
0
g0i (t)g
0j (t + T − τ)dt (2.34)
It is important to connect these cross-correlation functions through the channel im-
pulse response via Eq. (2.32). As a result, it follows that
ρij(τ) = ρ0ij(τ) ∗ [h(i)(t) ∗ h(j)(−t)]. (2.35)
When h(i)(t) = h(j)(t), Eq. (2.35) reduces to the familiar auto-correlation form. Fur-
ther, when h(i)(t) and h(j)(t) can be modeled by the Turin’s model, Eq. (2.30) reduces
to r(t) = x(t) + n(t), which is the conventional form in [11]. Optimum detection and
suboptimum detection using decorrelator and Minimum Mean-Square-Error (MMSE)
detector have been considered for synchronous and asynchronous transmission.
30
2.5.2 Channel Estimation
All the above algorithms require the knowledge of the channel parameters in
order to detect the signal. The channel must be first estimated prior to the actual
detection.
• Optimal ML channel estimation.
Following steps of [14], the received signal can be expressed as
r = Da + η (2.36)
where
[D]jl =
NP−1∑
i=0
bP (i)g0k(jTs − iT − τl),
η is AWGN with two-sided spectral density N0/2, and a is the vector of the channel
amplitude al defined in Eq. (2.6). It is assumed that a frame consists of Np known
pilot symbols bP .
The received channel signal r is Gaussian with mean Da and covariance matrix
C that has terms of noise variance on its diagonal and zeros elsewhere. The optimal
channel estimation is to maximize a function Λ(a, τ) where
Λ(a, τ) = 2r′C−1Da − a′D′C−1Da (2.37)
where τ is a vector of channel path delays τl corresponding to amplitudes al. The
searching for the optimum is complex, and a sub-optimum algorithm is used in the
following.
31
• Successive channel (SC) estimation.
The above optimal channel estimation can be used for a one-tap channel. The
estimated delay and amplitude are
τ = arg max
∣
∣
∣ξ′(τ)C−1r|2
ξ′(τ)C−1ξ(τ)
, (2.38)
a =ξ′(τ)C−1r
ξ′(τ)C−1ξ(τ)(2.39)
where
[ξ(τ)]m =
NP−1∑
i=0
bP (i)g0k(mTs − iT − τ), 1 ≤ m ≤ M.
Here g0k(t) with duration T is defined in Eq. (2.26). The above scheme can be
performed iteratively for the multipath channel defined in Eq. (2.6). The algorithm
is summarized by the following four steps in [14], originally in [13]:
1. Initialization: set threshold and c (τ) = 0 for τmin ≤ τ ≤ τmax;
2. Perform the search for the strongest tap τ and calculate α by using the
above equations,
c (τ ) ⇐ c (τ ) + α ,
r ⇐ r − αξ (τ) ;
3. If α ≥ threshold, go to step 2; otherwise set h (τ) = c (τ) and stop.
32
Using the above successive channel estimation algorithm, the channel impulse
response h(τ) is obtained. In the following, h(k)(τ) is replaced by the estimate h(k)(τ)
for the kth user, and the superscript k can be dropped for convenience.
With Eq. (2.4) and Eq. (2.5), the FIR representation of the per-path impulse
response is estimated as hn(τ). When the pulse waveform p(τ) is transmitted, the
estimated received signal p(τ)∗ h(τ) is used in Eq. (2.32). For the nth path, the pulse
waveform is qn(τ) = p(τ) ∗ hn(τ). Let us consider two cases:
(1) If one tap is used in Eq. (2.4), hn(τ) = β1nδ(τ − τ1), and thus qn(τ) =
β1np(τ − τ1). The matched filter can be implemented with an impulse response of
p(τ), the transmitted pulse waveform. This special case is just the conventional
RAKE receiver used in narrowband and UWB scenario [10] - [14].
(2) If several taps are used in Eq. (2.4), hn(τ) =M∑
m=1
βmnδ(τ − τmn), thus, the
received pulse waveform for the nth path is estimated as
qn(τ) =
M∑
m=1
βmnp(τ − τmn). (2.40)
The matched filter for each user should be designed to match qn(τ), instead of p(τ).
The impulse response of the front-end filter is equal to qn(τ), not p(τ).
2.5.3 Numerical Results
The high-rise building environment shown in Fig. 2.1 is chosen as an example
to examine the generalized RAKE receiver performance for multiuser detection. The
pulse width of the transmitted pulse is the second order Gaussian pulse with width of
0.4 ns. To represent the pulse in high fidelity, in simulation, the sampling frequency
33
is 80 GHz. A spreading code of length 8 is used in the DS/SS based four-user system.
The code is made from a Gold code of length 7 by attaching one chip to each codeword.
The length of codewords is 8.
For the selected propagation channel with sparse impulse response, to isolate
pulse distortion impact, a special signaling format is used to avoid ISI; one pulse per
chip; the spreading waveform lasts 5 ns; data rate 35.1 Mb/s. Another key parameter
for the SC algorithm is the threshold that affects estimation accuracy. In simulation,
the threshold is set to 30 dB down from the maximum amplitude. 512 pilot symbols
are used in channel estimation to guarantee an energy capturing loss less than 4%
for pulse fitting with all terms (80 taps) at Eb/N0 around 5 dB, and less than 1% in
absence of noise.
For MUD, four users are assigned the spreading codes as following: user 1: [-1,
-1, 1, 1, 1, -1, 1, -1]; user 2: [1, 1, 1, -1, -1, 1, -1, -1]; user 3: [-1, 1, 1, -1, -1, 1, 1, -1];
user 4: [1, -1, 1, -1, 1, 1, -1, -1]. In synchronous transmission, the symbol timing at all
transmitters is such that the symbols from each transmitter arrive simultaneously at
the receiver; in asynchronous transmission, the symbol timing between transmitters
is random. It is assumed the receiver knows the received signal energies and the
transmission delays for all users. For asynchronous transmission, the performance
is averaged over 10 random delays. The performance shown in Fig. 2.9 and Fig.
2.10 is for user one. Here only one term (labeled “conventional decorrelator”) and
three terms (labeled “G-decorrelator” meaning generalized RAKE) are considered to
represent a single distorted waveform.
The performance of decorrelating receiver is given in Fig. 2.9. The upper
three curves are for synchronous transmission for user one. The circle dotted curve
34
0 2 4 6 8 10 12 14
10−4
10−3
10−2
10−1
100
Eb/No (dB)
BE
R
Single user (Matched filter bound)G−decorrelator (3 terms), async. trans.Conventional decorrelator, async. trans.Theoretical BER for sync. trans.G−decorrelator (3 terms), sync. trans.Conventional decorrelator, sync. trans.
Figure 2.9. Performance comparison based on decorrelating detector for MUD.
is obtained from the closed form and can serve as the lower bound for the perfor-
mance of synchronous transmission with different number of taps. Here only one
tap (labeled “conventional decorrelator”) and three taps (labeled “G-decorrelator”
meaning generalized RAKE) are considered to represent a single distorted pulse in
simulations. The two curves immediately above the matched filter bound are for
asynchronous transmission. For synchronous transmission, the generalized decorre-
lator (three taps) is 0.45 dB away from the theoretical lower bound, and is 1.3 dB
better than the conventional decorrelator (one tap). For asynchronous transmission,
the generalized decorrelator (three taps) achieves 1.7 dB gain over the conventional
35
0 2 4 6 8 10 12 14
10−4
10−3
10−2
10−1
100
Eb/No (dB)
BE
R
Single user (Matched filter bound)G−MMSE detector (3 terms), async. trans.Conventional MMSE correlator, async. trans.G−MMSE detector (3 terms), sync. trans.Conventional MMSE detector, sync. trans.
Figure 2.10. Performance comparison based on MMSE detector for MUD.
decorrelator (one tap). The conventional decorrelator detector (one tap) for syn-
chronous transmission is about 4 dB in Eb/N0 at BER = 10−3 from the decorrelator
detector with the generalized RAKE (three taps) for asynchronous transmission.
Fig. 2.10 shows the performance of MMSE detector for user one. The solid line
is the matched filter bound. The upper two curves are for synchronous transmission,
while the two curves immediately above the matched filter bound are for asynchronous
transmission. For synchronous transmission, the generalized MMSE detector (three
taps) performs 1.2 dB better than the conventional MMSE detector (one tap). For
asynchronous transmission, the generalized MMSE detector gains 1.1 dB compared
36
with the conventional MMSE detector. For MUD, the system performance also de-
pends on the codes assigned to users. The performance improvement averaged over
four users by using the generalized MMSE detector (three taps) is about 1.8 dB over
the conventional MMSE detector (one tap). Based on the study, pulse distortion has
larger impact on the performance of MUD than that of the single user detection. The
conventional MMSE detector (one tap representation) for synchronous transmission
is more than 3 dB in Eb/N0 at BER = 10−3 from the MMSE detector with the
generalized RAKE (three taps representation) for asynchronous transmission.
Based on Fig. 2.9 and Fig. 2.10, the MMSE detector with the generalized
RAKE (three taps) is the best among all those schemes considered and only 1 dB
from the matched filter bound at BER = 10−3. By using this scheme about 0.5 dB
can be further gained by using more taps (say 80 taps) in the FIR filter representation.
2.6 Conclusions
Per-path pulse distortion is introduced for the first time in multi-user detection
for ultra-wideband communications. A generalized RAKE structure that estimates
and compensates for the pulse distortion is used to approach the optimum receiver.
The optimum receiver can be also realized through time reversal communications
to simplify the complex task of channel estimation at the receiver. The generalized
RAKE structure greatly improves the system performance. With simulations for a
high-rising building environment, it has been shown that the average performance of
the MMSE receiver is improved over the conventional one by 1.8 dB in bit energy
to noise ratio at BER = 10−3. A time reversal mirror can be used to compensate
for pulse distortion and reduce ISI and inter-user interference. The scheme of time
reversal mirror with MUD will prove to be useful to receivers of low complexity.
CHAPTER 3
UWB MISO TIME REVERSAL WITH ENERGY DETECTOR
RECEIVER OVER ISI CHANNELS
3.1 Introduction
Due to potentially low complexity and cost of a transceiver, suboptimal re-
ception strategies, such as transmitted reference (TR) [21] - [25], autocorrelation
demodulation (ACD) [26] - [28] and energy detection [29] - [32], become attractive for
UWB applications. However, these types of systems suffer from several dB perfor-
mance degradation compared to the coherent receiver in the environments with pure
line of sight (LOS). In multipath case and when ISI occurs, these systems perform
very poorly, and traditional equalization techniques may not work properly, because
these suboptimal schemes’ equivalent discrete channels exhibit nonlinear behavior [23]
[28].
One unique characteristic that differentiates a UWB system from a narrow-
band system is the UWB propagation channel. The impulse response of a UWB
channel contains a large number of resolvable components coming through different
paths, especially in indoor environments. A few transmitter-side enhancements were
proposed to reduce multipath spread impact. Channel shortening is a technique that
was introduced in 1970s and aimed at using an optimal filter at the transmitter to
reduce channel memory and simplify equalizer at the receiver [39]. Mathematically,
a channel inverse pre-filter is necessary to fully eliminate multipath effect. Generally
speaking, precoding techniques can be used to improve system performance close to
channel capacity.
37
38
Time reversal, used in underwater and acoustics areas for many years, is an
emerging technique that takes advantage of the unique properties of UWB channels.
Time reversal can be thought as one of precoding technologies. Although a time
reversal pre-filter does not approach the optimum, the overall time reversal processing
is much simpler than doing inverse filtering.
Normally, a high data rate means a system with high complexity, thus system
cost is high. One difficulty at high data rate is in dealing with ISI. Traditional ISI
mitigation techniques include equalization, RAKE and OFDM, and all of them are
expensive solutions that use coherent detection and require channel estimation at the
receivers. Time reversal’s temporal focusing mechanism, which condenses signal and
reduces ISI impact, makes it possible to use a simple receiver to communicate at
high data rate with insignificant performance degradation. Note that time reversal
needs additional signal processing resources. This processing is at the transmitter
side, and the processing complexity can be reduced [28]. Take downlink transmission
in a centralized network as an example. The transmitter is in the base station and
can be very powerful in term of computational capability. In addition, a sharpened
signal would enable narrow-window integration that reduces noise accumulation with-
out remarkably affecting signal energy collection, which is greatly in favor of some
low-complexity suboptimal receivers, such as the ACD receiver and energy detector
receiver. By using time reversal and employing non-coherent detection at the receiver,
the cost-vs.-data-rate issue can be softened to some extent.
39
3.2 Background Review of the Time Reversal Technique
The time reversal technique is similar to retrodirective array in microwave [42]
- [43] and phase-conjugation in optics [44]. The original motivation of time reversal
was to use the ocean as a correlator in saving calculation of correlation, limited by
the computing capabilities of 1960s. Fink is initially motivated [33], [45] - [46] to use
time-reversal to compensate for pulse shape distortion.
The first use of time-reversal for UWB communications is done at Stanford
University [35]. The first paper is probably [47] where the data measured by Intel
using the vector network analyzer (VNA) is used. Similar VNA-based measurements
are done for microwave and electromagnetic at Carnegie Mellon University [48].
The principle of time reversal follows. Consider downlink data transmission
from a base station to a node. Assume the uplink and downlink channels are recip-
rocal [38] [49], and both have the same CIR denoted by h(t) . The node first sends
a pilot pulse ptx(t) to the base station via the uplink. If the background noise is
ignored, the base station receives the pilot waveform h(t) ∗ ptx(t), where “∗” denotes
convolution operation. A pre-filter whose impulse response is a time-reversed version
of the estimated pilot waveform is placed at the base station. Finally, the base station
sends information data via an equivalent downlink channel consisting of the pre-filter
and the actual propagation channel. An equivalent channel would have an impulse
response he(t) = ptx(−t) ∗ [h(−t) ∗ h(t)]. Due to the random-like h(t), the equiva-
lent CIR he(t) has a sharp profile. Since the equivalent CIR is location-dependent,
the transmitted signal is concentrated in time at an intended location but widely
dispersed in time at other locations. This location-dependent profile sharpness is
also called spatial focusing. The temporal focusing feature can soften the impact of
40
ISI, while the spatial focusing feature can be utilized to transmit information to an
intended location with limited signal leakage at other locations.
3.3 Energy Detection
To isolate issues, the discussion is limited to a single user scenario, and the
channel is assumed to remain static during a data burst (approximately in order of
100 µs [19]). Consider a transmitter-receiver link with CIR h(t). An ideal low-pass
filter with one-sided bandwidth W is placed at the receiver’s front-end, where W is
chosen such that the impairment on the received signal due to filtering is negligible.
3.3.1 System Description
The energy detector receiver structure is shown in Fig. 3.1. The transmitted
signal with binary OOK modulation is
Stx(t) =∞∑
j=−∞
djwtx(t − jTb), (3.1)
where Tb is the bit duration, wtx(t) is the transmitted bit waveform defined over
[0, Tb), and dj ∈ 0, 1 is j-th transmitted bit. For the binary signal, the symbol
duration Ts is equal to the bit duration Tb; wtx(t) is also the transmitted symbol
waveform. Without loss of generality, it is assumed that the minimal propagation
delay is equal to zero. The received signal at the output of the receiver front-end is
r(t)=h(t) ∗ Stx(t) + ν(t)
=
∞∑
j=−∞
djwrx(t − jTb) + ν(t), (3.2)
41
BPF z k
V T
Square Law
∫
( )dt
Figure 3.1. Energy detector receiver.
where h(t) is the CIR that takes into account the overall effect of the RF front-end
circuits at both the transmitter and receiver, ν(t) is a low-pass additive zero-mean
Gaussian noise with one-sided bandwidth W and one-sided power spectral density
N0, and wrx(t) is the received symbol “1” waveform given by
wrx(t) = h(t) ∗ wtx(t). (3.3)
An energy detector receiver performs squaring operation, integration over a given
time window, and threshold decision. Corresponding to the time index k, the k-th
decision variable at the output of the integrator is given by
zk =
∫ (k+1)Tb
kTb
r2(t)dt. (3.4)
3.3.2 Performance Analysis
Assume the effect of a single input bit dk lasts N = ceil(Tm/Tb) symbols, where
Tm is the multipath excess delay in time.
42
Substituting (3.2) into (3.4), and taking into account a multipath excess delay
of N symbols, it follows that
zk =
∫ (k+1)Tb
kTb
[
k∑
j=k−N+1
djwrx(t − jTb) + ν(t)
]2
dt
=
∫ Tb
0
[
N−1∑
j=0
dk−jwrx(t + jTb) + ν(t + kTb)
]2
dt
=
∫ Tb
0
[
N−1∑
j=0
dk−jwrx(t + jTb)
]2
dt + ηk, (3.5)
where ηk is a noise term given by
ηk =∫ Tb
0
[
2N−1∑
j=0
dk−jwrx(t + jTb)ν(t + kTb) + ν2(t + kTb)
]
dt.
(3.6)
Define matrices C as
C =
c0,0 c0,1 · · · c0,N−1
c1,0 c1,1 · · · c1,N−1
......
...
cN−1,0 cN−1,1 · · · cN−1,N−1
, (3.7)
ci,j =1√EbTb
∫ Tb
0
wrx(t + iTb)wrx(t + jTb)dt
=cj,i. (3.8)
43
then Eq. (3.5) can be rewritten as
zk = ~dT C~d + ηk
~d = (dk, · · · , dk−N+1)T (3.9)
which means the signal part in the output of the equivalent discrete channel (repre-
sented by ~dT C~d) is a nonlinear function of data vector ~d. As a matter of fact, the
equivalent discrete channel is a special case of second-order Volterra model [23]. The
decision variable zk contains a desired signal d2kc0,0, a non-Gaussian noise term ηk, and
a nonlinear ISI component that cannot be well handled by normal linear equalization
techniques.
Let VT be the decision threshold. Two types of erroneous probabilities for a
given data vector are defined as:
P0(~d, dk = 0) = Pr(zk > VT |~d, dk = 0),
P1(~d, dk = 1) = Pr(zk ≤ VT |~d, dk = 1). (3.10)
The BER can be calculated based on the above two types of probabilities by averaging
over all possible combinations of previous transmitted bits:
Pb =1
2N
∑
~ddk=0
P0(~d, dk = 0) +∑
~ddk=1
P1(~d, dk = 1)
, (3.11)
where equal probability of sending “0” bit and “1” bit has been used. It is well-
known that the decision variable zk has a Chi-square distribution with 2TbW degree
of freedom [40], implying that BER calculation is not an easy job, especially when ISI
44
exists. A related problem is to calculate the probability of false alarm and probability
of detection. A number of approximate approaches to this issue can be found in the
literature [30] [31] [41]. Among these approximating methods is Park’s model that is
suitable for all ranges of TbW , and it will be employed in this dissertation to compute
BER. From the definition (3.10), P0(~d, dk = 0) is a probability of detection if ~d 6= ~0,
and it is a probability of false alarm if ~d = ~0; but whatever ~d is, P1(~d, dk = 1) is a
probability of missing. According to Park’s model, the probability of detection and
the probability of false alarm Pf (which is defined as Pf = P0(~d = ~0, dk = 0)) are
approximately associated with a signal-to-noise ratio (SNR) SNR(~d, dk = 0):
P0(~d, dk = 0) = Q
(
Q−1(Pf) −√
SNR(~d, dk = 0)
)
, (3.12)
where the Q-function is given by
Q(x) =1√2π
∫
∞
x
e−y2/2dy. (3.13)
Q−1(x) is its inverse function. For a given data vector ~v, the SNR is defined as
SNR(~v) =2TbW
[
~vT C~vTbWN0
]2
2.3 + ~vT C~vTbWN0
. (3.14)
Similarly, the probability of missing can be approximately expressed as
P1(~d, dk = 1)=1 − Q
(
Q−1(Pf ) −√
SNR(~d, dk = 1)
)
=Q(
√
SNR(d, dk = 1) − Q−1(Pf))
. (3.15)
45
Note, the probability of false alarm Pf is an unknown variable which is dependent
of the decision threshold VT . The threshold for energy detection is very critical, and
there is an optimum threshold for lowest error rate. For non-ISI case, Paquelet et al.
provided a way to calculate the optimum threshold [31], and it is shown the optimum
threshold is very close to the threshold which makes the probability of false alarm
equal to the probability of missing [30]. To deal with ISI situation, it is proposed to
set a threshold based on two worst signal cases corresponding to
P0,max = max~d,dk=0
P0(~d, dk = 0) (3.16)
and
P1,max = max~d,dk=1
P1(~d, dk = 1), (3.17)
or equivalently, corresponding to
SNR0,max = max~d,dk=0
SNR(~d, dk = 0) (3.18)
and
SNR1,min = min~d,dk=1
SNR(~d, dk = 1). (3.19)
The threshold is chosen such that Pd,max = Pm,min, or
Q(
Q−1(Pf) −√
SNR0,max
)
= Q(
√
SNR1,min − Q−1(Pf))
. (3.20)
46
Solving the above equation for Q−1(Pf ) yields
Q−1(Pf) =
√
SNR0,max +√
SNR1,min
2. (3.21)
Thus Eq. (3.12) and Eq. (3.15) can be rewritten as
P0(~d, dk = 0) =
Q
(
√
SNR0,max +√
SNR1,min
2−√
SNR(~d, dk = 0)
)
, (3.22)
P1(~d, dk = 1) =
Q
(
√
SNR(~d, dk = 1) −√
SNR0,max +√
SNR1,min
2
)
. (3.23)
3.4 Energy Detection with Time Reversal
3.4.1 System Description
Time reversal does not work without knowing the channel. As mentioned
in the previous section, the channels in both links are assumed to be reciprocal,
and the node sends a pilot signal via uplink channel prior to data transmission.
Based on the received sequence of pilot waveforms, the base station performs channel
estimation. To focus on central issues, the perfect channel estimation is assumed. A
MISO time reversal configuration is conceptually illustrated in Fig. 3.2, where there
are M transmit antenna elements targeting at one receive antenna, cm(t) is the pre-
filter connected with the antenna element m, and hm(t) is the CIR for the channel
associated with the m-th transmit antenna element and the receive antenna. The
47
C 1 (t)
C 2 (t)
C m (t)
Rx
Tx
. . .
h 1 (t)
h 2 (t)
h m (t)
. . .
Figure 3.2. MISO configuration.
received waveform is given by
r(t)=∞∑
j=−∞
dj
M∑
m=1
cm(t − jTb) ∗ hm(t) + ν(t)
=
∞∑
j=−∞
djyrx(t) + ν(t), (3.24)
where yrx(t) is the received symbol “1” waveform defined as
yrx(t) =M∑
m=1
cm(t − jTb) ∗ hm(t). (3.25)
Let ptx(t) be the transmitted pilot pulse, and prx,m(t) = ptx(t)∗hm(t) the pilot
signal received from the antenna element m at the base station. The pre-filter can be
set as
cm(t)=amwtx(t) ∗ prx,m(−t)
=amwtx(t) ∗ ptx(−t) ∗ hm(−t), (3.26)
48
where am is the weight with respect to the antenna element m. If the equal transmit
power distribution among the M transmit antenna elements is considered, the weights
can be determined by
am ∝∫
∞
−∞
[wtx(t) ∗ prx,m(−t)]2dt
−1/2
,
1 ≤ m ≤ M. (3.27)
3.4.2 Performance Analysis
Note, if the pre-filter’s impulse response lasts T0 (≤ Tm) seconds, then the
overall CIR would last T0 +Tm seconds, and the peak would appear at the instant T0.
The lower-end and upper-end boundaries for k-th received symbol are kTb +T0−Tb/2
and kTb + T0 + Tb/2, respectively. Define
N1 = ceil
(
T0 − Tb/2
Tb
)
, N2 = ceil
(
Tm − Tb/2
Tb
)
. (3.28)
Denoted by TI the integration window size, then Eq. (3.6) - Eq. (3.10) can be slightly
modified for the time-reversal-enhanced receiver:
zk =
∫ kTb+T0+TI/2
kTb+T0−TI/2
[
N2∑
j=−N1
dk−jyrx(t + jTb)
]2
dt + ηk,
(3.29)
ηk =
∫ kTb+T0+TI/2
kTb+T0−TI/2[
2
N2∑
j=−N1
dk−jyrx(t + jTb)ν(t + kTb) + ν2(t + kTb)
]
dt,
(3.30)
49
C =
c−N1,−N1· · · c−N1,0 · · · c−N1,N2
......
...
c0,−N1· · · c0,0 · · · c0,N2
......
...
cN2,−N1· · · cN2,0 · · · cN2,N2
, (3.31)
ci,j =1√EbTb
∫ kTb+T0+TI/2
kTb+T0−TI/2
yrx(t + iTb)yrx(t + jTb)dt
=cj,i, (3.32)
and
zk = ~dT C~d + ηk,
~d = (dk+N1, · · · , dk−N2
)T . (3.33)
The same method discussed in the previous section can be used to calculate
BER, but notice that ~d is equal to (dk+N1, · · · , dk−N2
)T , instead of (dk, · · · , dk−N+1)T ,
and the matrix C is defined in a slightly different way.
3.5 Measurement and Analytical Results
Measurements are necessary, since there is no proper UWB channel model for
multiple antenna related study. A time-domain channel sounding system was used
for measurements in the Wireless Networking Systems Laboratory at Tennessee Tech-
nological University. The sounding pulse has an root mean square (RMS) width of
250 ps. The office is a typical indoor environment with wooden and metallic fur-
niture (chairs, desks, bookshelves, and cabinets). Distance between the transmitter
50
and the receiver is 6 m, and no LOS between the two antennas. The transmit an-
tenna is a 4-element linear array with 20 cm separation spacing, and each antenna
element has dimension 5.5 cm × 11 cm. The channel sounding system is considered
as an end-to-end RF chain in evaluating the proposed communication system’s per-
formance. Shown in Fig. 3.3 are the waveforms measured at the receive antenna. It
has been observed the downlink and uplink UWB channels between two sites are very
symmetric and static, which is truly in favor of time reversal applications. System
performance is evaluated based on the measured data, assuming the same single-
pulse composite waveform ptx(t) serves for both pilot and data signals. In addition,
we assume one pulse per data symbol and W = 2 GHz.
Ideally, the received single-pulse waveform can be represented by [h(−t)∗h(t)]∗
[ptx(−t)∗ptx(t)], implying the main lobe in the received waveform almost has the same
profile as the autocorrelation of the single-pulse composite waveform ptx(−t) ∗ ptx(t).
Indeed, the main-lobe profile is not greatly affected by the pulse waveform distortion.
The integration window size TI is chosen such that most of the main-lobe energy is
captured. In this work it is set to TI = 6 ns.
Temporal focusing characteristic can be quantified by an energy ratio of main-
lobe energy to total energy. The measured energy ratios are given in Table 3.1,
where “element” refers to an element of the transmit antenna array. The results
suggest the use of antenna array at the transmitter does enhance signal focusing.
For MISO configuration with a constant total transmit power, it is also shown the
main-lobe amplitude is roughly in proportion to√
M , which is because of coherent
signal combining around time t = Tm.
A BER performance comparison for Tb = 20 ns is presented in Fig. 3.4,
where a curve labeled with “element m” refers to a single input single output (SISO)
51
0 10 20 30 40 50 60−0.08
−0.06
−0.04
−0.02
0
0.02
0.04
0.06
0.08
Time (ns)
Ampli
tude
(Volt
)
(a) Without time reversal.
0 20 40 60 80 100 120 140 160 180 200
−0.1
−0.05
0
0.05
0.1
0.15
Time (ns)
Norm
alize
d Am
plitu
de
(b) With time reversal.
0 20 40 60 80 100 120 140 160 180 200−0.25
−0.2
−0.15
−0.1
−0.05
0
0.05
0.1
0.15
0.2
0.25
Time (ns)
Norm
alize
d Am
plitu
de
(c) MISO time reversal (4 antenna elements at the transmitter).
Figure 3.3. Waveforms at the receive antenna’s output.
52
Table 3.1. Energy ratio (TI = 6 ns).
SISO MISOElement 1 2 3 4
Energy ratio 53.00% 53.63% 61.15% 53.56% 72.87%
configuration using antenna element m. In the plot, Eb/N0 is the per-bit SNR at
the received side. Note, if the per-bit SNR is measured at the transmitter side,
approximately a MISO system would have an additional gain of 10log10M dB over
a SISO system. From these results, it can be concluded that (1) time reversal can
effectively reduce ISI impact; (2) the effectiveness of SISO time reversal is location
dependent, and the use of MISO can increase the system robustness; (3) the inverse
filter results in the best performance at the cost of increasing system complexity.
Regarding (2), note that the location dependence of a MISO time reversal system is
not investigated in the work.
3.6 Implementation Issues of Time Reversal
To apply time reversal in UWB communications, two crucial issues remain
to be resolved: (1) estimation of the channel and (2) realization of the pre-filter.
Since the forward link and reverse link channels are symmetric in UWB, channel
estimation can be executed at either the transmitter side or the receiver side. A
sequence of pilot signals needs to be used for estimation of the channel. Advanced
waveform estimation may be done by the powerful base station, but a high-fidelity
estimate of the CIR needs full rate sampling and high-resolution signal representation,
implying a prohibitively expensive solution. In addition, even with perfect CIR, it is
too difficult to develop an ultra high speed pre-filter that can take full advantage of
the perfect CIR.
53
10 11 12 13 14 15 16 17 18
10−4
10−3
10−2
10−1
100
Eb/No
BE
R
Without TiRWith TiR
element 1
element 1
element 2
element 3
element 2
element 3, 4
element 4
MISO
inverse filterelement 1 Tb = 20 ns
Figure 3.4. BER comparison.
One phenomenon discovered is that a mono-bit ADC along with proper thresh-
olding can be applied for quantizing the pre-filter’s coefficients, and the resulting
signal still gets focused. It enables the development of a unique time reversal system
with much lower complexity. Major points include: (1) optimization of the thresh-
old for quantization; (2) development of an adaptive threshold method; (3) impact
of tap spacing and length of the pre-filter; (4) spatially focusing feature, co-channel
interference reduction, and location based security.
54
3.7 Conclusions
The UWB MISO time reversal scheme combined with the energy detector re-
ceiver is examined. The equivalent discrete channel models and the BER formulas
are derived. BER performance is evaluated considering practical end-to-end RF chain
including propagation environment. The results suggest the proposed combination of
MISO time reversal and energy detector receiver is very promising for UWB applica-
tions, especially when complexity/cost, performance, and security are concerned.
CHAPTER 4
GENERAL PURPOSE UWB RADIO TESTBED DESIGN
4.1 Introduction
In IEEE 8092.15.3a, both of MBOA and DS-UWB solutions may provide high
performance, but they are not low-cost solutions at present. In contrast, suboptimal
alternatives targeting at low-cost wireless applications, such as sensor networks, have
received great attention [21] [22] [26] [27] [29] [32] [50]. The price point will be in
the sub-$1 range for asset tracking and tagging, up to $3 - $4 per node for industrial
applications.
To research these new concepts unique to UWB, theoretical and simulation
approaches are not sufficient. It is necessary to use experiments to test schemes and
algorithms, validate theoretical and simulation results, and remove some uncertainties
caused by imperfect modeling of actual channels, hardware, and software. A testbed
would be very convenient to evaluate the pros and cons of some specific system as-
pects, such as modulation scheme, receiver structure, and ADC. Particularly, the
experimental approach is usually the only effective means to find the actual impacts
of RF circuits, including antennas.
4.2 Major System Design Considerations
Implementing UWB transmitters and receivers poses a number of challenges.
The difficulties mainly come from generating, transmitting, and processing the signal
with ultra-wide bandwidth. Major design considerations are discussed in this section.
55
56
4.2.1 Pulse Generator
Because of the minimum bandwidth requirement (-10 dB bandwidth greater
than 500 MHz or -10 dB fractional bandwidth greater than 20%) and the Part 15
power limit (maximum equivalent isotropic radiated power spectrum density of -41.3
dBm/MHz), efficient use of a piece of UWB spectrum is a big challenge. The MBOA
system relies on multiple subcarriers to achieve desired overall signal spectrum. On
the other hand, pulse based UWB schemes are attractive for low-cost low-data-rate
communication and ranging applications. The spectral content of pulse waveforms is
highly dependent on the shape of the pulse generated, which makes pulse design more
challenging. There have been a number of proposals of pulse generators, such as the
tunnel diode based pulse generator and the step recovery based pulse generator. A
simple way is to upconvert a baseband pulse to an RF center frequency. It also has
been proposed to use root raised cosine baseband (RRC) pulse shape for the DS-UWB
system.
4.2.2 Modulation Schemes and Receiver Strategies
A direct consequence of a high bandwidth UWB signal is ultra fine multipath
delay resolution in multipath propagation environments. Theoretically, to efficiently
capture the signal energy dispersed over a large number of individual paths, either
a RAKE receiver scheme or an OFDM scheme can provide high performance, given
perfect synchronization and channel estimation. Realistically, a RAKE receiver with
tens of fingers is infeasible, and both schemes mentioned above are financially im-
proper for low-cost low-data-rate applications. There is a huge potential market for
57
these lower-end applications, such as sensor networks. In response to this need, sev-
eral suboptimal receiver schemes, including TR and energy detection using a square
law detector, have regained popularity in the UWB community [21] [22] [26] [27] [29]
[32] [50]. Although both TR and energy detection suffer from performance penalty,
they have no need for sophisticated channel estimation and precise synchronization,
which significantly reduces receiver complexity and cost. OOK modulation and en-
ergy detection is indeed a reasonable combination. Energy of a received signal can be
captured easily using a diode (square law) detector followed by an integrator. OOK
modulation works fine if the data symbol boundary is roughly known and intersym-
bol interference is negligible. Pulse position modulation (PPM) is another popular
modulation for pulse based UWB systems, and high order PPM or called M-ary PPM
is promising to work with channel coding to achieve wide range of scalability.
4.2.3 Synchronization
Synchronization is a common issue for all types of communication systems, and
there have been many proposed strategies for initial timing acquisition and tracking
during communication. For pulse based UWB radio, signal acquisition is extremely
difficult, since the pulses are often very narrow with very low duty cycle. Timing is
relaxed for demodulating signal of OOK format, but at least symbol boundary has to
be roughly known. Energy detection employed in our testbed is one of non-coherent
demodulation schemes which are not able to identify signal polarity. One challenge for
any non-coherent receiver is that initial acquisition has to rely on a uni-polar sequence
(e.g., the Barker code) whose autocorrelation is typically less sharp than that of a
bi-polar sequence (e.g., the m-sequence). It has been found, in multipath case, the
58
uni-polar sequence works poorly, especially when ISI occurs. In addition, non-zero-
mean noise at the output of the detector, an inherited disadvantage of a non-coherent
receiver, makes decision more difficult. To ensure acceptable probability of detection
given certain probability of false alarm, the search needs longer time compared to the
approaches for conventional systems. Some commonly used search strategies, such as
multi-stage search [51], can be adopted to improve acquisition performance.
4.2.4 Other Issues
• Co-existence and anti-interference.
The UWB spectrum is shared with other systems. One major problem is
the mutual interference between the UWB and WiFi system. From a physical layer
design point of view, traditional countermeasures to achieve capability of co-existence
and anti-interference include spread spectrum and interference cancellation. For non-
coherent receivers, frequency hopping (FH), one of spread spectrum techniques, can
be considered, where the mutual interference is reduced by a factor of the processing
gain. A notch filter is another effective means for narrowband interference which is
simpler but less flexible than FH.
• Spectral spikes.
This is a problem unique for OOK and PPM modulation schemes. Owing
to unbalanced modulation, lines would appear over the spectrum of the RF signal.
Without proper means to reduce the spectral spikes, signal power has to be reduced to
avoid violating the FCC power limit. Pseudonoise (PN) code scrambling is a normal
way to balance the signal in time domain statistically and smooth the spectrum. The
scrambling method can be in the manner of DS/SS or time hopping (TH).
59
• Multiple-user access.
Carrier sense multiple access/collision detection (CSMA/CD) is a popular ran-
dom multiple access protocol that is suitable for a network with relatively low traffic
load. Other candidates include pulling, code division multiple access (CDMA), and
hybrid protocols. Recently, a rate division multiple access (RDMA) scheme that
takes advantage of low duty cycle of pulse based UWB signaling was proposed [52].
Because of the low duty cycle manner, users with different transmission rates can be
supported at low probability of collision.
• Adaptive threshold.
The decision threshold has a great impact on the performance of the energy
detection receiver. A good threshold can be determined by using some channel quality
indicator and feedback information provided by the digital processor (back-end) at
the receiver.
• Data format and scalability.
Research has shown that the UWB channels are relatively stable compared
to narrowband channels, which implies that a large packet with limited control bits
in the header followed by pure information bits can be used. Scalability is highly
desired, since application and propagation environment change dynamically. A wide
range of data rates needs to be supported through using different combinations of
modulation, channel coding, and spread spectrum.
60
4.3 General Purpose Testbed Design
The main goal is to build a pair of the proof-of-concept transmitter and re-
ceiver to validate various schemes. The testbed is expected to be flexible enough to
accommodate several major transmission and reception techniques. The strategy is to
develop the testbed based on our latest research work and use commercially available
off-the-shelf components to expedite the project.
4.3.1 System Design
The baseline testbed is expected to accommodate the following functions/capabilities:
(1) efficient pulse generation methods; (2) enabling investigation of A/D technologies
such as mono-bit; (3) experimental evaluation of radio RF circuitry impact; (4) differ-
ent modulation schemes, such as OOK and PPM; (5) test of various signal processing
algorithms; (6) interface with multimedia (video, audio, etc.). Several specific param-
eters of the general purpose testbed are as follows:
• Center frequency: 3.5 - 4.0 GHz
• Bandwidth: ≥ 500 MHz
• Distance: up to 30 m
• Pulse repetition frequency: up to 20 MHz
The transmitter and receiver architectures are illustrated in Fig. 4.1. The
transmitter uses an upconverter based pulse generator. The receiver relies on one
or two diodes to implement square law operation. Following the diode detector is
a low-pass filter which enables use of relatively lower sampling frequency. Amplifier
gain and required dynamic range are key parameters that affect RF front-end design,
and they can be determined with consideration of the Part 15 limit, distance range
61
Table 4.1. Link budget.
Parameters ValuesRaw bit rate (Rb) 500 kb/sAverage Tx power -15.0 dBmTx antenna gain 0 dBiCenter frequency 4.0 GHzPath loss at 1 m 44.5 dBPath loss at 30 m 74.0 dBRx antenna gain 0 dBi
Average Rx power -89.0 dBmThermal noise power per bit:
−174 + 10 ∗ log10(Rb) -117.0 dBmNoise figure 7.0 dB
Total noise power per bit -110.0 dBmMinimal required Eb/N0 12.0 dB
Implementation loss 4.0 dBLink margin 5.0 dB
Proposed minimal Rx sensitivity -94.0 dBm
and raw data range. The field programmable gate array device (FPGA) serves as
the digital back-end playing signal processing functions. Advanced AGC and adap-
tive thresholding are accommodated based on digital signal processing. Several key
parameters of the transmitter and receiver, such as center frequency, amplifier gain,
ADC’s sampling rate and resolution, pulse repetition frequency (PRF), and data rate,
are programmable. For the testbed system, the transmitted data could be stored in
FPGA at the transmitter; the received data could be captured from FPGA at the
receiver using a logic analyzer.
Depending on the propagation environments, either the Barker code or the
optical orthogonal codes (OOC) [53] are used for initial timing acquisition purpose.
The OOC codes can be much longer than the Barker code and exhibit better auto-
correlation property, which is desired for severe propagation cases.
62
FPGA Pulse Generator
Local Oscillator
BPF Variable Attenuator PA
Transmitter
FPGA A/D
Frequency Synthesizer
LPF Square
Law BPF Amp. VGA
Receiver
LNA
Figure 4.1. Transmitter and receiver architectures.
Finally, the link budget result is shown in Table 4.1, where a 4GHz center
frequency is assumed.
4.3.2 Board Level Design
Board level design is guided by the system design. Major issues with respect
to implementation are discussed in the following.
• Selection of antennas.
Generally, a small-size omni-directional antenna with voltage standing wave
ratio (VSWR) ≤ 2 is a reasonable choice. The antennas selected are a pair of omni-
directional print antennas. The antenna gain is about 2 dBi at 4 GHz, and it exhibits
63
a voltage standing wave ratio (VSWR) ≤ 2 for a frequency range of 3.1 GHz - 10.0
GHz.
• Pulse generator.
Upconverter based pulse generator is used. The baseband pulse is generated
using digital logic circuitry. The width of the baseband pulse, or equivalently, the
signal bandwidth, is controlled by the FPGA, and the pulse strength is adjusted to
meet the mixer’s requirement. To flexibly generate a wide range of frequencies, a
phase lock loop (PLL) based frequency synthesizer with an external loop filter and
voltage controlled oscillator (VCO) serves as the local oscillator (LO). The frequency
synthesizer can support frequency up to 6 GHz, the bandwidth of the loop filter is
50 kHz, and the averaged tuning sensitivity of the used VCO is 62 MHz/V. A double
balanced mixer followed by a bandpass filter is used to shift the baseband signal to
an RF signal. The designed local oscillator is tunable in 10 MHz steps from 3.5 GHz -
4.0 GHz. Several filters are placed at the transmitter front-end to improve the overall
transmitted signal spectrum.
• Variable gain power amplifier.
A power amplifier in conjunction with a variable attenuator serves as the vari-
able gain power amplifier. The overall gain is from -11 dB - +12 dB controlled by an
analog signal. The control signal comes from the digital back-end through a digital
to analog converter (DAC) with 10-bit resolution and 1.2 V reference voltage.
• Variable gain low noise amplifier (LNA).
A variable gain LNA is combined using several LNAs and a variable attenuator.
The gain range is from 55 dB - 70 dB considering the desired received power range
64
and the input voltage range required by the diode detector. The overall gain in the
receiver RF chain is controlled by the digital back-end through an AGC feedback
loop.
• Diode based square law detector.
A surface mount schottky diode with sharp I-V slope and small capacitance is
used as the square law device. Following the diode is a low-pass filter which enables
use of relatively lower sampling frequency, and a baseband amplifier to interface with
the A/D converter.
• Programmable ADC.
An 8 bits monolithic bipolar ADC converter with sampling rate up to 1.5 GHz
is selected. A high-frequency clock synthesizer is used to generate the sampling clock
for the ADC. The variable sampling rate is achieved by controlling the output fre-
quency of the clock synthesizer. The ADC features an on-chip, selectable 8:16 output
demultiplexer. A double-data-rate (DDR) interface implemented in FPGA connects
the ADC to the FPGA. Although the ADC resolution is 8 bits, lower resolution can
be chosen in signal processing.
• FPGA.
The Xinlix Virtex-II FPGA family is used for the digital back-ends for both of
the transmitter and the receiver. The Virtex-II family is a popular platform of FPGA
based on IP cores and customized modules, and is suitable for wireless applications.
The model selected is XC2V1000 corresponding to one million gates which is sufficient
for the testbed needs.
• Signal processing algorithms.
65
A large number of digital signal processing and controlling functions needs to
be implemented in the digital back-ends. The FPGA design block diagrams for the
transmitter and the receiver are shown in Fig. 4.2 and Fig. 4.3, respectively. Listed
below are most basic functions at the transmitter and the receiver.
Transmitter:
• Controller and interface
• Modulation
• Coding
Receiver:
• Controller and interface
• Synchronization
• Demodulation
• Decoding
• AGC
• Automatic thresholding
4.4 Conclusion
The general purpose testbed is motivated by the need for low-complexity UWB
transceivers. A pair of transmitter and receiver is designed using commercially avail-
able off-the-shelf components. The RF front-ends can be digitally controlled by setting
a few key parameters. Digital signal processing relies on FPGA chips. The testbed is
flexible to accommodate various functions and verify results of analysis or simulation.
Major design issues and implementation challenges have been discussed. The testbed
66
can evolve to next generation systems in future, such as time reversal UWB system,
time reversal UWB chirp system, and UWB cognitive radio system.
67
D a t a i n t e r f a c e / s a m p l e r
E n c o d e r
P N g e n e r a t o r
M o d S S P u l s e r
D C M
s o u r c e _ d a t a s o u r c e _ c l k
e n c o d e d _ d a t a s o u r c e _ c l k
m o d _ d a t a s o u r c e _ c l k
S S _ d a t a s o u r c e _ c l k
P u l s e _ 0 P u l s e _ 1 s y n c _ s i g n a l s o u r c e _ c l k _ o u t
s y s t e m _ c l k l o c k e d
P N _ c o d e
s y n c _ d e l a y [ 7 : 0 ]
s s _ c o d e _ i n d e x [ 7 : 0 ]
s s _ l e n g t h [ 2 : 0 ]
m o d u l a t i o n [ 2 : 0 ]
c o d i n g [ 2 : 0 ]
b o a r d _ c l k
b o a r d _ r s t
s o u r c e _ s e l [ 2 : 0 ] s o u r c e _ r a t e [ 3 : 0 ]
s o u r c e _ o t h e r [ 1 : 0 ]
s o u r c e _ C O M [ 1 : 0 ]
s o u r c e _ U S B [ 1 : 0 ]
s o u r c e _ s i n g l e
P N _ g e n e r a t o r [ 2 : 0 ]
Figu
re4.2.
Tran
smitter
FP
GA
blo
ckdiagram
.
68
A / D s a m p l e r D S S
R a n g i n g S y n c h r o n i z a t i o n
D M o d E q . D e c o d e r
D C M
a d c _ s a m p l e [ 6 3 : 0 ] d a t a _ r e a d y
d s s _ d a t a [ 7 : 0 ] d s s _ r e a d y
d m o d _ d a t a [ 7 : 0 ] d m o d _ r e a d y
e q _ d a t a e q _ r e a d y
d a t a _ o u t
s y s t e m _ c l k l o c k e d
e q u a l i z e r [ 3 : 0 ]
s s _ c o d e _ i n d e x [ 7 : 0 ]
s s _ l e n g t h [ 2 : 0 ]
m o d u l a t i o n [ 2 : 0 ]
c o d i n g [ 2 : 0 ]
b o a r d _ c l k
b o a r d _ r s t
s o u r c e _ r a t e [ 3 : 0 ]
p u l s e _ i n w a v e f r o m _ i n
s a m p l i n g _ c l k
s y n c _ c l k s y n c _ r e a d y
s y n c _ c o n t r o l
s y n c _ r a n g i n g [ 7 : 0 ]
s y n c _ e x
n u m _ b i t s [ 2 : 0 ]
d e t e c t i o n
C o n t r o l l e r P N g e n e r a t o r
B E R
B E R [ 7 : 0 ] e r r o r _ o u t
F _ S [ 9 : 0 ]
P N _ g e n e r a t o r [ 2 : 0 ]
P N _ c o d e
s a m p l i n g _ r a t e [ 1 : 0 ]
c h a n n e l [ 1 : 0 ]
l o c a t i o n [ 7 : 0 ]
Figu
re4.3.
Receiver
FP
GA
diagram
.
CHAPTER 5
GENERAL PURPOSE UWB RADIO TESTBED PROTOTYPING
The UWB transmitter and receiver have been built and tested in the wire-
less networking systems laboratory at Tennessee Technological University. It is a
complete end-to-end UWB communication system with over-the-air synchronization.
The UWB system is based on energy detection. The transmitter and the receiver are
shown in Fig. 5.1. The AGC loop is not implemented in hardware of the receiver.
Neither equalization algorithm nor ranging algorithm is implemented in FPGA at the
receiver side. Some adjustable parameters are fixed.
Receiver
Transmitter
Figure 5.1. UWB testbed.
69
70
The specific parameters of the testbed are as follows:
• Center frequency: 4.0 GHz
• Bandwidth: 500 MHz
• Data rate: 6.25 Mb/s
• Pulse repetition frequency: 25 MHz
• Distance: 8 m
• Modulation: OOK
5.1 Testbed Configuration
The architecture of the transmitter and the receiver is shown in Fig. 4.1.
Illustrated in Fig. 5.2 is the testbed configuration. In order to reduce the develop-
ment cycle, the RF board and FPGAs are not integrated into a single printed circuit
board. The FPGA development board, MEMEC DS-BD-V2MB1000, serves as the
digital back-end playing signal processing functions in both of the transmitter and
the receiver.
The FPGA device on the development board is XC2V1000, a member of the
Xilinx Virtex II platform. The FPGA device is configured by Xilinx software IMPACT
via a xilinx programming cable, parallel cable IV. In the transmitter, the RF board
is plugged into the expansion port JX1 on the FPGA development board. The ultra-
high speed ADC evaluation board, MAX108EVKIT, serves as ADC in the receiver.
The ADC device on the board is MAX108 from Maxim Integrated Products. The
output signal of the square law detector is fed into the ADC board via a 50 Ω coaxial
cable with a SMA connector. An external sampling clock is required by the ADC
board. The digital output of the ADC board are sent to the FPGA board for signal
processing.
71
PC FPGA Board
RF Board
PC ADC
Board RF Board
Sampling Clock
FPGA Board
Transmitter
Receiver
Figure 5.2. Testbed configuration.
5.2 High Speed Data Interface
5.2.1 High Speed Analog to Digital Converter
The MAX108, an 1.5 GHz flash ADC, is employed to convert the baseband
signal (analog signal) into digital domain. A baseband amplifier between the low pass
filter following the square law detector and ADC is necessary for signal conditioning.
The ADC shown in Fig. 5.3 employs a fully differential 8 bits quantizer and a unique
encoding scheme to limit metastable states, with no error exceeding 1 LSB max [60].
To facilitate a lower rate digital interface, the ADC features an on-chip, selectable 8:16
positive-referenced emitter-coupled logic (PECL) compatible output demultiplexer
that reduces the output data rate to one-half the sampling clock rate. The PECL
outputs can be operated from any supply between +3 V and +5 V for compatibility
72
Figure 5.3. MAX108 simplified function diagram.
with +3.3 V or +5 V referenced systems. This demultiplexer has internal reset
capability that allows multiple MAX108s to be time-interleaved to achieve higher
effective sampling rates. The full scale analog input range of the MAX108 is ±250
mV for differential or single-ended use. In addition, this ADC also features an on-
chip +2.5 V precision voltage reference. The number of bits of the ADC used by
the FPGA can be dynamically adapted to the environment; reducing the number can
downscale the FPGA resource usage and total power assumption. A single-data-rate
(SDR) interface with a FIFO memory is implemented in FPGA to receive data from
the ADC.
The MAX108 evaluation board shown in Fig. 5.4 is integrated into the testbed
to perform the analog-to-digital conversion. The evaluation board makes it easier to
73
Figure 5.4. MAX108 evaluation board.
include the ultra-high-speed ADC in the prototyping system [61]. The differential
signaling is required for the input analog signal and the sampling clock. The sampling
rate is up to 1.5 GHz, which is determined by frequency of the external sampling clock.
A sinewave with power level of +4 dBm is fed into the CLK+ port on the ADC board
as the sampling clock. The CLK- port on the ADC board is grounded via a 50 Ω
SMA terminator. The input analog signal is connected to the port VIN+ on the
ADC board through a 50 Ω SMA coaxial cable. The VIN- port on the ADC board
is grounded vis a 50 Ω SMA terminator. Since the input signal range of the ADC
board is from -250 mV - +250 mV, an 10 dB attenuator is placed between the output
of RF board and the input of the ADC board. A total of 16 pairs of PECL output
signals are connected to the FPGA development board via a ADC/FPGA interface
board. The most significant 4 bits of ADC outputs are used in the FPGA design in
order to achieve a balance between performance and complexity.
74
Figure 5.5. PECL output structure.
5.2.2 Positive Emitter Coupled Logic
PECL is a commonly used ultra-high speed data transmission interfaces for
high performance, low power, and good noise immunity. PECL originates from emit-
ter coupled logic (ECL), but uses a positive power supply.
The PECL output shown in Fig. 5.5 consists of a differential pair that drives
a pair of emitter followers. The output emitter followers operate in the active region,
with DC current flowing at all times. This increases switching speeds and helps
maintain fast turn-off time. The proper termination for a PECL output is 50 Ω to
VCC - 2 V. At this termination, both OUT+ and OUT- will typically be VCC - 1.3 V,
75
Figure 5.6. FPGA’s LVPECL receiver termination.
resulting in a DC current flow of approximately 14 mA. More information regarding
PECL input structure, specifications, and termination can be found in [62].
When the power supply is +3.3 V, PECL is commonly referred to low-voltage
PECL (LVPECL). For many FPGAs, LVPECL transmitter and receiver are em-
bedded in the device for high-speed data transmission. Virtex-II FPGA’s I/Os are
designed to comply with the specifications for 3.3 V LVPECL. The termination for
an embedded LVPECL receiver, suggested by Xilinx [63], is shown in Fig. 5.6.
5.2.3 High Speed Interface between ADC and FPGA
For the design of the high-speed interface between ADC and FPGA, signal
integrity has become a critical issue. Many signal integrity problems are electro-
magnetic phenomena in nature and hence related to the EMI/EMC. There are two
concerns for signal integrity: the timing and the quality of the signal. Signal timing
mainly depends on the delay caused by the physical length of trace that the signal
76
Figure 5.7. Interface board PCB layer stack.
must propagate. Signal waveform distortions can be caused by reflection, cross talk,
and power/ground noise. An interface has been carefully designed to solve the signal
integrity issue. PCB layout, transmission line terminations, and connection cables
are three major considerations in the high speed ADC/FPGA interface design.
Since the signal frequency is high, every PCB trace must be analyzed as a
transmission line. Its series resistance and parallel conductance can generally be
ignored, but series inductance and parallel capacitance per unit length are important
parameters. Any signal transition (rising or falling edge) travels along the trace at a
speed determined by the incremental inductance and capacitance. For an outer-layer
trace (air on one side), the propagation delay is 55 ps/cm. For an inner-layer trace
(FR4 with ǫ = 4.5 on both sides), the propagation delay is 70 ps/cm [63]. The signal
propagation delay can be calculated based on information above.
A 4-layer PCB board is designed and fabricated to have 50 Ω characteristic
impedance for each trace. The PCB layer stack is shown in Fig. 5.7. As shown in Fig.
5.8, for each pair of LVPECL signals, the traces are designed to have same length
such that the positive and negative signals experience same delay.
An important parameter is the characteristic impedance Z0 defined as the
voltage-to-current ratio at any point along the transmission line. It is determined
77
Figure 5.8. Interface board top layer layout.
by the ratio w/d, where w is the trace width, d is the distance above the ground
or VCC plane. For an outer layer trace (microstrip), Z0 = 50 Ω when w = 2 ∗ d.
For an inner layer trace between two ground or VCC planes (stripline), Z0 = 50 Ω
when w = 0.6 ∗ d [63]. Most signal traces fall into the range of 40 - 80 Ω. At any
trace-impedance discontinuity, all or part of the signal is reflected back to the origin.
If the far end is resistively terminated with R = Z0, there is no reflection. If,
however, the end is open, or loaded with only a CMOS input, then the transition
doubles in amplitude, and this new wave travels back to the driver, where it may be
reflected again, resulting in the familiar ringing. Such ringing has a serious impact on
signal integrity, reduces noise margins, and can lead to malfunction. A way to avoid
reflections and ensure signal integrity is a proper termination. It can be observed the
78
Figure 5.9. Signal waveform with proper termination.
signal swing is reduced significantly with the presence of proper termination in Figs.
5.9 and Fig. 5.10.
Crosstalk can happen when two signals are routed closely together. Current
through one of the traces creates a magnetic field that induces current on the neigh-
boring trace, or the voltage on the trace couples capacitively to its neighbor. Crosstalk
can be accurately computed [63] by
Peak Crosstalk V oltage =δV
1 + (d/h)2(5.1)
where δV is the voltage swing, d is the distance between traces, and h is the spacing
above the ground plane. The distance between two adjacent traces in the ADC/FPGA
interface board are selected carefully in order to prevent from a false transition. In
79
Figure 5.10. Signal waveform without proper termination.
addition, SMA coaxial cables are used to transmit high speed digital signals from the
ADC board to the interface board.
In the testbed, a 800 MHz clock is employed as the ADC sampling clock, so
the corresponding ADC output signals have maximum frequency of 400 MHz. The
interface solution is to make a ADC/FPGA interface board which is plugged into
the FPGA development board, then the ADC board and the ADC/FPGA interface
board are connected through 50 Ω SMA cables. The interface solution can support
signals with frequency of up to several GHz. A clock signal waveform and a data
signal eye diagram, measured at a FPGA input pad, are shown in Fig. 5.11 and Fig.
5.12, respectively.
80
Figure 5.11. Clock waveform.
Figure 5.12. Data eye diagram.
81
Guard interval Preamble
Guard interval Data
128 chips of 1 60 chips of a code
32 chips of 0 36 chips of 0 960 symbols
Figure 5.13. Frame structure.
5.3 Synchronization
Since energy detection, employed in the testbed, is not able to identify signal
polarity, the initial acquisition has to rely on a uni-polar sequence whose autocorre-
lation is typically less sharp than that of a bi-polar sequence. A specially designed
synchronization code is used in the testbed for the initial timing acquisition. The
code is much longer than the Barker code and exhibits better autocorrelation prop-
erty, which is desirable for severe propagation cases. The transmitter sends data
frames in the burst mode. Synchronization is done independently for each frame dur-
ing reception of the frame header. The relative clock errors are small enough so that
tracking is not needed within a data frame.
5.3.1 Frame Structure
The frame structure shown in Fig. 5.13 consists of 208 preamble chips, 960
data symbols, and 48 chips guard interval. Four identical chips represent one symbol.
82
N th integrator output
t 0
MAX Selection
1 st integrator output
2 nd integrator output
m th integrator output
Tc
t 0 +Tc/N
t 0 +(N-1)Tc/N
Tc/2
t 0 +(m-1)Tc/N
Figure 5.14. Chip level synchronization.
The preamble consists of 128 chips of 1, 20 chips of 0, and 60 chips of a symbol
level synchronization code. The preamble is used to achieve the initial timing acqui-
sition. Guard intervals provide time for FPGA to run some digital signal processing
algorithms, such as the chip synchronization algorithm.
5.3.2 Synchronization Procedure
The synchronization consists of three stages: chip synchronization, symbol
synchronization, and frame synchronization. Firstly, the receiver is searching for the
chip synchronization. The basic procedure of chip synchronization is to perform par-
allel searching and then select the maximum output [55]. The symbol synchronization
83
is achieved by finding the maximum output of a code correlator. It relies on accuracy
of chip synchronization.
In energy detection, the correct chip synchronization point is the delay which
leads a integrator to collect the maximum signal energy when the transmitter is
sending the preamble. In order to achieve the initial timing acquisition quickly, a
parallel searching is employed instead of a serial searching. The cost of the parallel
searching is that more FPGA resources are occupied. A bank of parallel integrators
followed by selection of the maximum among integrator outputs is implemented in
the FPGA device for the chip synchronization. The structure is shown in Fig. 5.14
where Tc is the chip duration, and N is the number of integrators. Each integrator
has a integration window of Tc/2. Timing accuracy of the chip synchronization is
related with the number of integrators N . The chip synchronization error is less
than Tc/(2 ∗ N). In the testbed, 32 integrators are employed to achieve the chip
synchronization. When the chip duration is 40 ns, the synchronization error is less
than 0.625 ns.
Once the chip level synchronization is achieved, a symbol level synchronization
code of 60 chips is used to determine the symbol synchronization which is also the
frame synchronization in the testbed. The detection of the symbol synchronization
is based on the correlation between the output of the synchronized integrator and
the synchronization code. The output of the synchronized integrator is sampled at
the chip rate. Hard decision is made. A one-bit digital correlator is employed in
FPGAs to compute the correlation. The maximum output of the correlator indicates
the symbol and frame synchronization. The synchronization performance can be
improved, if soft decision and a digital correlator with multiple bits coefficients are
implemented in the testbed.
84
5.4 FPGA Coding and Implementation
A key part of the testbed is FPGA design and implementation. All baseband
processing algorithms are implemented in a FPGA device. Verilog, a hardware de-
scription language, is chosen as the design entry. Integrated Software Environment
(ISE) foundation, a Xilinx design software suite, is used for design synthesis and im-
plementation. The functional and timing simulation is performed by ISE simulator.
A set of comprehensive testbench files is given to stimulate the simulation. Xilinx
software Chipscope Pro enables the real time debugging and verification for FPGAs.
In order to achieve high performance, proper coding techniques are used in the FPGA
design, such as synchronous design techniques, Xilinx-specific coding, and IP cores.
5.4.1 Transmitter Coding
The FPGA block diagram in the transmitter is the same as shown in Fig. 4.2,
except the empty spread spectrum block. The transmitter transmits the signal in a
burst mode. In each frame shown in Fig. 5.13, the preamble is transmitted at first,
and then data follows. Illustrated in Fig. 5.15 is the flowchart for the transmitter.
85
Clock Transition
Begin
No
Idle state?
Synch state?
Yes
No
No
Yes
End
Load data Load preample
Coding/Modulation
End
Yes
End
Pulse generation
Pulse generation
Figure 5.15. Transmitter flowchart.
86
Figure 5.16. Transmitter behavioral simulation.
The behavioral simulation result is shown in Fig. 5.16. The FPGA outputs
pulse − pos and pulse − neg are used to control the RF board to generate UWB
pulses. It has been observed that each data bit consists of four pulses, and data rate
is 6.25Mb/s. The simulation result shows functionality of the transmitter is achieved.
The design has been implemented in a FPGA device, Xilinx Virtex II xc2v1000-
4fg456. The detailed logic utilization of FPGA at the transmitter side is shown in
Table 5.1.
Table 5.1. Transmitter FPGA device utilization summary.
Number of slice flip flops 261Number of 4 input LUTs 195Number of occupied slices 291
Total number of 4 input LUTs 324Number of bonded IOBs 7
Number of DCMs 1Total equivalent gate count for the design 212021
87
Figure 5.17. Rounted FPGA design for the transmitter.
The routed FPGA design for the transmitter is shown in Fig. 5.17. It is
observed using the software Xilinx FPGA editor. The blue area indicates the logic
resources occupied by the design.
Once the FPGA design is downloaded into FPGA development board, the
software, Xilinx ChipScope Pro, can be used as a real-time verification tool to ana-
lyze the design. ChipScope Pro inserts logic analyzer core directly into the design.
FPGA internal signals are captured and brought out through the programming inter-
face, freeing up pins for the design. Captured signals can then be analyzed through
the included ChipScope Pro Logic Analyzer. The result captured from the FPGA
hardware by the ChipScope Pro logic analyzer agrees with the behavioral simulation
result.
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State 00 Idle
State 01 Sync.
State 10 Data Trans.
Signal arrival
Symbol Synchronization
Data transmission completion
Synchronization failure
Figure 5.18. State transition diagram.
5.4.2 Receiver Coding
The receiver coding is more complicated than the transmitter coding, because
many more digital signal processing algorithms need to be implemented in the re-
ceiver side. In the receiver, three states are defined. State 00: idle state where the
receiver monitors the signal arrival; State 01: synchronization state where the receiver
searches for the initial timing acquisition; State 10: data transmission state where
the receiver receives the transmitted data. The state transition diagram is shown in
Fig. 5.18. The idle state is defined as the initial state. If the receiver detects the
signal arrival in the idle state, the system enters into the synchronization state. Then
if the synchronization succeeds, the system enters into the data transmission state.
If the synchronization failed, the system is back to the idle state. When the data
transmission is finished, the idle state takes place.
89
Figure 5.19. Receiver RTL schematics.
The receiver FPGA block diagram is shown in Fig. 4.3. In the testbed, the de-
spread spectrum block, ranging block, and equalization block are not implemented.
Shown in Fig. 5.19 is the RTL schematic in the receiver generated by Xilinx ISE 9.2i.
Firstly, the receiver is in the idle state looking for the signal arrival. Secondly,
the receiver performs the synchronization procedure. Finally, the demodulation and
decoding are performed in the data transmission state. Illustrated in Fig. 5.20 is
the flowchart for the receiver. The flowcharts for signal arrival, synchronization, and
signal processing are presented in Fig. 5.21 - Fig. 5.23, respectively.
90
Clock Transition
Signal arrival monitoring
Begin
No
Idle state?
Synch state?
Yes
No
No
Yes
End Demodulation Synchronization
Decoding End
Yes
End
Decision
Figure 5.20. Receiver flowchart.
91
Clock Transition
Begin
No
Idle state?
Sum > Vts?
Yes
Yes
Yes
No
End
Set Signal Arrival Clear Signal Arrival
Import ADC samples
End
No
End
Compute the sum of four consecutive samples
Figure 5.21. Receiver signal arrival detection.
92
Clock Transition
Begin
No
Idle state?
Synch state?
Yes
No
Yes
Yes
End
End
No
End
Set Symbol Synch
Yes
Chip Synch?
Find the maximum among output of
all integrators Set Chip Synch
Yes
Correlation >= 3?
No
Chip # = 129?
End
Yes
No
Compute the correlation between the received signal and the synchronization code
End
No
Figure 5.22. Receiver synchronization flowchart.
93
Clock Transition
Begin
No
Idle state?
Synch state?
Yes
No
No
Yes
End
End
Yes
End
Data = 0
Energy > Vt?
End
Data = 1
Yes No
Compute the symbol energy
Figure 5.23. Receiver signal processing.
94
Figure 5.24. Receiver behavioral simulation.
The behavioral simulation result is shown in Fig. 5.24. A testbench file is
designed to cover two consecutive frames. The inputs of the testbench file are the
outputs of ADC board captured by a logic analyzer. The output variable data is
the decision made by the receiver. The simulation result shows the receiver works
properly.
The design has been implemented in a FPGA device, Xilinx Virtex II xc2v1000-
4fg456. The detailed logic utilization for the receiver is shown in Table 5.2. It can be
seen that more resources are occupied in the receiver.
The routed FPGA design shown in Fig. 5.25 is observed using the software
Xilinx FPGA editor. The blue area indicates the occupied logic resources.
95
Figure 5.25. Rounted FPGA design for the receiver.
5.5 System Verification
The testbed illustrated in Fig. 5.1 is a complete end to end UWB system
with over air synchronization. The measurements are carried out in the Wireless
Networking System Laboratory at Tennessee Technological University.
Table 5.2. Receiver FPGA device utilization summary.
Number of slice flip flops 3365Number of 4 input LUTs 2961Number of occupied slices 2774
Total number of 4 input LUTs 3431Number of bonded IOBs 52
Number of DCMs 2Total equivalent gate count for the design 267863
96
Listed below are instruments used for system debugging and verification:
• Tektronics Communication Signal Analyzer CSA8000B
• Tektronics Sampling module 80E03
• Tektronics Passive Probe P6109
• Tektronics Digital Phosphor Oscilloscope TDS7104
• Tektronics Logic Analyzer TLA611
• Agilent Logic Analyzer 16803A
• Agilent Function Generator 33220A
• Rohde Schwarz Signal Generator SMIQ03B
• Rohde Schwarz Spectrum Analyzer FSEM20
5.5.1 Measurement Results in the Transmitter
The time domain waveform shown in Fig. 5.26 is measured at the transmitter
output using Communication Signal Analyzer CSA8000B with the sampling module
80E03. The amplitude of the signal is 1100 mV. The width of pulse is 4 ns. The
pulse repetition frequency is 25 MHz. The signal spectrum shown in Fig. 5.27 is
measured using Spectrum Analyzer FSEM20. The center frequency is 4.02 GHz. The
bandwidth is 500 MHz. The maximum power level is -36.72 dBm.
97
Figure 5.26. Transmitter output waveform.
5.5.2 Measurement Results in the Receiver
When the system is running, the output signal of the receiver shown in Fig.
5.28 can be observed by Digital Phosphor Oscilloscope TDS7104. The green signal
below is the square waveform used to trigger the digital oscilloscope. The blue signal
above is the output data of the receiver. It is a digital signal generated by the FPGA
device. The received data pattern shown on the screen is 1010110011110000, which
agrees with the transmitted data pattern. Shown in Fig. 5.29 is the receiver output
captured by Logic Analyzer TLA611.
98
5.5.3 System Performance
The system performance measurement is conducted in Clement Hall room 400,
the Wireless Networking System Laboratory at Tennessee Technological University.
The transmitter and receiver are setup in the laboratory environment with LOS.
Chipscope Pro software is used to capture the receiver output data. The captured
data is sent to PC to accumulate system bit-error-rate (BER). The test is performed
at the distance between transmitter and receiver of 2.0 m, 2.5 m, 3.0 m, 3.5 m, and 4.0
m. Because the laboratory space is limited, a 6dB attenuator is put on the transmitter
Figure 5.27. Transmitted signal spectrum.
99
Figure 5.28. Receiver output.
Figure 5.29. Receiver output.
100
Figure 5.30. System output.
output. The equivalent distance between the transmitter and the receiver is of 4.0 m,
5.0 m, 6.0 m, 7.0 m, and 8.0 m.
Shown in Fig. 5.30 is the output data captured by Chipscope Pro in the
distance of 3.5 m.
Based on the receiver output data, it has been shown that no error is observed
among 20000 data at distance of 2.0 m, 2.5 m, 3.0 m, 3.5 m, and 4.0 m in the
condition of successful synchronization, while the data sequence of 1010110011110000
is transmitted in the transmitter. It shows that the system can work up to 8 m without
the 6 dB attenuator on the transmitter, and the testbed works on the high SNR region
of the energy detector. A PN sequence will be used for BER test in the future.
101
5.6 Conclusion
Based on performance test result, it can be concluded the general purpose
UWB testbed works properly in the laboratory environment.
CHAPTER 6
SUMMARY AND FUTURE WORK
6.1 Summary
This dissertation documents three primary contributions to the UWB state-
of-the-art: (1) the generalized RAKE receiver, (2) MISO time reversal with energy
detection receiver, and (3) the general purpose testbed.
A generalized RAKE receiver that estimates and compensates for per-path
pulse waveform distortion has been proposed for UWB communications. The pro-
posed generalized RAKE receiver can achieve the optimum performance, and its
performance is improved significantly in both of single user case and multiple user
case compared with the traditional RAKE receiver. The generalized RAKE receiver
employs an FIR filter to reconstruct the per-path impulse response of a UWB chan-
nel, then matches to the composite channel impulse response. The successive channel
estimation algorithm is used in the work. The system performance has been inves-
tigated in the high-rise building environment. The performance of the generalized
RAKE receiver with 80 taps is close to the matched filter bound. The generalized
RAKE with 3 taps is 1.1 dB better than the conventional RAKE at BER = 10−3
in case of no ISI. In the presence of ISI, the generalized RAKE with 3 taps is 1.0
dB better than the conventional RAKE at BER = 10−3. For MUD, the generalized
decorrelator with 3 taps is 1.3 dB better than the conventional decorrelator in syn-
chronous transmission, and achieves 1.7 dB gain over the conventional decorrelator
in asynchronous transmission; the generalized MMSE detector with 3 taps performs
1.2 dB better than the conventional MMSE detector in synchronous transmission,
102
103
and gains 1.1 dB compared with the conventional MMSE detector. The performance
improvement averaged over four users by using the generalized MMSE detector with
3 taps is about 1.8 dB over the conventional MMSE detector. Pulse distortion has
larger impact on the performance of MUD than that of the single user detection.
The MISO time reversal system with an extremely simple receiver has been
proposed to support high data rate transmission in severe multipath environments
for robust communications. The system can be realized without expensive channel
estimation and RAKE combining, and the timing requirement is also relaxed consid-
erably. The proposed system performance has been investigated over a ISI channel.
The system can achieve the performance comparable to coherent reception due to
time reversal’s temporal and spatial focusing. Energy detection is chosen as a low-
complexity reception technique which eliminates the need for channel estimation and
precise synchronization. The discrete channel models and BER formulas for the en-
ergy detector receiver over ISI channels are derived. Based on the numerical results,
it can be shown that time reversal can effectively reduce ISI impact; the effectiveness
of SISO time reversal is location dependent, and the use of MISO can increase the
system robustness; the inverse filter results in the best performance at the cost of
increasing system complexity.
The general purpose UWB radio wireless communication testbed with over-
the-air synchronization has been built using off-the-shelf components and designed
to be flexible enough to accommodate a number of features. The development of
the testbed is motivated by the need for low-complexity UWB transceivers for a
wide range of applications, and by the intention to study and validate new concepts
and ideas on a practical platform. Energy detection is implemented. System level
design, board level design, FPGA design and implementation, and system integration
104
are discussed. Two challenging issues, the high speed connection between ADC and
FPGA and synchronization for energy detection, have been solved. All baseband
processing algorithms are implemented in FPGA. Based on measurement results, it
can be concluded the general purpose UWB testbed works properly in the laboratory
environment. The testbed is also a complete low-complexity UWB communication
system suitable for a wide range of applications. The implemented FPGA design
serves as prototype of a UWB baseband chipset.
6.2 Future Work
Because of the open structure, the general purpose UWB radio testbed can
be updated to more advanced systems shown in Fig. 6.1. The second generation
testbed is designed to be a platform to investigate a new concept of range extension.
Precoding will be implemented in the transmitter. The receiver remains unchanged.
In general, precoding is a transmitter-side linear optimization technique that relies on
knowing the channel information. Fortunately, UWB channel is extremely stable over
time, and the forward link and backward link are reciprocal. Transmission range is
extended because of two mechanisms: ISI reduction as a result of temporal focusing;
and energy focusing at the desired location as a result of spatial focusing. Among
various precoding schemes, time reversal is the one that can maximize the received
signal peak energy without requiring sophisticated computation. Time reversal is
going to be implemented in the second generation testbed. The major challenges
come from the control of an ultra high speed DAC and the FPGA implementation of
a high speed FIR filter. Furthermore chirp spread spectrum device can be adopted
to the testbed for anti-jamming. The general purpose UWB radio testbed can evolve
105
into a UWB cognitive radio testbed in the future. In the other direction, the testbed
can be integrated into a single board for industrial applications.
General Purpose Testbed
Time Reversal Testbed
Chirp Spread Spectrum
Testbed
Cognitive Radio Testbed
One - board Solution
ASIC
Figure 6.1. UWB testbed roadmap.
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VITA
Qiang (John) Zhang was born in Heilongjiang, P. R. China in 1972. He re-
ceived the B.S. degree in electrical engineering at Beijing Jiaotong University, Beijing,
P. R. China, in 1994. From 1994 to 2000, he was with Beijing Jiaotong University,
as a research and development engineer working on design and development of em-
bedded systems. Qiang (John) Zhang received the M.S.degree in mathematics at
Tennessee Technological University, Cookeville, TN, USA, in 2004. Then, he joined a
Ph.D. program in Department of Electrical and Computer Engineering at Tennessee
Technological University where he worked as a research assistant in the Wireless
Networking Systems Laboratory. His research interests include ultra-wideband radio
transceiver design, multiuser detection, wireless sensor networks, embedded system,
and system integration. Qiang (John) Zhang graduated with a Ph.D. degree in elec-
trical engineering in December, 2007.
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