25-WATT AND 10-WATT VHFMARINE BAND TRANSMITTERS

Prepared byJohn HatchettApplications Engineering

Design, performance and constructioninformation are provided in this reportfor two power amplifiers suitable forVHF marine band (156-162 MHz) appli-cations. Rated power output levels are 25wiltts and 10 watts. Methods of meetingthe FCC low power output (one watt orless) requirement are discussed in detail.Both amplifiers can be tuned to cover144-175 MHz and performance data isprovided for this frequency range.

AN-595

MOTOROLA Sel7Jiconductor Products Inc.

25-WATT AND 10-WATT VHfMARINE BAND TRANSMITTERS

INTRODUCTIONThis report gives design, performance and construction

information for two 12.5 volt, FM transmitter poweramplifiers designed for VHF marine band (156-162 MHz)applications. One of the amplifiers provides 25 watts ofoutput power and the other 10 watts. Both haveprovisions for meeting the FCC requirement of beingswitchable to give one watt or less power output. Bothdesigns have been subjected to open and short circuit loadconditions at high line voltage and all load phase angleswithout damage to any transistor.

Components and construction techniques consistentwith low cost, high volume production have been em-ployed. The use of circuit designs and a printed circuitboard layout which are common to both amplifiersminimizes the number of different components requiredand also makes it possible to extend the 10 watt amplifierto 25 watt capability by the addition of one more stage.

The amplifiers are tunable from 144 to 175 MHz andtherefore are also useful for other VHF applications suchas amateur two meter and land-mobile radio.

Performance information is given in Table 1 and also inthe Transmitter Performance Section. A photograph of theamplifiers appears in Figure 1 and schematic diagrams

in Figure 2.

The three RF transistor types employed in the ampli-fier designs are part of the Motorola VHF series optimizedfor 12.5 volt FM operation. They are of balanced emitterconstruction and the 25 watt device is manufactured usingthe Motorola *Isothermal technology process. TheIsothermal design provides an additional measure ofruggedness to resist damage at high power levels over awide range of thermal and VSWR excursions.

The power l~:els that each RF transistor must supplywhen the amplIflers are operating at rated output powera~ 158 MHz and 12.5 volts are given on the block~lagramS of Fig~re 3. Both expected worst case powere:els, as determmed from the minimum specified device

gams, and th.e. power levels actually measured for con-structed amplIflers have been included A sl' ht . .th 1 1 . . 19 1I1crease111

ese eve s will be necessary to off-set. fl any output har-~om(c 1 ~er loss. The expected effect of this additionalos~ typlcally 0.3 to 0.5 dB) on the in ut ow

qUlfe~ents can be obtained from Figure l~. T~ l;~ re-amplIfier shows the flexibility of achievin . attmore econ . al 1 g an ophonal,

ormc , ow power system from the 25 watt

design simply by eliminating the 25 watt output stage andmatching the 2N5590 driver into 50 ohms. If a lowerinput power is required, higher gain devices are availablefor use in the 10 watt design. Two additional line-upsare shown below with expected worst case power levelsfor 158 MHz, 12.5 volt operation.

l35mw - 2N6255 - 2N608l - lOw80 mw - MRF607 - 2N608l - lOw

The 2N608l transistor is also of *lsothermal design andprovides increased ruggedness as well as higher gain for the10 watt system. For the 25 watt amplifier, the powerrequired from the input stage will typically be less thanone watt for 158 MHz operation. This makes the moreeconomical 2N4427 device also a suitable candidate forthis stage in 25 watt marine band applications. The designmethods given in the following sections can also be appliedto determine matching network component values forthese alternate device line-ups.

An MJE2020 transistor is used in conjunction with alN5229 zener diode to provide a regulated dc supplyvoltage suitable for powering the transmitters during thelow power output operating mode. The MJE2020 is amedium power transistor designed for use in general pur-pose audio amplifier and switching applications. Thedevice is in the economical Motorola Case 199 plasticpackage. It is rated for a maximum continuous collectorcurrent of 5.0 ADC and a maximum power dissipation of80 watts at 250C case temperature.

CIRCUIT DESCRIPTIONAs indicated by the schematic diagrams of Figure 2 all

the a~plifier stages are of the common-emitter ;on-figuration and all are operated Class C Except f .., . . or a mll10rvan at iOn 111the 2N5590 output network allval d t . ' component

ues an ranslstor types used for the 10 watt amplifierare a~so common to the first two stages of the 25 ttamplifier. wa

TRANSMITTER RF DESIGN

MJhe trans~itter ~ain stages have been designed for 158z operation uS1l1g large-signal transistor' d~ Th . l~a~a.. ese lmpedances for the 2N6082 and 2N5590

tranSistors appear in Figures 4 through 9 L .f h . arge Signal dataor t e 2N6255 transistor can be obtained f .

~heet. The resistive (Rin) and reactive (C crom

) its dataimpedance components are oiven by t

1l1h'out parallel

0- e curves. The

Circuit diagrams external to M *Trademark of Motorola IncI . otorola products . I .

comp ete Information sufficient for constr . are ,nc uded as a means of i1lustratin .~~~y checked and is believed to be entirely ur:~;~~,:u~oses is not necessarily given. Th; i~~~~~t~emi.cond.uctor applications; consequently

s not convey to the purchaser of the semicond' owe~er, no responsibility is assumed fo . Ion on ~h's Application Note has been c :uctor deVIces described any license under thr ,naccura.c,es. Furthermore, such inform t~ree patent nghts of Motorola Inc. or others.a

,on

25 Watt 10 Watt

Amplifier Amplifier

Vdc (Volts) 12.5 12.5Power Input (mW) 75 180Power Gain (dB) 25.2 17.4Power Output Flatness (156.275- i 57.425 MHz) (dB) ±'0.1 ±'0.12nd Harmonic Attenuation (dB) 40 40Overall Efficiency of RF Stages (Percent) 56.8 44.5DC Current (Amps):

Total 3.61 1.89Output Stage 2.70 1.60Driver Stage 0.75 -Input Stage 0.07 0.20Power Switch Bias 0.09 0.09

Low Power Output ( ~ 1.0 Watt) Capabil ity Yes YesTotal DC Current for Low Power Output = 0.8 Watts (Amps) 0.95 1.08Variation in Low Power Output for Cumulative Changesof ±'2.0 dB < ±.0.2 <±'0.2

in Power Input and 11.0 to 15.5 Volts in dc Supply Voltage (Watts)

Degradation in Input VSWR Between HIILO Power Output (Percent) <10 <10Stability Amplifiers are Stable for Input Drive Levels

From Zero to Over 30 Percent Overdrive forVDC Values from 8.0 to 15.5 Volts

Ruggedness No Transistor Damagefor Open and Short CircuitLoad Conditions for All Load PhaseAngles andHigh Line of 15.5 Volts

1-1/2 T, #16 AWG Wire, 0.25" 1.0. (30 nH)1-1/2 T, #16 AWG Wire, 0.30" 1.0. (35 nH)3 T, #16 AWG Wire, Wound on 100 Ohm Resistor (45 nH)#16 AWG Wire, 0.8" Long, "U" Shaped (12 nH)#16 AWG Wire, 1.1" Long, Formed Around 0.6" Dia. Cyl.

(15 nH)0.15 j.lH Molded Choke with Ferroxcube 5659065/38 FerriteBead on Ground Lead7 T, #20 AWG Wire, Wound on R3 (100 nH)Ferroxcube VK200 19/4B Ferrite Choke91 Ohm, 2 W, ±5% Carbon Resistor100 Ohm, 0.25 W, Potentiometer, CTS Type R101 B orEquivalent560 Ohm, 1 W, ±10% Carbon Resistor100 Ohm, 1 W, ±10% Carbon Resistor

NOTES:1. Shaded components are common to both 25 Watt and 10 Watt systems.

2. Component designations C8 and L3 are not used in 25 Watt system.3. Amplifiers constructed on 0.62", single sided, G10, printed circuit board.

C1, C3C5,C6,C16,C17, C18C8C15, C21C19C9, C10,C22C11C12, C13, C23C14C2,C4,C7,C20

10 pF I56 pF Dipped Silvered36 pF Mica22 pF33 pF0.001 j.lF Ceramic Disc0.01 j.lF Ceramic Disc1.0j.lF, 35 V, Tantalum10 j.lF, 25 V, Tantalum8-60 pF Compression Mica TrimmerARCO #404 or Equivalent

L1, L2L3L4, L6L5L7

RFC3RFC4, 5, 7-R1R2

R3R4, R5

+C9 C12Ir

R4R3 RFC3

+

IC13C11~r

~C14

r1+

VDC = 12.5Volts

III

(110 mW)(75 mW)

III

(1.3Wl[0.7 wl

III

25W

II

(5.0W)(4.5 W)

III

(380 mW)(180 mWI

NOTES:

1. Power Levels are for VDC = 12.5 Volts, 158 MHz Operation.2. ( ) Indicates Power Levels Extrapolated from Minimum

Specified Device Gains at 175 MHz.

3. I Indicates Measured Power Levels.

4. A slight increase in power input/output levels can be antici-pated to off-set output harmonic filter loss.

III

(2.6 Wl[1.7 WI

III

10 W

approximate resistive portion of the load (RIO, that mustbe presented to the collector by the associated matchingnetwork, has been calculated for an output power level,P, and a collector supply voltage, VCC, from Equation 1.

R/L=(VCC)2 (1)2P

A detailed discussion related to the characterization ofRF power transistors for large signal input and outputimpedances and the derivation and limitations of Equation1 can be found in Reference 1. It is anticipated thatseveral of the RF Power transistors applicable to VHFmarine band transmitters will have their large signal im-pedance characterizations published in series equivalentform (R±jX) in the future. This data will proVide R/Ldirectly; thus minimizing the need for the approximatesolution proVided by Equation 1. The designer is cautionedto pay particular attention to all large signal impedancedata to determine whether it is in series or parallelequivalent form and to use it accordingly.

In all cases the transistor matching networks have beendesigned for the lowest Q that is still consistent withpractical component values, reasonable harmonic suppres-

sion and smooth tuning. This permits the transmitters tobe adjusted for an approximately flat response over the156.275 to 157.425 MHz frequency band allocated toship to ship and ship to shore communications.

For the 10 watt transmitter, the network following the2N5590 transistor must step impedance up to match the50 ohm load. For the 25 watt transmitter, this networkmust step the impedance down to match the combinedbase to ground impedance of the 2N6082 transistor. Tobest achieve these two varying requirements and stillfacilitate using a common printed circuit layout, twomatching network configurations have been used (SeeFigure 2).

All fixed value capacitors from 12 to 56 pF used in theamplifiers are dipped silvered mica units. The effectivecapacitance of these components at 158 MHz will deviatefrom their low frequency value for nominal capacitancevalues above approximately 15 pF. These larger valuedcapacitors have been characterized at 158 MHz and theresults tabulated in Table 11. The table also provides thecapacitance range at 158 MHz for the 8·60 pF variablecapacitors.

Nominal Parallel ReactanceCapacitance Component AtLow FrequencyAt 158 MHz 158MHzCapacitance

(pF) Xp (Ohms)(pF)

27.5 36.72233.5 30.127

33 47 21.852 19.33968 14.94775 13.456

8-60 (Variable) 10-110 108-9.1

Capacitor Type: Fixed Dipped Silver Mica, Cornell-Dubilier Type CM04 With EachLead 1/16" in Length.

Variable - ARCO #404 Compression Mica.

Design details for two representa.t~ve impe~anc~ match-ing networks are given below. AddItIOnal design mforma-tion can be found in Reference 2.

25 WAIT OUTPUT NETWORK DESIGN

Using Figure 9, the parallel equivalent output ca~aci-. f d to be 40 pF for the 2N6082 transistortance IS oun

when providing 25 watts at 158 MHz. This converts to acapacitive reactance of 25.2 ohms at 158 MHz. R/L forthis stage may be computed from Equation 1 to be 3.12ohms. The remaining parallel impedance components tobe accounted for at the 2N6082 collector are the 56 pFcollector to ground capacitor CI8 and the 45 nH dc feedcoil L6. (See Figure 2a for component references).Capacitor C18 is used to provide a low impedance fromcollector to ground at the second harmonic to improveefficiency. To enhance stable operation, coil L6 shouldpresent a low impedance for frequencies below approxi-mately 30 MHz; since at these lower frequencies, thedevice gain is high and the normal collector load isessentially removed by capacitor C21. An inductance of45 nH meets this condition and also permits adequatedecoupling from the dc line at 158 MHz. Accounting forL6 and using the 158 MHz value from Table" of 75 pFfor CI8 gives the total impedance at the 2N6082 collectorto be:

3.12.n -j13.4 0.12 .109 _~~-j25.2 n j45.n =.n -J. - ••• ,,,.n .n 2.88.n

The conversion from parallel to series form has beenmade using Equation I of the Appendix. The outputnetwork must therefore be designed to transform the 50ohm external load to the conjugate of 2.88 ohmsresistance in series with 0.83 ohms negative reactance. Therequired load impedance that must be present to thecollector is therefore 2.88 + j 0.83 ohms as noted inFigure 10.

For the purpose of network design, an operator (QU

for the network in Figure 10 will be defined as XL7RCXC

It should be noted that this QL is not intended torepresent the loaded Q as defined by the 3 dB bandwidthpoints of the network. Values of QL when defined asXL7 + Xc of approximately 5 to 8 will provide a good

RC

tradeoff between harmonic attenuation, I~w in~ertioll lossand the voltage levels that can occur dunng high outputVSWR conditions. For this design a value of IS nH waschosen for L7 yielding a QL value of

= 15-0.83 = 4.92QL 2.88

IXCI9, 201 and IXC211are found from Equations 2 and 3.

- --.!!.- = 72.5 -17.1 ohms (2)IXc19, 201- QL-A 4.92-0.67

IXC211 = ARL = 0.67(50) = 33.4 ohms (3)

where A and B have been defined as:

A = (RCO;2L2) - 1)~ =0.67

B = RCO + QL2) = 72.5

Converting from reactance to capacitance at 158 MHz

yields: C19, 20=58.8 pF

C21 = 30.1 pFAs shown in Figure 2a, capacitance C19, 20 consists of afixed and variable capacitor in parallel haVing nominal lowfrequency values of 33 pF and 8 to 60 pF respectively. Acapacitor having a nominal low frequency value of 22 pFis used for C21 since, as noted in Table II, it will exhibitan effective capacitance of approximately the calculatedvalue (30.1 pF) at 158 MHz.

25 WATT DRIVER/FINAL NETWORK DESIGN

The parallel input impedance components for the2N6082 output transistor as obtained from Figures 7 and8 are:

Rin = 2.0 ohms

Cin = -440 pF

The negative sign associated with Cin indicates the actualparallel reactance component is an inductance. At 158MHz this inductive reactance will have a value of 2.3ohms. The two external base to ground capacitors, CJ 6and C17 (see Figure 2a for component references)provide a COurse impedance match at J58 MHz and a lowimpedance to ground at the second harmonic. Twocapacitors in parallel have been used to minimize leadinductance and to provide an electrically symmetricalarrangement. Neglecting the effect of RFC6 but inclUdingmeasured values from Table II for C16 and C17 yields acombination base to ground impedance of:

-j13.4_ B jO.87.n.n - 2.0.n j3.5.n =~

1.51 .n

Again Equation J of the Appendix has been used toconvert from parallel to series form.

As noted in Figure 3a the required output power fromthe 2N5590 transistor is approximately 5 watts_ For thiscondition, the parallel output impedance components are

o100

./'" ---/v

/- Vcc = 12.5 VdcV Pout' = 25 W

/'V

FIGURE 5 - 2N5590 FIGURE 8 - 2N60822000 -100

VCC = 12.5 Vdc~ -~ co u..

co u.. Q>~-200.!! ~ <;;

•• > Q>.~ ~ 1000 :J Uco:J co r:r ~r:r ~ ww '0

Qj '0 2 •••• a.-300a. •• ••:! •• ;0 u•• U n. ;n. ~

0C: :J co a.a. .- co.= u -U -400

--lOW

-1000

100 150 200 250 300 -500125 150 175 200 225

f. Frequency (MHz) f. Frequency (MHz)

1\\\ VCC = 12.5 Vdc

'" Pout=25W

""-.•.•........ ----- --I--- I---

~co u..-i .3- 150.2: eu:J g~ ~Q) ~~ 1ij- 100••UCl. ~

_ :J~ a.:J ~o :J

U 0 50

150 175

f. Frequency (MHz)

R2

m, W, + 5%

25 Watt Transmitter

100 Ohm, 1/4 W. Potentiometer

QuantitY I VOC 11.0V I VOC 12.5V 1 V 15

10 Watt Transmitter

PLOI 0.72 I 080 oc .5V

VOC -11.0 V-

IT087 . 0.92

0.70

VOC - 12.5 V VOC 15.5 V

II

~8 0.95 1.05

0.80

Units

IR1

100 110

1.00 1.080.90 Watts

IC

75 91

185 200

1.20 Adc

VLP

697 759 12575 91

205 mAdc

Po MJE2020

2.75 2.80 815740 789

125 mAdc

POR1

5.8 74 2.901.8

870

·PO 1N5229

0.51 0.~5 10.36.8

1.9 2.0mAdc

138 20 1.41

8.3Volts

Po R2 I185 1 6 352

0.51 0.7511.7 Watts

• 85 185

138 2061.41

For zero ba

185352

Watts

se current conditions (h'

185

mW-

NOTES: 1. With V oghpower operation)

185 mW-

OC 12.5 Volts, Am Iif'

----'

15.6 ohms and 70 pF as obtained from Equation 1 andFigure 6. An external capacitor, C6 from collector toground and a low inductance dc feed coil, L4, have againbeen used. Accounting for these two external componentsgives the total collector to ground impedance as:

-i13.4 E15.6 3.41 no15.6 no j14.4 no j45 no: no _j8.25 =~r-i6.45 no

The drive/final interstage network must match thecombination base to ground impedance of the 2N6082transistor to the required collector load impedance of the2N5590 device, i.e. to the conjugate of3.41 -j 6.45 ohmsas indicated in Figure 11. The matching network com-ponent values can be found by defining an operator (QO

Xu + XLas _---, selecting an appropriate value for L5 and

RLthen solving Equations 4 through 6 using the values givenin Figure 11. An inductance value of approximately 12nH for L5 meets the requirements of providing a low Qnetwork and component values which are practical to

achieve. D 110\XC1SI = OL=C = 8.'5-5.6 = 38 ohms (4)

\X'C71 = CRS = (5.6)(3.41) = 19.1 ohms (5)

IXc71 = \X'C71 -\XS\ = 19.1-6.45 = 12.7 ohms (6)

where C, D and QL have been defined as:

C =~L (l +R~L2) - 01/2 = 5.6

D = RL (l + QL2) = 110

and QL = XL5 + XL = 12 + 0.87 = 8 5RL 1.51 .

Converting Xc7 and XClS to capacitance at 158 MHz

gives:C7 = 79.5 pF

C1S = 26.5 pF

FIGURE 10 _ Output NetWork Configuration For25 Watt Transmitter

FIGURE 11 _ Driver/Final Matching Network For25 Watt Transmitter

,-.------"'------6 45 no xc;¥~ ~ XL

1.51 no RL

FIGURE 12 _ Schematic and Nominal PerformanceData For LoWpower Output Control Circuit

To VOC

IT

ttiCTo 2N6255

Collector

To 2N5590/2N6082

Collectors

(PLO) then set for 08 W pIer Input Power Set for R2 . atts by Ad' . ated H' h P. A Nominal Zener Volt Justlng R2. Ig ower Output at 158 MH

3 P age of 4.3 Volt h z. Low P. D .0'" "'0 DC ' M 000•• , •• , oww D.,p.'power being dissipated b . or all calculations.

y the Ind icated component.

Again, Table II indicates a fIxed capacitor having anominal low frequency value of 22 pF should be used forCIS and that the 8 to 60 pF trimmer capacitor is suitablefor C7.

This completes the matching network discussion. Sim-ilar procedures can be followed for the remaining inputand interstage networks. The printed circuit board layouthas been configured to minimize interconnecting leadinductance in the RF signal path, however, in some casesit will be necessary to account for a small amount ofadditional interconnect inductance (on the order of 5 to10 nH) in order to accurately determine the componentvalues.

DESIGN CONSIDERATIONS FOR LOW POWER(~1.0 WATT) OPERATION

The FCC regulations require that all VHF ship stationtransmitters operating in the 156-162 MHz band be equip-

Decreasing DC Supply Voltageto Input Stage.

a. Using Dropping Resistor orPotentiometer.

Decreasing DC Supply Voltageto all Three Stages.

•. Using High Power DroppingResistor or Potentiometer.

Cecrea,ing DC Supply Voltageto Driver and Output StagesUsing Zener Regulated DCSource.

ped with a control for switching from rated power outputto one watt or less power output. A variety of design prob-lems can be encountered in meeting this requirement. Thetransmitter must be designed to remain stable under thedifferent conditions imposed upon it during this radicalvariation from normal operation. In addition, tradeoffs inthe low power circuitry between complexity, cost, andsensitivity of the low power output level with systemvariations must be considered.

In general, the possible approaches available for reduc-ing the output power to less than one watt can be dividedinto two categories:

a. The dc supply supply voltage can be altered toreduce the amount of RF gain available.

b. The RF signal level itself can be reduced.

Consideration has been given to both categories.

Power-er=WitchLOTo 2N6255

CollectorHI To Vdc

Power HI

To 2N6082 Switch 0--- To Vdc

Collector ~LO

a. Low Power Components are Adequate(Collector Current is ApprOlCimately

60 mAde).

b. Low Power Output Level can be Ad·justed.

c. Low Cost.

a. Relatively Low Power Componentsare Suitable but now must ControlApproximately 250 mAdc.

b. Ooesn't Oegrade Input VSWR asBadly as Method 1,

b. Low Effect on Input VSWR.

c Relatively Insensitive to Both tnputPower and VDC Variations.

Power a. Aelatively Insensitive to Both InputTo 2N625~5' Switch LO Power and Vdc Variations.2N5590,2N6082 HI To Vdc b. All Stagesare Operating at Low Gain.Collectors

c. Low Power Output Level can beAdjusted.

d. Collector Voltage Values are Higher(Approximatety 3.5 Volts).

To Vdc a. Not Sensitive to Input Power or VdcVariations.

To 2N6255, b. Suitable Low Cost Plastic Encapsu-2N5590, and lated Semiconductors are Available.2N6082Collectors c. Components are Aelatively Compact

and Light in Weight.

d. Economical, Low Power, Potentiom-eter can be used to Set Low PowerOutput Level.

e. Also band d of Method 4a.

To 2N5590and 2N6082Collectors

a. All the Advantages of Method 4bExcept that Input Stage is now

_ Operating at High Gain.

b. Low Effect on Input VSWR.

a. Very Low DC Collector VoltageRequired (Approximately 1.0Volt).

b. Method 18 is Critical to Both InputPower and Vdc Variations. Methodlb is Critical to Input Power Vari·ations.

c. Degrades Input VSWA Significantlywhen SWitching from High to LowPower.

a. Required DC Collector Voltage isStill Low (Approximately 2.0Volts).

c. Input Stage is Operating at FullPower Lavel with MismatchedLoad.

a. Ralatively Low Power Output isAchieved (Approximately 0.25Watts).

b. No Maans of Adjusting Low PowerOutpu t Levet.

c. Drivar Staga is Operating at FullPower Level with Mi'matchedLoad.

a. High DC Current Level Involved.

b. BUlky-High Power AesistorRequired.

c. Degrades Input VSWA.

a. Must Provide Adequate Heat Sinkfor Control Tran,istor.

b. Degrades Input.VSWA.

a. Same as Method 4b but does notSignificantly Effect Input VSWR.

b. Input Stage is Oparating at FullPower Level with MismatchedLoad.

Unsatisfactory-With 18 the LowPower Output will Nominally Varyfrom 0.15 to 1.0 Watt as VdcChangesfrom 11.0 to 16.0 Volt,.Both la and lb Aequire Less Thant 1.0 dB Variation in Input Powerto Prevent Power Output from Ex-ceeding 1.0 Watt or Being Cut-Off.

Unsatisfactory-Low Power OutputVaries only t 0.2 Watt for ·StandardTest Condition, but becau,e of Ex·tremely Low Initial Level <0.25Watt,) Absolute Value of Outputcan becoma too Low.

Satisfactory-Low Power OutputVaries:t 0.3 Watts for ·StandardTest Condition. Most of Power Out-put Change is due to Vdc Variation ..

Satisfactory-Low Power OutputVaries LessThan :t 0.2 Watts for·Sundard Test Condition.

Aecommended Choice-Low PowerOutput Varies LessThan ±0.2 Wattsfor Sundard Test Condition. InputVSWR is Degraded Lass Than 10% inGoing from High to Low Power Out·put Operation.

Attenuating the RF signal level appears to be the leastdesirable approach from the standpoint of circuit com-plexity, ease of achieving front panel control, and theeffect on RF gain during normal power output opnation.Many possible approaches of reducing power by alteringthe DC supply voltage have been investigated in detail forthe 25 watt transmitter and the results summarized inTable III. These methods are of primary importance whena regulated dc supply is not being employed. If a dcregulator is being used then the decrease in dc supplyvoltage can best be accomplished in the dc regulatorcircuitry. Each method of Table III has been evaluated onthe basis of:

a. Variation of power amplifier input VSWR whenswitched from normal to low power operation.

b. Sensitivity of low power output level to changes inbattery voltage and input drive power.

c. Cost.

d. Adjustability of output power level.

e. Physical size of components.

Method 5 of Table III appears to offer tl'e best overallchoice and this approach has been incorporated in boththe 25 watt and 10 watt transmitter designs. If, however,cost is of primary concern, an appropriate power resistorcan be used to drop the dc supply voltage to the driverand output stage (similar to Method 4a).

Nominal current, voltage and component powerdissipation values for Method 5 are given in Figure 12 for

40

35

~ 30co~•.. 25:ls- 20:l0~ 15

;=100

<L

5

00 25

8.0

7.0

6.0

5.0 IS.E

4.0 «•..

3.0 c:~

2.0 :lUU

1.0 Q

f=158MHz

VDC = 12.5 VOlts

Tuned for Pout = 25 W

o75 100 125 150 175 200

Power Input (mW)

16

14

~ 12co

~ 10•..:lS- 8:l0

6...,;= 40

<L

2

00

4.0

3.5

Power Output 3.0 -;;Cl

2.5 E«DC Current

2.0 •..c:

f = 158 MHz' 1.5 ~VDC = 12.5 Volts

:lU

Tuned for Pout = 10 W1.0 U

Q0.5

o100 150 200 250 300 350 400

Power Input (mW)

both the 25 and 10 watt transmitters. Heat sink considera-tions for the MJE2020 transistor are considered in theThermal Design Section.

In addition to the data given in Table I, the curves inFigures 13 and 14 provide additional performance infor-mation for a 25 watt and a 10 watt transmitter operatingat 158 MHz. Figure 15 shows the amount of input powerand dc current required. for the 25 watt amplifier forvarious values of dc supply voltage. This information willbe of use if it is intended to use a regulated dc supply todrive the transmitter since the regulated dc voltage will, ofnecessity, be reduced below the nominal battery voltage.

Figures 16 and 17 provide performance informationfor the transmitters when tuned for other frequencies inthe 144 to 175 MHz band.

High load VSWR testing has been done on bothamplifiers at high line voltage and for all load phaseangles without damage to any transistor. Figure 18indicates current and power dissipation levels that can beexperienced when the 25 watt amplifier output ismismatched into open and short circuit loads. This datawas obtained by adjusting the amplifier for rated poweroutput into a 50 ohm load with a dc supply voltage of13.6 volts. The supply voltage was then increased to 15.5volts causing the output power to increase to 32.5 watts.The 50 ohm load was then removed and replaced with an?pe.n or short circuited air line of variable length. Asmdicated by the curves, worst case power dissipation for

FIGURE 14 - Power Output And DC CurrentVersus DC Supply Voltage

408.0

~ 35 f=158MHz

Pin = 75 mW 7.0_co Power Output ..~ 30 Tuned for Vdc = 12.5 VOlts Cl6.0 E•.. «:l 258- 5.0 •.•

:l20

c:0 .,~ 4.0 ~

15:l

;= U0 3.0 U

<L 10 Q2.0

51.0

00 2 4 6 8 10

012 14 16 18 20

DC Supply. VDS (Volts)

16(b) 10 Watt Transmitter

f = 158 MHz 4.014

Pin = 180 mW~

4.5

co 12 Tuned for Vdc = 12.5 Volts~•.. 10:lS-

8.02.0 ~

:l0~ 6.0

15:;;= . U0 4.0

1.0g0..

2.00.5

00 2.0 4.0 6.0 8.0

010 12 14 16 18 20

DC Supply. Vdc (Volts)

FIGURE 15 - Power Input and DC Current versus DC SupplyVoltage for Rated Power Output

400 I I 8.0f = 158 MHz

350 - 7.0 -;;;Pout = 25 Watts a.

~ 300 Tuned for each Vdc value 6.0 E<l:

E 250 5.0 •..•.. c::J 200 4.0 ~a.c: :J

U(p 150 3.0 Ui: 00 100 2.00..

50 1.0

0 08.0 9.0 10 11 12 13 14 15 16

DC Supply. Vdc (Volts)

the output stage can increase from a normal 50 ohm loadvalue of 13.3 watts to approximately 75 watts. Prolongedoperation in this worst case condition with an ambienttemperature of only 25°C will require a heat sinkspecification for the 2N6082 transistor of 0.12°C/W inorder to keep the device junction temperature fromexceeding 200°C. Designing the heat sink to be adequatefor this infrequent mode of operation would normally beuneconomical and impractical. Therefore, if it is requiredto operate with this worst case load condition, the needfor a protection circuit which will reduce either the RFdrive power, the dc supply voltage, or the dc supply

FIGURE 16 - Power Output and DC Currentversus Power Input at 175 MHz

40 8.0

35 7.0..•.. ..•.. 30 6.0 a.III

~ E25 5.0

<l:•..:J I •..a.

Total DC Current c:•..20 4.0 ~:l --+++-0 :J~ 15 3.0 U

Q)

i: u0 10 f=175MHz 2.0 0

0..

5.0Vdc = 12.5 Volts

1.0Tuned for Pout = 25 Watts

0 00 100 200 300 400 500

Power Input (mW)

16

14..•..•.. 12III

~ 10•..:JS- 8.0:J0(p 6.0i:0 4.00..

2.0

00

f ••.175 MHzVdc = 12.5 "olts

Tuned for f'out = 10 Watts 6.0 ~

5.0 ~Power OutputI •..

4.0 ~

3.08Total DC Current 2.0 g

1.0

o500

FIGURE 17 - Power Input and DC Current forVHF Band Operation

500

450

400

~ 350E

10

9.0

8.0 ~7.0 <l:

I

Vdc = 12.5 Volts

Po = 25 WattsTuned at Each Frequency

•••......... ITotal DC Current-~ ./

II ~

Power t",put_ ~

•..6.0 ~5.0 :J

UUo

•..ii 250c:(p 200

~ 1500..

2.0

1.0

o180

100

50o140

500

450

400

~ 350

E 300

2.50

2.25

2.0 _..1.75 E1.50 ~

I ITotal dc Current

- .......-power~

Vdc = 12.5 Volts

Po = 10 Watts

Tuned a~Each ,Frequency

•..ii 250c:

•..1.25 ~

1.0 :;U

0.75 Uo

0.50

0.25

o180

200(pi: 150o

0.. 100

50

o140 145 150 155 160 165 170 175

Frequency (MHz)

current during high VSWR load conditions should beconsidered even though transistors capable of withstand-ing infinite VSWR conditions are used. It is, however,important to use transistors capable of withstandingmomentary worst case short and open load conditions soas to prevent device failure during the reaction time of theprotection circuitry. The 2N5590 and 2N6082 outputdevices exhibit this degree of ruggedness.

THERMAL DESIGN

Proper thermal analysis and good thermal constructiontechniques are very important in RF power transmitterdesign and fabrication. Transmitter construction shouldinclude the use of:

a. A smooth heat sink surface to maximize heat sinkto transistor case contact area.

b. A proper amount of thermal joint compoundbetween heat sink and transistor case interface.

c. Torque as specified for the transistor when fasteningthe transistor to the heat sink.

d. A heat sink configuration that will permit locatingthe higher power level stages near the maximumheat transfer position on the heat sink.

Using the measured dc current values given in Table Iand the measured RF power levels given in Figure 3, theapproximate power dissipated in each transmitter RFstage, PD, can be calculated from Equation 7.

PD = Pin(rf) + Pin(dc) - Pout(rf) (7)

20 40 60 80.0. L, Change in Line Length (cm)

Power InputSet for Power Output = 25 Watts With V DC = 13.6 Volts

~ 10E~ 9.0

C 8.0

t 7.0~U 6.0Uo 5.0

~ 4.0•..'E 3.0'"~ 2.0

~ 1.0iiio 0•...0

_ 10

~ 9.0

~ 8.0

~ 7.0

~ 6.0UU 5.0

~ 4.0Ol

~ 3.01Il'; 2.0S- 1.0~o 0

o

RE 18 - 25 Watt Amplifier Power DissipationFIG~DC Current for Openand Short Circuit Loadan Conditions at High Line Voltage

(a) Complete Amplifier

20 40 60.0. L, Change in Line Length (cm)

(b) 2N6082 Output Stage Only

E~155.0_c

39.5 0.;;24.0 ~

'on108.5 i593.0 0;77.5 ~

0..

62.0 0;46.5 ::::

.~31.0 c

15.5 ~

o00

f=158MHz1

High Line = 15.5 Volts1- 32 5 Watts (For 50 n Load) .

Po - . . d - Open Coax,alL d = Shorted CoaxIal -Loa - . .- oa Airline, AirlIne"

/ '\j --- ....J"..

/ ,/ '\.

7 /\ ~/ '" /~.••.

.....•.•. V1'- •••••.•• /

80 1

f = 158 MHzHigh Line = 15.5 VoltsP = 32.5 Watts (For 50 n Load)o

'"155 ~

139.5 ~

124 g.;;

108.5 ~

93.0 .~a

77.5 ~

~o0..

46.5 QlOl

31.0 ~1Il

15.5 ';

o &100 8

. -Load = Open CoaxialLoad = Shorted CoaxIal AirlineAirline

Power dissipation for the 2N6255 and 2N55?0 deviceswill be greater for the 10 watt trans~t~er ~d, In.the caseof the 2N6255 device, the worst diSSIpatIOn will occurduring the low power mode of operation. This happens,since at this time, the 2N6255 stage is receiving normal dcvoltage and RF drive power but is working into amismatched load.

Solving Equation 7 for a dc supply voltage of 12.5volts yields:

2N6082 stage, Pn = 13.3 W - 25 Watt Amplifier

2N5590 stage, Pn = 11.7 W - 10 Watt Amplifier

1.0 W - 10 Watt AmplifierOperating at Rated Power

*1.7 W - 10 Watt AmplifierOperating in Low PowerMode

Thermal data for the transistors being used appears inTable IV.

For any single transistor stage, the heat sink to ambientthermal resistance (ROSA) requirement may be computedfrom Equations 8 and 9.

ROIS = ROIC + ROCS

RO - TJ'(max) - TA ROSA - ~---~- - ISPn

ROJC ROCS TJ~max)°C!W °C!W CDevice

1.0 2002N6255 35200'0.32N5590 5.85200'0.32N6082 1.92150• -2.6MJE2020 1.56

ROJC = Junction to CaseThermal Resistance

- C e-to-Heat Sink Thermal Resistance, ValuesROCS- G~~enApply when Thermal Compound is Used

TJ(max) - Maximum Permitted Junction Temperature

Lb.• mes Mounting Stud Nut Torqued at 6_5 In.Assu f 3 Mil Thick Mica Insulator.•• Assumes the Use 0 a

where RO JS = junction-to-heat-sink thermal resistance.

TA = ambient temperature.

- . ents for the 25 watt transmitterHeat SInk requlfem . t Pnt ut stage can be obtained by using the appropna e

°alup d data from Table IV in Equations 8 and 9. If the

v ue an . t . med tomaximum ambient temperature reqUlremen is assube 60°C this gives:

RO JS (2N6082) = 1.92 + 0.3 = 2.22°C/W

200 - 60 _ 0C/WROSA (2N6082) ----- 2.22 - 8.313.3

Calculating heat sink requirements for the 10 watttransmitter in a like manner yields:

RO JS (2N5590) = 5.85 + 0.3 =6.25°C/W

ROSA (2N5590) = 200 - 60 6.25 = 5fc/w11.7

RO JS (2N6255) = 35 + 1.0 = 36°C/W

200 - 60 ° /W P - lOWROSA (2N6255) = --- - 36 = 104 C , out-1.0

200 - 60ROSA (2N6255) = - 1.7 36 = 46.5°C/W, Pout = O.8W

Heat sink requirements for the MJE2020 controltransistor can be calculated in a similar manner using thepower dissipation values given in Figure 12 and thethermal data given in Table IV. For the 25 watttransmitter with TA = 60°C, Equations 8 and 9 give:

ROIS (MIE2020) = 1.56 + 2.6 = 4.16°C/W

150 - 60ROSA (MIE2020) = 7.4 4.16 = 8.0°C;W_

Nominal Supply Voltage of 12.5 Volts.

150 - 60ROSA (MJE2020) = 10.3 - 4.16 = 4.6°C/W_

High Line Voltage of 15.5 Volts.

*Assumes approximately 40% of the power to the2N5590 stage is being reflected because of impedancemismatch introduced during low power operation.

The MJE2020 device only dissipates significant powerduring transmission in the low power mode. During thistime the power being dissipated by the output stage RFtransistor is negligible. Therefore, if the MJE2020 isproperly located near the RF output device, a commonheat sink will serve both transistors.

The following points apply:

a. The ROSA values have been computed for con-tinuous transmitter operation. The heat sink requirementswill be reduced for duty cycle conditions.

b. If operation into mismatched loads is anticipated,the ROSA values must be modified to take into accountthe increased dissipation that can occur for theseoperating conditions.

c. It is not necessary for the heat sink to extend theentire amplifier length as shown in Figure 1. The onlyrequirement is that the sink meet the RO SA requirementsof the driver, final and control transistors.

The amplifiers have been constructed to mmlmlzethe amount of modifications required prior to reproduc-ing the units economically in large quantities:

a. Low cost components have been used.

b. The number of tuning adjustments have beenminimized.

c. A commonality of components exists between the25 watt and 10 watt transmitters.

d. Single sided printed circuit board constructionadaptable to high volume assembly techniques such aswave soldering and automatic component insertion hasbeen employed. A full scale layout for the board artworkappears in Figure 19.

The printed circuit board of Figure 19 has been laidout to minimize component lead length and interconnec-tion inductance in the RF signal path and to maximize theamount of area available for the ground plane. It isimperative that the high level ground currents for the 25watt output stage be confined as much as possible to thisstage and not permitted to circulate in the vicinity of thelow level input stage. If this conduction does occur, adegradation in transmitter gain and also an unnecessaryincrease in input VSWR when switching from normal tolow power operation can result. Controlling the groundcurrent flow becomes more difficult if a conducting plate,such as a heat sink, is grounded only near the amplifieroutput and input. This grounding condition will permit asignificant portion of the load ground current to return tothe output stage ground via the heat sink and low levelinput stage ground path. To alleviate this problem,additional RF ground returns must be provided betweenthe heat sink and the circuit ground. Ground returnsbetween the heat sink and the vicinity of each emitterlead for the 2N6082 and 2N5590 stages are especiallyimportant. These ground connections can be accom-plished by using properly located spacers capable ofproviding a good RF connection between the printedcircuit board ground and the heat sink. Suitable spacerlocations are indicated in Figure 19.

Mounting and thermal information pertaining to the2N5590 and 2N6082 device packages can be found inReference 5. Ideally, these packages should be secured tothe heat sink prior to being soldered into the circuit. This,however, is not easily achievable with the constructionmethod being employed. Therefore, adequate precautionsmust be taken when soldering the device packages to thecircuit board in order to assure proper alignment with theheat sink mounting holes and to eliminate tension

between the ceramic to metal joints. Two alternateconstruction approaches ar~:

a. Put the amplifier circuit pattern on the com-ponent side of the board. This, however, will not permitthe use of wave soldering techniques.

b. Use a double sided board layout which will requirethe use of plated through holes, eyelets or wrap-aroundgrounds.

Regardless of the construction method used, it isessential to proper electrical performance that the RFtransistors have their emitters grounded near the devicepackage and that all component and interconnection leadlengths in the RF signal path be held to an absoluteminimum.

The MJE2020 control transistor has been located onthe back side of the printed circuit board to permitmounting directly on the heat sink. An alternate approachwould be to locate the transistor on the component sideover a cut out in the board and then use a spacer of lowthermal resistance material between the heat sink andtransistor.. This second method would simplify assemblyprocedures at the expense of a slight increase in thermalresistance between the transistor case and heat sink. Ineither case, a mica washer must be used to electricallyisolate the transistor from the sink. The MJE2020 deviceis available in several standard lead form configurations.The board layout of Figure 19 will accommodate con-figuration A. A description of the various lead configura-tions, mounting, and heat sinking techniques for theMJE2020 package (Case 199) are discussed in detail inReference 6.

@NlOTOROLA

APPENDIXSERIES AND PARALLEL EQUIVALENTS

To convert a parallel resistance and reactance combina-tion to series:

,To convei'l a series resistance and reactance combina-

tion to parallel:.... 2 2

Rp = RS + (XS) , Xp = Xs + (RS) (2)

RS Xs

REFERENCES1. "Systemizing RF Power Amplifier Design," by Roy

Hejhall, Application Note AN-282A.

2. "Matching Network Designs with Computer Solu-tions," by Frank Davis, Application Note AN-267.

3. "Design Techniques For an 80 Watt, 175 MHz Trans-mitter For 12.5 Volt Operation," by John Hatchett.Application Note AN-577.

4. "VHF Power Amplifiers Using Paralleled OutputTransistors," by John Hatchett. Application NoteAN-585.

5. "Mounting Stripline-Opposed-Emitter (SOE) Transis-tors," by Lou Danley. Application Note AN-555.

6. "Mounting Procedure For, And Thermal Aspects Of,Thermopad Plastic Devices," by Larry Wing. Applica-tion Note AN-290B.

Serniconduc'for Produc'fs Inc.