W'13: 6 FN: CP 406 (1451)

COMPUTER ARCillTECfURE

Time : Three hours

Maximum Marks : 100

Answer FIVE questions, taking ANY TWO .from Group A, ANY TWO .from Group Band ALL from Group C.

All parts of a question (a, b, etc. ) should be answered at one place.

Answer should be brief and to-the-point and be supplemented with neat sketches. Unnecessary long answer may result in

loss of marks.

Any missing or wrong data may be assumed suitably - giving proper justification.

Figures on the right-hand side margin indicate full marks.

Group A

1. (a) Explain various mechanisms of data transfer from a peripheral device. 10

(b) What is the difference between a direct and indirect addressing modes? How many references to memory are needed for each type of addressing to bring the operand into a processor register ? Briefly explain your answer. 10

2. (a) What is DMA? Explain DMA mode of data transfer using a suitable block diagram. Give an example where DMA mode of data transfer is useful. lO

(b) Explain the fetch cycle of instruction execution with respect to the various micro-operations carried out by using a labelled block diagram of the CPU. 10

3. (a) The acces~ time of a cache memory is 100 ns and that· of mam memory 1 000 ns. It is estimated that (b) Explain four possible hardware schemes that can be

80% of the memory requests are for· read and the ·used in an inslruction pipeline in order to minimize the remaining 20% for Write. The hit ratio for read access performance degradation caused by instruction branch-only is 0.9. A write-through procedure is used.

. . .

3+3+4 mg. 10

(z) What is the average access time of the system (c) A weather forecasting computation requires 250

considering only memory read cycles ? billion floating point operations. The problem is pro-cessed ina supercomputer that can perform I 00 mega

(iz) What is the average access time of the system for flops. How long will it take to do these calculations? 5

both read and write requests ? . 6. (a) What is an associative memory? With the help of a

(iiz) What is the hit ratio taking into consideration the suitable block diagram~ explain how it can be

write cycles ? impk:uiented. 7

(b) Explain the concept of a memory hierarchy. Explain (b) Describe in briefFlynn's classification of computer

the concept of locality of reference and state its system architecture. 5

importance to the satisfaction operation in presence of (c) Describe in brief the architecture of a vector proces-hierarchies. 10

sor. What are some of the key limitations of this

4. (a) Define a stack. How can it be implemented? Give architecture? 8

one example use of stack. 5 7. (a) What do you mean by instruction level parallelism?

(b) What is the difference between a microprocessor and Write the important approaches available to exploit

a microprogram ? Is it possible to design a micro- instruction 1e\'cl parallelism. 5

processor without a microprogram ? 5 (b) Construct a schematic blockdiagmm fora4 x 4 omega

(c) What is the difference between an 110 mapped 110 switching network. Show the switch setting required and memory mapped 110 ? What are their advan- to connect input 3 to output I. 5 tages and disadvantages ? 5

(c) What is a SIMD computer ? Discuss one example

(d) What is the difference between an asynchronous and application of this computer. 5 synchronous bus ? What are their relative advan-tages ? Are 110 buses synchronous buses ? 5 (d) What is a multiprocessor? Briefly discuss its archi-

tecture. 5 Group B

8. (a) Discuss the difference between tightly-coupled and a

5. (a) Discuss the relative advantages of CISC processors loosely-coupled computer :from the view point of

and RISC processors. 5 hardware organisation and programming techniques. Identify the important characteristics of a problem

5'12:6 FN:CP 406 (1451)

COMPUTER ARCIDTECTURE

Tzme : Three hours

Maximum Marks : 100

Answer FIVE questions, taking ANY TWO from Group A, ANY TWO from Group Band ALL from Group C.

All parts of a question ( a, b, etc. ) should be answered at one place.

Answer should be brief and to-the-point and be supple­mented with neat sketches. Unnecessary long answer may

result in loss of marks.

Any missing or wrong data may be assumed suitably giving proper justification

Figures on the right-hand side margin indicate full marks.

Group A

1. (a) What is the difference between a direct and an indirect addressing mode of an operand ? How many references to memory are needed for each addressing mode to bring an operand into a proces-sor register ? 8

(b) A computer uses a memory unit with 256 K words of32 bits each. Each instruction is stored in one word of memory. Each instruction has two oper­ands- one register direct and one memory direct operand. The instruction has three parts : An operation code, a register code part to specify one of 64 registers, and an address part.

(Turn Over)

(i) How many bits are there in the instruction <lpe­ration code, the register code part, and the address part ? 6

(ii) Draw the instruction word format and indicate the number ofbits in each part. 6

2. (a) What is meant by a hardwired implementation of a control unit ? Explain briefly. 7

(b) What is the difference between a synchronous and an asynchronous bus ? Discuss their relative ad-vantages. 6

(c) Microprogrammed control is not suitable for RISC architecture. Justify the validity or otherwise of this statement. 7

3. (a) What do you understand by content addressable memory ? Explain one example application of content addressable memory. 10

(b) The access time of a cache memory is 100 ns and that of main memory 1000 ns. It is estimated that 80 percent of the memory requests are for read and the remaining 20 percent for write. The hit ratio for read accesses only is 0.9. A write through proce­dure is used.

(i) What is the average access time of the system considering only memory read cycles ? 3

(ii) What is the average access time of the system for read and write requests ? 3

(iii) What is the hit ratio taking into consideration the write cycle ? 4

S'12:6FN:CP406 (1451) ( 2 ) (Continued)

4. (a) What is the difference between isolated 110 and memory-mapped J/0 ? What are the advantages and disadvantages of each ? 10

(b) What is DMA? Explain one practical example ofDMA. Why does DMA have priority over the CPU when both request a memory transfer. 10

GroupB

5. (a) Determine the number of clock cycles that it takes to complete execution of 100 instructions in a six segment pipelines. Use this to determine speed up over anon-pipelined processor. 10

(b) Explain the differences between RISC and CISC architectures with examples. 10

6. {a) Explain loosely coupled and tightly-coupled micro-processors, and discuss their relative advantages. 10

(b) What do you mean by hazard in a pipeline ? What are the different types of hazards ? How can these be overcome ? 10

7. (a) Construct a diagram for a 4 x 4 omega switching net­work. Show the switch setting required to connect input 3 to output 1. 10

(b) What is the cache coherence problem in a multi­processor ? How can the problem be resolved ? Briefly explain the important schemes available for this. 10

8. (a) What is a vector computer ? Name two applica­tions that can efficiently be executed on a vector computer. 5

S'l2: 6 FN: CP 406 (1451) ( 3 ) (Turn Over)

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in

JYOTHIS ACADEMY, Kottayam Mob 9495951100 www.amieindia.in