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Course Title: ALGORITHMS FOR VLSI Course Code: ECE721 Credit Units: 4 Course Level: PG Course Objectives: The knowledge of Algorithm for VLSI Design is necessary for a better understanding of almost all the Placement & Routing concepts of circuits. Here our intention is to make the students acquainted with the general idea that the development of VLSI is based on the basic topics or algorithms required for designing physical systems. Prerequisites: Basics of VLSI Design Course contents/Syllabus: Weightage (%) Module I : Introduction 10% VLSI Design Cycles, New Trends in VLSI Design Cycles, Design Styles, Transistor fundamentals, Introduction to Basic Algorithms Module II: VLSI Algorithms 20% Partitioning: Problem formulation, classification of partitioning algorithms, Group migration algorithms, simulated annealing & evolution, other partitioning algorithms. Module III: Placement Algorithms 20% Placement, floor planning & pin assignment : Problem formulation, simulation base placement algorithms, other placement algorithms, classification of floor planning algorithms, constraint based floor plannning, floor planning algorithms for mixed block & cell design. General & channel pin assignment. L T P/ S SW/F W TOTAL CREDIT UNITS 3 1 0 0 4

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Page 1: Algorithm for VLSI

Course Title: ALGORITHMS FOR VLSI

Course Code: ECE721

Credit Units: 4

Course Level: PG

Course Objectives: The knowledge of Algorithm for VLSI Design is necessary for a better understanding of almost all the Placement & Routing concepts of circuits. Here

our intention is to make the students acquainted with the general idea that the development of VLSI is based on the basic topics or algorithms required for designing physical

systems.

Prerequisites: Basics of VLSI Design

Course contents/Syllabus:

Weightage (%)

Module I : Introduction 10% VLSI Design Cycles, New Trends in VLSI Design Cycles, Design Styles, Transistor fundamentals, Introduction to Basic Algorithms

Module II: VLSI Algorithms 20% Partitioning: Problem formulation,

classification of partitioning algorithms,

Group migration algorithms,

simulated annealing & evolution,

other partitioning algorithms.

Module III: Placement Algorithms 20%

Placement, floor planning & pin assignment:

Problem formulation,

simulation base placement algorithms, other placement algorithms,

classification of floor planning algorithms,

constraint based floor plannning,

floor planning algorithms for mixed block & cell design.

General & channel pin assignment.

L T P/

S

SW/F

W

TOTAL CREDIT

UNITS

3 1 0 0 4

Page 2: Algorithm for VLSI

Module IV: Routing Algorithms - I 25%

Global Routing: Problem formulation,

classification of global routing algorithms,

Maze routing algorithm, line probe algorithm,

Steiner Tree based algorithms,

ILP based approaches

Detailed routing: problem formulation,

classification of routing algorithms,

single layer routing algorithms,

two layer channel routing algorithms,

three layer channel routing algorithms, and

switchbox routing algorithms

Module V: Routing Algorithms – II 25%

Over the cell routing & Specialized Routing: Cell models,

Two layers over the cell routers,

Clocking Schemes,

Clock Routing Algorithms (H-tree, MMM Algorithm)

Compaction: problem formulation,

one-dimensional compaction,

two dimension based compaction,

hierarchical compaction

Student Learning Outcomes: Student will be able to list issues in real time computing

Student will be able to learn the Algorithms for portioning.

Student will be able to learn placement and routing algorithms.

Student will be able to learn clocking schemes and clock tree.

Pedagogy for Course Delivery: The class will be taught using theory and case based method. Since this is design course, students are given problems based on scheduling which is very important design issue in VLSI.

Page 3: Algorithm for VLSI

Assessment/ Examination Scheme:

Theory L (%) Lab/Practical (%) Total

100% 100%

Theory Assessment (L&T):

Continuous Assessment/Internal Assessment End Term Examination

Components

(Drop down)

Mid-Term Exam

Assignment

Viva

Attendance

Weightage (%)

10%

7%

8%

5%

70%

Text & References:

NaveedShervani, “Algorithms for VLSI physical design Automation”, Kluwer Academic Publisher, Second edition.

ChristophnMeinel& Thorsten Theobold, “Algorithm and Data Structures for VLSI Design”, KAP, 2002.

Rolf Drechsheler : “Evolutionary Algorithm for VLSI”, Second edition

Trimburger,” Introduction to CAD for VLSI”, Kluwer Academic publisher, 2002