Andrey Mokhov, Victor KhomenkoArseniy Alekseyev, Alex Yakovlev

Algebra of Parameterised Graphs

MotivationDesign cost is the greatest threat to the semiconductors

roadmap:manufacturing takes weeks, with low uncertaintydesign takes months or years, with high uncertainty

Designer has to explore a large design space, and thus comprehend a huge number ofsystem configurationsoperational modesbehavioural scenariosimplementation choices

Infeasible to consider each individual mode, need toexploit similarities between the individual modeswork with groups of modes rather than individual onesmanage the modes and groups of modes compositionallytransform/optimise specs in a formal and natural way

Design productivity gap

10000py

Annual productivity gain ~20%

Annual man

ufacturin

g gain

>40%

850py“Productivity gap”

?

13 lines270 stations

Individual descriptions

• Easier for comprehension and reasoning• Gives bigger picture of the system• Easier to modify than individual lines

OrangePark

Overlaid descriptions

?

Characteristics of components

a) 2-input adderb) 3-input adderc) 2-input multiplierd) fast 2-input multipliere) dedicated DP3 unit

Design space exploration

DP3(x,y)=x1y1 + x2y2 + x3y3

Fastest

Design space exploration2 multipliers

Least peak power Dedicatedcomponent

Balanced

Operations on graphs: overlay G1+G2

+

=

=

+

Operations on graphs: sequence G1G2

=

=

Operations on graphs: condition [x]G[0]G= (empty graph)[1]G=G

From arithmetic to algebra: use parameters [x]G

Operations on graphs: condition [x]G[0]G= (empty graph)[1]G=G

From arithmetic to algebra: use parameters [x]G

Operations on graphs: condition [x]G[0]G= (empty graph)[1]G=G

From arithmetic to algebra: use parameters [x]G

[1]

[0]

? [x]

Canonical form of PGsProposition: Any PG can be rewritten in the following canonical form:

whereV is a subset of singleton graphs that appear in the original PGbv are canonical forms of Boolean expressionsbuv are canonical forms of Boolean expressions, s.t. buv b⇒ ubv

Algebra of PGsWe define the equivalence relation on PGs abstractly,

using the following axioms:+ is commutative and associative is associative is a left and right identity of left- and right-distributes over +Decomposition: p q r = p q + p r + q rCondition: [0]p = and [1]p = p

Theorem: The set of axioms of PG-algebra is soundminimalcomplete w.r.t. PGs

Useful equalities (proved from axioms) is an identity of ++ is idempotent Left/right absorption:

p + p q = p qq + p q = p q

Conditional : [x] = Conditional + and :

[x](p + q) = [x]p + [x]q[x](p q) = [x]p [x]q

AND-condition: [x y]p = [x][y]p OR-condition: [x y]p = [x]p + [y]p

Case study: phase encoderPhase encoding: data is encoded by the order of arrival

of signals on n wires:

Goal: synthesise matrix phase encoderInputs: dual-rail ports xij that specify the order of

signalsOutputs: phase encoded data vi

abdc

n! scenarios

Case study: phase encoderOverall specification: where Hij models behaviour of

ith and jth output wiresIf xij=1 and xji=0 then there is a causal dependency vi vjIf xij=0 and xji=1 then there is a causal dependency vj viIf xij=xji=0 then neither vi nor vj can be produced yet; this is

expressed by a circular wait condition between vi and vj

|H| and the resulting circuit are linear in the size of input!

Transitive Parameterised Graphs is often interpreted as causal dependency, so the

graphs are transitiveHence two graphs are considered equal iff their transitive

closures are equalCan express this by an additional axiom Closure:

if q then p q + q r = p q + p r + q rOften allows to simplify expressions by transitive

reduction

Transitive parameterised graphs

PG expression [x]((a + b)c + cd) + [x]((a + b)(d + e))with the specialisations

TPG expression (a + b)([x]cd + [x]e)with the specialisations

Canonical form of TPGsProposition: Any TPG can be rewritten in the following canonical form:

whereV is a subset of singleton graphs that appear in the original TPGbv are canonical forms of Boolean expressionsbuv are canonical forms of Boolean expressions, s.t. buv b⇒ ubv

transitivity: for all u,v,w V, b∈ uv bvw b⇒ uw

TPG axioms – minimal, sound, completeTheorem: The set of axioms of TPG-algebra is

soundminimalcomplete w.r.t. TPGs.

Case study: Processor microcontroller

?

Case study: Processor microcontroller

Instructions classes:ALU Rn to Rn e.g. ADD A,B; MOV A,BALU #123 to Rn e.g. SUB A,#1; MOV

B,#3ALU Rn to PC e.g. JMP AALU #123 to PC e.g. JMP #2012Memory access e.g. MOV A,[B]; MOV

[B],ACond. ALU Rn to Rn e.g. if A<B then ADD A,BCond. ALU #123 to Rn e.g. if A<B then SUB A,#1Cond. ALU #123 to PC e.g. if A<B then JMP #2012

Case study: Processor microcontrollerALU #123 to Rn e.g. SUB A,#1; MOV B,#3TPG algebra specification:

PCIU IFU (ALU + PCIU’) IFU’The graph is considered up to transitivity

Case study: Processor microcontrollerCond. ALU #123 to Rn e.g. if A<B then SUB A,#1If A < B holds:

(ALU + PCIU) IFU (ALU’ + PCIU’) IFU’If A < B does not hold:

(ALU + PCIU) PCIU’ IFU’Composing the two scenarios, lt := (A<B):

[lt]((ALU + PCIU) IFU (ALU’ + PCIU’) IFU’)+[lt]((ALU + PCIU) PCIU’ IFU’)

=(ALU + PCIU) [lt]IFU (PCIU’ + [lt]ALU’) IFU’

Case study: Processor microcontrollerCond. ALU #123 to Rn e.g. if A<B then SUB A,#1

(ALU + PCIU) [lt]IFU (PCIU’ + [lt]ALU’) IFU’

Case study: Processor microcontroller

Case study: Processor microcontroller

Conclusions and future workNew formalisms: PG and TPG algebrae with sound,

minimal and complete sets of axiomsCanonical formsCan work with groups of scenarios and exploit the

similarities between themCan formally compose, manipulate and simplify the

specifications using the rules of these algebraeApplications in microelectronics, formal methods,

computer architecture, modelling university courses

Future work:Tool implementationSimplification by modular decomposition of graphs

Thank you!