AES+Decryption+Core+for+FPGA

Embed Size (px)

Citation preview

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    1/18

    AES DECRYPTIONCORE FOR FPGA

    SPECIFICATIONREV. 0.1.2 PRELIMINARY

     Author 

    scheng

    [email protected]

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    2/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    2 OpenCores 

     T%IS PAGE %AS &EEN INTENTIONALLY LEFT &LAN' 

    (((.opencore).or*

    2

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    3/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    + OpenCores 

    REVISION %ISTORYRev. Date Author Description0.1 2, -$n

    201

    )c/en* Fir)t re"e$)e

    0.1.1 11 Fe

    201

    )c/en* Re!i)e e!ice ti"i3$tion no. or

    1425it0.1.2 , M$y

    2016

    )c/en* 7p$te enc/#$r8 $t$ (it/

    Vi!$o 2016.1 re)"t).

    Ae enc/#$r8 or 'inte9

    7"tr$Sc$"e e!ice.

    (((.opencore).or*

    +

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    4/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

     OpenCores 

    CONTENT

    Introction 6

    %i*/"i*/t) 6

     Top "e!e" )y#o" 6

    &enc/#$r8) :

    Arc/itectre ,

    I;O Port) 4

    Oper$tion) 10

    &$)ic 12

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    5/18

    ct=0>12,?

    8t=0>n51?pt@!"

    pt=0>12,?

    c"8r)t

    AES

    Decryption

    Core

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    6 OpenCores 

    INTROD7CTION T/e AES Decryption Core or FPGA i#p"e#ent) t/e ecryption portion

    o t/e AES $.8.$. RiBn$e" $"*orit/# e)crie in t/e FIPS514,

    )pecic$tion. 'ey "en*t/) o 12< ; 142 ; 26: it) $re )pport) e$c/(it/ $ )ep$r$te in)t$nti$tion (r$pper. T/e core "o*ic i) c$re""y

    e)i*ne to t$8e $!$nt$*e o :5inpt "oo8p t$"e L7T: $)e FPGA

    $rc/itectre. A) $ re)"t it c$n $c/ie!e $ pe$8 t/ro*/pt o o!er

    +Gp) or 26:5it 8ey yet occpie) $ot 2000 L7T) on"y. T/e core /$)

    een !erie (it/ r$no# te)t !ector) $) (e"" $) )e"ecte te)t !ector)

    in FIPS514, SP5

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    6/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    : OpenCores 

    &ENC%MAR'SXilinx Kintex xc7k325t!"##$3

    %2&$'it %"2$'it 25($'it

    L7T 1

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    7/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    , OpenCores 

    ARC%ITECT7RE

    (((.opencore).or*

    ,

    +ecryption

    pt@!"

    pt

    12<

    12<

    ct

    ct@r

    ct@!"

    28"en@)

         A     1     1     R    o    2    n     1     '    e    y

         I    n    !     S    2     0     &    y    t    e    )

         I    n    !     S     /     i         t     R    o    (    )

        n    !     M     i    9     C    o     "    2    #    n    )

    12<

    Key sche+ule

    12<

    Ron'ey Re*i)ter

    26:142 ;12< ;

    8t

    8t@r

    8t@!"

    Key

    Rco

    0

    SKor

    RotKor

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    8/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    < OpenCores 

     T/e "oc8 i$*r$# o t/e AES ecryption core i) )/o(n in t/e *re

    $o!e. T/e core $ccept) cip/erte9t $n 8ey te9t ro# t/eir re)pecti!e

    inter$ce peror#) t/e AES ecryption $"*orit/# e)crie in FIPS514,

    )pecic$tion $n otpt) t/e p"$inte9t $t t/e pt inter$ce. T/e

    ecryption en*ine $n 8ey )c/e"e er $re co##on to $"" 8ey

    "en*t/) (/i"e t/ere i) $ )ep$r$te 8ey e9p$ner or e$c/ )pporte 8ey"en*t/. For e$)e o )e $ )ep$r$te (r$pper i) pro!ie or e$c/ 8ey

    "en*t/ (/ic/ in)t$nti$te) t/e proper 8ey e9p$ner $n ot/er #o"e).

    Dyn$#ic )(itc/in* o 8ey "en*t/ $t rnti#e i) not )pporte.

     T/e ecryption en*ine i#p"e#ent) t/e in!er)e cip/er $"*orit/# in

    *re 12 o t/e FIPS514, )pecic$tion. 'ey "en*t/ i) )e"ecte !i$

    8"en@)e"=0>1? (/ic/ i) p""e to t/e ri*/t !$"e in t/e (r$pper)

    pro!ie. T/e tr$n)or#$tion) In!S/itRo() In!S&yte)

    In!ARon'ey $n In!Mi9Co"#n) in t/e in!er)e cip/er $"*orit/#

    $re i#p"e#ente $) )ep$r$te "oc8). Cip/erte9t enter) t/e ecrypten*ine ro# t/e ct inter$ce $n "oop) t/ro*/ 11;1+;16 ron) or

    12

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    9/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    4 OpenCores 

    8ey) in re!er)e orer t/$n t/ey $re *ener$te y t/e 8ey e9p$n)ion

    $"*orit/#. A) $ re)"t t/e (/o"e 8ey )c/e"e /$) to e )tore in $

    er $) it e9it) ro# t/e 8ey e9p$ner to $""o( t/e ecrypt en*ine to

    $cce)) in re!er)e orer.

    I;O PORTS

    ,orts -i+t

    h

    Directi

    on

    Description

    c"8 1 Inpt Core c"oc8. A"" "o*ic i) )ync/rono) to t/e

    ri)in* e*e o c"8.r)t 1 Inpt Core re)et. Acti!e /i*/ synchronous 

    re)et. T/i) )i*n$" #)t e $))erte or $t

    "e$)t one c"oc8 cyc"e to re)et t/e core.8t=0>n? 12n?.

    'ey tr$n)er occr) $t t/e c"oc8 ri)in*

    e*e (/en ot/ 8t@!" $n 8t@ry $re

    /i*/.

    8t@ry 1 otpt 't inter$ce re$y. Acti!e /i*/. T/i) )i*n$"

    i) ri!en /i*/ y t/e core (/en it i)

    re$y to $ccept $ ne( 8ey.ct=0>12,

    ?

    12< Inpt Cip/erte9t inpt.

    ct@!" 1 Inpt Cip/erte9t !$"i. Acti!e /i*/. T/i) )i*n$"

    i) ri!en /i*/ y t/e $pp"ic$tion to

    inic$te t/e pre)ence o $ !$"i

    cip/erte9t on ct=0>12,?. T/e cip/erte9t i)

    tr$n)erre to t/e core $t t/e c"oc8 ri)in*

    e*e (/en ot/ ct@!" $n ct@ry $re

    /i*/.ct@ry 1 otpt Ct inter$ce re$y. Acti!e /i*/. T/i)

    )i*n$" i) ri!en /i*/ y t/e core to

    inic$te t/$t it i) re$y to $ccept $ ne(

    cip/erte9t.pt=0>12, 12< otpt P"$inte9t otpt

    (((.opencore).or*

    4

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    10/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    10 OpenCores 

    ?pt@!" 1 otpt P"$inte9t !$"i. Acti!e /i*/. T/i) )i*n$" i)

    ri!en /i*/ y t/e core (/en it /$)

    p"$ce $ !$"i p"$inte9t on pt=0>12,?.

    (((.opencore).or*

    10

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    11/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    11 OpenCores 

    OPERATION

     T/e $)ic ecryption cyc"e in!o"!e) + )tep)

    1. Lo$ crypto 8ey2. Lo$ cip/erte9t+. Re$ p"$inte9t

    Once t/e p"$inte9t i) $!$i"$"e $t t/e pt inter$ce t/e ne9t ecryption

    cyc"e c$n )t$rt) y "o$in* eit/er t/e ne9t 8ey or cip/erte9t. In c$)e

    t/e ne9t cip/erte9t )e) t/e )$#e 8ey $) eore t/ere i) no nee to

    "o$ t/e 8ey $*$in )ince t/e pre!io) 8ey )c/e"e i) $"re$y )tore in

    t/e 8ey )c/e"e er.

    I $ ne( cip/erte9t i) "o$e eore t/e pre!io) p"$inte9t i) re$ t/e

    core (i"" )t$rt to ecrypt t/e ne( cip/ete9t i##ei$te"y $n t/e

    pre!io) p"$inte9t (i"" e o!er5(ritten. Lo$in* $ ne( 8ey (i"" on"y )t$rt

    $ 8ey e9p$n)ion cyc"e intern$""y $n (i"" not $"ter t/e pre!io)

    p"$inte9t.

    (((.opencore).or*

    11

    Lo$ 't

    &$c85to5$c8Ne( 8ey or e$c/

    Re$ PtLo$ CtRe$ PtLo$ CtRe$ PtLo$ CtLo$ 'tRe$ PtLo$ Ct  Ti#e

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    12/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    12 OpenCores 

    &ASIC 12

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    13/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    1+ OpenCores 

    DECRYPTION CYCLE FOR &AC' 5 TO5&AC'  CIP%ERTET

     T/e ti#in* i$*r$# $o!e )/o() t/e ecryption cyc"e or $c85to5$c8cip/erte9t.

    1. T/e core $))ert) ct@ry to /i*/ (/en it i) re$y to $ccept ne(

    cip/erte9t.2. T/e $pp"ic$tion ri!e) t/e cip/erte9t to ct $n $))ert) ct@!" to

    /i*/ to inor# t/e core t/$t $ !$"i cip/erte9t i) pre)ent.+. T/e core $))ert) pt@!" to /i*/ (/en $ !$"i p"$inte9t i)

    $!$i"$"e on pt. At t/e )$#e ti#e it $")o $))ert) ct@ry to /i*/

    $*$in to inic$te it i) re$y to $ccept $ ne( cip/erte9t.. T/e $pp"ic$tion ri!e) t/e ne9t cip/erte9t to ct $n $))ert)

    ct@!" to /i*/ to inor# t/e core t/$t $ ne( cip/erte9t i)

    pre)ent.6. T/e core $))ert) pt@!" to /i*/ (/en t/e )econ p"$inte9t i)

    $!$i"$"e on pt.

    It c$n e )een t/$t t/e $!$i"$i"ity o t/e p"$inte9t pt@!" $t + $n t/e

    "o$in* o ne9t cip/erte9t ct@!" $t c$n e o!er"$ppe. No e$

    cyc"e i) incrre.

    (((.opencore).or*

    1+

    6

    +

    2

    1

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    14/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    1 OpenCores 

    SIM7LATION

     T/e core i) !erie $*$in)t )e"ecte te)t !ector) ro# FIPS514,

    AESAVS $n SP5

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    15/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    16 OpenCores 

    $re #pe to t/e )creen $n $t t/e )$#e ti#e to $ "o* "e in t/e

    )i#;rt"@)i#;ot; irectory.

    (((.opencore).or*

    16

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    16/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    1: OpenCores 

    M$8e )re t/e p$t/ to t/e Moe")i# e9ect$"e !)i# in t/i) c$)e i)

    inc"e in yor PAT% en!iron#ent eore yo e9ecte t/e )/e"" )cript.

    A")o yo #$y nee to $ e9ecte per#i))ion to t/e )/e"" )cript to e

    $"e rn ro# 7NI )/e"".

    %ere i) $n e9$#p"e o )i#"$tin* t/e 12

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    17/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    1, OpenCores 

    RETARGETING G7IDELINES

     T/e core i) e)i*ne (it/ t/e oBecti!e o #$9i#i3in* peror#$nce $n

    re)orce ti"i3$tion (/en i#p"e#ente on #oern L7T: $)e FPGA. T/i) i) re$"i3e y c$re""y (ritten )orce coe) (/ic/ "i#it

    co#in$tion$" "o*ic to )e $t #o)t : inpt )i*n$") (/ene!er po))i"e

    )o t/$t t/ey c$n t (e"" into L7T:). Ot/er t/$n t/$t t/e )orce coe i)

    tec/no"o*y inepenent $n port$"e to FPGA $rc/itectre o ierent

    !enor). T/i) )ection e)crie) t/e reco##ene #oic$tion) to t/e

    core or ret$r*etin* to rin* ot t/e "" peror#$nce o t/e t$r*et

    tec/no"o*y.

    Inc")ion o *eneric@#99.!

     T/e )orce "e *eneric@#99.!H "oc$te ner rt";!eri"o*;*eneric;

    irectory ene) tec/no"o*y inepenent 25to51 #"tip"e9or) M7F,

    $n M7F< (/ic/ $re )e in t/e )orce "e So9.)!H. T/i) "e )/o"

    NOT e inc"e (/i"e t$r*etin* i"in9 FPGA to $""o( t/e )ynt/e)i) too"

    to )e t/e M7F, $n M7F< in t/e i"in9 "ir$ry. K/en t$r*etin* ot/er

    FPGA tec/no"o*ie) eit/er pro!ie) $ tec/no"o*y )pecic enition o

    t/o)e #"tip"e9or) or inc"e *eneric;*eneric@#99.!H i $

    tec/no"o*y )pecic !er)ion i) not $!$i"$"e.

     Too" )pecic )ynt/e)i) $ttrite)

    i"in9 Vi!$o )ynt/e)i) $ttrite) $re )e t/ro*/ot t/e )orce

    coe) to /int t/e inerence o )pecic "o*ic re)orce) $n to pre)er!e

    t/e e)i*n /ier$rc/y or etter p$c8in* into FPGA )"ice). T/o)e

    $ttrite) $re e))enti$" to $c/ie!e #$9i## peror#$nce on t/e

    t$r*et FPGA.

     T/e t$"e e"o( )/o() t/e Vi!$o )ynt/e)i) $ttrite) t/$t nee to e

    rep"$ce (/en ret$r*etin* to ot/er FPGA tec/no"o*ie) or )in* $

    ierent )ynt/e)i) too".

    (((.opencore).or*

    1,

    http://www.opencores.org/http://www.opencores.org/

  • 8/19/2019 AES+Decryption+Core+for+FPGA

    18/18

    AES Decryption Core or FPGARe!.0.1.2 Pre"i#in$ry

    1< OpenCores 

    1iva+o synthesis

    attri'ute

    )se+ in Description

    RAM@STYLEi)trite

    ')c/&er.)! Iner L7T RAM or t/e 8ey

    )c/e"e er.

    'EEP@%IRARAC%Y

    ye)

    ecrypt12