Advanced Power Factor Correction - ON Semiconductor

Advanced Power Factor Correction

www.onsemi.com2

Agenda• Introduction

Basic solutions for power factor correctionNew needs to address

• Interleaved PFCBasic characteristicsA discrete solutionPerformance

• Bridgeless PFCWhy should we care of the input bridge?Main solutionsIvo Barbi solutionPerformance of a wide mains, 800 W application

• Conclusion

www.onsemi.com3





• Conclusion

www.onsemi.com4

Why Implement PFC?

• The mains utility provides a sinusoidal voltage Vin(t).• The shape and phase of Iin(t) depend on the load.

( ) ?inI t =

Ac line

( )( ) 2 sin( )in in rmsV t V tω= ⋅ ⋅

www.onsemi.com5

AC Line Rectification Leads to Current Spikes…

• Only the fundamental component produces real power• Harmonic currents circulate uselessly (reactive power)• The line rms current increases

12

3

Vin(t)Iin(t)

Cbulk is refueledwhen Vin(t) > Vout

AcLine

Rectifiers

Bulk Storage Capacitor

Converter

Load

VIN

High currentspike!

www.onsemi.com6

Too High rms Currents!...

Pin(avg) = 119 W, Vin(rms) = 85 VIin(rms) = 1.4 A

Pin(avg) = 119 W, Vin(rms) = 85 VIin(rms) = 2.5 A

Samepower(W)

(Iin(rms))max = 16 A

n°1

n°2

n°1

n°2

16/2.5 = 6 monitors

16/1.4 = 11 resistors

PF = 0.56

PF = 1.00

• High rms currents reduce outlet capability

( )( )

( )

in avgin rms

in rms

PI

V PF=

⋅

www.onsemi.com7

Power Factor Standard

• The standard specifies a maximum level up to harmonic 39

NO

NO

NO NO

YES

YESYES

YES YES

NO

Class CClass C

Three PhaseEquipment?

Three PhaseThree PhaseEquipment?Equipment?Portable Tool?Portable Tool?Portable Tool?Lighting

Equipment?LightingLighting

Equipment?Equipment?

MotorEquipment?

MotorMotorEquipment?Equipment?

SpecialWaveformP<=600W?

SpecialSpecialWaveformWaveformP<=600W?P<=600W?

Class BClass B

Class DClass D

Class AClass A

Mandatory forPC, TV sets

MonitorsP > 75 W

IEC61000-3-2

NO

NO

NO NO

YES

YESYES

YES YES

NO

Class CClass C

Three PhaseEquipment?

Three PhaseThree PhaseEquipment?Equipment?Portable Tool?Portable Tool?Portable Tool?Lighting

Equipment?LightingLighting

Equipment?Equipment?

MotorEquipment?

MotorMotorEquipment?Equipment?

SpecialWaveformP<=600W?

SpecialSpecialWaveformWaveformP<=600W?P<=600W?

Class BClass B

Class DClass D

Class AClass A

Mandatory forPC, TV sets

MonitorsP > 75 W

IEC61000-3-2

www.onsemi.com8

Need for a PFC Stage

• A boost pre-converter draws a sinusoidal current from the line to provide a dc voltage (bulk voltage)

• The current within the coil is made sinusoidal by:– Forcing it to follow a sinusoidal reference (current mode)– Controlling the duty-cycle appropriately (voltage mode)

+

-

IN

Diode Bridge PFC Stage Power Supply

BulkCapacitorController LOAD

ACLine LOADController

+

-

IN

Diode Bridge PFC Stage Power Supply

BulkCapacitorController LOAD

ACLine LOADController

Icoil,pk

Currentreference

Iline(t)

Icoil,pk

Currentreference

Iline(t)

www.onsemi.com9

Operating Modes Overview• ON Semiconductor offers solutions for three modes

Operating Mode Main Feature

Critical conduction Mode (CrM)

Large rms currentSwitching frequency is not fixed

e.g.: NCP1606

Frequency ClampedCritical Conduction

Mode (FCCrM)

Large rms currentFrequency is limitedReduced coil inductance

e.g.: NCP1605

ContinuousConduction Mode

(CCM)

Always hard-switchingInductor value is largestMinimized rms current

e.g.: NCP1654

IL

IL

IL

TclampTclamp

Operating Mode Main Feature

Critical conduction Mode (CrM)

Large rms currentSwitching frequency is not fixed

e.g.: NCP1606

Frequency ClampedCritical Conduction

Mode (FCCrM)

Large rms currentFrequency is limitedReduced coil inductance

e.g.: NCP1605

ContinuousConduction Mode

(CCM)

Always hard-switchingInductor value is largestMinimized rms current

e.g.: NCP1654

IL

IL

IL

TclampTclamp

www.onsemi.com10

FCCrM: an Efficient Mode• Frequency Clamped CrM seems the most efficient solution• Efficiency of a 300 W, wide mains PFC has been measured:

The completestudy will bepublished in the PFC handbookrevision that willbe released in Q1 2009.

Efficiency at 100 Vrms

20% 30% 40% 50% 60% 70% 80% 90% 100%Output Load

NCP1605 (FCCrM)

NCP1654 (CCM)NCP1606 (CrM)

Efficiency at 100 Vrms

20% 30% 40% 50% 60% 70% 80% 90% 100%Output Load

NCP1605 (FCCrM)

NCP1654 (CCM)NCP1606 (CrM)

www.onsemi.com11

New Needs to Address• High efficiency for ATX power supplies:

– Efficiency is measured at:• 20% Pout(max)

• 50% Pout(max)

• 100% Pout(max)

• Slim LCD TVs:– Components height is limited

www.onsemi.com12





• Conclusion

www.onsemi.com13

• Two small PFC stages delivering (Pin(avg) / 2) in lieu of a single big one

• If the two phases are out-of-phase, the resulting currents(IL(tot)) and (ID(tot)) exhibit a dramatically reduced ripple.

Interleaved PFC

EMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totIEMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totIEMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totI

www.onsemi.com14

Interleaved Benefits• More components but:

– A 150 W PFC is easier to design than a 300 W one– Modular approach– Two DCM PFCs look like a CCM PFC converter…

• Eases EMI filtering and reduces the output rms current

• Only interleaving of DCM PFCs will be considered

0

0

0

0

3

2

1(Icoil)phase1 (Icoil)phase2

Iin

time

www.onsemi.com15

Input Current Ripple

EMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totIEMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totIEMIFilter

Ac line

LOAD

1

2

3

4 5

8

6

7

1

2

3

4 5

8

6

7

NCP1601

NCP1601

( )inV t

outV

( )L totI 2LI

1LI

2DI

1DI

bulkC

( )inI t

( )D totI

What is the ripple of the

IL(tot) total input current?

www.onsemi.com16

Computing the Input Current Ripple• Let’s assume that:

– Vin and the switching period are constant over few cycles– The two branches operate in CrM

• There are two cases:– Vin<Vout /2 (or d>0.5): The on-times of the two phases overlap. The inputcurrent peaks at the end of the conduction intervals.

– Vin>Vout /2 (or d<0.5): There is no overlap but still, the input current peaksat the end of the each conduction time

• Using , we can derive the current ripple1on in

sw out

t VdT V

⎛ ⎞= = −⎜ ⎟⎜ ⎟

⎝ ⎠

www.onsemi.com17

Peak Currentenvelop

Valley Currentenvelop

Peak to peak ripple

Averaged input current

(line current)

Finally,…

( )2out

inVV t ≤ ( )

2out

inVV t ≥

( )( ) 2 outL tot inpp in

VI I

V⎛ ⎞

Δ = ⋅ −⎜ ⎟⎜ ⎟⎝ ⎠

( )( ) 1 inL tot inpp out in

VI IV V

⎛ ⎞Δ = ⋅ −⎜ ⎟⎜ ⎟−⎝ ⎠

( )( ) 2 14

outinL tot pk in

VI IV

⎛ ⎞= ⋅ ⋅ −⎜ ⎟⎜ ⎟⋅⎝ ⎠

( )( ) ( )2 1

4out

inL tot pk out in

VI IV V

⎛ ⎞= ⋅ ⋅ −⎜ ⎟⎜ ⎟⋅ −⎝ ⎠

( )( ) ( )2

( )2in avg out

L tot v in rms

P VI

V

⋅=

⋅( )( ))2 (

outinL tot v out in

VI IV V

= ⋅⋅ −

( )( ) 2

( )( )

sw

in in avginin L tot T in in rms

V PVI t IR V

⋅= = =

www.onsemi.com18

Peak to Peak Ripple of the Input Current

• The input ripple onlydepends on the ratio (Vin /Vout):

• Unlike in CCM:– L plays no role– The ripple percentage does

not depend on the load

• At low line (Vin /Vout = 0.3), the ripple is +/-28% (at the sinusoid top, assuming 180°phase shift and CrM operation)

0

20

40

60

80

100

120

0 0.25 0.5 0.75 1

Vin/Vout

Pk

to p

k rip

ple

(%)

Ripple is 0 atVin = Vout / 2

( )( )

( )%

L tot pp in

in out

I VvsI V

Δ ⎛ ⎞⎜ ⎟⎜ ⎟⎝ ⎠

www.onsemi.com19

Input Current Ripple at Low Line• When Vin remains lower than Vout /2, the input current looks

like that of a CCM, hysteretic PFC• (IL(tot)) swings between two nearly sinusoidal envelops

Peak, averaged and valley current @ 90 Vrms, 320 W input(Vout = 390 V)

0

1

2

3

4

5

6

7

0.00% 25.00% 50.00% 75.00% 100.00%

time as a percentage of a period (%)

Pea

k, v

alle

y an

d av

erag

ed In

put

Cur

rent

(A)

Envelop for the peak currents

Envelop for the valley currents

Iin(t)

www.onsemi.com20

Input Current Ripple at High Line• When Vin exceeds (Vout /2), the valley current is constant!

• It equates where Rin is the PFC input impedance

Peak, averaged and valley current @ 230 Vrms, 320 W input(Vout = 390 V)

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.00% 25.00% 50.00% 75.00% 100.00%

time as a percentage of a period (%)

Peak

, val

ley

and

aver

aged

Inpu

t C

urre

nt (A

)

No ripplewhen

Vin = Vout / 2

2out

in

VR

⎛ ⎞⎜ ⎟⎜ ⎟⋅⎝ ⎠

( )2

( ) 22in avg out out

inin rms

P V VRV

⋅ =⋅⋅

Iin(t)

www.onsemi.com21

Line Input Current• For each branch, somewhere within the sinusoid:

• The sum of the two averaged, sinusoidal phases currentsgives the total line current:

• Assuming a perfect current balacing:

• The peak current in each branch is Iin(t)

( ) 1 22sw sw sw

in L LTL tot T TI I I I= = +

1 22 2sw sw

L L inT TI I I⋅ = ⋅ =

IL11

swL TI

12sw

L TI⋅

IL11

swL TI

12sw

L TI⋅

www.onsemi.com22

Ac Component of the Refueling Current

• The refueling current (output diode(s) current) depends on the mode:

Iin Iin Iin

2.Iin Phase 1Phase 2

Single phase CCM Single phase CrM Interleaved CrM

inin

out

VIV

⋅23

inin

out

VIV

⋅23

inin

out

VIV

⋅

rms value over Tsw

rms value over Tsw

rms value over Tsw

www.onsemi.com23

A Reduced RMS Current in the Bulk Capacitor• Integration over the sinusoid leads to (resistive load):

• Interleaving dramatically reduces the rms currentsreduced losses, lower heating, increased reliability

Diode(s) rmscurrent(ID(rms))

ID(tot)(rms) = 1.5 AIC(rms) = 1.3 A

ID(rms) = 2.2 AIC(rms) = 2.1 A

ID(rms) = 1.9 AIC(rms) = 1.7 A

300 W, Vout=390V

Vin(rms)=90 V

Capacitorrms current

(IC(rms))

Interleaved CrM or FCCrM PFC

Single phase CrM or FCCrM PFC

Single phase CCM PFC

2

2

( )

32 2

9

out

out

in rms out out

PP

V V Vη

π

⎛ ⎞⋅ ⎜ ⎟ ⎛ ⎞⎝ ⎠ − ⎜ ⎟⎜ ⎟⋅ ⋅ ⎝ ⎠

2

2

( )

16 2

9

out

out

in rms out out

PP

V V Vη

π

⎛ ⎞⋅ ⎜ ⎟ ⎛ ⎞⎝ ⎠ − ⎜ ⎟⎜ ⎟⋅ ⋅ ⎝ ⎠

2

2

( )

8 2

3

out

out

in rms out out

PP

V V Vη

π

⎛ ⎞⋅ ⎜ ⎟ ⎛ ⎞⎝ ⎠ − ⎜ ⎟⎜ ⎟⋅ ⋅ ⎝ ⎠

2

( )

8 22

33

out

in rms out

P

V Vη

π

⎛ ⎞⋅ ⎜ ⎟⎝ ⎠⋅

⋅ ⋅

2

( )

8 223 3

out

in rms out

P

V Vη

π

⎛ ⎞⋅ ⎜ ⎟⎝ ⎠⋅

⋅ ⋅

2

( )

8 2

3

out

in rms out

P

V Vη

π

⎛ ⎞⋅ ⎜ ⎟⎝ ⎠

⋅ ⋅

www.onsemi.com24

Summary

www.onsemi.com25





• Conclusion

www.onsemi.com26

Interleaving: Master/Slave Approach…• The master branch operates freely• The slave follows with a 180° phase shift• Main challenge: maintaining the CrM operation (no CCM,

no dead-time)

2swT

2swT

2swT

2swT

2swT

2swT

Current mode: inductor unbalance Voltage mode: on-time shift

2swT

2swT

2swT

2swT

2swT

2swT

L2 < L1

www.onsemi.com27

Interleaving: Independent Phases Approach…• Each phase properly operates in CrM or FCCrM.• The two branches interact to set the 180° phase shift• Main challenge: to keep the proper phase shift

• We selected this approach

2swT

2swT

2swT

2swT

2swT

2swT

CrM operation ismaintained but

a perturbation of the on-time may

degrade the 180° phase shift

On-time perturbation for one phase

www.onsemi.com28

General Principle on a Two-NCP1601 Solution• The solution lies on the Frequency Clamp Critical

Conduction mode, unique scheme developed by ON Semiconductor (NCP1601)

• Two NCP1601 drive two independent PFC branches:– Auxiliary windings are used to detect the core reset of each branch– The current sensing is shared by the two stages for protection only

(Over Current Limitation)

• The two branches are operating in voltage mode

www.onsemi.com29

Synchronization: the Main Challenge• One driver (DRV2) synchronizes the two branches so that:

– Branch 1 (DRV1) cannot turn high until a time τ has elapsed– Branch 2 (DRV2) cannot dictate a new conduction phase within 2τ

• Hence:– In fixed frequency operation, the switching period for each branch is

2τ and the two phases are naturally interleaved– In CrM, the switching frequency is that imposed by the current cycle

(Tsw>2τ) and must stabilize out of phase.

• Possible slippages are contained by a phase compensation circuitry (refer to www.onsemi.com for detailed AN availablein Q4 2008).

www.onsemi.com30

NCP1601 Synchronization Capability

• The oscillatoroscillatesbetween 3.5 and 5 V

• The NCP1601 generates a clockwhen the oscillator goesbelow 3.5 V

• The clock signal is stored untilZCD is detected

+

-

50 µA

100 µA5.0 V/ 3.5 V S

R

Q

Q

Cosc

DRV

CLOCK

OSC pin

Fixed Frequency Critical Conduction Mode

5 V

3.5 V

ZCD

Vosc

IL(coil current)

CLOCK

Dead-time

5 V

3.5 V

ZCD

Vosc

IL(coil current)

CLOCK

Dead-time

www.onsemi.com31

Operation @ 230 Vrms, Medium Load

• Each stage operatesin fixed frequencymode

• Both branches are synchronized to DRV2

• A new DRV2 pulse can take place after 2τ

• A new DRV1 pulse can occur after τ

• The switching periodfor each branch isthen 2τ and theyoperate out of phase.

SYNC2

DRV2

SYNC1

DRV1

2 τ

τ

A new drive sequence cannot take place as long as the SYNC signal remainshigher than 3.5 V (see NCP1601 operation).

www.onsemi.com32

Operation at Low Line, Full Load

• The circuit operates in critical conduction mode

• The operation of bothbranches are synchronized to DRV2

• A new DRV2 pulse can take place after2τ, but the MOSFET turn on is delayed untilthe core is reset

• A new DRV1 pulse can occur after τ, but again, the MOSFET turn on is delayed untilthe core is reset

SYNC2

DRV2

SYNC1

DRV1

www.onsemi.com33

Remarks on the Solution• The NCP1601 operates in voltage mode • Same on-time and hence switching period in the two branches• A coil imbalance

– Does not affect the switching period– “Only” causes a difference in the power amount conveyed by each branch

• The two branches are synchronized but they operate independently:– Discontinuous conduction mode is guaranteed (zero current detection)– No risk of CCM operation– Both branches enter CrM at full load

Phase 1Phase 2

tontime

ton

L1 > L2(1) 2

(2) 1

in

in

I LI L

=

www.onsemi.com34

11

D4MUR550

DRV1

1

2

3

4 5

8

6

7

17

13

19 7

X2NCP1601

C4470pF

24

33

X1LPRIM = 150uLSEC = 1.5u

5

R13.9k

14

C8100pF

1

R310k

D11N4148

1

2

3

4 5

8

6

7

4

29

44 8

X3NCP1601

DRV2

31

C111.2nF

R193.9k

46

C14100pF

54

R2610k

D61N4148

Vaux2

C9470pF

26

D71N4148

D31N4148

R28100k

R433k

D105V

D115V

R21k

R81k

25

C172.2nF

D96.8V

R131k

R10100

+

-

IN

9

27

U1KBU6K

C5680nFType = X2

2036

C6680nFType = X2

CM

1

39

38

90-265VAC

41

L N Earth

C10x4.7nFType = Y1

C164.7nFType = Y1

C18680nF

L4150µH

28X4SPP11N60

40

18

Q12N2907

D141N4148

R72.2

R1110k

R1647

DRV1

C2x100µF / 450V

R2275m / 3 W

Current sensing

D161N5406

C2100nF

R23100

C7100nF

12

C11.2nF

R24100

Vbulk

2

R5820k

35

R14820k

R27270k Vbulk

C131nF

Vcontrol

Vcontrol

C19100nF

C20100nFvcc

C10100µF /25 V

R3010vcc

45

R18820k

15

R31820k

C211nF

R32270k

6

X5LPRIM = 150uLSEC = 1.5u

Vaux2

D5MUR550

16X6SPP11N60

23

22

Q22N2907

D151N4148 R17

2.2

R2010k

R2147

DRV2

Vaux

R331k

R361k

21

R610k

R910k 10

Q32N2222

DRV1

DRV2

R122.2k

vcc

R1510k

C310nF

Vfr

R25150k

R2982k

Vfr

Circuitry for Frequency Foldback

R373.9k

DRV1

R384.7k

DRV2

EMI filter

SYNC1

SYNC2

34

R352.2k

R392.2k

DRV2

DRV1

D21N4148

Circuitry for compensation of possible phase shift

R402.2k

Circuitry for zero current detection(branch 2)

Circuitry for zero current detection(branch 1)

D121N5406

DRV2

C12470pF

Application Schematic

The NCP1601 controllers are

fed by an external 15 V power source

Wide mains, 300 W, PFC

pre-converter

www.onsemi.com35

The Board…

Buck converterto provide

Vcc (not used for

test)Two

NCP1601 circuits

Wide mains, 300 W, PFC

pre-converter

MUR550

www.onsemi.com36

Input Voltage and Current

• As expected, the input current looks like a CCM one• At high line, frequency foldback influences the ripple

Full load, 90 Vrms Full load, 230 VrmsIL(tot) (2 A/div)

Vin (50 V/div)

IL(tot) (2 A/div)

Vin (100 V/div)

www.onsemi.com37

Zoom of the Precedent Plots

• These plots were obtained at the sinusoid top• The current swings at twice the frequency of each phase• At low and high line, the phase shift is substantially 180°

Full load, 90 Vrms Full load, 230 VrmsIL(tot) (2 A/div)

DRV1

IL(tot) (1 A/div)

DRV2

DRV1

DRV2

www.onsemi.com38

No Overlap between the Refueling Sequences

• CrM at low line with valley switching• Fixed frequency operation at high line (frequency foldback)• No overlap between the demag. phases in both cases

Full load, 90 Vrms Full load, 230 VrmsIL(tot) (2 A/div) IL(tot) (1 A/div)

Vds1

Vds2

Vds1

Vds2

www.onsemi.com39

Performance Measurements• Conditions for the measurements:

– The measurements were made after the board was 30 mn operated full load, low line

– All the measurements were made consecutively without interruption– PF, THD, Iin(rms) were measured by a power meter PM1200– Vin(rms) was measured directly at the input of the board by a HP 34401A

multimeter– Vout was measured by a HP 34401A multimeter– The input power was computed according to:

– Open frame, ambient temperature, no fan

( ) ( ) ( )in avg in rms in rmsP V I PF= ⋅ ⋅

www.onsemi.com40

Efficiency versus Load

92.5%

93.8%

95.0%

96.3%

97.5%

98.8%

100.0%

30 60 90 120 150 180 210 240 270 300 330

Output power (W)

Effic

ienc

y (%

)

230 Vrms

120 Vrms

90 Vrms

20% Pmax Pmax

The plot portrays the efficiency over the line range, from 20% to 100% of the loadThe efficiency remains higher than 95%!

Results obtainedin a relatively

high frequencyapplication

allowing the use of small

inductors:(85 kHz in each

phase at 90 Vrms, full load,

L1 = L2 =150 µH)

www.onsemi.com41

20.0

30.0

40.0

50.0

60.0

70.0

80.0

90.0

100.0

30 60 90 120 150 180 210 240 270 300 330

Output power (W)

Switc

hing

freq

uenc

y (k

Hz)

Switching Frequency (at the Sinusoid Top)

230 Vrms

120 Vrms

90 Vrms

The plot portrays fsw (sinusoid top) over the line range, as a function of the loadThe PFC stages operate in CrM at full load

CrM lowers the switching frequency

Frequency foldback

85 kHz

www.onsemi.com42

Conclusion• Interleaved PFCs

– Reduce the input current ripple– Lower the bulk capacitor rms current

• Two NCP1601 provide an efficient solution for interleaving• Besides interleaving, this solution takes benefit of:

– The FCCrM mode that optimizes the efficiency– MUR550 diodes optimized for DCM PFC applications– Frequency foldback (light load)

• The solution has been tested on a 300 W, wide mains board• 95% efficiency at 90 Vrms over a large load range (from

20% to 100% load)• A 16-pin interleaved PFC controller is under development

www.onsemi.com43





• Conclusion

No bridge!

www.onsemi.com44

The Diodes Bridge

• The diodes bridge rectifies the ac line voltage• Two diodes conduct simultaneously• The PFC input current flows through two series diodes

Ac lineEMI filter

PFCstage

+

+

www.onsemi.com45

Efficiency Loss caused by the Diodes Bridge

• Average current flowing through the input diodes:

• Dissipation in the diodes bridge:

• If Vf = 1 V and (Vin(rms))LL = 90 V:

In low mains applications (@ 90 Vrms), the diodes bridge wastes about 2% efficiency!

( )

2 2( )lineline

outbridge line TT in rms

PI I tVπ η

= = ⋅⋅

( )

2 22 2 outbridge f bridge f

in rms

PP V I VVη π⋅

= ⋅ ⋅ ≈ ⋅ ⋅⋅ ⋅

2% outbridge

PPη

≈ ⋅

www.onsemi.com46

Switching cell when PH2 is highM1 is off

Switching cell when PH1 is highM2 is off

Basic Bridgeless PFC

Ac Line

PH1

PH2

LD1 D2

M1 M2

www.onsemi.com47

Ac Line

PH1

PH2

Operation with Positive Half-Wave

M2 body diode grounds PH2 as would a diode bridge.

M1 is on: conduction time

M1 is open: off timeD1

M1

M2Body diode

PH1 is high, PH2 is low:

www.onsemi.com48

Operation with Negative Half-Wave

Both line terminals are pulsating at the switching frequencyThe pulsation swing is high (VOUT)HF noise that leads to a tedious EMI filtering

M2 is on: conduction time

M1 is open: off time D2

M1Body diode

M2

Ac Line

PH1

PH2

PH1 is low, PH2 is high:

www.onsemi.com49

Ivo Barbi Bridgeless Boost

Two PFC stages but:– One driver with no need for detecting the active half-wave– Improved thermal performance– As with convential PFC stages, the negative phase is always

attached to ground. EMI issue is solved.

« PH1 »PFC stage

« PH2 »PFC stage

Ac Line

PH1

PH2

DRV

www.onsemi.com50

Current Sharing

Phase 2 current (5 A/div)

Phase 1 current (5 A/div)

Part of the current flows…… through the supposedly inactive MOSFET and coil

0 A

0 A

Part of the active phase current

flows throught the inactive MOSFET

and coil!

www.onsemi.com51

Two Return Paths…

Need for current sense transformers

PH2 is the positive terminal

Vin

0 V

MOSFET is on

MOSFET is off

Body diode

Ac Line

PH1

PH2

DRV

Small low frequency impedance

Rsense

www.onsemi.com52

Schematic for 800 W Prototype« PH1 » PFC stage

« PH2 » PFC stage

22

L40.2m

C11330u / 450 V

27

5

R22700k

10

PH2

Vout

2

L10.2m

PH1

D7CSD10060

D8CSD10060

D2x1N4007

1

2

3

4 5

8

6

7

NCP1653

FB

Vctrl

In

CS

Vcc

Drv

Gnd

Vm

15

13

12 1

6

X5NCP1653

D11N4007

Vaux

R756k C4

1nF

R3470k

C1100nF / 63V

C2100nF

3

R4x2.2k

Vpin1

R12200k

32

20X12*SPP20N60 (TO220)

18

R1710

PH2

R1510

R20x10k

D31N5817

R5390

31

9X22*SPP20N60 (TO220)

R1810

R1910k

RETURN

2324

R13x680k

R14390k

51

R12x680k

R11180k

C710nF / 63 V

C510nF

90 to 265 Vrms 50 or 60 Hz line voltage

3049

3643

C131 µFType = X2

CM2

39

F110 A

40

L N Earth

C194.7 nFType = Y2

C184.7 nFType = Y2

C151µFType = X2

CM1

C161µFType = X2

C171µFType = X2

37

R21x680k

+

-

IN

X4Diode bridge

RETURN

PH1

28

C3220nF

R6100k

C12330u / 450 V

C622µF

42

R22680k

R23680k

C141 µFType = X2

R36100

C24220nF

C2522µF

53

1

2

3

4 5

8

7

MC33152

NC

InA

Gnd

InB

NC

OutA

OutB

7Vcc

DRV1

R13100

C27100pF

DRV1

Vcc2

C28220nF

Vcc2

Vout

Vcc1

R433m

RETURN

RETURN

7

R1215k

D21N4148

R163R

CSX3

33

R2015k

D41N4148

R213R

CSX7

R4xx2.2k

CS

www.onsemi.com53

Board Photograph

NCP1653And

MC33152MOSFET

driver

Bulkconverter to generate the Vcc voltage(NCP1012)

www.onsemi.com54

Typical Waveforms

• These plots portray typical waveforms at full load (Iout = 2.1 A)• “CS” is representative of the current flowing into the MOSFETs of the

two branches (common output of the current transformers)• The input current is sinusoidal

Iline (10 A/div)

CS (negative sensing)

Vout

Vin,1 (input voltage for branch 1)

Iline (10 A/div)

Vout

CS (negative sensing)

Vin,1

90 Vrms 230 Vrms

www.onsemi.com55

Zoom of the Precedent Plots (Top of the Sinusoid)

• The switching frequency is 100 kHz• The waveforms are similar to those of a traditional CCM PFC

Iline (10 A/div)

Vsense (negative sensing)

Vout

Vin,1 (input voltage for branch 1)

Iline (10 A/div)

Vout

Vsense (negative sensing)

Vin,1

90 Vrms 230 Vrms

www.onsemi.com56

Performance Measurements• Conditions for the measurements:

– The measurements were made after the board was 30 mn operated full load, low line

– All the measurements were made consecutively without interruption– PF, THD, Iin(rms) were measured by a power meter PM1200 – Vin(rms) was measured directly at the input of the board by a HP 34401A

multimeter– Vout was measured by a HP 34401A multimeter– The input power was computed according to:

– Open frame, ambient temperature, no fan

( ) ( ) ( )in avg in rms in rmsP V I PF= ⋅ ⋅

www.onsemi.com57

90.0%

92.0%

94.0%

96.0%

98.0%

100.0%

100 200 300 400 500 600 700 800

Output power (W)

Effic

ienc

y (%

)

Efficiency versus Load

230 Vrms

120 Vrms

90 Vrms

20% Pmax Pmax

The plot portrays the efficiency from 20% to 100% of the loadAt 90 Vrms, full load, it is about 94% without fan (95% at 100 Vrms)At 20% of full load, efficiency is in the range or higher than 96%

www.onsemi.com58

THD versus Load

• THD remains very low on the whole range

0.0

5.0

10.0

15.0

20.0

100 200 300 400 500 600 700 800 900

Output power (W)

THD

(%)

230 Vrms

120 Vrms

90 Vrms

20% Pmax Pmax

www.onsemi.com59

Conclusion• A bridgeless PFC controlled by the NCP1653 has been

developed (100 kHz)• The prototype was tested at full load (800 W output) without

fan (open frame, ambient temperature)• In these conditions, the efficiency was measured in the

range of 94% at 90 Vrms and 95% at 100 Vrms

• The THD remains very low • Bridgeless can be an efficient solution for high power

applications.• An application note is being prepared and should be posted

in Q4 this year.

www.onsemi.com60





• Conclusion

www.onsemi.com61

Conclusion• New requirements:

• Compactness and form factor (LCD TV)• Efficiency (ATX power supplies)

• New solutions can address them• Interleaved PFC brings:

• Efficiency• Flat design• Improved heat distribution• Reduced rms current through the PFC stage• Modular approach

• Bridgeless PFC:• halves the losses in the input rectification• Improves the heat distribution

• ON Semiconductor supports these innovative approaches

www.onsemi.com62

For More Information

• View the extensive portfolio of power management products from ON Semiconductor at www.onsemi.com

• View reference designs, design notes, and other material supporting the design of highly efficient power supplies at www.onsemi.com/powersupplies

Documents

Advanced Power Factor Correction - ON Semiconductor