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© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 1 of 27 - 1 -
ADV7604 Evaluation Board User Guide
June 2010
Pr. A
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 2 of 27 - 2 -
Table of Contents Table of Contents .......................................................................................................................... 2
1. Introduction .......................................................................................................................... 3
2. Evaluation Kit ....................................................................................................................... 3
3. Initial Configuration ............................................................................................................ 4
3.1 Hardware ...................................................................................................................... 4
3.2 Software ........................................................................................................................ 5
3.2.1 ATV Benchtop Installation .................................................................................... 5
3.2.2 Getting Started with ADV Register Control Software ....................................... 5
4. Using the Evaluation Platform ........................................................................................... 7
4.1 ADV7604 Evaluation Board Hardware .................................................................... 7
4.1.1 Connecting Input Video ........................................................................................ 8
4.1.2 EDID Configuration ............................................................................................... 8
4.1.3 Powerdown Mode EDID ........................................................................................ 9
4.2 Video Output Module............................................................................................... 10
4.3 Using Configuration Scripts .................................................................................... 10
4.4 Using Software Driver .............................................................................................. 11
4.5 Configuring the Motherboard ................................................................................. 11
5. Updating Files ..................................................................................................................... 12
5.1 Updating Scripts ........................................................................................................ 12
5.2 Updating Defaults ..................................................................................................... 12
6. Schematics ........................................................................................................................... 13
7. Layout .................................................................................................................................. 22
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 3 of 27 - 3 -
1. Introduction This User Guide is intended to provide application support for the ADV7604 evaluation
kit. It also provides details on the set up and manual configuration of the evaluation
board. Software drivers are available for this evaluation board - a separate user guide is
available for these software drivers.
2. Evaluation Kit Each ADV7604 evaluation kit consists of the following:
ADV7604 Evaluation Board
ATV Motherboard
Video Output Module
USB cable
7.5V DC power supply module
Evaluation kit CD
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 4 of 27 - 4 -
3. Initial Configuration
3.1 Hardware The ATV evaluation platform is comprised of three modules the ADV7604 evaluation
board, the ATV motherboard and the video output module. To assemble the evaluation
platform, plug the ADV7604 evaluation board into the Female AV Input connector of the
motherboard and plug the video output module into the Male AV Output connector of
the motherboard.
Connect the female connector of the 7.5V DC power supply module supplied with the
evaluation kit to the motherboard power connector, J18. Connect the USB cable supplied
with the evaluation kit to the motherboard USB connector, J12.
The evaluation platform should now resemble Figure 1.
To turn the evaluation platform on, flick motherboard power switch (S10) to position
light 2 3 seconds later. This indicates the eval platform is now ready to use.
Figure 1 – ATV Evaluation Platform
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 5 of 27 - 5 -
3.2 Software
3.2.1 ATV Benchtop Installation
All the files necessary to install the ATV Benchtop software are on the evaluation kit CD
supplied in the evaluation kit. To install the ATV Benchtop software from the evaluation
kit CD, please complete the following steps:
Copy the ATV Benchtop installer folder to the c:\ drive.
Follow the installation wizard to complete installation following the on screen
instructions including a restart if prompted.
Please note; to install the ATV Benchtop software, you need to be an administrator on the
PC the software is being installed on.
3.2.2 Getting Started with ADV Register Control Software
The ADV Register Control software can be used to run example configuration scripts on
the ATV Evaluation platform and adjust I2C register settings via USB. In order to launch
the ADV Register Control software from the ATV Benchtop, complete the following
steps:
Launch the ATV Benchtop from -> All
Programs -> Analog Devices -> ATV Benchtop -> ATV Benchtop). The ATV
Benchtop control panel as per Figure 2 will appear.
Figure 2 – ATV Benchtop Control
Select ADV Register Control from the ATV Benchtop control panel.
Select a script targeting the device on your evaluation platform (ADV7604 in this
case) from the ADV Register Program Configuration window as per Figure 3.
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 6 of 27 - 6 -
Figure 3 – ADV Register Program Configuration
Finally, the user can run configuration scripts, change individual bit values, check
STDI information and read user write logs from the ADV Register Control Panel
as per Figure 4.
Figure 4 – ADV Register Control Panel
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 7 of 27 - 7 -
4. Using the Evaluation Platform
4.1 ADV7604 Evaluation Board Hardware The following features of the ADV7604 evaluation board
Figure 5) should be noted
Input Video Connectors
4 x HDMI inputs
1 x Component input
1 x Graphic input
2 x D-type inputs (Japanese market only)
Jumpers
K7 and K8 (external EDID I2C access)
K6 and K9, K4 and K5, K1 and K2 (not stuffed external EDID I2C access)
SE_PIN
SE_PWR
Miscellaneous
168 pin male motherboard connector
Power LED (D1)
I2C header (P1)
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 8 of 27 - 8 -
Figure 5 – ADV7604 Evaluation Board
4.1.1 Connecting Input Video
To connect an input video source to the evaluation board, use a suitable cable and one of
the input video connectors outlined above. Do not use excessive force when connecting
or disconnecting the cables as this may result in damage to the evaluation board.
4.1.2 EDID Configuration
There are two EDID options available to user on the ADV7604 board an external
PROM on port D to which an EDID can be programmed or an internal EDID PROM
within the ADV7604.
4.1.2.1 Configuring the External EDID
To program the external PROM (U10) for port D, complete the following procedure:
Connect the PROM to the I2C bus by putting jumpers K7 and K8 into position B
Connect the evaluation platform to the as outlined in Section 3
D-terminal in
D-terminal in
Graphics in
Component in
Motherboard
Connector
HDMI in HDMI in HDMI in HDMI in
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 9 of 27 - 9 -
programmed
The EDID is now downloaded the external PROM. Reset the jumpers to position
A to use the external EDID
4.1.2.2 Configuring the Internal EDID
To program the internal PROM, complete the following procedure:
Disconnect the external EDID by removing jumpers K7 and K8
Select the EDID script from the Settings -> Scripts menu in the ADV Register
Control Panel
Note: the external EDID PROMs are not stuffed for ports A, B or C. If it is desired to stuff
these parts, please consult the evaluation board BOM for details of the required parts.
4.1.3 Powerdown Mode EDID
To evaluation the powerdown mode EDID, the evaluation board should be disconnected
from the powered ATV motherboard. A HDMI cable with an active source supplying 5V
to the HDMI 5V line should be connected.
The user can then determine whether they want the SPI PROM EDID replicated on ports
A, B, C and D or ports A, B, and C by inserting or removing the SE_PIN header
respectively.
The user can also disconnect the 5V supply from a source plugged into port D by
removing jumper SE_PWR.
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 10 of 27 - 10 -
4.2 Video Output Module The following features of the Video Output Module (Figure 6) should be noted
Output Video Connectors
1 x HDMI output
1 x Component output
1 x CVBS output
1 x S Video output
Figure 6 – Video Output Module
4.3 Using Configuration Scripts The evaluation platform is provided with a set of scripts to provide a fast and easy means
of configuring the system to process a wide variety of input video formats. Figure 4
illustrates how a specific script file can be accessed and selected from the ADV Register
Control Panel (e.g. Setting -> Scripts -> DESIRED CATEGORY -> DESIRED SCRIPT).
indication box. Register maps can be accessed from the ADV Register Control Panel by
clicking on the tabs across the screen below the standard toolbar (e.g. DEVICE 1,
DEVICE 2). The selected register map name is displayed when the tab is selected.
Component out
Motherboard
Connector
CVBS out
S Video out
HDMI out
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 11 of 27 - 11 -
4.4 Using Software Driver Some motherboards, by request, are supplied with application code already preloaded to
configure and run the ADV7604. The following explains the behaviour of the
motherboard interfaces when the application is running
LEDS
D2 and D4 are on
D5 flashes during loading of FPGA
D6, D7, D15 and D16 are on
MB_EN switch
Driver disabled with switch at position 0. ATV Benchtop may be used.
Driver enabled with switch at position 1. ATV Benchtop may not be used.
Push buttons
FPGA_RESET resets the FPGA and reloads the firmware
S2 S7 are not used
S9 resets the ADV7604 evaluation board with no handshaking to the application.
If this button is pressed, hot plug must be reasserted.
Serial interface
If a suitable serial terminal application is connected to the serial port of the ATV
motherboard (settings: 115200, 8 bit, none, 1, no flow control) the application
provides event and debug messages and allows I2C read and write commands.
4.5 Configuring the Motherboard The ATV Motherboard is a powerful tool which provides a wide variety of configuration
options to experienced users. For more in depth information on using the ATV
Motherboard, please consult the following document:
ATV_Motherboard_User_Guide.pdf, Revision 0.
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 12 of 27 - 12 -
5. Updating Files
interface. A script contain lists of I2C writes for each supported video mode. A default
contains details of the bits in each register map of the target device.
Analog Devices Inc. reserves the right to update any script or default as and when is
required. Should this be the case, please use the following procedure to update either a
script or a default.
Note: you may need administrative privileges on any machine you are about to undertake
these steps on.
5.1 Updating Scripts If provided with a new script, please use the following procedure:
Close ATV Benchtop
Open the Program Files folder on the c:/
Open the Analog Devices folder
Open the ATV Benchtop folder
Open the Setup_Files folder
Copy the new script file into this directory.
Restart ATV Benchtop
5.2 Updating Defaults If provided with a new default, please use the following procedure:
Close ATV Benchtop
Open the Program Files folder on the c:/
Open the Analog Devices folder
Open the ATV Benchtop folder
Open the Defaults folder
Copy the new default file into this directory.
Restart ATV Benchtop
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 13 of 27 - 13 -
6. Schematics
AVLin
k T
o 1
68-P
in C
onnecto
r
Term
ination r
esis
tors
should
be p
laced a
s c
lose a
s p
ossib
le t
o e
nd o
f line
Tra
ce im
pedance o
f analo
g inputs
to b
e 7
5 o
hm
s
Pla
ce a
nalo
g inputs
as far
apart
as p
ossib
le w
hile m
ain
tain
ing s
imilar
trace length
s
D-T
ype C
onnecto
rVG
A C
onnecto
r
D-T
ype C
onnecto
rCom
ponent
Connecto
r
YPr
Pb
Pb
Y Pr
Pr
Pb
YRED
BLU
E
GREEN
R85
27K
AVLIN
K
J6-3
J6-2
J6-1
J6-5
J6-6
J6-7
J6-8
J6-1
0
J6-1
3J6
-14
C48
1nF
C38
1nF
R101
24r
154 3 2 15
9111314 12 10 8
6716
1 2 3 4 5 6 7 8 9 10
11
12
13
14
1516
J5
CO
N_D
_TERM
INAL
154 3 2 15
9111314 12 10 8
6716
1 2 3 4 5 6 7 8 9 10
11
12
13
14
1516
J7
CO
N_D
_TERM
INAL
C42
1nF
R102
4k7
R103
4k7
R104
24r
R105
24r
R106
24r
R107
24r
R108
24r
R109
24r
R110
24r
R111
24r
R112
24r
R113
24r
R114
24r
1 2 3 4 5 6
J10
PH
ON
O3
C10
1nF
Y3_IN
GR_G
HS_IN
1VS_IN
1
Y1_IN
Y2_IN
R124
51r
R125
51r
R126
51r
C15
0.1
uF
C16
0.1
uF
C17
0.1
uF
R27
51r
R28
51r
R29
51r
R33
51r
R35
51r
R36
51r
R37
51r
R38
51r
R40
51r
C18
0.1
uF
C20
0.1
uF
C21
0.1
uF
C22
0.1
uF
C23
0.1
uF
C25
0.1
uF
C26
0.1
uF
C27
0.1
uF
C28
0.1
uF
3K
21
AU
23
MA3X704A 7
60X_AVLIN
K
VCC_5V
SYN
C3
SYN
C1
GN
D
AVI_
GPO
_01_PLU
G_IN
S_D
ET2
AVI_
GPO
_O
O_PLU
G_IN
S_D
ET1
DATA_LIN
E3_2
DATA_LIN
E2_2
DATA_LIN
E1_2
VCC_3V3
VCC_3V3
DATA_LIN
E3_1
DATA_LIN
E2_1
DATA_LIN
E1_1
GN
D
Y2_IN
PR2_IN
PB2_IN
SYN
C4
GN
D
GN
D
SYN
C2
GR_R_IN
GR_B_IN
GR_G
_IN
PB1_IN
PR1_IN
Y1_IN
AD
V760X_VS_IN
1AD
V760X_H
S_IN
1
Y3_IN
PB3_IN
PR3_IN
GN
DG
ND
GN
D GN
DG
ND
GN
D
GN
DG
ND
GN
D
GN
DG
ND
GN
D
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 14 of 27 - 14 -
The 0
ohm
resis
tors
on t
hese lin
es s
hould
be p
laced
DD
C lin
es s
hould
be a
s s
hort
as p
ossib
le t
o D
UT
HPD
B L
ED
HPD
A L
ED
DD
C A
Circuitry
DD
C B
Circuitry
to m
inim
ise t
rack length
.
HD
MI
Port
A -
Connecto
r and E
SD
Suppre
ssio
n
HD
MI
Port
B -
Connecto
r and E
SD
Suppre
ssio
n
HPD
A C
ontr
ol
HPD
B C
ontr
ol
ED
ID1
ED
ID2
D23
R31
220r G
SD
Q2
BSS123LT1
D29
R58
220r G
SD
Q1
BSS123LT1
R30
Not
Insert
ed
R19
47KR61
47K
R64
Not
Insert
ed
R68
0r
R71
0r
1TD
MS_D
ATA2+
2TD
MS_SH
LD
23
TD
MS_D
ATA2-
4TD
MS_D
ATA_1+
5TD
MS_SH
LD
16
TD
MS_D
ATA_1-
7TD
MS_D
ATA0+
8TD
MS_SH
LD
09
TD
MS_D
ATA0-
10
TD
MS_CLK+
11
TD
MS_CLK_SH
LD
12
TD
MS_CLK-
13
CEC
14
RESERVED
15
DD
C_SCL
16
DD
C_SD
A17
DD
C/C
EC_G
ND
18
DD
C_+
5V
19
HO
TPLU
G_D
ET
J11
HD
MI_
19_PIN
R84
1K
HD
MI_
A_5V
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU13
RCLAM
P0524P
1IN
12
N/C
3IN
2
6O
UT1
55V/N
C4
OU
T2
7
GND
U14
RCLAM
P0504P
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU19
RCLAM
P0524P
1TD
MS_D
ATA2+
2TD
MS_SH
LD
23
TD
MS_D
ATA2-
4TD
MS_D
ATA_1+
5TD
MS_SH
LD
16
TD
MS_D
ATA_1-
7TD
MS_D
ATA0+
8TD
MS_SH
LD
09
TD
MS_D
ATA0-
10
TD
MS_CLK+
11
TD
MS_CLK_SH
LD
12
TD
MS_CLK-
13
CEC
14
RESERVED
15
DD
C_SCL
16
DD
C_SD
A17
DD
C/C
EC_G
ND
18
DD
C_+
5V
19
HO
TPLU
G_D
ET
J1H
DM
I_19_PIN
R55
1K
HD
MI_
B_5V
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU20
RCLAM
P0524P
1IN
12
N/C
3IN
2
6O
UT1
55V/N
C4
OU
T2
7
GND
U21
RCLAM
P0504P
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU22
RCLAM
P0524P
G
SD
Q3
BSS123LT1
G
SD
Q10
BSS123LT1
R73
47K
R74
47K
1N
C1
2N
C2
3/W
P4
VSS
5SD
A
6SCL
7VCLK
8VCC
U25
24LCS22A
BA
K6
BA
K9
C58
Not
Insert
ed
1N
C1
2N
C2
3/W
P4
VSS
5SD
A
6SCL
7VCLK
8VCC
U26
24LCS22A
BA
K4
BA
K5
C59
Not
Insert
ed
VCC_5V
VCC_5V
DD
CB_SD
A
DD
CB_SCL
DD
CA_SCL
DD
CA_SD
A
HD
MI_
A_5V
HD
MI_
B_5V
DD
CA_SD
A_CO
N_5V
DD
CA_SCL_CO
N_5V
HPD
2
HPD
1
GN
D
GN
D
HPD
1H
DM
I_A_5V
HPD
1
DD
CA_SD
A
DD
CA_SCL
RXA_CN
RXA_CP
RXA_0N
RXA_0P
RXA_CN
RXA_CP
RXA_0N
RXA_0P
RXA_1N
RXA_1P
RXA_2N
RXA_2P
RXA_1N
RXA_1P
RXA_2N
RXA_2P
GN
D
CEC1
RXA_2P
RXA_2N
RXA_1P
RXA_1N
RXA_0P
RXA_0N
RXA_CP
RXA_CN
DD
CA_SCL
DD
CA_SD
A
GN
D
GN
D
HPD
2H
DM
I_B_5V
HPD
2
DD
CB_SD
A
DD
CB_SCL
RXB_CN
RXB_CP
RXB_0N
RXB_0P
RXB_CN
RXB_CP
RXB_0N
RXB_0P
RXB_1N
RXB_1P
RXB_2N
RXB_2P
RXB_1N
RXB_1P
RXB_2N
RXB_2P
GN
D
CEC2
RXB_2P
RXB_2N
RXB_1P
RXB_1N
RXB_0P
RXB_0N
RXB_CP
RXB_CN
DD
CB_SCL
DD
CB_SD
A
GN
D
GN
D
HPD
B
GN
D
HD
MI_
B_5V
HPD
2
HPD
1H
DM
I_A_5V
GN
D
HPD
A
GN
D
GN
D
DD
CA_SD
A
DD
CA_SCL
SD
A
SCL
GN
D
ED
ID_PW
R
GN
D
ED
ID_PW
R
DD
CB_SD
A
DD
CB_SCL
SD
A
SCL
GN
D
ED
ID_PW
R
GN
D
ED
ID_PW
R
CEC1
CEC2
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 15 of 27 - 15 -
HPD
C L
ED
DD
C C
Circuitry
ED
ID4
HPD
D L
ED
DD
C D
Circuitry
HD
MI
Port
C -
Connecto
r and E
SD
Suppre
ssio
n
HD
MI
Port
D -
Connecto
r and E
SD
Suppre
ssio
n
HPD
C C
ontr
ol
HPD
D C
ontr
ol
ED
ID3
D26
R11
220r
G
SD
Q7
BSS123LT1
R88
47K
R90
Not
Insert
ed
1N
C1
2N
C2
3/W
P4
VSS
5SD
A
6SCL
7VCLK
8VCC
U10
24LCS22A
BA
K7
BA
K8
D64
R62
220r
G
SD
Q11
BSS123LT1
C8
1uF
R70
47K
R81
Not
Insert
ed
1TD
MS_D
ATA2+
2TD
MS_SH
LD
23
TD
MS_D
ATA2-
4TD
MS_D
ATA_1+
5TD
MS_SH
LD
16
TD
MS_D
ATA_1-
7TD
MS_D
ATA0+
8TD
MS_SH
LD
09
TD
MS_D
ATA0-
10
TD
MS_CLK+
11
TD
MS_CLK_SH
LD
12
TD
MS_CLK-
13
CEC
14
RESERVED
15
DD
C_SCL
16
DD
C_SD
A17
DD
C/C
EC_G
ND
18
DD
C_+
5V
19
HO
TPLU
G_D
ET
J3H
DM
I_19_PIN
R20
1K
HD
MI_
C_5V
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU15
RCLAM
P0524P
1IN
12
N/C
3IN
2
6O
UT1
55V/N
C4
OU
T2
7
GND
U12
RCLAM
P0504P
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU9
RCLAM
P0524P
1TD
MS_D
ATA2+
2TD
MS_SH
LD
23
TD
MS_D
ATA2-
4TD
MS_D
ATA_1+
5TD
MS_SH
LD
16
TD
MS_D
ATA_1-
7TD
MS_D
ATA0+
8TD
MS_SH
LD
09
TD
MS_D
ATA0-
10
TD
MS_CLK+
11
TD
MS_CLK_SH
LD
12
TD
MS_CLK-
13
CEC
14
RESERVED
15
DD
C_SCL
16
DD
C_SD
A17
DD
C/C
EC_G
ND
18
DD
C_+
5V
19
HO
TPLU
G_D
ET
J2H
DM
I_19_PIN
R65
1KH
DM
I_D
_5V
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU8
RCLAM
P0524P
1IN
12
N/C
3IN
2
6O
UT1
55V/N
C4
OU
T2
7
GND
U5
RCLAM
P0504P
1IN
12
IN2
4IN
35
IN4
10
OU
T1
9O
UT2
7O
UT3
6O
UT4
8
GN
D
3
GN
DU4
RCLAM
P0524P
G
SD
Q13
BSS123LT1
G
SD
Q6
BSS123LT1
R75
47K
R76
47K
1N
C1
2N
C2
3/W
P4
VSS
5SD
A
6SCL
7VCLK
8VCC
U27
24LCS22A
BA
K1
BA
K2
C61
Not
Insert
ed
HD
MI_
C_5V
DD
CC_SD
A
DD
CC_SCL
VCC_5V
HPD
3
HPD
4
ED
ID_PW
RED
ID_PW
R
SCL
SD
A
VCC_5V
DD
CD
_SCL
DD
CD
_SD
A
DD
CD
_SCL
DD
CD
_SD
A
HD
MI_
D_5V
GN
D
GN
D
HPD
3H
DM
I_C_5V
HPD
3
DD
CC_SD
A
DD
CC_SCL
RXC_CN
RXC_CP
RXC_0N
RXC_0P
RXC_CN
RXC_CP
RXC_0N
RXC_0P
RXC_1N
RXC_1P
RXC_2N
RXC_2P
RXC_1N
RXC_1P
RXC_2N
RXC_2P
GN
D
CEC3
RXC_2P
RXC_2N
RXC_1P
RXC_1N
RXC_0P
RXC_0N
RXC_CP
RXC_CN
DD
CC_SCL
DD
CC_SD
A
GN
D
GN
D
HPD
4H
DM
I_D
_5V
HPD
4
DD
CD
_SD
A
DD
CD
_SCL
RXD
_CN
RXD
_CP
RXD
_0N
RXD
_0P
RXD
_CN
RXD
_CP
RXD
_0N
RXD
_0P
RXD
_1N
RXD
_1P
RXD
_2N
RXD
_2P
RXD
_1N
RXD
_1P
RXD
_2N
RXD
_2P
GN
D
CEC4
RXD
_2P
RXD
_2N
RXD
_1P
RXD
_1N
RXD
_0P
RXD
_0N
RXD
_CP
RXD
_CN
DD
CD
_SCL
DD
CD
_SD
A
GN
D
GN
D
GN
DG
ND
HPD
3H
DM
I_C_5V
GN
D
HPD
C
HPD
4H
DM
I_D
_5V
GN
D
HPD
D
GN
D
GN
D
ED
ID_PW
R
GN
D
ED
ID_PW
R
GN
D
SCL
SD
A
DD
CC_SCL
DD
CC_SD
A
CEC3
CEC4
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 16 of 27 - 16 -
DD
C T
o 1
68-P
in C
onnecto
r Level Tra
nsla
tion
CEC T
o 1
68-P
in C
onnecto
r
G
SD
Q16
BSS123LT1
R16
4K7
G
SD
Q19
BSS123LT1
R32
4K7
R53
27K
R56
0r
R59
0r
R60
0r
CEC
R2
0r
3K
21
AU
24
MA3X704A
VCC_3V3
DD
CA_SD
A_CO
ND
DCA_SD
A_CO
N_5V
VCC_3V3
VCC_3V3
DD
CA_SCL_CO
N_5V
DD
CA_SCL_CO
N
VCC_3V3
CEC3
CEC2
CEC1
VCC_3V3
760X_CEC
CEC4
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 17 of 27 - 17 -
AD
V7604 P
ow
er
AD
V7604 G
round
AD
V7604 D
igital I/
O
ED
ID E
EPRO
M
VCC
GN
D
SO
CS
SCK
SI
Tra
ce im
pedance t
o b
e 4
7 o
hm
s
as c
lose a
s p
ossib
le t
o U
1Series t
erm
ination r
esis
tors
to b
e p
laced
LLC
HS
VS/F
IELD
DE
INT1
INT2
EXT_CLAM
P
FB_O
UT
R_SYN
C
BAN
K 0
H11
AG
ND
H12
AG
ND
J11
AG
ND
J12
AG
ND
J17
AG
ND
J18
AG
ND
K11
AG
ND
L11
AG
ND
M11
AG
ND
M17
AG
ND
M18
AG
ND
R14
AG
ND
R17
AG
ND
R18
AG
ND
T14
AG
ND
U14
AG
ND
V14
AG
ND
V18
AG
ND
A1
DG
ND
A6
DG
ND
A18
DG
ND
C5
DG
ND
C8
DG
ND
C9
DG
ND
C10
DG
ND
C13
DG
ND
C14
DG
ND
C15
DG
ND
C16
DG
ND
D9
DG
ND
E15
DG
ND
E16
DG
ND
F15
DG
ND
F18
DG
ND
G7
DG
ND
G8
DG
ND
G9
DG
ND
G10
DG
ND
H7
DG
ND
H8
DG
ND
H9
DG
ND
H10
DG
ND
J1D
GN
DJ2
DG
ND
J8D
GN
DJ9
DG
ND
J10
DG
ND
K9
DG
ND
K10
DG
ND
L9
DG
ND
L10
DG
ND
M2
DG
ND
M3
DG
ND
M4
DG
ND
M9
DG
ND
M10
DG
ND
R3
DG
ND
R4
DG
ND
R10
DG
ND
T3
DG
ND
T4
DG
ND
T10
DG
ND
U6
DG
ND
U10
DG
ND
V1
DG
ND
V6
DG
ND
V10
DG
ND
U1-A
AD
V7604
BAN
K 1
H16
AVD
DJ1
6AVD
DK12
AVD
DK15
AVD
DK16
AVD
DL12
AVD
DM
12
AVD
DP15
AVD
DP16
AVD
DU
16
AVD
DU
17
AVD
D
C4
CVD
DD
8CVD
DD
11
CVD
DF16
CVD
D
J7D
VD
DK7
DVD
DK8
DVD
DL7
DVD
DL8
DVD
DM
7D
VD
DM
8D
VD
D
N2
DVD
DIO
N3
DVD
DIO
N4
DVD
DIO
R6
DVD
DIO
R9
DVD
DIO
T6
DVD
DIO
T9
DVD
DIO
G11
PVD
DG
12
PVD
D
A11
TVD
DA16
TVD
DA17
TVD
DB6
TVD
DB11
TVD
DB16
TVD
DC2
TVD
DC3
TVD
DC6
TVD
DC7
TVD
DC11
TVD
DC12
TVD
DD
16
TVD
DF17
TVD
D
U1-B
AD
V7604
BAN
K 2
G2
P0
G1
P1
H2
P2
F1
HS
H1
P3
K1
P4
K2
P5
L1
P6
L2
P7
M1
P8
N1
P9
P1
P10
P2
P11
R1
P12
R2
P13
T1
P14
T2
P15
U1
P16
U2
P17
V2
P18
U3
P19
V3
P20
U4
P21
V4
P22
U5
P23
V5
P24
U7
P26
V7
P27
U8
DCLKIN
U9
P28
V9
P29
V11
P30
U11
P31
V12
P32
U12
P33
V13
P34
U13
P35
F3
EP_M
ISO
F4
EP_M
OSI
G3
EP_CS
G4
EP_SCK
R5
SCL
T5
P25
R7
INT1
T7
SD
A
T8
SYN
C_O
UT/I
NT2
E1
DE
F2
VS_FIE
LD
E2
CEC
R12
SH
ARED
_ED
ID
T12
AVLIN
K
R8
CLAM
PIN
V8
LLC
C1
PW
RD
NB
T11
RESETB
H3
RAW
_VSYN
CH
4RAW
_SYN
C
G17
TEST1
G18
TEST2
R11
FB_O
UT
U1-C
AD
V7604
1CS
2SO
3W
P
4VSS
5SI
6SCK
7H
OLD
8VCC
U18
25LC040A
R83
0r
R63
0r
- D
O N
OT S
TU
FF
P2-1
P2-2
P2-3
P2-4
P2-5
P2-6
R9
1K
T1
T0
R10
10k
R77
10k
R12
20k5
SE_PIN
R13
0r
- D
O N
OT S
TU
FF
R15
0r
- D
O N
OT S
TU
FF
DCLKIN
R_VSYN
C
J4-1
J4-2
J4-3
J4-4
J4-5
J4-6
R95
47r
R17
47r
R5-A
75r
R5-B
75r
R5-C
75r
R5-D
75r
R6-A
75r
R6-B
75r
R6-C
75r
R6-D
75r
R7-A
75r
R7-B
75r
R7-C
75r
R7-D
75r
R8-A
75r
R8-B
75r
R8-C
75r
R8-D
75r
R82-A
75r
R82-B
75r
R82-C
75r
R82-D
75r
R100-A
75r
R100-B
75r
R100-C
75r
R100-D
75r
R115-A
75r
R115-B
75r
R115-C
75r
R115-D
75r
R118-A
75r
R118-B
75r
R118-C
75r
R118-D
75r
R119-A
75r
R119-B
75r
R119-C
75r
R119-D
75r
R4-D
75r
R4-B
75r
R4-C
75r
R4-A
75r
R78-D
75r
R78-B
75r
R78-A
75r
R78-C
75r
Y_M
UX_O
UT
DCLKIN
CLAM
PIN
FBO
UT
GN
D
RAW
_VSYN
C
DCLKIN
760X_CEC
760X_AVLIN
K
GN
DFPG
A_CEC
FPG
A_AVLIN
K
PW
RD
NB
GN
DG
ND
EEPRO
M_SCK
EEPRO
M_SO
EEPRO
M_CS
EEPRO
M_SI
EEPRO
M_SI
EEPRO
M_SCK
EEPRO
M_SO
EEPRO
M_CS
DVD
DIO
_3V3
GN
D
DVD
DIO
_3V3
GN
D
EEPRO
M_CS
EEPRO
M_SO
EEPRO
M_SI
EEPRO
M_SCK
GN
D
DVD
DIO
_3V3
SD
ASCL
DVD
DIO
_3V3
TVD
D_3V3 PVD
D_1V8
DVD
D_1V8CVD
D_1V8
AVD
D_1V8
GN
DG
ND
GN
DG
ND
RAW
_SYN
C
FBO
UT
AD
V760X_SYN
C_O
UT_IN
T2
CLAM
PIN
AD
V760X_IN
T1
AD
V760X_D
EAD
V760X_VS_FIE
LD
AD
V760X_H
S
DEC_LLC
AD
V760X_D
ATA[0
0:3
5]
AD
V760X_D
ATA00
AD
V760X_D
ATA01
AD
V760X_D
ATA02
AD
V760X_D
ATA03
AD
V760X_D
ATA04
AD
V760X_D
ATA05
AD
V760X_D
ATA06
AD
V760X_D
ATA07
AD
V760X_D
ATA08
AD
V760X_D
ATA09
AD
V760X_D
ATA10
AD
V760X_D
ATA11
AD
V760X_D
ATA12
AD
V760X_D
ATA13
AD
V760X_D
ATA14
AD
V760X_D
ATA15
AD
V760X_D
ATA16
AD
V760X_D
ATA17
AD
V760X_D
ATA18
AD
V760X_D
ATA19
AD
V760X_D
ATA20
AD
V760X_D
ATA21
AD
V760X_D
ATA22
AD
V760X_D
ATA23
AD
V760X_D
ATA24
AD
V760X_D
ATA25
AD
V760X_D
ATA26
AD
V760X_D
ATA27
AD
V760X_D
ATA28
AD
V760X_D
ATA29
AD
V760X_D
ATA30
AD
V760X_D
ATA31
AD
V760X_D
ATA32
AD
V760X_D
ATA33
AD
V760X_D
ATA34
AD
V760X_D
ATA35
V_RESET
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 18 of 27 - 18 -
AD
V7604 N
o C
onnects
AD
V7604 A
udio
AD
V7604 H
DM
I
AD
V7604 A
nalo
g I
/O
Pla
ce b
uff
er
as c
lose a
s p
ossib
le t
o p
in N
13
Y_M
UX_O
UT
C1
47pF
C4
47pF
Y2 28.6
363M
Hz
C5
0.1
uF
C6
0.1
uF
R18
499r
TRI4
R21
56K
TRI5
TRI1
D16
1V8
TRI2
TRI3
T10
T9
R23
56k
TRI6
R25
62k
D19
5V
MCLK
SCLK
LRCLK
SPD
IFI2
S0
I2S1
I2S2
I2S3
R26
Not
Insert
ed
R50
Not
Insert
ed
3+
4-
1
2
-V
5+
V
U11
AD
8061ART
YM
UX
R34
150k
R39
150k
R41
130k
R42
130k
R44
130k
R45
62k
R46
130k
R47
56k
R49
62k
R51
62k
R116
62k
D18
5V
D21
5V
D20
5V
D12
1V8
D15
1V8
D14
1V8
D13
1V8
D17
1V8
C7
0.1
uF
C9
10nF
C11
10uF
XTAL
R93 Not
Insert
ed
R154
0r
C12
Not
Insert
ed
R96
150k
R97
130k
J15
BAN
K 3
H15
XTALP
J15
XTALN
V15
AIN
1V16
AIN
2V17
AIN
3U
18
AIN
4T17
AIN
5
P18
AIN
7
T18
AIN
6
N17
AIN
8N
18
AIN
9L18
AIN
10
K17
AIN
11
K18
AIN
12
L17
SYN
C4
P17
SYN
C3
T16
SYN
C2
U15
SYN
C1
H17
REFN
H18
REFP
M15
TRI5
M16
TRI6
N15
TRI3
N16
TRI4
R16
TRI2
T15
TRI1
L15
TRI8
/VS_IN
2
L16
TRI7
/HS_IN
2
R13
HS_IN
1T13
VS_IN
1
R15
Y_M
UX_O
UT
U1-D
AD
V7604
BAN
K 4
D17
RXA_0+
D18
RXA_0-
C17
RXA_1+
C18
RXA_1-
B17
RXA_2+
B18
RXA_2-
E17
RXA_C+
E18
RXA_C-
D15
DD
CA_SD
AD
14
DD
CA_SCL
D3
RXA_5V
B14
RXB_0+
A14
RXB_0-
B13
RXD
_1+
A13
RXB_1-
B12
RXB_2+
A12
RXB_2-
B15
RXB_C+
A15
RXB_C-
D12
DD
CB_SD
AD
13
DD
CB_SCL
D2
RXB_5V
B9
RXC_0+
A9
RXC_0-
B8
RXC_1+
A8
RXC_1-
B7
RXC_2+
A7
RXC_2-
B10
RXC_C+
A10
RXC_C-
D6
DD
CC_SD
AD
7D
DCC_SCL
D1
RXC_5V
B4
RXD
_0+
A4
RXD
_0-
B3
RXD
_1+
A3
RXD
_1-
B2
RXD
_2+
A2
RXD
_2-
B5
RXD
_C+
A5
RXD
_C-
D4
DD
CD
_SD
AD
5D
DCD
_SCL
B1
RXD
_5V
D10
RTERM
U1-E
AD
V7604
BAN
K 5
J3M
CLKO
UT
K4
SCLK
K3
LRCLK
J4SPD
IFP3
I2S0
P4
I2S1
L4
I2S2
L3
I2S3
U1-F
AD
V7604
BAN
K 6
E3
NC
E4
NC
G15
NC
G16
NC
U1-G
AD
V7604
R98
560R
R99
560R
R3-A
75r
R3-B
75r
R3-C
75r
R3-D
75r
R24-A
75r
R24-B
75r
R24-C
75r
R24-D
75r
GN
D
SYN
C4
AD
V760X_H
S_IN
1AD
V760X_VS_IN
1
SYN
C1
HD
MI_
D_5V
HD
MI_
C_5V
HD
MI_
B_5V
HD
MI_
A_5V
DD
CD
_SCL
DD
CD
_SD
ARXD
_CN
RXD
_CP
RXD
_2N
RXD
_2P
RXD
_1N
RXD
_1P
RXD
_0N
RXD
_0P
DD
CC_SCL
DD
CC_SD
ARXC_CN
RXC_CP
RXC_2N
RXC_2P
RXC_1N
RXC_1P
RXC_0N
RXC_0P
GN
D
GN
D
DATA_LIN
E2_2
DATA_LIN
E1_2
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
VCC_5V
VCC_5V
GN
D
Y_M
UX_O
UT
GN
D
AD
V760X_VS_IN
1
AD
V760X_H
S_IN
1
SYN
C3
SYN
C2 G
ND
GR_B_IN
GR_R_IN
GR_G
_IN
GN
D
DATA_LIN
E3_2
GN
D
GN
D
GN
D
GN
D
GN
D
DATA_LIN
E3_1
DATA_LIN
E2_1
DATA_LIN
E1_1
GN
D
GN
D
PB2_IN
PR2_IN
Y2_IN
PB1_IN
PR1_IN
Y1_IN
PB3_IN
PR3_IN
Y3_IN
GN
D
GN
D
GN
D
AD
V760X_I2
S3
AD
V760X_I2
S2
AD
V760X_I2
S1
AD
V760X_I2
S0
AD
V760X_SPD
IFAD
V760X_LRCLK
AD
V760X_SCLK
AD
V760X_M
CLKO
UT
RXB_CN
RXB_CP
RXB_2N
RXB_2P
RXB_1N
RXB_1P
RXB_0N
RXB_0P
DD
CB_SD
AD
DCB_SCL
DD
CA_SD
AD
DCA_SCL
RXA_CN
RXA_CP
RXA_2N
RXA_2P
RXA_1N
RXA_1P
RXA_0N
RXA_0P
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 19 of 27 - 19 -
I2C A
ddre
ss =
0xE8
Board
Identification B
us E
xpander
Reset
Circuitry
I2C S
plitt
er
U6 D
ecoupling
I2C H
eader
SCL
SD
A
RESET
GN
D
VCC
168-P
in C
onnecto
r
N/C
U29 D
ecoupling
1IN
T
2A1
3RESET
4IO
_0.0
5IO
_0.1
6IO
_0.2
7IO
_0.3
8IO
_0.4
9IO
_0.5
10
IO_0.6
11
IO_0.7
12
VSS
13
IO_1.0
14
IO_1.1
15
IO_1.2
16
IO_1.3
17
IO_1.4
18
IO_1.5
19
IO_1.6
20
IO_1.7
21
A0
22
SCL
23
SD
A
24
VD
D
U16
PCA9539
R54
4K7
R57
4K7
C43
0.1
uF
C45
10nF
R14
4K7
+C54
4.7
uF
S1
R72
4K7
C62
0.1
uF
C63
10nF
SCL
SD
A
RESET
P1-2
P1-3
P1-4
P1-5
P1-6
1A
2B
3G
ND
5VCC
4Y U
6
NC7S08
R67
0r
R94
Not
Insert
ed
R89
0r
R92
0r
J9-A
1J9
-A2
J9-A
3J9
-A4
J9-A
5J9
-A6
J9-A
7J9
-A8
J9-A
9J9
-A10
J9-A
11
J9-A
12
J9-A
13
J9-A
14
J9-A
15
J9-A
16
J9-A
17
J9-A
18
J9-A
19
J9-A
20
J9-A
21
J9-A
22
J9-A
23
J9-A
24
J9-A
25
J9-A
26
J9-A
27
J9-A
28
J9-A
29
J9-A
31
J9-A
30
J9-A
32
J9-A
33
J9-A
34
J9-A
35
J9-A
36
J9-A
37
J9-A
38
J9-A
39
J9-A
40
J9-B
40
J9-A
42
J9-B
1J9
-B2
J9-B
3J9
-B4
J9-B
5J9
-B6
J9-B
7J9
-B8
J9-B
9J9
-B10
J9-B
11
J9-B
12
J9-B
13
J9-B
14
J9-B
15
J9-B
16
J9-B
17
J9-B
18
J9-B
19
J9-B
20
J9-B
21
J9-B
22
J9-B
23
J9-B
24
J9-B
25
J9-B
26
J9-B
27
J9-B
28
J9-B
29
J9-B
30
J9-B
31
J9-B
32
J9-B
33
J9-B
34
J9-B
35
J9-B
36
J9-B
37
J9-B
38
J9-B
39
J9-A
41
J9-B
41
J9-B
42
J9-C
1J9
-C2
J9-C
3J9
-C4
J9-C
5J9
-C6
J9-C
7J9
-D6
J9-D
7J9
-D8
J9-D
9
J9-C
12
J9-C
13
J9-C
14
J9-C
15
J9-C
16
J9-C
17
J9-C
18
J9-C
19
J9-C
20
J9-C
21
J9-C
22
J9-C
23
J9-C
24
J9-C
25
J9-C
26
J9-C
27
J9-D
28
J9-C
29
J9-C
30
J9-C
31
J9-C
32
J9-C
33
J9-C
34
J9-C
35
J9-C
36
J9-C
37
J9-C
38
J9-C
39
J9-C
40
J9-C
41
J9-C
42
J9-D
1J9
-D2
J9-D
3J9
-D4
J9-D
5
J9-C
8J9
-C9
J9-C
10
J9-C
11
J9-D
10
J9-D
11
J9-D
12
J9-D
13
J9-D
14
J9-D
15
J9-D
16
J9-D
17
J9-D
18
J9-D
19
J9-D
20
J9-D
21
J9-D
22
J9-D
23
J9-D
24
J9-D
25
J9-D
26
J9-D
27
J9-C
28
J9-D
29
J9-D
30
J9-D
31
J9-D
32
J9-D
33
J9-D
34
J9-D
35
J9-D
36
J9-D
37
J9-D
38
J9-D
39
J9-D
40
J9-D
41
J9-D
42
P1-1
R52
4K7
V_RESET
1A
2B
3G
ND
5VCC
4Y
U28
NC7S08
C80
0.1
uF
C84
10nF
R66
0r
R69
Not
Insert
ed
R43
47K
VCC_3V3
VCC_3V3
RESET
VCC_3V3
VCC_3V3
GN
D
SD
A
SCL
RESET
GN
D
VCC_3V3
VCC_3V3
SD
A
SCL
GN
DG
ND
VCC_3V3
GN
D
SD
A
SCL
RESET
GN
D
VCC_3V3
DVD
DIO
_3V3
GN
D
AD
V760X_D
ATA08
AD
V760X_D
ATA09
AD
V760X_D
ATA27
AD
V760X_D
ATA25
AD
V760X_D
ATA24
AD
V760X_D
ATA21
AD
V760X_D
ATA22
AD
V760X_D
ATA13
AD
V760X_D
ATA12
AD
V760X_D
ATA35
AD
V760X_D
ATA34
AD
V760X_D
ATA33
AD
V760X_D
ATA32
AD
V760X_D
ATA31
AD
V760X_D
ATA30
AD
V760X_D
ATA29
AD
V760X_D
ATA28
AD
V760X_D
ATA26
AD
V760X_D
ATA23
AD
V760X_D
ATA20
AD
V760X_D
ATA19
AD
V760X_D
ATA18
AD
V760X_D
ATA17
AD
V760X_D
ATA16
AD
V760X_D
ATA15
AD
V760X_D
ATA14
AD
V760X_D
ATA11
AD
V760X_D
ATA10
AD
V760X_D
ATA07
AD
V760X_D
ATA06
AD
V760X_D
ATA05
AD
V760X_D
ATA04
AD
V760X_D
ATA03
AD
V760X_D
ATA02
AD
V760X_D
ATA01
AD
V760X_D
ATA00
HPD
D
RAW
_VSYN
C
FPG
A_AVLIN
K
GN
DG
ND
GN
D
RAW
_SYN
CFBO
UT
CLAM
PIN
DCLKIN
AVI_
GPO
_01_PLU
G_IN
S_D
ET2
AVI_
GPO
_O
O_PLU
G_IN
S_D
ET1
SCL
SD
A
RESET
FPG
A_CEC
HPD
CH
PD
BH
PD
A
DD
CA_SD
A_CO
ND
DCA_SCL_CO
N
AD
V760X_SCLK
AD
V760X_LRCLK
AD
V760X_M
CLKO
UT
AD
V760X_I2
S0
AD
V760X_I2
S1
AD
V760X_I2
S2
AD
V760X_I2
S3
AD
V760X_SPD
IF
AD
V760X_SYN
C_O
UT_IN
T2
AD
V760X_IN
T1
DEC_LLC
AD
V760X_D
EAD
V760X_VS_FIE
LD
AD
V760X_H
SAVIO
_PO
WER_7.5
VAVIO
_PO
WER_7.5
V
AD
V760X_D
ATA[0
0:3
5]
DVD
DIO
_3V3
VCC_3V3
GN
D
GN
D
VCC_3V3
V_RESET
FPG
A_V_RESET
FPG
A_V_RESET
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 20 of 27 - 20 -
Mis
c 5
V
centr
e is +
ve
Dis
trib
ute
aro
und t
he b
oard
Gro
und T
est
Poin
ts 1
Gro
und T
est
Poin
ts 2
Locate
clo
se t
o p
ow
er
regula
tors
Genera
l Pow
er
Regs
ED
ID H
DM
I Pow
er
AVD
D_1V8 P
ow
er
Supply
CVD
D_1V8 P
ow
er
Supply
DVD
D_1V8 P
ow
er
Supply
PVD
D_1V8 P
ow
er
Supply
DVD
DIO
_3V3 P
ow
er
Supply
TVD
D_3V3 P
ow
er
Supply
3V3 P
ow
er
Supply
Section
1V8 P
ow
er
Supply
Section
Mis
c 3
V3
Inte
rnal
resis
tor
Locate
clo
se t
o L
LC p
in
Gro
und T
est
Poin
ts 3
1IN
2
GN
D
3O
UT
F8 EM
C_FIL
TER
3IN
1
GN
D
2O
UT
U7
AD
P3338-3
.3V
+C116
220uF
+C124
33uF
VCC3V3
VCC_5V
+C122
33uF
+C115
220uF
1IN
2
GN
D
3O
UT
F4 EM
C_FIL
TER
3IN
1
GN
D
2O
UT
U17
AD
P3338-5
V
D50
J14-2
J14-1
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
1IN
2
GN
D
3O
UT
F1 EM
C_FIL
TER
+C69
220uF
+C71
33uFAVD
D
1IN
2
GN
D
3O
UT
F3 EM
C_FIL
TER
4.7
nF
+C75
33uFCVD
D
1IN
2
GN
D
3O
UT
F5 EM
C_FIL
TER
+C76
220uF
+C77
33uFDVD
D
1IN
2
GN
D
3O
UT
F6 EM
C_FIL
TER
+C78
220uF
+C79
33uF
DVD
DIO
1IN
2
GN
D
3O
UT
F7 EM
C_FIL
TER
+C83
33uFPVD
D
1IN
2
GN
D
3O
UT
F9 EM
C_FIL
TER
+C90
33uFTVD
D
SE_PW
R n/a
R22
10K
+C2
1000uF
+C3
22uF
1EN
2VIN
3G
ND
4VO
UT
5AD
J/EFU2
NCP5662D
S18R4G
R48
100K
C125
470nF
D4
D5
D6
D2
C73
0.1
uF
C81
0.1
uF
C88
0.1
uF
C118
0.1
uF
C159
0.1
uF
C161
0.1
uF
1EN
2VIN
3G
ND
4VO
UT
5AD
J/EFU3
NCP5662D
S33R4G
D1
G
S
D
Q20
BSS84LT1G
R80
10K
R86
20K
R87
100K
D3
GND9
PW
RD
NB
R1 100K
12
L1
330U
H
D7
VCC_3V3
NO
N_D
UT_PO
WER
NO
N_D
UT_PO
WER
VCC_5V
AVIO
_PO
WER_7.5
V
GN
D
GN
DG
ND
GN
DG
ND
GN
D
GN
DG
ND
AVD
D_1V8
GN
DG
ND
CVD
D_1V8
DVD
D_1V8
GN
DG
ND
GN
D
GN
DG
ND
GN
D
DVD
DIO
_3V3
PVD
D_1V8
GN
DG
ND
GN
DG
ND
TVD
D_3V3
HD
MI_
D_5V
1V8_EN
1V8_EN
HD
MI_
C_5V
HD
MI_
B_5V
HD
MI_
A_5V
GN
D
GN
D
GN
D
PW
RD
NB
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
D
GN
DG
ND
GN
DG
ND
GN
D
GN
D
GN
DG
ND
GN
DG
ND
GN
D
VCC_5V
ED
ID_PW
R
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 21 of 27 - 21 -
DVD
DIO
Decoupling
PVD
D D
ecoupling
DVD
D D
ecoupling
CVD
D D
ecoupling
AVD
D D
ecoupling
TVD
D D
ecoupling
7 p
ins
2 p
ins
11 p
ins
14 p
ins
4 p
ins
7 p
ins
C29
0.1
uF
C31
0.1
uF
C104
0.1
uF
C101
0.1
uF
C34
0.1
uF
C36
0.1
uF
C60
0.1
uF
C64
0.1
uF
C67
0.1
uF
C89
0.1
uF
C82
0.1
uF
C110
0.1
uF
C112
0.1
uF
C123
0.1
uF
C126
0.1
uF
C140
0.1
uF
C150
0.1
uF
C169
0.1
uF
C172
0.1
uF
C174
0.1
uF
C13
220pF
C14
220pF
C19
220pF
C24
220pF
C30
220pF
C32
220pF
C33
220pF
C35
220pF
C37
220pF
C39
220pF
C40
220pF
C41
220pF
C44
220pF
C46
220pF
C47
220pF
C49
220pF
C50
220pF
C51
220pF
C52
220pF
C55
220pF
C56
220pF
C53
220pF
C57
220pF
C65
220pF
C66
220pF
C68
220pF
C70
220pF
DVD
DIO
_3V3
GN
D
PVD
D_1V8
GN
D
DVD
D_1V8
GN
D
CVD
D_1V8
AVD
D_1V8
GN
D
GN
D
TVD
D_3V3
GN
D
TVD
D_3V3
GN
D
DVD
DIO
_3V3
GN
D
GN
D
AVD
D_1V8
GN
D
DVD
D_1V8
PVD
D_1V8
GN
D
CVD
D_1V8
GN
D
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 22 of 27 - 22 -
7. Layout
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 23 of 27 - 23 -
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 24 of 27 - 24 -
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 25 of 27 - 25 -
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 26 of 27 - 26 -
© 2010 Analog Devices, Inc. All rights reserved.
Pr. A June 2010 Analog Devices B.V. 27 of 27 - 27 -
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