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ADV DIGITAL DESIGN INTRODUCTIONINTRODUCTION
Lecture 1
Dr. Shoab A. Khan
Outline
Introduction Advancement in VLSI TechnologyComputationally Intensive Signal Processing ApplicationFPGAs TechnologyCARE VLSI Profile & Achievements Design ExamplesConclusionConclusion
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 2
Course Information
Prerequisites:Logic Design, Computer Architecture/OrganizationComputer Architecture/Organization Signals and Systems/ Digital Signal Processing
Text BookText BookDigital Design of Signal Processing System by Shoab Khan Feb 2011, John Wiley & Sons
WebsiteWebsite www.drshoabkhan.com
References V il HDL A id di i l d i d h i b S i P l i kVerilog HDL-A guide to digital design and synthesis by Samir PalnitkarAdvanced Digital Design With Verilog HDL by Ciletti, Michael D.
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 3
Introduction
Digital Design meansMapping algorithms/applications in siliconApplying transformations and tricks that results inApplying transformations and tricks that results in optimal mapping in competing design space of• Area• Power dissipation• Power dissipation• Performance • Testabliity
VLSI has enabled solutions to intractableVLSI has enabled solutions to intractable engineering problemsRapid advancement has led to new dimensions in th t h lthe technology
VLSI has revolutionized the commercial market
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 4
Algorithm implemented in C#include <stdio.h > #define N 12 #define L 8 // Test data and filter coefficients short xbf[N+L-1]={1, 1, 2, 3, 4, 1, 2, 3, 1, 2, 1, 4, 5, -1, 2, 0, 1, -2, 3}; short hbf[L]={5, 9, -22, 11, 8, 21, 64, 18};short ybf[N]; // The function performs block filtering operation void BlkFilter(short *xptr, short *hptr, int len_x, int len_h, short *ybf) {
i t k int n, k, m; for (n=0; n<len_x; n++) { sum = 0; for(k=0, m=n; k<len_h; k++, m--)
sum += xptr[m]*hptr[k]; // MAC operation sum += xptr[m] hptr[k]; // MAC operation ybf[n] = sum; } } // Program to test BlkFilter and BlkFilterUnroll functions void main(void)void main(void) { short *xptr, *hptr; xptr = &xbf[L-1]; // xbf has L-1 old samples hptr = hbf; BlkFilterUnroll (xptr, hptr, N, L, ybf);
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 5
BlkFilter (xptr, hptr, N, L, ybf); }
HW mapping of the code in previous slide
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 6
FFT Algorithm & mapping
x[0]
x[1]
x[2]
-1
X[0]
X[4]
X[2]W80
x[2]
x[3]
x[4]
x[5]
-1W8
1
-1
-1W8
2
-1
X[2]
X[6]
X[1]
X[5]
W80
[ ]
x[6]
x[7]-1
-1
-1W8
2
W83
-1
-1W8
2
-1
-1[ ]
X[3]
X[7]
W80
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 7
MPEG Top Level Architecture
Macro-Block FIFO
DCT FIFO
Video Frame
Controller
I frame/P frame
T FIFOQ t FIFO
status
Zig - zag
DCT_FIFO
diff_macro Block FIFO
-
DCT Quantize
Best ref macro Block FIFO
CODER
Tx_FIFOQuant_FIFO
+-
0
1
Quant inv FIFO
Q-1
DCT inv FIFO
DCT-1
mv search
mv mem
Motion Vect FIFO
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 8
Course OutlineHigh-level digital design methodology using Verilog, Design, Implementation, and Verification. Introduction of SystemVerilog and SystemCApplication requiring HW implementation, Floating-Point to Fixed-Point ConversionOptions for top-level design
KPN based designKPN based designNetwork on Chip
FPGA Architectures:Embedded Blocks, Multipliers, Adders, Carry ChainsEmbedded Processors, and interfacesSystem generatorLogic Synthesis
Architectures for Basic Building Blocks, Adder, Compression Trees, and Multipliers, Barrel ShifterDedicated Fully Parallel ArchitectureTransformations for high speedTransformations for high speed
UnfoldingPipeliningRetimingLook-ahead transformationC-SlowParallel processing
Optimized Time shared ArchitectureFolding transformation
Hardwired State Machine based Design
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan
Hardwired State Machine based DesignMicro Program State Machine based Design
9
Advancement in VLSI
The advancement and growth in VLSI has been exponential An interesting comment by Bill Gates
“If GM had kept up with the technology like the computer“If GM had kept up with the technology like the computer industry has, we would all be driving $25.00 cars that
got 1,000 miles to the gallon.”g , g
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 10
In response to Bill's comments, General Motors issued a press release stating:
If GM had developed technology like Microsoft, we would all be driving cars with the following characteristics:
1 For no reason at all your car would crash twice a day1. For no reason at all, your car would crash twice a day.
2. Every time they repainted the lines on the road, you would have to buy a new car.
3 Occasionally executing a maneuver such as a left turn would cause your car to shut3. Occasionally, executing a maneuver such as a left-turn would cause your car to shut down and refuse to restart, and you would have to reinstall the engine.
4. When your car died on the freeway for no reason, you would just accept this, restart and drive onand drive on.
5. Only one person at a time could use the car, unless you bought 'Car95' or 'CarNT', and then added more seats.
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 11
In response to Bill's comments, General Motors issued a press release stating:
6. Apple would make a car powered by the sun, reliable, five times as fast, and twice as easy to drive, but would run on only five per cent of the roads.
7 Oil water temperature and alternator warning lights would be replaced by a single7. Oil, water temperature and alternator warning lights would be replaced by a single 'general car default' warning light.
8. New seats would force every-one to have the same size butt.
9. The airbag would say 'Are you sure?' before going off.
10. Occasionally, for no reason, your car would lock you out and refuse to let you in until you simultaneously lifted the door handle turned the key and grabbed the radioyou simultaneously lifted the door handle, turned the key, and grabbed the radio antenna.
11. Every time GM introduced a new model, car buyers would have to learn how to drive all over again because none of the controls would operate in the same manner as the oldall over again because none of the controls would operate in the same manner as the old car.
12. You would press the 'start' button to shut off the engine.
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 12
Fueling the Innovation: Moore’s Law
In 1965, Gordon Moore noted that the number of transistors on a chip doubled every 18 to 24 months.He made a prediction that semiconductor technology will double its effectiveness every 18 months
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 13
Moore’s Law
1615fo
r
1413121110om
pone
nts
fct
ion
109876um
ber o
f co
grat
ed fu
nc
65432g 2
of t
he n
uin
teg
10
1959
19
60
1961
19
62
1963
19
64
1965
19
66
1967
19
68
1969
19
70
1971
19
72
1973
19
74
1975
Lo
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 14
Intel continues to pursue Moore’s Law22 nm chip
Core i5Intel York field 8 Core (45 nm)
unt
K10
Dual-Core Itanium 2
Core 2 QuadItanium 2 with 9 MB cache
G80
POWER 6
RV 770GT 200
Quad-Core Itanium Tukwila2,000,000,000
1,000,000,000
Intel York field 8-Core (45 nm)
nsis
tor c
ou
K7K6-III
P4 Barton
K8
Atom
Itanium 2 CellCore 2 Duo
10 000 000
100,000,000
Tran
8088
Pentium
K5
PIIIK6PII
386
486
286
1,000,000
10,000,000
100,000
2,300
1971 1980 1990 2000 2008 2009 2010
40048008
8080
2011
10,000
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 15
1971 1980 1990 2000 2008 2009 2010 2011
Moore’s Plenary Address at ISSCC 2003
NO EXPONENTIAL IS FOREVER . . .FOREVER . . . BUT WE CAN DELAYWE CAN DELAY “FOREVER”
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 16
2.9 billion transistor Chip: Intel still riding on Moore’s Curve
Nanometers MicrometersYear (nm) (µm)1957 120,000 120.01963 30 000 30 01963 30,000 30.01971 10,000 10.01974 6,000 6.01976 3,000 3.01982 1,500 1.51985 1,300 1.31989 1,000 1.0,1993 600 0.61996 350 0.351998 250 0.251999 180 0.182001 130 0.132003 90 0.092005 65 0 0652005 65 0.0652008 45 0.0452009 32 0.032 2011 22 0.022
22 Sep 2009, Intel President and CEO Paul Otellini showing a silicon wafercontaining the first working chips built on 22nm technology
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 17
Where Intel is Today?
Intel plans to release chips based on a 22 nanometer process technology in the second half of 2011The 22nm chip integrates more than 2.9 billion transistors into an area the size of a fingernailThis doubles the density of the current 32nm chipsThis doubles the density of the current 32nm chipsMost of Intel’s CPUs today are based on 45nm processBy comparison, the Intel 4004 microprocessor released y p , pin 1971 was based on 10,000nm process. (A human hair is approximately 100,000 nanometers)
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 18
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 19
Digital Systems in DSP Applications
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 20
VLSI ProfileAVAZ
User Applications
AVAZ System Components & Resources Manager
World Highest Density
RTOS Abstraction Layer
MediaProcessing
Apps &Devices
Cell &Packet
ProcessingApps &Devices
CallControl &SignalingProtocols& Apps
AVAZSNMPAgent& MIB
Utilities
Delivered seven first time right g yMedia Processing Chip
Developed in Pakistan in 2000Delivered seven first-time right
ASICs/Solutions to NEC, Scientific Atlanta, Nortel Networks, STM Wireless
Developed world highest density media processor chipprocessor chip
Hold patents on multiprocessor based SoC design
21
Example: SoC for Carrier-class VoIP Media Gateway
Carrier Class VoIP Media gate performs on thousands of voice channels
DTMF detection and generationLine Echo CancellationLine Echo CancellationVoice compression and decompression
Multiple layers of application-specific PEs are linked with
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan
an NoC for inter-processor communication
22
My views few years back
“I consider FPGA as the most exciting invention ofelectronics after transistor. It is an amazing device, that
t k fi ti th d i ’ d ican take any configuration as per the designer’s desires.The technology is of special interest to engineers indeveloping countries as it enables them to design andimplement multi million gates logic. They can realizeastonishing solution to mathematically intractableproblems “problems.
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 23
24
Logic block Interconnection switches
I/O bl kI/O block
I/Ock O
block I/O b
loc
I/O block
Structure of an FPGA25
x 1
0/1 0/1 x 1 x 2 f 1
x 2
f 0/1 0/1 0/1
0 0 1 1
0 1 0 1
1 0 0 1
x 1 x 2 f 1
(a) Circuit for a two-input LUT
x 2
(b) f 1 x 1 x 2 x 1 x 2 + =
xx 1
1 0 0
f 1
x 2
0 1
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 26
(c) Storage cell contents in the LUT
x2
x 1
0/1
0/1
x 2
0/1
0/1
0/1f
0/1
0/1
0/1
0/1
0/1
x 3
A three-input LUT27
FPGAs Embedding Elements
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 28
D i E l
10 GB N k A l i S
Design Examples
10 GB Network Analysis System
Digital Design of Signal Processing Systems, John Wiley & Sons by Shoab A. Khan 29
Multi-10G Network Analysis Solution
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 30
Installation View
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 31
Multi-10G Network Analysis System
4 10GE
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 32
4x10GE Fiber Inputs
Multi-10G System in the network
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 33
D i E l
M i l P ll l Fi i R i i
Design Examples
Massively Parallel Fingerprint Recognition System
Digital Design of Signal Processing Systems, John Wiley & Sons by Shoab A. Khan 34
Massively Parallel Fingerprint Recognition System
Real-time identity management of large user base requires a
Borderless Economies
Rise of Clouduser base requires a scalable massively parallel fingerprint recognition system
Multi‐million Matching server
e‐commerce
Rise of Cloud Computing
g y g
Healthcare Reforms
Border
National Database
BorderControl Mobile devices and
trusted access anywhere
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 35
Application/ Services
User Access and Security Module
Fingerprint Acquisition Module
Open APIs
License ManagerMultimillion Matches
able
Feature Extraction Module
Quality Check Image EnhancementImage Processing Module
Enroll Verify Identify
Fingerprint Acquisition Module
lar,
Sca
la
Report Generator
Matching Module
Template Generator Database Component
Feature Extraction Module
Mod
u
Remote configurable
User Access and Security Module
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 36
Central Matching System
CENTRAL DATABASE
FPM SERVER
FPM SERVER
FPM SERVER
FPM SERVER
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 37
SERVER SERVER SERVER SERVER
Extension of application as global authentication service
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 38
Design StrategiesGPP
programming flexibilityHigh code and low computationally intensive code mapping pp gHigh power consumption
DSPProgramming flexibilityComputationally intensive & Non structured
dcodeFPGA
Computationally intensive structured codeProgrammability is more complex
ASICASICLower cost, low powerNo flexibility of programmingStandard algorithms
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 39
Flexibility vs Efficiency
Efficiency verses flexibility tradeoff goes upGPP DSP Application Specific solutionHW based Instruction set of dedicated design on an FPGA or ASIC
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 40
Design decision and complexity
Conceptual level design decisions are less complex but have a grave impact p g pon the designThe complexity increases as design moves down in the design cyclemoves down in the design cycleHigh level design decisions are very critical
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 41
Example: Design Partitioning and MappingA Satellite burst modem receiver
DSP maps irregular code intensive application
• Burst detection• Burst detection• Parameter Estimation• Correction loops• Demodulation
FPGA maps regular code intensiveFPGA maps regular code intensive and interfaces
• Forward Error Correction Coding• Glue Logic
ASICs standard code intensiveASICs standard code intensive• Digital Down Converter
GPP maps code intensive and user interfaces
• Modem control softwareModem control software• Initialization and configuration
software• User interface
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 42
D i E l
S f D fi d R di
Design Examples
Software Defined Radios
Digital Design of Signal Processing Systems, John Wiley & Sons by Shoab A. Khan 43
Indigenously Developed SDR
44
A Typical Digital System
Hybrid technologiesASICsASICsDSPsFPGAFPGAsInterfaces
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 45
Design Partitioning and Mapping
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 46
Example Embedded System Satellite Burst Receiver: 1997-98
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 47
SDR Design 2010
/2
20
167
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 48
Software Defined Radio
All configurable HWWaveform 1
DataData SinkAlgo4 Proprietary ½ FEC
Framer 1 V.35 16 QAM OFDM
Device 0Device 2Device 1
FPGA General Purpose Processor
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 49
Device 4 DSP
D i E l
P i N i i S
Design Examples
Passive Navigation System
Digital Design of Signal Processing Systems, John Wiley & Sons by Shoab A. Khan 50
Working of the SystemPosition 1 Position 2 Position 3
Reference Area
Sensed Areas (Aerial images)
Reference Area
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 51
Working
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 52
Passive Navigation System
(in Prod ction)(in Production)
53
Embedded Solution
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 54
FPGA2
Internal Memory
r (Reference Image)
CorrelatorCon
trolle
r
SLA
VE
_IF
SP_I
F) Peak FinderRegister
BlockDSP
SR
AM
_S(D
S
Sorter
Block
Internal M
FPGAXC2V6000
SRAM_MASTER_IF
Memory(Peaks)
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 55
SR
AM
D i E l
S M i i S
Design Examples
Spectrum Monitoring System
Digital Design of Signal Processing Systems, John Wiley & Sons by Shoab A. Khan 56
Spectrum Analysis System
5757
Hardware Multiple Boards
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 58
Universal Demodulator Design
↓
∑ ∑∑
refλ refλ
∑
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 59
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 60
Summary
Advancement in VLSI technology has enabled engineers to develop products and solutions to complex
i i blengineering problemsDigital designs are fun to exercise The algorithms are mapped using digital designThe algorithms are mapped using digital design techniques that exploit multi layers of parallelismThe FPGA technology is very handy and can be put to use for devising innovative solutions
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 61
Grading
Quizzes 5% , Labs & assignments to be developed ALONE: 10-15%, Final project, teams of 1-3 students: 10-15%, One/Two sessionals: 25-30%, Final: 35-50
Digital Design of Signal Processing Systems, John Wiley & Sons by Dr. Shoab A. Khan 62