AD-A233 926 _____1AD

AD-E402 183

Technical Report ARFSD-TR-91002

SELECTABLE LIGHTWEIGHT ATTACK MUNITION OPERATINGCOMPONENT OF THE GATE ARRAY

Nanette M. Shoenfelt

April 1991

U.S. ARMY ARMAMENT RESEARCH, DEVELOPMENT ANDENGINEERING CENTER

Fire Support Armaments Center

U-3 ARMYAMN UIIN Picatinny Arsenal, New JerseyARMAMENT MUNITIONS

E CHEMICAL COMMAND

ARMAMENT ROE CENTER

Approved for public release, distribution is unlimited.

The views, opinions, and/or findings contained in thisreport are those of the author(s) and should not beconstrued as an official Department of the Army position,policy, or decision, unless so designated by otherdocumentation.

The citation in this report of the names of commercialfirms of commercially available products or sy:'tem.n doesnut constitute official endorsement by or approval of theU.S. Government.

Destroy this report when no longer needed by any methodthat will prevent disclosure of contents or reconstructionof the document. Do not return to the originator.

I Form Appro red"

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4. TITLE AND SUBTITLE 5. FUNDING NUMBERS

SELECTABLE LIGHTWEIGHT ATTACK MUNITION OPERATINGCOMPONENT OF THE GATE ARRAY

6. AUTHOR(S)

Nanette M. Shoenfelt

7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES) 8. PERFORMING ORGANIZATION

ARDEC, FSAC REPORT NUMBER

Precision Munitions Division (SMCAR-FSP-E) Technical Rfport ARFSD-TR-91002Picatinny Arsenal, NJ 07806-5000

9. SPONSORING/MONITORING AGENCY NAME(S) AND ADDRESS(ES) 10. SPONSORING/MONITORING

ARDEC, IMD AGENCY REPORT NUMBER

STINFO BrATTN: SMCAR-IMI-IPicatinny Arsenal, NJ 07806-5000

11. SUPPLEMENTARY NOTES

12a. DISTRIBUTION/AVAILABILITY STATEMENT 112b. DISTRIBUTION CODE

Approved for public release; distribution is unlimited.

13. ABSTRACT (Maximum 200 words)

The selectable lightweight attack munition (SLAM) is a small explosive armament. It can be used similarly toa mine where it can be placed on the ground to detonate when the magnetic signature of the desired targetis detected. It can also be used with a tripline or to detonate after a set period of time. The operation of theSLAM is controlled by electronics with the majority of functions on a gate array. The functions of the gatearray that control the operation of the SLAM are described in this report.

14 SUBJECT TERMS 15. NUMBER OF PAGES

27Mine Tripwire Munition Gate array Tripline Logic I. PRICE CODE

q" r "-AzI-I 1GA110N 16. SECURITY CLASSIFICATION 19. SECURITY CLASSIFICATION 20. LIMITATION OF ABSTRACTOF REPORT OF THIS PAGE OF ABSTRACTUNCLASSIFIED UNCLASSIFIED UNCLASSIFIED SAR

NSN 7540-01-280-5500 Slandard Form 298 (R(v 2 89)Prp cribed by ANSI Sid Z39 1 298 102

CONTENTS

Page

Introduction 1

Overview 1

SLAM 1

Gate Array 2

Functional Blocks 3

A Timer String 3

B Timer String 3

Time Out 4

Clock Check 4

Self Check 4

Input Processor 5

Antidisturbance Processor 6

Safety Pin Processor 6

Output Control 7

SLAM Gate Array 8

Conclusions 8

Bibliograpphy 21

Distribution List 23

AJ

'I

/

FIGURES

Page

1 A timer string 9

2 Timing sequence for the A timer string 10

3 B timer string 11

4 Time out 12

5 Clock check 13

6 Self check 14

7 Input processor 15

8 Antidisturbance processor 16

9 Safety pin processor 17

10 Output control 18

11 SLAM gate array 19

it to become activated. At this point, the system performs a self-test. When the safetypin is removed, the timing for the system begins. Depending on the mode of operationthat has been selected, the SLAM electronics is alerted for the appropriate signal inwhich it is to fire or self-neutralize.

All of the functions of the SLAM except for the use with a blasting cap are control-led by the system electronics. The SLAM uses surface mount technology with most ofthe functions of the munition on a gate array. This gate array is a highly customizedapplication specific integrated circuit (ASIC).

Gate Array

The gate array logic has been divided into two parts: the operating and testingcomponents. The operating component has been partitioned into functional blocks tofacilitate the design and analysis of the system. The functional blocks can be combinedto provide the logic for the entire gate array chip. The functional blocks for the operatingcomponent of the system are as follows:

A timer string timing string type a

B timer string timing string type b

Time out timing for the safe separationperiod

Clock check logic for checking if the mainclock is fast or slow

Self check logic for performing the systemself-check

Input processor logic for latching and processinginput signals

Antidisturbance processor logic for processing the antidis-turbance senscr

Safety pin processor logic for processing the safety pinstatus

Output uuntrol logic for performing the electronicenable

2

The description and drawi;,i of each tunctional blocV fo;ows. Tho interconnection ofthe blocks :s a.o sho,-.

FUNCTIONAL BLOCKS

A Timer String

The gat. array co-airw fyp o timtnq stirips Tt, am the ,' TIMER STRand the B TIMER SITI. Fa in str;nq !S made ot ,<ix taqes of rppie .,u.te ', which reused to provide tue u u - the eriirro-T , 2-,c A A-TiMER SIFi 1, te iiro block of eachstring with the remainder of the string made of B_ TIMER STR.

The ATIMER_STR (fig. 1) is composed of six D flip-flops. The output of a D

flip-flop is the same as the input; hcwever. it is delayed one clock cycle. When theseflip-flops are put into a string with the complement of the output of one used as the input

to the next, the delay tines increc ix. eXoonentially For x amFe, the ojtput of the first

flip-flop is delayed u o , : c lock pu!se from the re e l c the system Ifig. 2'. The

output of the second flip-fliop is 21 clock pulses. Likewise. the output of the third flip-flop

is delayed 2: This continues up the string, so that the output to the sixth flip-flop is

delayed 2z clock cycles. After each of the flip-flops have been toggled, the signal is

carried out as the input to the BTIMER STR.

B Timer String

The B _TIMERSTR (fig. 3) is very similar to the A TIMERSTR in that it is com-

posed of six flip-flops in a string. The outputs are again delayed in the same exponen-tial tashion. The main difference is that the BTIMERSTR has a test input. it is verydifficult to test a long timing string since the timing gets so large. Therefore, this func-

tional block includes a method for testing the string. The first flip-flop in the string is aselectable flip-flop. It is a D flip-flop, in which there is a choice of the SO or the POinput. If the selectable input SE is high, then SO is used as the input. But if the SEinput is low, then the input that the flip-flop sees is PO. When the test signal is high,

then the SE input s also high. This forces the system to use SO which makes thesystem similar to the ATIMER STR. In this way it can be tested to work just like the

previous sys.m, using only 2" clock cycles -,o get through the string. However, if there

is no test tnput, then the PO input. wioch is the output of thr A TIMER STRING, is

used. -hi caises tthe strinq to contr-,ue with deiays e-sihibhshd in the prior block.These B -TIMER STR biocks can be string together to create long strings. In thisarrangement, outputs can be taken from each stage of ea:ich string which makes it

possible to obtain almiot any time interival desired

Time Out

The TIMEOUT functional block (fig. 4) is used to determine when the safe sepa-ration period of the SLAM has expired, thus allowing the munition to become active.The inputs to this block are four timing signals and the CARRYBIN which is the CAR-RYBOUT output from the B TIMERSTR. The CARRYBIN must toggle two flip-flopsbefore being ANDed with the other timing signals. This signal then toggles the finalflip-flop to show that the timing sequence has taken place.

Clock Check

There are two crystal oscillators in the SLAM that check each other. The one thatprovides the timing for the gate array is the primary time base (PTB); the other timer isthe test time base (TTB). The CLKCHK functional block is used in two places in thegate array. Time checks are made to see if the PTB is faster than the TTB, and theother tests if it is slower. This depends on which time base is used for which input tothe block.

The CLKCHK block (fig. 5) has the master reset, the CLK1, and the CLK2 asinputs. The CLK1 is the clock input to a four stage timing string. The output of thisstring is the clock signal to two flip-flops assimilated so that two sequential clock pulseswill cause the output of the second flip-flop to go high. The CLK2 is also applied to theclock input of a four stage flip-flop string. The outputs of these flip-flops enter a fifthflip-flop configured so that the output of this flip-flop is a high pulse that is one clockperiod wide. This pulse is one clock pulse after the fourth flip-flop is toggled. The pulseis used as the reset to the two flip-flops that are run by the CLK1 string. The result ofthis is that if the clocks are close to the same frequency, then the flip-flops will be resetbefore the clock signal appears. This will in turn cause the CLKERROR output toremain low. If, however, the CLK2 has a lower frequency than the CLK1, the clock willoccur before the flip-flops are reset causing the CLK-ERROR output to go high. Thisshows that the CLK2 is slow with respect to the CLK1. This check is an ongoing checkfor the time the chip is operating.

Self Check

A number of elements in the SLAM system are checked when the battery isinitiated and the gate array chip is activated (fig. 6). The items which are inputted to bechecked are the safety pin (RPIN and RPINB), the firing capacitor (CAP), the lowvoltage detector (LVD), the fast and slow clock checks (FAST and SLOW), the settingson the selector switch (LATCH BAD), the safety switch not in the shipping position(SHIP), and the output of the boundary scans BSINCELL, which are the tests of theenable, self-neutralize, and fire outputs of the gate array (ENIST, SNIST, and FTS-). Ifany part of the self check fails, then the firing output will be disabled.

4

I he, HP N -17- H1 NO >j Fj sA Ic he c rori .s o CA ' hUc, r

low. Th s represents ?,c chargeor the lfl i~ capacit, 11 tn vwn, ex*terrh il to 1" E cjatearray .erhfes whethec tn-rp s volinqu v riot on the capuictf -1 N: 29 s7iloLd be !ow.A low voitage cletector circuit off tihe (,hip, wfl gve a hiQ sional if the battery voqtagedrops below a certain am'nt- ThY FAOT arid SLOW input'; shorid he low ',hese are[t'e outputs (,, lie tw'O 6.~ V~n.'a blocks ci tklo qatY IV Tiie I. 8/- HLsign al shoutd ,>- 1V to) pa,;; ro sh Wc k It Gith LAI FH BA (> put of the INPUT J ROC iUrctional bloci fIr sihows that 1h switch pj tiorl is selected andstored. Th-e SHIlP Mont shoirj be k-v itn the SLAM ba,?rv is a I ivated when thespiestor swv: is in Nr' ''i'''* Fo 7 0 tih.. q i'' Ni f'ij Hio sr :ec. !'

wilLialw oKmp o osrac n i Koo in i to makeSELF CHK OK output go 1hji

Input Processor

npe; block ;iq 7) is. SQ7stOrp T , ~ inr -'N just aive-ihle nste, aA a tc;t !r: niy aamiarr s .uc oct~ nchanges in Ofhe c,.Mhh wrjositon thNitaw Nale otter ire system is eirne d. The twoflip-f'lops in the ner 10-thand corner of the d&aqram are us:edl to ve. aot u sinal pulsethat is one PT8 wvidth in duation and begins one PTB period afte~r the TRIGIGER signal.This purse is used as the POWER UP inputs which initiate !Iie AD PROC and thePINPROC blocks It is also used Io clock four fijp-flops in this fuwatrnal block Theseflip-fops are emoloved to t'ch the~ the mctorc switch ines cFL oL' and SEL2)to glive the sett rgs on the s~7 -s w ch. TO OULA auOut e h Q1 tNO% cT r -NOrS (r0 toExcluGsve (3-H gae: wc are th umpulpt o~f eu-sn of tMuse p '.to;m eirAllDedtogether. This signs goes =t a'ctdh f! )rb. Puch 00u r the i nputs and outputs ofeach of the fiip-h ops agrkp,- M en the nout to the fin-al kPch wNI be tvh Us'h output ofthis flip-flop will! be high if the switch settings did not successfully latch. T!1i is theLATCH BAD output that is tested0 in t!he SELFCHK part of the gate a;rray !he threeswitch selection lines (SELO. SF1.1. aqd SEI-2i go into a three-to eight decoder, provid-ing the output,, of the block. The SHIV output i; tie snqppinq setti ncy the ENA settingsare as follows: time demolitiori tmes of 1 5. 30. 45 and ()0 mnrutes. and self-neutralization time of 4. 1,0 ano 24ho.

Thej ARM Ei'JA no" Dcas~ies frow the OUTPUT CONITROL block. It is used torelatch the switch p~ts: s rir I,,, the system enabling lI he 5witches are changed

after~~~~~~~ ths)e hnt;TME uotw!0 highTefo, the function of theSLAM will be de rmki~e non the swich op'ttif gs tV~hr, aer cta c ThIe switchcan be clani-d fromi Pan tue inkl !". t 1ni.e flhui~i is- enrabled wlkout any chiangeto the m: sy0:'. T his on tie se to h ic tieh! t ) switch -, thnq If. Ihowevyer, th1eswitch pm ioro is cn a qed ;Ito r the- sj/ ,rerr iC, wnabled. 0:cen tii i ' rititasnippi r ea u re VWiicause the munition to detona te-

Antidisturbance Processor

This block (fig. 8) has inputs from the PTB, the 212 delay from the timing string, themaster reset, the power up pulse created by the INPUTPROC block, and the antidis-turbance (AD) switch input. To help facilitate the rejection of false AD detection andincrease the reliability of the AD switch, this block provides the algorithm. The userdesires that the SLAM not detonate with vibrations on the ground. When the AD switchis activated by a movement of the system, the ball inside the switch moves and sends asignal to this functional block. This input is again observed after a certain amount oftime is determined by the timing string at the top of the diagram. If there is no change inposition at this time, then no disturbance is detected. However, if there has been someadditional movement in the munition, then the AD switch is addressed again after thenext part of the timing string has taken place. If there is no change in the state of theAD switch at this point, then the munition will remain unchanged. If there is a change inthe switch, then the ADPROC block will output a high signal on the ADOUT to theFIRESAFE block.

Safety Pin Processor

This component of the gate array is used to determine when the safety pin hasbeen released (fig. 9). To start the timing of the gate array, a safety pin on the SLAMunit must be pulled. This pin is positioned next to a mechanical switch. Normally thesafety pin microswitch is not depressed. The PIN input will be low, while the PINB willbe high. This causes the RPIN to be low and the RPINB to be high. These are inputsto the SELFCHK block which tests to see that they are in opposite states. With a lowsignal on the PIN input, the timing chain of flip-flops at the upper right corner of theblock will not get a reset signal. Therefore, the output of the string will be low. Thissignal goes into an AND gate with the output remaining low. This low signal propagatesto the RELEASE output showing that the safety pi- has not been released.

When the safety pin is pulled, the microswitch is depressed. This means that thel;,i nput is high, while the PINB is low. This is also true for the RPIN and RPINB

..,'puts. Vvith tiie PIN input high, the flip-flops in the timing string will reset, and the;nput into the AND gate will be high. However, the low signal on the PIN input contin-iies to the other input on the AND gate. This will still keep the RELEASE output low.

When the safety pin is completely removed, the microswitch is no longerdepressed. This makes the PIN input low again. The same thing will occur as beiore,except that the output from the timer string is now high from the previous step. The highPIN input now gives a high signal on the other input to the AND gate making the RE-LFASE output high indicating that the safety pin has been removed. This output goes,tar- t r timing sequences in another part of the gate array.

6

Output Control

This segment of the gate array is very important in tht,, t' ,, ;,r' :Lat crter-mines whether or not the munition will enable the system to s0If-_1J U K oi ir !ig10,1 There are a nunber of timing inputs that are used to deterni,-.e .li ,' requiredfor each event There are also inputs for the PTB. master rse I

OK), the seven FNA settings from the selector switch. thii, re, it 1detector that ;s still operating after the self-test occurs (LVD), the cuityj; (f t- of fr'--chip delta-sigma modulator (VEH), and the outputs of the INPL r . , IAt .,rAD PROC (AD), CLK CHK (FAST and SLOW), and TIME (,11 ir T.i, rI

timing is o controlled in this part of the circuit to charge the firing : .' r ,t r Linitiate a p-ston actuator (CHARGE). There is also the PRE ENA outl.t ih t !,>its

the piston actuator that unlocks the safe and arm device. FiRE !s the sqiqna that iritiates the piston actuator to moe the rotor in line so that tile warhead can bedetonated. The SN signal is the signal that fires the rotor when it is ouW of line so thatthe rotor will be forced out of the encasement of the mun' on. Th' ni' ().' 1 visiblemeans of dspiaying that the system has self-neutralized.

If one of the time demolition modes has been selected .,e ',A15 FNA30.ENA45, or ENA60 is high) and the appropriate timing has toggled tiLe fi:p flop. then theNAND gate wil output high. This high signal will continue through to the CHARGE andFIRE outputs providing that the system has passed the sef-t .st and 0 nas not beenself-neutralized. There are, however, four other methocrs for initiating to , SLAM to fireIf the selector switch has been changed after the sys'em has nelen c. .'inkd no matterwhat mode the munition is operating, then the antitamp(r tetjr, w ; (!Ptor;t. thesystem. Another method of causing a high fire signal is if the munition is moved when itis in tripline mode or any other nontime demolition modes. In this case. the AD switchsignal will be high which will propagate to the fire line in this block. This will detonatethe munition. A third means for causing the SLAM to fire is to detec a vehicle when themine is not in the tripline mode or any time demolition mode The final method -)f firingthe system is if there is a clock error or low battery aftpr 15 min uf activa[ion, if in timedemolition mode.

There are three channels for the SLAM to become self-neutraliz d If the selectorswitch is set to -ne of the self-neutralization times (ENA4, ENA10, ENA24t, and theappropriate time has passed, a high signal will spread to the SN output In time demoli-tion mode, the system will self-neutralize if a clock error or low battery iq ereOUiteredwith in the ftr:;t 15 olin of aclivation It will also tranrspire it ;if >Vr ';' or !ow batteryvoltage occurs anytimp in one of the self-reutralzation oo!tkh,

7

SLAM GATE ARRAY

The entire gate array (fig. 11) shows the interconnection of each of the functionalblocks in the operating component of the gate array as well as the testing component.There are inputs for the timing from the crystal oscillators, the switch settings, the safetypin position, the antidisturbance switch, the low voltage detector, the firing capacitor, thedelta-sigma modulator, and the test access port controller. The outputs are CHARGE,which fires the capacitors; ARM_ENABLE, which unlocks the rotor on the safe and armdevice: FIRE, which detonates the warhead; SN, which self-neutralizes the munition;and TAPMONITOR, which gives serial data as to the output of the testing function.

CONCLUSIONS

The operating component of Lhe gate array for the SLAM has been described indetail. The gate array controls the timing for the system by receiving inputs from twocrysta! oscillators. The two oscillators are used to check each other to make sure thatthe primary time base oscillator is not too fast or slow. This primary time base is used inthe timing strings to get all of the desired time delays. The gate array also locks in theswitch settings and determines if they have been tampered with. The algorithm for theantidisturbance switch is also in the gate array. The primary function of the gate array isto dntermine when the system will fire or self-neutralize. The chip will send a signal tothe firing capacitors to charge, to enable the system by unlocking the safe and armdevice, to fire the piston actuators to detorate the warhead or self-neutralize themunition.

This munition is still in the full scale development stage, and there may still beminor changes to the unit before the design is finalized.

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BIBLIOGRAPHY

1. SLAM IR&D Report, Honeywell Ordnance Division, Edina, MN, 1987.

2. SLAM Schematic Drawings, Alliant TechSystems, Edina, MN, 1990.

21

DISTRIBUTION LIST

CommanderArmament Research, Development and Engineering CenterU.S. Army Armament, Munitions and Chemical CommandATTN: SMCAR-IMI-I (5)

SMCAR-FSP-E (10)Picatinny Arsenal, NJ 07806-5000

CommanderU.S. Army Armament, Munitions and Chemical CommandATTN: AMSMC-GCL (D)Picatinny Arsenal, NJ 07806-5000

AdministratorDefense Technical Information CenterATTN: Accessions Division (12)Cameron StationAlexandria, VA 22304-6145

DirectorU.S. Army Materiel Systems Analysis ActivityATTN: AMXSY-MPAberdeen Proving Ground, MD 21005-5066

CommanderChemical Research, Development and Engineering CenterU.S. Army Armament, Munitions and Chemical CommandATTN: SMCCR-MSIAberdeen Proving Ground, MD 21010-5423

CommanderChemical Research, Develupment and Engineering CenterU.S. Army Armament, Munitions and Chemical CommandATTN: SMCCR-RSP-AAberdeen Proving Ground, MD 21010-5423

DirectorBallistic Research LaboratoryATTN: AMXBR-OD-STAberdeen Proving Ground, MD 21005-5066

23

ChiefBenet Weapons Laboratory, CCACArmament Research, Development and Engineering CenterU.S. Army Armament, Munitions and Chemical CommandATTN: SMCAR-CCB-TLWatervliet, NY 12189-5000

CommanderU.S. Army Armament, Munitions and Chemical CommandATTN: AMSMC-IMF-LRock Island, IL 61299-6000

DirectorU.S. Army TRADOC Systems Analysis ActivityATTN: ATAA-SLWhite Sands Missile Range, NM 88002

24