7
A/D CONVERSION WITH FLASH CONVERTERS A Practical Exercise Name:________________ I. Purpose. The process of taking an analog voltage, VAnalog, and converting it to a digital signal can be accomplished in several ways. One simple way is by means of parallel encoding (also known as flash converting). In this method, several comparators are set up, each at a different voltage reference level (VA, VB, VC, VD) with their outputs (C1, C2, C3) as shown in Figure 1. The comparators operate in such a way that, if the analog input is greater than the reference node voltage, the comparator output will go “high” ( approximately +Vcc), represented by a logic “1”. If the analog input is less than the reference node voltage, the comparator output will go “low” (approximately Vcc), represented by a logic “0”. Figure 1. Flash Converter 2 K 1 K 1 K +Vcc +Vcc +Vcc -Vcc -Vcc -Vcc 1 K A B C D 3 2 1 ANALOG INPUT SIGNAL C3 C2 C1 (V Analog ) + + + _ _ _ REFERENCE VOLTAGE (V ref )

AD 20Flash 20Converter

Embed Size (px)

Citation preview

Page 1: AD 20Flash 20Converter

AA//DD CCOONNVVEERRSSIIOONN WWIITTHH FFLLAASSHH CCOONNVVEERRTTEERRSS A Practical Exercise Name:________________

I. Purpose. The process of taking an analog voltage, VAnalog, and converting it to a digital signal can be accomplished in several ways. One simple way is by means of parallel encoding (also known as flash converting). In this method, several comparators are set up, each at a different voltage reference level (VA, VB, VC, VD) with their outputs (C1, C2, C3) as shown in Figure 1. The comparators operate in such a way that, if the analog input is greater than the reference node voltage, the comparator output will go “high” ( approximately +Vcc), represented by a logic “1”. If the analog input is less than the reference node voltage, the comparator output will go “low” (approximately –Vcc), represented by a logic “0”.

Figure 1. Flash Converter

2 K

1 K

1 K

+Vcc

+Vcc

+Vcc

-Vcc

-Vcc

-Vcc 1 K

A

B

C

D

3

2

1

ANALOG INPUT SIGNAL

C3

C2

C1

(V Analog )

+

+

+

_

_

_

REFERENCE VOLTAGE ( V

ref )

Page 2: AD 20Flash 20Converter

2

II. Equipment. 3 LM741 Operational Amplifiers (OpAmp) 3 1 kΩ Resistors 2 2 kΩ Resistor (use Decade Resistor box) Standard Lab Bench setup.

LM741 Pinout

III. Lab Procedure. Before building the Flash Converter, make some predictions based on what you know about Flash Converters. Step 1. Recall that the voltage across a resistor in a series circuit is equal to the value of that resistor times the total impressed voltage across the series elements divided by the total resistance of the series elements. This is known as the voltage divider rule and can be expressed as the following equation,

T

XX

R

ERV

where VX is the voltage across RX, E is the impressed voltage across the series elements, and RT is the total resistance of the series circuit. Use the voltage divider below (Figure 2) to calculate the voltage drop across each resistor. Use this voltage drop with reference to ground to calculate the voltage at points +Vcc, A, B, C, D (VA, VB, VC, VD) ,and–V cc as shown. Note: the negative terminal of the supply is not connected to ground. Record you answers in Table 1 on next page.

Page 3: AD 20Flash 20Converter

3

2 k

1 k

1 k

1 k

2 k

7 V

A

B

C

D

OpAmp-Vcc

OpAmp+Vcc

Figure 2. Reference Voltage Series Circuit.

+Vcc VA VB VC VD -Vcc

Predicted

Measured

Table 1. Reference Voltages and Supply Voltages Next, build the Reference Voltage series circuit in Figure 2. The resistors should already be mounted in series on the Quad Board, so use your dual DC Power supply (V1 terminals) to supply the 7V battery and use the ground terminal on the dual supply to provide your ground reference node for the circuit. Measure the voltage at the points +Vcc, A, B, C, D, -Vcc with respect to ground. Record you answers in Table 1 above. Have your instructor or a lab tech check your circuit before moving forward.

Page 4: AD 20Flash 20Converter

4

Step 2. For a given analog input voltage (VAnalog = 3.5 V, 2.5 V, 1.5 V or 0.5 V) and using the reference voltages from your Table 1 (VA, VB, VC, or VD), predict the comparator output (C1, C2, and C3). Recall, if the analog input is greater than the reference node voltage from the voltage divider, the comparator output will be driven “high” (to its +Vcc -1V=~4 V , for our particular Op Amps), represented by a binary “1”. If the analog input is less than the reference node voltage from the voltage divider, the comparator output will be driven “low” ( to –Vcc +1.8V= ~-0.2V, for our particular Op Amps), represented by a binary “0”. Record your answers in Table 2 both in voltage and binary.

VAnalog C3 (Voltage)

C3 (Binary)

C2 (Voltage)

C2 (Binary)

C1 (Voltage)

C1 (Binary)

0.5 V

1.5 V

2.5 V

3.5 V

Table 2. Predicted Comparator Outputs.

Step 3. Next, add the connections from the reference nodes (A,B,C) on your Voltage series circuit to each of the inverting (-) terminals of the Op Amps as shown in Figure 1 (the 3 Op Amps have already been mounted on your Quad Board). Also add the connections from the reference supply to +Vcc and –Vcc points on the Op Amps if not already connected.

Because we are not employing a sample-and-hold circuit, we will have to provide a fixed DC level to represent VAnalog (the amplitude value sampled at each of the sampling times). The DC voltage (from your dual DC power supply- V2 terminals) will be adjusted for each analog input voltage (3.5 V, 2.5 V, 1.5 V, or 0.5 V). Connect the positive (+) terminal of this supply to each of the noninverting (+) inputs of all 3 Op Amps. Make sure to connect the negative (-)terminal of V2 to circuit ground. Step 4. For each analog input voltage (VAnalog = 3.5 V, 2.5 V, 1.5 V, or 0.5 V), measure the output voltage (C1, C2, and C3) from each of the three comparators with a Digital Multimeter. Record your answers in Table 3 of the Results section both in voltage and binary. Anything 0.4 V is a binary “0”, while anything 3.9 V is a binary “1” as the some of the Op Amp chips have different manufacturers.

VAnalog C3 (Voltage)

C3 (Binary)

C2 (Voltage)

C2 (Binary)

C1 (Voltage)

C1 (Binary)

0.5 V

1.5 V

2.5 V

3.5 V

Table 3. Measured Comparator Outputs.

Page 5: AD 20Flash 20Converter

5

In the real world, the task of taking the “high” level of voltage or “low” level of voltage from the comparators and translating them into a digital stream of binary numbers is accomplished by a device called an encoder (see Figure 3). The encoder takes the 3-bit output (C1, C2, and C3) from the comparators in Figure 1 and encodes that into a 2-bit binary signal (A and B) for further transmission (shown in Figure 4). This completes the Analog-to-Digital Conversion.

BINARY

OUTPUT

b2

b1

ENCODER

C3

C2

C1

COMPARATOR

OUTPUT

Figure 3. 3-to-2 Encoder.

As you can see, we have taken the “sampled” analog signals of 3.5 V, 2.5 V, 1.5 V, and 0.5 V and translated them into a digital signal. If these voltage levels were the sampled outputs from a microphone at a recording studio, the flash ADC could be used to help make a digital recording. The digital signal would be written to a compact disc, CD, and when you played the CD your CD player would convert the digital signal of “1’s” and “0’s” back to discrete voltage levels (analog signal) with a DAC (digital to analog converter). This analog signal would drive the speaker in your room and you would be recreating the same sound produced in the studio.

C3 C2 C1 b2 b1 Decimal # 0 0 0 0 0 0 0 0 1 0 1 1 0 1 1 1 0 2 1 1 1 1 1 3

Figure 4. Encoder Output

Page 6: AD 20Flash 20Converter

6

Critical Thinking.

1. What is the biggest advantage of Flash Converters? 2. In this lab you built a 2-bit Flash ADC with 3 comparators. Write the equation to determine

how many comparators are needed for a number of bits. How many comparators would be needed to build a 10-bit Flash ADC?

3. Explain the advantages and disadvantages of a 10-bit vs. a 2-bit Flash ADC in terms of

complexity, resolution, and bandwidth.

4. Fill in Table 4 with the range of input values that you deduce will result in a binary output of 00, etc. (Ex. 0.5V at the input fell into this first range). Due to the quantizing nature of digital values, a range of input values will be assigned a single voltage output (far right column) following a digital to analog conversion process.

Table 4. Correlation of input voltage range to quantized output voltage.

5. Given the information from Question #4. and Table 4. superimpose a sketch of the voltage output of the following analog voltage input signal (assuming the analog signal had been converted to digital using the flash converter constructed in this lab and then later recovered through the process of Digital to Analog conversion).

Input Voltage Range Binary Output Quantized Voltage

0 0

0V

0 1

1V

1 0

2V

1 1

3V

Page 7: AD 20Flash 20Converter

7

Sample the input 5 times/major division before quantizing. Notice the effects of quantizing error and the effect of sample time on the ability of an ADC – DAC circuit on the original signal.

6. What is the binary output of the ADC for the first two major divisions above? Hint: You should have 10 2-bit values for a total of 20 bits.

7. What is the resolution of this ADC?

8. What is the quantization noise ( RMS)?

4V

3V

2V

1V

0V

12n

qV

max min

2N

v vq

quantizer step size [volts]