Acer Aspire 5742 Compal La 6582p Pew7181 Uma Schematic Diagram

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Title

Size Document Number Rev

Date: Sheet of

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

401939 ASCHEMATIC,MB A6582

Custom

1 48Friday, July 02, 2010

2009/5/12 2010/04/15Compal Electronics, Inc.

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Intel Arrandale Processor with DDRIII + Ibex Peak-M

PEW71_81_91 UMA M/B Schematics Document

REV:0.2

Compal Confidential

2010-06-18

www.masteram.su

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USB port 8USB port 11

6.4G/8.5G/10.6G100M/133M/166M(CFD)

100MHz

33MHz

100MHz

100MHz1GB/s x4

DMI x4FDI x8

page 34

port 2,4 port 1

LVDS Conn.page 22

CRT Conn.page 23

HDMI(UMA)

page 13

SPI

Model Name PEW71_81 UMA

3.3V 24MHz

GIGA LAN BCM57780 page 27

MINI Card x1WLAN

CMOSCamera

PCI-Express x 8 (ABD PCIE1 2.5GT/S CKD PCIE1/2 2.5/5GT/S)

Dual Channel

2.7GT/s

File Name : LA-6582P

Touch Pad

LPC BUS

page 33

Processor

Compal Confidential

page 34

Int.KBD

page 31

BANK 0, 1, 2, 3

USB conn x3

(UMA)

Arrandale (UMA)

3.3V 48MHz

page 30

Fan Control 204pin DDRIII-SO-DIMM X2Intel

BIOS ROM

1.5V DDRIII 800/1066/1333

page 31

HDA CodecALC272X

Memory BUS(DDRIII)

PCH

HD Audio

page 26

page 4,5,6,7,8,9

Ibex Peak-M

page 10,11

page 31

ENE KB926

Audio AMPTPA6017page 26

USB port 0 (Left Low)USB Port 1 (Left High)USB port 2 (sub board)

page 29page 29 page 22

rPGA988A

Intel

page 24

BluetoothConn

port 1

SATA ODD Conn.

page 25

SPI ROM

CRT(UMA)

LVDS(UMA) USBx14

page 13,14,15,16,17 18,19,20,21

port 0

page 25

Int. Speaker

100MHzSATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

SATA HDDConn.

HDMI Conn.

USB port 9

CardReader

page 29

Level Shiftpage 24

USB port 12Mini card

page 26

Power ON/Off CKT.

DC/DC Interface CKT.

Power Circuit DC/DC CKT.

RTC CKT. LS-6581P USB/B

LS-6582P PWR/B

LS-6583P ODD/B133/120/100/96/14.318MHZ to PCH48MHZ to CardReader

Clock GeneratorIDT: 9LRS3199AKLFTSILEGO: SLG8SP587

page 12

RJ45 Conn. page 28

ZZZ1

M/B PCBDA60000IQ00

ZZZ1

M/B PCBDA60000IQ00

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ON OFF OFF

+0.75VS 0.75V switched power rail for DDR terminator

+1.5VS+1.8VS 1.8V switched power rail+3VALW 3.3V always on power rail

EC SM Bus1 addressDevice

OFF

+1.05VS_VTT 1.05V switched power rail (1.05 for AUB CPU) ON OFF OFF

1.5V switched power rail

+CPU_CORE

Ibex SM Bus addressDevice Address

Address Address

Voltage Rails

VINB+

+1.05VS

Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU

1.05V switched power rail for PCH

External PCI DevicesDevice IDSEL# REQ#/GNT# Interrupts

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

ON OFFON ON*

ON OFF OFF

S1 S3 S5

ONON OFF

N/A N/A N/AN/AN/AN/A

Power Plane Description

EC SM Bus2 addressDevice

Smart Battery

OFFOFF

+1.5V 1.5V power rail for DDRIII ON ON OFF

0001 011X b

ON

1101 0010b

DDR DIMM0 1001 000XbDDR DIMM2 1001 010Xb

Clock Generator(9LRS3199AKLFT, SLG8SP587)

+3VS+5VALW+5VS

3.3V switched power rail5V always on power rail5V switched power rail OFF

ONOFF

OFFON

ON OFFON*ON

+3V_LAN 3.3V power rail for LAN ON ON ON*

+RTCVCC RTC power+VSB VSB always on power rail ONON

ON ONON*ON

Ext3 Right USB Ext3 Right USB

Ext1 Left Low USBExt2 Left High USB

STATESIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

USB 2.0 USB 1.1 Port 4 ExternalUSB Port3 ExternalUSB Port

Ext1 Left Low USBExt2 Left High USB

Camera

1st Min-Card

Card ReaderCamera

1st Min-Card

Card Reader

ON

Blue Tooth Blue Tooth

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

012

3

OFF

OFF

LOW

LOW LOW

45678

LOW LOW

LOWLOWLOW

LOW

910111213

LOW

LOW

HIGH HIGH HIGH

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

HIGH

HIGHHIGHHIGH

HIGH

UHCI5

UHCI6

EHCI1

EHCI2

USB Port Table

HIGH

HIGH

BTO Option TableBTO Item BOM StructureHDMI HDMI@

Project IDBoard ID

Project ID / Board ID Table for EC-AD channelVcc 3.3V +/- 5%

100K +/- 5%Ra/RcRb / Rd V min

0123

08.2K +/- 5%

0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V

0.503 V0.819 V

0.538 V0.875 V

AD_BID V typAD_BID VAD_BID max

18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%

3.300 V

0 V 0 V

4567 NC

1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V

2.200 V3.300 V

2.341 V

1.185 V 1.264 V

0.10.20.31.0

Original NEW70/80/90/50/71/91PEW71/81/91 Audio Mono/Crystal

PEW71/81/91 Audio Mono/SUSCLKNEW71/91 Optumis

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1

1

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A A

PEG_IRCOMP

EXP_RBIASDMI_PTX_HRX_N0

H_FDI_TXP0H_FDI_TXP1H_FDI_TXP2H_FDI_TXP3H_FDI_TXP4H_FDI_TXP5H_FDI_TXP6H_FDI_TXP7

H_FDI_TXN0H_FDI_TXN1H_FDI_TXN2H_FDI_TXN3H_FDI_TXN4H_FDI_TXN5H_FDI_TXN6H_FDI_TXN7

DMI_PTX_HRX_N1DMI_PTX_HRX_N2DMI_PTX_HRX_N3

DMI_PTX_HRX_P0DMI_PTX_HRX_P1

DMI_PTX_HRX_P3DMI_PTX_HRX_P2

DMI_HTX_PRX_N0DMI_HTX_PRX_N1

DMI_HTX_PRX_N3DMI_HTX_PRX_N2

DMI_HTX_PRX_P0DMI_HTX_PRX_P1

DMI_HTX_PRX_P3DMI_HTX_PRX_P2

CFG3CFG4

CFG7

H_RSVD17_RH_RSVD18_R

CFG0

RSVD65_RRSVD64_R

H_FDI_FSYNC0H_FDI_FSYNC1

H_FDI_INT

H_FDI_LSYNC0H_FDI_LSYNC1

DMI_HTX_PRX_N[0..3] DMI_HTX_PRX_P[0..3]

DMI_PTX_HRX_N[0..3] DMI_PTX_HRX_P[0..3]

H_FDI_TXN[0..7] H_FDI_TXP[0..7]

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WW41 Recommend not pull downPCIE2.0 Jitter is over on ES1

*1:Disabled; No Physical Display Port attached to Embedded Display Port0:Enabled; An external Display Port device is connected to the Embedded Display Port

*:Default

CFG4 - Display Port Presence

*1 :Normal Operation0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG0 - PCI-Express Configuration Select

CFG3 - PCI-Express Static Lane Reversal

*1:Single PEG0:Bifurcation enabled

eDP Signals Mapping

PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_N2

PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_N2PEG_HTX_C_GRX_P3

PEG_GTX_C_HRX_P3

PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P1

PEG_GTX_C_HRX_P2

eDP_TX2PEG_HTX_C_GRX_N14

PEG Singals

PEG_GTX_C_HRX_N13eDP_HPD#

eDP_TX3

PEG_HTX_C_GRX_P13

Lane Reversal

PEG_GTX_C_HRX_P12

PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P15

eDP_TX#1

PEG_HTX_C_GRX_P12

eDP SingaleDP_TX0eDP_TX#0 PEG_HTX_C_GRX_N15

eDP_TX#2

PEG_HTX_C_GRX_N12eDP_AUX

eDP_TX1 PEG_HTX_C_GRX_P14

eDP_TX#3PEG_GTX_C_HRX_P13

eDP_AUX#

(CFD Only)(CFD Only)

R90_0402_5%

@

R90_0402_5%

@ 12

R83.01K_0402_1%

@R83.01K_0402_1%

@1 2

R73.01K_0402_1%

@R73.01K_0402_1%

@1 2

R3 750_0402_1%R3 750_0402_1%1 2

R63.01K_0402_1% @R63.01K_0402_1% @1 2

R110_0402_5%

@

R110_0402_5%

@1 2

R

E

S

E

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E

D

JCPU1E

IC,AUB_CFD_rPGA,R1P0CONN@

R

E

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V

E

D

JCPU1E


CFG[0]AM30CFG[1]AM28CFG[2]AP31CFG[3]AL32CFG[4]AL30CFG[5]AM31CFG[6]AN29CFG[7]AM32CFG[8]AK32CFG[9]AK31CFG[10]AK28CFG[11]AJ28CFG[12]AN30CFG[13]AN32CFG[14]AJ32CFG[15]AJ29CFG[16]AJ30CFG[17]AK30

RSVD34 AH25RSVD35 AK26

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2

RSVD_NCTF_43 AR1

RSVD_TP_86H16

RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33

RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35

RSVD58 AR32

RSVD_NCTF_30C35RSVD_NCTF_31B35

RSVD_NCTF_28A34RSVD_NCTF_29A33

RSVD27J28RSVD26J29

RSVD16A19RSVD15B19

RSVD17A20RSVD18B20

RSVD20T9RSVD19U9

RSVD22AB9RSVD21AC9

RSVD_NCTF_23C1RSVD_NCTF_24A3

RSVD_TP_66 AA5RSVD_TP_67 AA4RSVD_TP_68 R8

RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9

RSVD_TP_69 AD3

RSVD_TP_74 AG7

RSVD_TP_70 AD2

RSVD_TP_75 AE3

RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2

RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3

RSVD_TP_79 AD5

RSVD_TP_84 AE5

RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26RSVD_NCTF_37 AR2

RSVD1AP25RSVD2AL25RSVD3AL24RSVD4AL22RSVD5AJ33RSVD6AG9RSVD7M27RSVD8L28SA_DIMM_VREFJ17SB_DIMM_VREFH17RSVD11G25RSVD12G17RSVD13E31RSVD14E30

RSVD32 AJ13RSVD33 AJ12

RSVD_TP_59 E15RSVD_TP_60 F15

KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15

VSS AP34

R100_0402_5%

@R100_0402_5%

@ 12

R1 49.9_0402_1%R1 49.9_0402_1%1 2

R53.01K_0402_1% @R53.01K_0402_1% @1 2

R120_0402_5%

@

R120_0402_5%

@1 2

P

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-

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H

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DMIIntel(R) FDI

JCPU1A


P

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P

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S

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-

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R

A

P

H

I

C

S

DMIIntel(R) FDI

JCPU1A


DMI_RX#[0]A24DMI_RX#[1]C23DMI_RX#[2]B22DMI_RX#[3]A21

DMI_RX[0]B24DMI_RX[1]D23DMI_RX[2]B23DMI_RX[3]A22

DMI_TX#[0]D24DMI_TX#[1]G24DMI_TX#[2]F23DMI_TX#[3]H23

DMI_TX[0]D25DMI_TX[1]F24

DMI_TX[3]G23DMI_TX[2]E23

FDI_TX#[0]E22FDI_TX#[1]D21FDI_TX#[2]D19FDI_TX#[3]D18FDI_TX#[4]G21FDI_TX#[5]E19FDI_TX#[6]F21FDI_TX#[7]G18

FDI_TX[0]D22FDI_TX[1]C21FDI_TX[2]D20FDI_TX[3]C18FDI_TX[4]G22FDI_TX[5]E20FDI_TX[6]F20FDI_TX[7]G19

FDI_FSYNC[0]F17FDI_FSYNC[1]E17

FDI_INTC17

FDI_LSYNC[0]F18FDI_LSYNC[1]D17

PEG_ICOMPI B26PEG_ICOMPO A26

PEG_RBIAS A25PEG_RCOMPO B27

PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33

PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31

PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33

PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30

PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30

PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26

PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30

PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25

55

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3

3

2

2

1

1

D D

C C

B B

A A

SM_RCOMP_2

H_VTTPWRGD

H_COMP3

H_COMP1

H_COMP0

H_COMP2

SKTOCC#_R

XDP_DBRESET#

PLT_RST#_R

H_CATERR#

H_PECI_R

PM_EXTTS#1_R

H_PROCHOT#

H_THERMTRIP#_R

H_CPURST#

H_PM_SYNC_R

XDP_TRST#

PM_DRAM_PWRGD_R

XDP_TDO_MXDP_TDI_M

XDP_DBR#_R

H_CPUPWRGD_1

H_CPUPWRGD_0

H_VTTPWRGD

PM_DRAM_PWRGD_R

H_VTTPWRGD_R

H_VTTPWRGD

H_CATERR#H_PROCHOT#H_CPURST#

H_VTTPWRGD_R

PM_EXTTS#0

SM_RCOMP_0SM_RCOMP_1

XDP_TDO

XDP_DBRESET#

XDP_TDO_M

XDP_TDI_M

XDP_TDO

XDP_TRST#

SM_RCOMP_1SM_RCOMP_2

SM_RCOMP_0

H_TCKH_TMS

H_TDI

PLT_RST#

H_PECI

H_THERMTRIP#

PM_EXTTS#0_1

H_PM_SYNC

H_CPUPWRGD

SM_DRAMRST#

PM_DRAM_PWRGD

XDP_DBRESET#

H_PROCHOT#

CLK_CPU_DMI# CLK_CPU_DMI

CLK_CPU_BCLK# CLK_CPU_BCLK

H_VTTPWRGD

CLK_CPU_DP CLK_CPU_DP#

+1.05VS_VTT

+3VALW

+1.5V_1

+3VALW

+1.05VS_VTT

+3VS

+1.05VS_VTT

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2009/2/4#414044 DGUpdate Rev1.11

2009/08/14 #425302CP_S3PowerReductionWhitePaper_Rev0.9

#425302CP_S3PowerReductionWhitePaper_Rev0.7

2009/04/23Intel CRB 1.55 UpdateChange R68 to 1.1K_1%, R71 to 3.01K_1%

Need to check Voltage Level

2009/8/14change back to 2K

del net for XDP remove

del R27 / R29 / R30 / R31 / R33 for XDP remove


del R41 / R43 / R48 / R49 XDP remove


U1 / U2 change to SA00000OH00

20100610 Add

R59 68_0402_5%R59 68_0402_5%12

R69

1.5K_0402_1%

R69

1.5K_0402_1%

1

2

R500_0402_5%R500_0402_5%

1 2

R18 20_0402_1%R18 20_0402_1%12

R57750_0402_1%R57750_0402_1%

1

2

R71

3.01K_0402_1%@R71

3.01K_0402_1%@

1

2

R561.5K_0402_1%R561.5K_0402_1%

1 2

R62

1K_0402_1%

R62

1K_0402_1%

1

2

R28 100K_0402_5%R28 100K_0402_5%1 2

R70 51_0402_5%R70 51_0402_5%1 2

R260_0402_5%R260_0402_5%

1 2

R38 100_0402_1%R38 100_0402_1%1 2R39 24.9_0402_1%R39 24.9_0402_1%1 2

U1

MC74VHC1G08DFT2G_SC70-5

U1


B2

A1Y 4

P

5

G

3

R19 20_0402_1%R19 20_0402_1%12

R32 10K_0402_5%R32 10K_0402_5%1 2

T26PAD@ T26PAD@

R470_0402_5%R470_0402_5%

1 2

R420_0402_5%R420_0402_5%

1 2

R60 68_0402_5%@R60 68_0402_5%@ 12

R612K_0402_1%R612K_0402_1%1 2

U2


U2


B 2

A 1Y4

P

5

G

3

R360_0402_5%R360_0402_5%

1 2

R72

750_0402_1%

R72

750_0402_1%

1

2

R35 0_0402_5%R35 0_0402_5%1 2

R20 49.9_0402_1%R20 49.9_0402_1%12

T27PAD@ T27PAD@

T24 PAD @T24 PAD @

R37 51_0402_5%R37 51_0402_5%1 2

R68

1.1K_0402_1%@R68

1.1K_0402_1%@

1

2

C

L

O

C

K

S

MISCTHERMAL

PWR MANAGEMENT

D

D

R

3

M

I

S

C

J

T

A

G

&

B

P

M

JCPU1B


C

L

O

C

K

S

MISCTHERMAL

PWR MANAGEMENT

D

D

R

3

M

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C

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B

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JCPU1B


SM_RCOMP[1] AM1SM_RCOMP[2] AN1

SM_DRAMRST# F6

SM_RCOMP[0] AL1

BCLK# B16BCLK A16

BCLK_ITP# AT30BCLK_ITP AR30

PEG_CLK# D16PEG_CLK E16

DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18

CATERR#AK14

COMP3AT23

PECIAT15

PROCHOT#AN26

THERMTRIP#AK15

RESET_OBS#AP26

VCCPWRGOOD_1AN14

VCCPWRGOOD_0AN27

SM_DRAMPWROKAK13

VTTPWRGOODAM15

RSTIN#AL14

PM_EXT_TS#[0] AN15PM_EXT_TS#[1] AP15

PRDY# AT28PREQ# AP27

TCK AN28TMS AP28

TRST# AT27

TDI AT29TDO AR27

TDI_M AR29TDO_M AP29

DBR# AN25

BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23

COMP2AT24

PM_SYNCAL15

TAPPWRGOODAM26

COMP1G16

COMP0AT26

SKTOCC#AH24

R34 10K_0402_5%R34 10K_0402_5%1 2

R45

0_0402_5%

R45

0_0402_5%

1

2R440_0402_5%R440_0402_5%

1 2

R46 0_0402_5%R46 0_0402_5%1 2

R40 130_0402_1%R40 130_0402_1%1 2

R21 49.9_0402_1%R21 49.9_0402_1%12

R52 0_0402_5%@

R52 0_0402_5%@1 2

T25PAD@ T25PAD@

R67 1K_0402_5%R67 1K_0402_5%1 2

R58 49.9_0402_1%R58 49.9_0402_1%12

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D63DDR_A_D62

DDR_A_D8

DDR_A_D5DDR_A_D4DDR_A_D3

DDR_A_D7DDR_A_D6

DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56

DDR_A_D47DDR_A_D46


DDR_A_D45DDR_A_D44

DDR_A_D39DDR_A_D38


DDR_A_D37DDR_A_D36

DDR_A_D61DDR_A_D60


DDR_A_D55DDR_A_D54


DDR_A_D53DDR_A_D52

DDR_A_D31DDR_A_D30


DDR_A_D15DDR_A_D14


DDR_A_D13DDR_A_D12

DDR_A_D29DDR_A_D28

DDR_A_D23DDR_A_D22


DDR_A_D21DDR_A_D20

DDR_A_BS2DDR_A_BS1DDR_A_BS0

DDR_A_WE#DDR_A_RAS#DDR_A_CAS#

DDR_A_MA14

DDR_A_MA0DDR_A_MA1

DDR_A_MA4

DDR_A_MA2DDR_A_MA3

DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9

DDR_A_MA12DDR_A_MA13

DDR_A_MA11DDR_A_MA10

DDR_A_MA15

DDR_A_DQS#0DDR_A_DQS#1




DDR_A_DQS0

DDR_A_DQS2DDR_A_DQS3

DDR_A_DQS1

DDR_A_DQS4DDR_A_DQS5DDR_A_DQS6DDR_A_DQS7

DDR_A_DM7

DDR_A_DM5

DDR_A_DM2DDR_A_DM1

DDR_A_DM6

DDR_A_DM4

DDR_A_DM0

DDR_A_DM3

DDR_B_D32DDR_B_D33

DDR_B_D36DDR_B_D37DDR_B_D38DDR_B_D39

DDR_B_D48DDR_B_D49


DDR_B_D50DDR_B_D51

DDR_B_D56DDR_B_D57


DDR_B_D58DDR_B_D59

DDR_B_D34DDR_B_D35

DDR_B_D40DDR_B_D41


DDR_B_D42DDR_B_D43

DDR_B_D0DDR_B_D1


DDR_B_D16DDR_B_D17


DDR_B_D18DDR_B_D19

DDR_B_D24DDR_B_D25


DDR_B_D26DDR_B_D27

DDR_B_D2DDR_B_D3

DDR_B_D8DDR_B_D9


DDR_B_D10DDR_B_D11

DDR_B_MA2DDR_B_MA3

DDR_B_MA10DDR_B_MA11

DDR_B_MA8DDR_B_MA9

DDR_B_MA0

DDR_B_MA6DDR_B_MA7

DDR_B_MA1

DDR_B_MA4DDR_B_MA5

DDR_B_MA14

DDR_B_MA12DDR_B_MA13

DDR_B_MA15

DDR_B_DQS#5

DDR_B_DQS#7

DDR_B_DQS#3DDR_B_DQS#4

DDR_B_DQS#1DDR_B_DQS#0

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3

DDR_B_DQS6

DDR_B_DQS2DDR_B_DQS1

DDR_B_DM3

DDR_B_DM0DDR_B_DM1

DDR_B_DM5DDR_B_DM6DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_BS2DDR_B_BS1DDR_B_BS0

DDR_B_CAS#

DDR_B_WE#DDR_B_RAS#

DDR_A_BS0DDR_A_BS1DDR_A_BS2

DDR_A_CAS#DDR_A_RAS#

DDR_A_WE#

DDR_B_BS0DDR_B_BS1DDR_B_BS2

DDR_B_CAS#DDR_B_RAS#DDR_B_WE#

DDR_A_CLK0

DDR_A_CLK1

DDR_B_CLK0

DDR_B_CLK1

DDR_A_CLK0#

DDR_A_CLK1#

DDR_B_CLK0#

DDR_B_CLK1#

DDR_A_CKE0

DDR_A_CKE1

DDR_B_CKE0

DDR_B_CKE1

DDR_A_CS0# DDR_A_CS1#

DDR_B_CS0# DDR_B_CS1#

DDR_A_ODT0 DDR_A_ODT1

DDR_B_ODT0 DDR_B_ODT1

DDR_B_MA[0..15]DDR_B_DQS[0..7]

DDR_B_DQS#[0..7]DDR_B_DM[0..7]DDR_B_D[0..63]

DDR_A_D[0..63]DDR_A_DM[0..7]

DDR_A_DQS#[0..7]DDR_A_DQS[0..7]DDR_A_MA[0..15]

Title


Date: Sheet of





B



Title


Date: Sheet of





B



Title


Date: Sheet of





B



D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

-

B

JCPU1D


D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

-

B

JCPU1D


SB_BS[0]AB1SB_BS[1]W5SB_BS[2]R7

SB_CAS#AC5SB_RAS#Y7SB_WE#AC6

SB_CK[0] W8

SB_CK[1] V7

SB_CK#[0] W9

SB_CK#[1] V6

SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8SB_CS#[1] AD6

SB_ODT[0] AC7SB_ODT[1] AD1

SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8

SB_DQS[4] AG2

SB_DQS#[4] AH2

SB_DQS[5] AL5

SB_DQS#[5] AL4

SB_DQS[6] AP5

SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5

SB_DQS#[0] D5

SB_DQS[1] E3

SB_DQS#[1] F4

SB_DQS[2] H4

SB_DQS#[2] J4

SB_DQS[3] M5

SB_DQS#[3] L4

SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5

SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1

SB_DQ[0]B5SB_DQ[1]A5SB_DQ[2]C3SB_DQ[3]B3SB_DQ[4]E4SB_DQ[5]A6SB_DQ[6]A4SB_DQ[7]C4SB_DQ[8]D1SB_DQ[9]D2SB_DQ[10]F2SB_DQ[11]F1SB_DQ[12]C2SB_DQ[13]F5SB_DQ[14]F3SB_DQ[15]G4SB_DQ[16]H6SB_DQ[17]G2SB_DQ[18]J6SB_DQ[19]J3SB_DQ[20]G1SB_DQ[21]G5SB_DQ[22]J2SB_DQ[23]J1SB_DQ[24]J5SB_DQ[25]K2SB_DQ[26]L3SB_DQ[27]M1SB_DQ[28]K5SB_DQ[29]K4SB_DQ[30]M4SB_DQ[31]N5SB_DQ[32]AF3SB_DQ[33]AG1SB_DQ[34]AJ3SB_DQ[35]AK1SB_DQ[36]AG4SB_DQ[37]AG3SB_DQ[38]AJ4SB_DQ[39]AH4SB_DQ[40]AK3SB_DQ[41]AK4SB_DQ[42]AM6SB_DQ[43]AN2SB_DQ[44]AK5SB_DQ[45]AK2SB_DQ[46]AM4SB_DQ[47]AM3SB_DQ[48]AP3SB_DQ[49]AN5SB_DQ[50]AT4SB_DQ[51]AN6SB_DQ[52]AN4SB_DQ[53]AN3SB_DQ[54]AT5SB_DQ[55]AT6SB_DQ[56]AN7SB_DQ[57]AP6SB_DQ[58]AP8SB_DQ[59]AT9SB_DQ[60]AT7SB_DQ[61]AP9SB_DQ[62]AR10SB_DQ[63]AT10

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

JCPU1C


D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

JCPU1C


SA_BS[0]AC3SA_BS[1]AB2SA_BS[2]U7

SA_CAS#AE1SA_RAS#AB3SA_WE#AE9

SA_CK[0] AA6

SA_CK[1] Y6

SA_CK#[0] AA7

SA_CK#[1] Y5

SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2SA_CS#[1] AE8

SA_ODT[0] AD8SA_ODT[1] AF9

SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13

SA_DQS[0] C8

SA_DQS#[0] C9

SA_DQS[1] F9

SA_DQS#[1] F8

SA_DQS[2] H9

SA_DQS#[2] J9

SA_DQS[3] M9

SA_DQS#[3] N9

SA_DQS[4] AH8

SA_DQS#[4] AH7

SA_DQS[5] AK10

SA_DQS#[5] AK9

SA_DQS[6] AN11

SA_DQS#[6] AP11

SA_DQS[7] AR13

SA_DQS#[7] AT13

SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6

SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9

SA_DQ[0]A10SA_DQ[1]C10SA_DQ[2]C7SA_DQ[3]A7SA_DQ[4]B10SA_DQ[5]D10SA_DQ[6]E10SA_DQ[7]A8SA_DQ[8]D8SA_DQ[9]F10SA_DQ[10]E6SA_DQ[11]F7SA_DQ[12]E9SA_DQ[13]B7SA_DQ[14]E7SA_DQ[15]C6SA_DQ[16]H10SA_DQ[17]G8SA_DQ[18]K7SA_DQ[19]J8SA_DQ[20]G7SA_DQ[21]G10SA_DQ[22]J7SA_DQ[23]J10SA_DQ[24]L7SA_DQ[25]M6SA_DQ[26]M8SA_DQ[27]L9SA_DQ[28]L6SA_DQ[29]K8SA_DQ[30]N8SA_DQ[31]P9SA_DQ[32]AH5SA_DQ[33]AF5SA_DQ[34]AK6SA_DQ[35]AK7SA_DQ[36]AF6SA_DQ[37]AG5SA_DQ[38]AJ7SA_DQ[39]AJ6SA_DQ[40]AJ10SA_DQ[41]AJ9SA_DQ[42]AL10SA_DQ[43]AK12SA_DQ[44]AK8SA_DQ[45]AL7SA_DQ[46]AK11SA_DQ[47]AL8SA_DQ[48]AN8SA_DQ[49]AM10SA_DQ[50]AR11SA_DQ[51]AL11SA_DQ[52]AM9SA_DQ[53]AN9SA_DQ[54]AT11SA_DQ[55]AP12SA_DQ[56]AM12SA_DQ[57]AN12SA_DQ[58]AM13SA_DQ[59]AT14SA_DQ[60]AT12SA_DQ[61]AL13SA_DQ[62]AR14SA_DQ[63]AP14

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_VTTVID1

VCCSENSEVSSSENSE

VSS_SENSE_VTT

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID6

H_DPRSLPVR

CPU_VID4

CPU_VID5

H_PSI#

H_PSI#

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6 H_DPRSLPVR

VCCSENSE VSSSENSE

VTT_SENSE

IMVP_IMON

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+1.05VS_VTT

+1.05VS_VTT

+CPU_CORE

+1.05VS_VTT

+1.05VS_VTT

Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



(Place these capacitors between inductor and socket on Bottom)

(Place these capacitors on CPU cavity, Bottom Layer)

TOP side (under inductor)

4 x 470uF(4.5mohm@100kHz; 4.0mohm@SRF)

(Place these capacitors on CPU cavity, Bottom Layer)

16X10uF 3m ohm/16

4X470uF 4m ohm/43m ohm/12

C,uF

MLCC 0805 X5R

+CPU-COREDecoupling

16X22uF

ESR, mohm

SPCAP,Polymer

Stuffing Option

2X470uF

H_VTTVID1 = low, 1.1V

H_VTTVID1 = high, 1.05V

48A Continuous 18A

(Place these capacitors under CPU socket, top layer)CSC (Current Sense Configuration)8/25

VTT Rail

Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

Peak 21AWW15 MOW

20090915 Modify

Change to OS-CON20100414

Del C106

C97

22U_0805_6.3V6M

C97

22U_0805_6.3V6M

1

2

+C272

330U_D2E_2.5VM_R6M

+C272

330U_D2E_2.5VM_R6M

1

2

+C82

330U_2.5V_M_R15

+C82

330U_2.5V_M_R15

1

2

C69

10U_0805_6.3V6M

C69

10U_0805_6.3V6M

1

2 C81

10U_0805_6.3V6M

C81

10U_0805_6.3V6M

1

2

R87 1K_0402_1%R87 1K_0402_1%1 2

R74 1K_0402_1%@R74 1K_0402_1%@1 2

R95 0_0402_5%R95 0_0402_5%1 2

C78

10U_0805_6.3V6M

C78

10U_0805_6.3V6M

1

2

R89 1K_0402_1%@R89 1K_0402_1%@1 2

C94

22U_0805_6.3V6M

C94

22U_0805_6.3V6M

1

2

C102

22U_0805_6.3V6M

C102

22U_0805_6.3V6M

1

2

C74

10U_0805_6.3V6M

C74

10U_0805_6.3V6M

1

2

C77

10U_0805_6.3V6M

C77

10U_0805_6.3V6M

1

2

R91 100_0402_1%R91 100_0402_1%1 2

R78 1K_0402_1%@R78 1K_0402_1%@1 2

C103

22U_0805_6.3V6M

C103

22U_0805_6.3V6M

1

2

C91

22U_0805_6.3V6M

C91

22U_0805_6.3V6M

1

2

C85

10U_0805_6.3V6M

C85

10U_0805_6.3V6M

1

2

R86 1K_0402_1%R86 1K_0402_1%1 2

C86

10U_0805_6.3V6M

C86

10U_0805_6.3V6M

1

2

C71

10U_0805_6.3V6M

C71

10U_0805_6.3V6M

1

2

R88 1K_0402_1%@R88 1K_0402_1%@1 2

+C105

330U_D2E_2.5VM_R6M

+C105

330U_D2E_2.5VM_R6M

1

2

C96

22U_0805_6.3V6M

C96

22U_0805_6.3V6M

1

2

C104

22U_0805_6.3V6M

C104

22U_0805_6.3V6M

1

2

P

O

W

E

R

CPU CORE SUPPLY

1

.

1

V

R

A

I

L

P

O

W

E

R

S

E

N

S

E

L

I

N

E

S

C

P

U

V

I

D

S

JCPU1F


P

O

W

E

R

CPU CORE SUPPLY

1

.

1

V

R

A

I

L

P

O

W

E

R

S

E

N

S

E

L

I

N

E

S

C

P

U

V

I

D

S

JCPU1F


ISENSE AN35

VTT_SENSE B15

PSI# AN33

VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35

PROC_DPRSLPVR AM34

VTT_SELECT G15

VCC_SENSE AJ34

VSS_SENSE_VTT A15

VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26

VTT0_33 AF10VTT0_34 AE10VTT0_35 AC10VTT0_36 AB10VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12VTT0_42 J11

VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14

VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16VTT0_44 J15

+C273

330U_D2E_2.5VM_R6M

+C273

330U_D2E_2.5VM_R6M

1

2

C67

10U_0805_6.3V6M

C67

10U_0805_6.3V6M

1

2 C73

10U_0805_6.3V6M

C73

10U_0805_6.3V6M

1

2

T14PAD@ T14PAD@

C95

22U_0805_6.3V6M

C95

22U_0805_6.3V6M

1

2

R77 1K_0402_1%R77 1K_0402_1%1 2

R85 1K_0402_1%@R85 1K_0402_1%@1 2

C100

22U_0805_6.3V6M

C100

22U_0805_6.3V6M

1

2

C88

10U_0805_6.3V6M

C88

10U_0805_6.3V6M

1

2

R79 1K_0402_1%@R79 1K_0402_1%@1 2

R76 1K_0402_1%@R76 1K_0402_1%@1 2

C101

22U_0805_6.3V6M

C101

22U_0805_6.3V6M

1

2

R83 1K_0402_1%R83 1K_0402_1%1 2

C80

10U_0805_6.3V6M

C80

10U_0805_6.3V6M

1

2

R75 1K_0402_1%R75 1K_0402_1%1 2

C76

10U_0805_6.3V6M

C76

10U_0805_6.3V6M

1

2

C66

10U_0805_6.3V6M

C66

10U_0805_6.3V6M

1

2

R84 1K_0402_1%@R84 1K_0402_1%@1 2

C87

10U_0805_6.3V6M

C87

10U_0805_6.3V6M

1

2

+C275

330U_D2E_2.5VM_R6M

+C275

330U_D2E_2.5VM_R6M

1

2

C84

10U_0805_6.3V6M

C84

10U_0805_6.3V6M

1

2

R94 100_0402_1%R94 100_0402_1%1 2

C72

10U_0805_6.3V6M

C72

10U_0805_6.3V6M

1

2

R90 1K_0402_1%R90 1K_0402_1%1 2

C70

10U_0805_6.3V6M

C70

10U_0805_6.3V6M

1

2

R80 1K_0402_1%R80 1K_0402_1%1 2

R81 1K_0402_1%@R81 1K_0402_1%@1 2

C79

10U_0805_6.3V6M

C79

10U_0805_6.3V6M

1

2

C92

22U_0805_6.3V6M

C92

22U_0805_6.3V6M

1

2

+ C83330U_2.5V_M_R15

+ C83330U_2.5V_M_R15

1

2

R82 1K_0402_1%R82 1K_0402_1%1 2

C75

10U_0805_6.3V6M

C75

10U_0805_6.3V6M

1

2

C89

10U_0805_6.3V6M

C89

10U_0805_6.3V6M

1

2

C99

22U_0805_6.3V6M

C99

22U_0805_6.3V6M

1

2

C98

22U_0805_6.3V6M

C98

22U_0805_6.3V6M

1

2

R73 1K_0402_1%R73 1K_0402_1%1 2

C68

10U_0805_6.3V6M

C68

10U_0805_6.3V6M

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GFXVR_ENGFXVR_DPRSLPVR_R

+1.8VS_VCCSFR

GFXVR_EN

VCC_AXG_SENSE VSS_AXG_SENSE

GFXVR_VID_0 GFXVR_VID_1 GFXVR_VID_2 GFXVR_VID_3 GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6

GFXVR_EN GFXVR_DPRSLPVR GFXVR_IMON

+VGFX_CORE

+1.05VS_VTT

+1.8VS

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

+1.5V+1.5V_1

+1.5VS

+1.5V+1.5V_1

Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



15A

3A

0.6A

Reserved for +1.5VS to +1.5V_1

Reserved for +1.5V to +1.5V_1

PD 470ohm 20091105

11/03 add four 0.1u 0402 Intel suggest

C131

4.7U_0805_10V4Z

C131

4.7U_0805_10V4Z

1

2

C122

22U_0805_6.3V6M

C122

22U_0805_6.3V6M

1

2

+C107

330U_D2E_2.5VM_R6M

+C107

330U_D2E_2.5VM_R6M

1

2

C117

1U_0402_6.3V6K

C117

1U_0402_6.3V6K

1

2

C130

2.2U_0603_6.3V6K

C130

2.2U_0603_6.3V6K

1

2

C113

10U_0805_6.3V6M

C113

10U_0805_6.3V6M

1

2

C119

22U_0805_6.3V6M

C119

22U_0805_6.3V6M

1

2

+ C121330U_D2E_2.5VM_R6M

+ C121330U_D2E_2.5VM_R6M

1

2

C124

10U_0805_6.3V6M

C124

10U_0805_6.3V6M

1

2

C125

22U_0805_6.3V6M

C125

22U_0805_6.3V6M

1

2

C672 0.1U_0402_16V4ZC672 0.1U_0402_16V4Z1 2

J1

JUMP_43X118@

J1

JUMP_43X118@1 122

J3

JUMP_43X118@

J3

JUMP_43X118@1 122

C118

1U_0402_6.3V6K

C118

1U_0402_6.3V6K

1

2

R97 0_0402_5%R97 0_0402_5%1 2

C128

1U_0402_6.3V6K

C128

1U_0402_6.3V6K

1

2

C111

22U_0805_6.3V6M

C111

22U_0805_6.3V6M

1

2

C129

1U_0402_6.3V6K

C129

1U_0402_6.3V6K

1

2

C123

22U_0805_6.3V6M

C123

22U_0805_6.3V6M

1

2

C114

1U_0402_6.3V6K

C114

1U_0402_6.3V6K

1

2

C120

22U_0805_6.3V6M

C120

22U_0805_6.3V6M

1

2

C673 0.1U_0402_16V4ZC673 0.1U_0402_16V4Z1 2

C116

1U_0402_6.3V6K

C116

1U_0402_6.3V6K

1

2

C110

22U_0805_6.3V6M

C110

22U_0805_6.3V6M

1

2

C671 0.1U_0402_16V4ZC671 0.1U_0402_16V4Z1 2

R167 470_0402_5%R167 470_0402_5%1 2

C132

22U_0805_6.3V6M

C132

22U_0805_6.3V6M

1

2

C670 0.1U_0402_16V4ZC670 0.1U_0402_16V4Z1 2

C126

22U_0805_6.3V6M

C126

22U_0805_6.3V6M

1

2

C115

1U_0402_6.3V6K

C115

1U_0402_6.3V6K

1

2

C112

10U_0805_6.3V6M

C112

10U_0805_6.3V6M

1

2

P

O

W

E

R

G

R

A

P

H

I

C

S

V

I

D

s

GRAPHICS

D

D

R

3

-

1

.

5

V

R

A

I

L

S

FDIPEG & DMI

S

E

N

S

E

L

I

N

E

S

1

.

1

V

1

.

8

V

JCPU1G


P

O

W

E

R

G

R

A

P

H

I

C

S

V

I

D

s

GRAPHICS

D

D

R

3

-

1

.

5

V

R

A

I

L

S

FDIPEG & DMI

S

E

N

S

E

L

I

N

E

S

1

.

1

V

1

.

8

V

JCPU1G


GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24

GFX_VR_EN AR25GFX_DPRSLPVR AT25

GFX_IMON AM24

VAXG_SENSE AR22VSSAXG_SENSE AT22

VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16

VTT1_45J24VTT1_46J23VTT1_47H25

VTT1_48K26VTT1_49J27VTT1_50J26VTT1_51J25VTT1_52H27VTT1_53G28VTT1_54G27VTT1_55G26VTT1_56F26VTT1_57E26VTT1_58E25

VDDQ1 AJ1VDDQ2 AF1VDDQ3 AE7VDDQ4 AE4VDDQ5 AC1VDDQ6 AB7VDDQ7 AB4VDDQ8 Y1VDDQ9 W7

VDDQ10 W4VDDQ11 U1VDDQ12 T7VDDQ13 T4VDDQ14 P1VDDQ15 N7VDDQ16 N4VDDQ17 L1VDDQ18 H1

VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10

VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26

VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19

R990_0805_5%R990_0805_5%

1 2

C127

22U_0805_6.3V6M

C127

22U_0805_6.3V6M

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_NCTF1H_NCTF2

H_NCTF6H_NCTF7

Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



VSS

N

C

T

F

JCPU1I


VSS

N

C

T

F

JCPU1I


VSS161K27VSS162K9VSS163K6VSS164K3VSS165J32VSS166J30VSS167J21VSS168J19VSS169H35VSS170H32VSS171H28VSS172H26VSS173H24VSS174H22VSS175H18VSS176H15VSS177H13VSS178H11VSS179H8VSS180H5VSS181H2VSS182G34VSS183G31VSS184G20VSS185G9VSS186G6VSS187G3VSS188F30VSS189F27VSS190F25VSS191F22VSS192F19VSS193F16VSS194E35VSS195E32VSS196E29VSS197E24VSS198E21VSS199E18VSS200E13VSS201E11VSS202E8VSS203E5VSS204E2VSS205D33VSS206D30VSS207D26VSS208D9VSS209D6VSS210D3VSS211C34VSS212C32VSS213C29VSS214C28VSS215C24VSS216C22VSS217C20VSS218C19VSS219C16VSS220B31VSS221B25VSS222B21VSS223B18VSS224B17VSS225B13VSS226B11VSS227B8VSS228B6VSS229B4VSS230A29

VSS_NCTF1 AT35VSS_NCTF2 AT1VSS_NCTF3 AR34VSS_NCTF4 B34VSS_NCTF5 B2VSS_NCTF6 B1VSS_NCTF7 A35

VSS231A27VSS232A23VSS233A9

T5PAD@ T5PAD@

VSS

JCPU1H


VSS

JCPU1H


VSS1AT20VSS2AT17VSS3AR31VSS4AR28VSS5AR26VSS6AR24VSS7AR23VSS8AR20VSS9AR17VSS10AR15VSS11AR12VSS12AR9VSS13AR6VSS14AR3VSS15AP20VSS16AP17VSS17AP13VSS18AP10VSS19AP7VSS20AP4VSS21AP2VSS22AN34VSS23AN31VSS24AN23VSS25AN20VSS26AN17VSS27AM29VSS28AM27VSS29AM25VSS30AM20VSS31AM17VSS32AM14VSS33AM11VSS34AM8VSS35AM5VSS36AM2VSS37AL34VSS38AL31VSS39AL23VSS40AL20VSS41AL17VSS42AL12VSS43AL9VSS44AL6VSS45AL3VSS46AK29VSS47AK27VSS48AK25VSS49AK20VSS50AK17VSS51AJ31VSS52AJ23VSS53AJ20VSS54AJ17VSS55AJ14VSS56AJ11VSS57AJ8VSS58AJ5VSS59AJ2VSS60AH35VSS61AH34VSS62AH33VSS63AH32VSS64AH31VSS65AH30VSS66AH29VSS67AH28VSS68AH27VSS69AH26VSS70AH20VSS71AH17VSS72AH13VSS73AH9VSS74AH6VSS75AH3VSS76AG10VSS77AF8VSS78AF4VSS79AF2VSS80AE35

VSS81 AE34VSS82 AE33VSS83 AE32VSS84 AE31VSS85 AE30VSS86 AE29VSS87 AE28VSS88 AE27VSS89 AE26VSS90 AE6VSS91 AD10VSS92 AC8VSS93 AC4VSS94 AC2VSS95 AB35VSS96 AB34VSS97 AB33VSS98 AB32VSS99 AB31

VSS100 AB30VSS101 AB29VSS102 AB28VSS103 AB27VSS104 AB26VSS105 AB6VSS106 AA10VSS107 Y8VSS108 Y4VSS109 Y2VSS110 W35VSS111 W34VSS112 W33VSS113 W32VSS114 W31VSS115 W30VSS116 W29VSS117 W28VSS118 W27VSS119 W26VSS120 W6VSS121 V10VSS122 U8VSS123 U4VSS124 U2VSS125 T35VSS126 T34VSS127 T33VSS128 T32VSS129 T31VSS130 T30VSS131 T29VSS132 T28VSS133 T27VSS134 T26VSS135 T6VSS136 R10VSS137 P8VSS138 P4VSS139 P2VSS140 N35VSS141 N34VSS142 N33VSS143 N32VSS144 N31VSS145 N30VSS146 N29VSS147 N28VSS148 N27VSS149 N26VSS150 N6VSS151 M10VSS152 L35VSS153 L32VSS154 L29VSS155 L8VSS156 L5VSS157 L2VSS158 K34VSS159 K33VSS160 K30

T3PAD@ T3PAD@T2PAD@ T2PAD@

T4PAD@ T4PAD@

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_CKE0

DDR_A_D59

DDR_A_MA3

D_CK_SCLK

DDR_A_CS1#

DDR_A_D39

DDR_A_BS1

DDR_A_WE#

DDR_A_MA7

DDR_A_MA0

DDR_A_DQS7

DDR_A_D57

DDR_A_D46

DDR_A_DQS#5

DDR_A_D51

DDR_A_DM4

DDR_A_D44DDR_A_D44

DDR_A_RAS#

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_MA8

DDR_A_CS0#

DDR_A_MA6

DDR_A_MA10

DDR_A_DQS#7

DDR_A_DQS#6

DDR_A_D40

DDR_A_MA9

DDR_A_DQS#4

DDR_A_D52

DDR_A_DQS5

DDR_A_D54

DDR_A_D49

DDR_A_BS2

DDR_A_D45

DDR_A_DM7

DDR_A_MA1

DDR_A_D60

DDR_A_BS0

DDR_A_CAS# DDR_A_ODT0

DDR_A_D37

DDR_A_MA5

DDR_A_MA14

DDR_A_D55

DDR_A_MA4

DDR_A_D62

DDR_A_D56

DDR_A_D53

DDR_A_D47

DDR_A_ODT1

DDR_A_D43

DDR_A_D34

DDR_A_CLK1DDR_A_CLK1#

DDR_A_D48

D_CK_SDATA

DDR_A_D38

DDR_A_CLK0DDR_A_CLK0#

DDR_A_D32

DDR_A_MA13

DDR_A_MA11

DDR_A_D50

DDR_A_D61

DDR_A_MA2

DDR_A_D41

DDR_A_D36

DDR_A_D63

DDR_A_DQS6

DDR_A_D35

DDR_A_MA12

DDR_A_DQS4

DDR_A_DM6

DDR_A_D42

DDR_A_CKE1

PM_EXTTS#0_1

DDR_A_MA15DIMM_DRAMRST#

RST_GATE

DDR_VREF_CA_DIMMA

DDR_A_D5

DDR_A_D22

DDR_A_D14

DDR_A_DQS#0

DDR_A_D31

DDR_A_D12

DDR_A_D6

DDR_A_DQS0

DDR_A_DM2

DDR_A_DM1

DDR_A_D28

DDR_A_D4

DDR_A_D30

DDR_A_DQS3

DIMM_DRAMRST#

DDR_A_D29

DDR_A_D7

DDR_A_D13

DDR_A_D20DDR_A_D21

DDR_A_D15

DDR_A_D23

DDR_A_DQS#3

+DIMM_VREFDQA

DDR_A_D26

DDR_A_D2

DDR_A_D25

DDR_A_D27

DDR_A_D0

DDR_A_DM0

DDR_A_D19

DDR_A_DQS2

DDR_A_D10

DDR_A_D3

DDR_A_D1

DDR_A_D16

DDR_A_DM3

DDR_A_D9

DDR_A_DQS#1

DDR_A_D24

DDR_A_D18

DDR_A_DQS#2

DDR_A_D11

DDR_A_D8

DDR_A_DQS1

DDR_A_D17

DDR_A_CKE0

DDR_A_CS1#

DDR_A_BS1

DDR_A_WE#

DDR_A_RAS#

DDR_A_CS0#

DDR_A_BS2

DDR_A_BS0

DDR_A_CAS# DDR_A_ODT0

DDR_A_ODT1

DDR_A_CLK1# DDR_A_CLK1 DDR_A_CLK0

DDR_A_CLK0#

DDR_A_CKE1

PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_A_D[0..63]

DDR_A_DM[0..7]

DDR_A_MA[0..15]

SM_DRAMRST#

RST_GATE

DIMM_DRAMRST#

+0.75VS

+1.5V +1.5V

+DIMM_VREFCA

+3VS

+1.5V

+0.75VS

+DIMM_VREFDQA

+1.5V

+DIMM_VREFCA

+1.5V

+1.5V

+DIMM_VREFDQA

Title


Date: Sheet of





Custom

10 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

10 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

10 48Friday, July 02, 2010


Change to Reverse TypeDDR3 SO-DIMM A

Layout Note: Place these 4 Caps near Commandand Control signals of DIMMA

Layout Note:Place near JDIMM1.203 & JDIMM1.204

Layout Note:Place near JDIMM1

DIMMA VREFDQ M1 Circuit

DIMMA & DIMMB VREFCA circuit

#425302CP_S3PowerReductionWhitePaper_Rev1.0

M1 Circuit

8mm HighC154

10U_0805_6.3V6M

C154

10U_0805_6.3V6M

1

2C153

1U_0402_6.3V6K

C153

1U_0402_6.3V6K

1

2

R104

1K_0402_1%

R104

1K_0402_1%

1

2 C134

0.1U_0402_16V4Z

C134

0.1U_0402_16V4Z

1

2

C143

0.1U_0402_16V4Z

C143

0.1U_0402_16V4Z

1

2

C137

10U_0805_6.3V6M

C137

10U_0805_6.3V6M

1

2

C136

0.1U_0402_16V4Z

C136

0.1U_0402_16V4Z

1

2

C140

10U_0805_6.3V6M

C140

10U_0805_6.3V6M

1

2

C150

1U_0402_6.3V6K

C150

1U_0402_6.3V6K

1

2

G

DS

Q2BSS138LT1G_SOT23-3G

DS

Q2BSS138LT1G_SOT23-3

2

13

R106

1K_0402_1%

R106

1K_0402_1%

1

2

C145

0.1U_0402_16V4Z

C145

0.1U_0402_16V4Z

1

2

R110

10K_0402_5%

R110

10K_0402_5%

1

2

C146

0.1U_0402_16V4Z

C146

0.1U_0402_16V4Z

1

2

C149

0.1U_0402_16V4Z

C149

0.1U_0402_16V4Z

1

2

R101

1K_0402_1%

R101

1K_0402_1%1

2

R109 10K_0402_5%R109 10K_0402_5%1 2

+ C147330U_2.5V_M_R15@+ C147330U_2.5V_M_R15@

1

2

C138

10U_0805_6.3V6M

C138

10U_0805_6.3V6M

1

2

C139

10U_0805_6.3V6M

C139

10U_0805_6.3V6M

1

2

C133

2.2U_0603_6.3V6K

C133

2.2U_0603_6.3V6K

1

2

C617

0.047U_0402_16V7K

C617

0.047U_0402_16V7K

1 2

C151

1U_0402_6.3V6K

C151

1U_0402_6.3V6K

1

2

R103

1K_0402_1%

R103

1K_0402_1%

1

2

R107

1K_0402_1%

R107

1K_0402_1%

1

2

C141

10U_0805_6.3V6M

C141

10U_0805_6.3V6M

1

2

C144

0.1U_0402_16V4Z

C144

0.1U_0402_16V4Z

1

2

R1020_0402_5%

@

R1020_0402_5%

@1 2

C1482.2U_0603_6.3V6K

C1482.2U_0603_6.3V6K

1

2

C142

10U_0805_6.3V6M

C142

10U_0805_6.3V6M

1

2

JDIMM1

FOX_AS0A626-U8RN-7F

JDIMM1

FOX_AS0A626-U8RN-7F

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

C152

1U_0402_6.3V6K

C152

1U_0402_6.3V6K

1

2

R108 0_0402_5%R108 0_0402_5%1 2

C135

2.2U_0603_6.3V6K

C135

2.2U_0603_6.3V6K

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D26

DDR_B_D2

DDR_B_D5

DDR_B_D22

DDR_B_D25

DDR_B_D14

DDR_B_DQS#0

DDR_B_D31

DDR_B_D12

DDR_B_D6

DDR_B_DQS0

DDR_B_DM2

DDR_B_DM1

+DIMM_VREFDQB

DDR_B_D0

DDR_B_D28

DDR_B_DM0

DDR_B_D19

DDR_B_D4

DDR_B_D30

DDR_B_DQS2

DDR_B_DQS3

DDR_B_D10

DDR_B_D27

DDR_B_D3

DIMM_DRAMRST#

DDR_B_D1

DDR_B_D16

DDR_B_D29

DDR_B_DM3

DDR_B_D9

DDR_B_D7

DDR_B_D13

DDR_B_D20

DDR_B_DQS#1

DDR_B_D21

DDR_B_D24

DDR_B_D15

DDR_B_D23DDR_B_D18

DDR_B_DQS#2

DDR_B_D11

DDR_B_DQS#3

DDR_B_D8

DDR_B_DQS1

DDR_B_D17

DDR_B_MA12

DDR_B_CKE0

DDR_B_MA3

DDR_B_CS1#

DDR_B_WE#

DDR_B_MA8

DDR_B_MA10

DDR_B_MA9

DDR_B_BS2

DDR_B_MA1

DDR_B_BS0

DDR_B_CAS#

DDR_B_MA5

DDR_B_CLK0DDR_B_CLK0#

DDR_B_MA13

DDR_B_DQS6

DDR_B_D35

DDR_B_DQS4

DDR_B_D42

DDR_B_D59

DDR_B_D57

DDR_B_D51

DDR_B_D33

DDR_B_D58

DDR_B_DM5

DDR_B_DQS#6

DDR_B_D40

DDR_B_DQS#4

DDR_B_D49

DDR_B_DM7

DDR_B_D56

DDR_B_D43

DDR_B_D34

DDR_B_D48

DDR_B_D32

DDR_B_D50

DDR_B_D41

DDR_B_CKE1

DDR_B_BS1

DDR_B_MA7

DDR_B_MA0

DDR_B_RAS#

DDR_B_CS0#

DDR_B_MA6

DDR_B_ODT0

DDR_B_MA14

DDR_B_MA4

DDR_B_ODT1


DDR_B_MA11

DDR_B_MA2

DDR_B_MA15

DDR_B_D62

DDR_B_D36

DDR_B_DM6

DDR_B_D39

DDR_B_DQS7

DDR_B_D46

DDR_B_DQS#5

DDR_B_DM4

DDR_B_D44

DDR_B_DQS#7

DDR_B_D52

DDR_B_DQS5

DDR_B_D54

DDR_B_D45

DDR_B_D60

DDR_B_D37

DDR_B_D55

DDR_B_D63

DDR_B_D53

DDR_B_D47

DDR_B_D38

DDR_B_D61

D_CK_SCLKD_CK_SDATAPM_EXTTS#0_1

DDR_VREF_CA_DIMMB

DDR_B_DQS#[0..7]

DDR_B_DQS[0..7]

DDR_B_D[0..63]

DDR_B_MA[0..15]

DDR_B_DM[0..7]

DIMM_DRAMRST#

DDR_B_CKE0

DDR_B_CS1#

DDR_B_WE#

DDR_B_BS2

DDR_B_BS0

DDR_B_CAS#


DDR_B_CKE1

DDR_B_BS1 DDR_B_RAS#

DDR_B_CS0# DDR_B_ODT0

DDR_B_ODT1

DDR_B_CLK1# DDR_B_CLK1

PM_EXTTS#0_1 D_CK_SDATA D_CK_SCLK

+1.5V+1.5V

+1.5V

+0.75VS

+DIMM_VREFDQB

+1.5V

+DIMM_VREFDQB

+0.75VS

+3VS

+DIMM_VREFCA

Title


Date: Sheet of





11 48Friday, July 02, 2010


Title


Date: Sheet of





11 48Friday, July 02, 2010


Title


Date: Sheet of





11 48Friday, July 02, 2010


DDR3 SO-DIMM BReverse Type

2008/9/8 #400755Calpella Clarksfield DDR3 SO-DIMM VREFDQ Platform Design Guide Change Details

Layout Note:Place near JDIMM2

Layout Note:Place near JDIMM2.203 & JDIMM2.204

Layout Note: Place these 4 Caps near Commandand Control signals of DIMMB

DIMMB VREFDQ M1 Circuit

M1 Circuit

4mm High

C163

10U_0805_6.3V6M

C163

10U_0805_6.3V6M

1

2

+ C169330U_2.5V_M_R15

+ C169330U_2.5V_M_R15

1

2

R115 0_0402_5%R115 0_0402_5%1 2

C170

1U_0402_6.3V6K

C170

1U_0402_6.3V6K

1

2

C155

2.2U_0603_6.3V6K

C155

2.2U_0603_6.3V6K

1

2

C164

10U_0805_6.3V6M

C164

10U_0805_6.3V6M

1

2

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

C160

10U_0805_6.3V6M

C160

10U_0805_6.3V6M

1

2

C175

2.2U_0603_6.3V6K

C175

2.2U_0603_6.3V6K

1

2

C159

10U_0805_6.3V6M

C159

10U_0805_6.3V6M

1

2

C165

0.1U_0402_16V4Z

C165

0.1U_0402_16V4Z

1

2

R113

1K_0402_1%

R113

1K_0402_1%

1

2

R116 10K_0402_5%R116 10K_0402_5%1 2

C176

0.1U_0402_16V4Z

C176

0.1U_0402_16V4Z

1

2

C166

0.1U_0402_16V4Z

C166

0.1U_0402_16V4Z

1

2

C158

0.1U_0402_16V4Z

C158

0.1U_0402_16V4Z

1

2

C172

1U_0402_6.3V6K

C172

1U_0402_6.3V6K

1

2

C168

0.1U_0402_16V4Z

C168

0.1U_0402_16V4Z

1

2

C167

0.1U_0402_16V4Z

C167

0.1U_0402_16V4Z

1

2

C161

10U_0805_6.3V6M

C161

10U_0805_6.3V6M

1

2

C173

1U_0402_6.3V6K

C173

1U_0402_6.3V6K

1

2

C162

10U_0805_6.3V6M

C162

10U_0805_6.3V6M

1

2

C174

10U_0805_6.3V6M

C174

10U_0805_6.3V6M

1

2C171

1U_0402_6.3V6K

C171

1U_0402_6.3V6K

1

2R117 10K_0402_5%R117 10K_0402_5%

1 2

C157

2.2U_0603_6.3V6K

C157

2.2U_0603_6.3V6K

1

2

C156

0.1U_0402_16V4Z

C156

0.1U_0402_16V4Z

1

2

R114

1K_0402_1%

R114

1K_0402_1%

1

2

AA

B

B

C

C

D

D

E

E

F

F

G

G

H

H

1 1

2 2

3 3

4 4

CLK_XTAL_OUTCLK_XTAL_IN

CK505_PWRGD

D_CK_SCLK

D_CK_SDATA

H_STP_CPU#

REF_0/CPU_SEL

D_CK_SCLKD_CK_SDATA

CLK_XTAL_OUT

CLK_XTAL_IN

CK505_PWRGD

CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_CPU_DMI#CLK_BUF_CPU_DMI

CLK_BUF_PCIE_SATACLK_BUF_PCIE_SATA#

CLK_BUF_CPU_BCLKCLK_BUF_CPU_BCLK#

CLK_SD_48M_R

H_STP_CPU#

REF_0/CPU_SEL

D_CK_SCLK D_CK_SDATA

CLK_ENABLE#

VGATE

CLK_BUF_ICH_14M CLK_BUF_DREF_96MCLK_BUF_DREF_96M#

CLK_BUF_PCIE_SATA#CLK_BUF_PCIE_SATA

CLK_BUF_CPU_DMICLK_BUF_CPU_DMI#

CLK_BUF_CPU_BCLK CLK_BUF_CPU_BCLK#

CLK_SD_48M

PCH_SMBDATA

PCH_SMBCLK

+CLK_1.05VS

+3VS

+3VS

+3VS

+3VS

+CLK_1.05VS

+CLK_3VS

+3VS

+CLK_3VS

+3VS

+CLK_1.5VS

+1.5VS

+CLK_1.5VS

+CLK_3VS

+CLK_1.5VS+CLK_1.05VS

+3VS

+1.05VS

Title


Date: Sheet of





Custom

12 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

12 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

12 48Friday, July 02, 2010


Clock Generator

IDT: 9LRS3199AKLFT, SA000030P00SILEGO: SLG8SP587V(WF), SA00002XY10

IDT SA00003HR00

Change to 5x3.2

IDT: 9LVS3199AKLFT, SA00003HR00Realtek: RTM890N-631-GRT, SA00003HQ00

Low Power:

Y1 Change to SJ100009R0020091117

For Cardreader

Silego Have Internal Pull-Up

IDT Have Internal Pull-Down

1

CPU_1PIN 30 CPU_0

0 133MHz(Default) 133MHz

100MHz 100MHz

Change to 2N7002DW20100416

Del 3G solution Del 3G solution

Del 3G solution

Del L3

change to +1.05VS20100429

L2FBMA-L11-201209-221LMA30T_0805

L2FBMA-L11-201209-221LMA30T_0805

12

C182

10U_0805_10V4Z

C182

10U_0805_10V4Z

1

2

C178

10U_0805_10V4Z

C178

10U_0805_10V4Z

1

2

Y114.31818MHZ 20PF 7A14300003

Y114.31818MHZ 20PF 7A14300003

1

2

R119 33_0402_5%R119 33_0402_5%1 2

C183

0.1U_0402_16V4Z

C183

0.1U_0402_16V4Z

1

2

R12010K_0402_5%R12010K_0402_5%

1

2

C190

33P_0402_50V8J

C190

33P_0402_50V8J

12

L1FBMA-L11-201209-221LMA30T_0805L1FBMA-L11-201209-221LMA30T_0805

12

Q4B2N7002DW-T/R7_SOT363-6Q4B2N7002DW-T/R7_SOT363-6

3

5

4

U3

SLG8SP587VTR_QFN32_5X5

U3

SLG8SP587VTR_QFN32_5X5

CPU_1# 19

SATA10

CKPWRGD/PD# 25

DOT_96#4

CPU_0# 22

XTAL_OUT 27VSS_REF 26

VDD_CPU 24CPU_0 23

27MHZ_SS7

XTAL_IN 2827MHZ6

USB_488

CPU_1 20VSS_CPU 21

VDD_CPU_IO 18

VDD_USB_481VSS_48M2

REF_0/CPU_SEL 30SDA 31SCL 32

VDD_275

VSS_27M9

SATA#11VSS_SRC12SRC_113SRC_1#14VDD_SRC_IO15

VDD_SRC 17

VDD_REF 29DOT_963

CPU_STOP#16

TGND33

C18510U_0805_10V4ZC18510U_0805_10V4Z

1

2

C179

0.1U_0402_16V4Z

C179

0.1U_0402_16V4Z

1

2

C186

10U_0805_10V4Z

C186

10U_0805_10V4Z

1

2

G

D

S Q52N7002_SOT23

G

D

S Q52N7002_SOT23

2

1

3

R121 10K_0402_5%R121 10K_0402_5%1 2

C181

10U_0805_10V4Z

C181

10U_0805_10V4Z

1

2

R1254.7K_0402_5%R1254.7K_0402_5%1 2

C191

33P_0402_50V8J

C191

33P_0402_50V8J

12

R118 33_0402_5%R118 33_0402_5%1 2

C180

0.1U_0402_16V4Z

C180

0.1U_0402_16V4Z

1

2

R1234.7K_0402_5%R1234.7K_0402_5%1 2

C184

0.1U_0402_16V4Z

C184

0.1U_0402_16V4Z

1

2

Q4A2N7002DW-T/R7_SOT363-6Q4A2N7002DW-T/R7_SOT363-6

6 1

2

C189

0.1U_0402_16V4Z

C189

0.1U_0402_16V4Z

1

2

R1220_0402_5%

@

R1220_0402_5%

@1 2

C187

0.1U_0402_16V4Z

C187

0.1U_0402_16V4Z

1

2

C17710U_0805_10V4ZC17710U_0805_10V4Z

1

2

L4FBMA-L11-201209-221LMA30T_0805

L4FBMA-L11-201209-221LMA30T_0805

12

C188

0.1U_0402_16V4Z

C188

0.1U_0402_16V4Z

1

2

R124 10K_0402_5%R124 10K_0402_5%1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_RTCX1

PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

PCH_INTVRMEN

SM_INTRUDER#

PCH_RTCRST#

PCH_SRTCRST#

HDA_BITCLK_PCH

HDA_SYNC_PCH

HDA_RST_PCH#

HDA_SDOUT_PCH

PCH_JTAG_TCK

LPC_AD0

LPC_FRAME#

LPC_AD3LPC_AD2LPC_AD1

SERIRQ

SATA_PTX_DRX_N0SATA_DTX_C_PRX_P0SATA_DTX_C_PRX_N0

SATA_PTX_DRX_P0

SATA_PTX_DRX_N1SATA_PTX_DRX_P1

SATA_DTX_C_PRX_P1SATA_DTX_C_PRX_N1

SATA_COMP

PCH_GPIO19

PCH_SPI_CS0#_R

PCH_SPKR

PCH_SPKR

SERIRQ

PCH_GPIO21

PCH_SPI_CS1#

PCH_SPI_CS0#

PCH_SPI_MISO_1 PCH_SPI_MISO

PCH_SPI_CLK_1

PCH_SPI_MOSIPCH_SPI_MOSI_1

PCH_SPI_CLKPCH_SPI_CLK

SATA_LED#

PCH_GPIO33#

SPI_WP1#

PCH_SPI_MISO_1

PCH_SPI_CS0#

SPI_HOLD1#PCH_SPI_CLK_1PCH_SPI_MOSI_1

PCH_GPIO33#

PCH_SPI_CLK_1

PCH_JTAG_TCK

PCH_JTAG_TMS

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_RST#

PCH_SPI_MOSI

HDA_SDIN0

PCH_JTAG_RST#

PCH_JTAG_TDO

PCH_JTAG_TDI

PCH_JTAG_TMS

LPC_FRAME#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

SERIRQ

SATA_DTX_C_PRX_N0 SATA_DTX_C_PRX_P0

SATA_DTX_C_PRX_N1 SATA_DTX_C_PRX_P1

PCH_SPKR SATA_PTX_DRX_P0 SATA_PTX_DRX_N0

SATA_PTX_DRX_P1 SATA_PTX_DRX_N1

PCH_JTAG_TCK

SATA_LED#

ME_OVERRIDE

HDA_BITCLK_AUDIO

HDA_SYNC_AUDIO

HDA_RST_AUDIO#

HDA_SDOUT_AUDIO

+RTCVCC

+RTCVCC

+RTCVCC

+3VS

+3VS

+3VS

+1.05VS

+3VS

+3VS

+1.05VS

+3VALW

+3VS

+RTCBATT+RTCVCC +CHGRTC

+RTCBATT

Title


Date: Sheet of





Custom

13 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

13 48Friday, July 02, 2010


Title


Date: Sheet of





Custom

13 48Friday, July 02, 2010


INTVRMEN - Integrated SUS 1.1V VRM Enable High - Enable Internal VRs

close to RAM door

close to RAM door

SATA for ODD

SATA for HDD1HDA for AUDIO

GPIO33 can not pull down(manufacturing environments)

RC Delay 18~25mS

RC Delay 18~25mS

Have internal PD

SPI ROM Footprint 200mil

2/10 SATA2, SATA3 not support on HM55

If GPIO33 pull down, ME will not working.For factory update ME, pull down resistor pullunder door.

modify to 330K

X1 Change to mini type20091102

GPIO33 has a weak internal pull-upNOTE: Asserting the GPIO33 low on the rising edge of PWROK will also halt Intel Management Engine after chipset bringup and disable runtime Intel Management Engine features. This is a debug mode andmust not be asserted after manfacturing/debug.

For 3G teamClose to U5 20090915

CRB 1.0 Change to 4.7K

enable iTPM: SPI_MOSI High

20100421 Modify

20100416 add

GPIO19 GPIO37

0 0

11X

0SG

dGPUiGPU

VGA_PRSNT_L#PCH_GPIO19

GPIO21 Project01

NEW50/70/80/90NEW71/91

R133 1M_0402_5%R133 1M_0402_5%

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