Abundant-Data Computing

The N3XT 1,000X

Department of EE & Department of CS Stanford University

Subhasish Mitra

Solution: NanoSystems

2  

Transform new nanotech into new systems enable new applications New devices

New fabrication

New sensors

imperfections? large-scale fabrication? variability?

New Architectures

a  

Abundant-Data Explosion

Exa

B (B

illio

ns o

f GB

)

0

40

K

2006 Year 2020

Unstructured data Wide variety & complexity

“Swimming in sensors, drowning in data”

●  Mine, search, analyze data in near real-time

▪  Data centers, mobile phones, robots 3

Abundant-Data Applications

4

Memory wall: processors, accelerators

Compute Memory

ResNet-152 (CNN)

Deep Learning Accelerators AlexNet (CNN)

…20%

80%

15%

85%

8%

92%

Language Model (LSTM)

5

Nano-Engineered Computing Systems Technology

[Aly IEEE Computer 15]

Computation immersed in memory

6  

N3XT NanoSystems

Memory

Increased functionality

Fine-grained, ultra-dense 3D

Computing logic

Impossible with today’s technologies

Carbon Nanotube FET (CNFET)

7

CNT: d = 1.2nm

2 µm

Gate

2 µm

Gated

CNFET

Sub-litho pitch

2. First CNT computer

[Shulaker Nature 13, ISSCC 13, IEDM 14]

1. Energy Delay Product

~10X benefit Full-chip case studies

[IBM, IMEC, Stanford, others]

Example: OpenSPARC T2

8 [Stanford + IMEC, Unpublished]

0.05

0.5

0.1 1 10

tota

l ene

rgy

per c

ycle

(n

J)

clock frequency (GHz)

FinFET Nanowire FET

CNFET

preferred

Putting into Perspective

9

•  Existing technology benchmarking + CNFETs

4.E-1

4.E+0

4.E+1

1.E+2 1.E+3 1.E+4

Si-CMOS high performance

“beyond” CMOS

Si-CMOS low power

40

4

0.1 10 1 0.4

adder frequency (GHz) adde

r ene

rgy

per o

pera

tion

(fJ)

preferred

vdWFET

ExFET HetJTFET

gnrTFET GaNTFET

BisFET

TMDTFET

PiezoFET

NCFET

ITFET GpnJ

ThinTFET HomJTFET

32-bit adder [Nikonov & Young, 2013 & 2015]

3D Integration

10

l  Massive ILV density >> TSV density

Nano-scale inter-layer vias (ILVs)

TSV (chip stacking)

Through silicon via (TSV)

Dense, e.g., monolithic

Device + Architecture Benefits

11

Top Electrode

Metal Oxide

Btm Electrode + + Emerging

logic Emerging memory

Monolithic 3D integration

Naturally enabled

[Wei IEDM 13, Shulaker VLSI Tech 14]

l  Low-temperature fabrication: < 400 °C

In-situ classification: Extensive, accurate

First 3D NanoSystem

[Shulaker Nature 17] 12

CNFET compute accelerator

(classification)

Millions of sensors 1 Mbit

RRAM

Abundant data: Terabytes / second

No TSVs

>2 Million CNFETs, 1 Mbit RRAM

N3XT Simulation Framework

13

Joint technology, design & app. exploration

Architecture exploration

Energy, exec. time

Thermal

Physical design, yield, reliability

Heterogeneous technologies

System-level analysis Abundant-

data apps

14

~1,000X benefits, existing software

chip stacking: 2-4x benefits

IBM  graph  analy/cs  

1×  

10×  

100×  

PageRank   Connected  Components  

Breadth-­‐  First  Search  

Linear  Regression  

Language  model  

(LSTM  Neural  Network)  

AlexNet  (Neural  Network)  

Energy   Execu+on  Time  

Bene

fits  

851×   400×   510×   970×   1,950×   210×  

Massive Benefits: Deep Learning, Graph Analytics, …

More Opportunities

15

Accelerators

Brain-inspired

Technology innovations

“Brain-Inspired Computing Exploiting Carbon Nanotube FETs and Resistive RAM: Hyperdimensional Computing Case Study,” ISSCC 2018.

Conclusion

16

l  Nanosystems today

l  Game ON, to the era

l  N3XT 1,000X

§  Compute + memory + sensing

§  Densely interwoven