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PERFORMANCE CHECKSHEET
Model: AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2Type: Common Mode Transient Immunity (CMTI) Test for Opto-CouplersS.N.: 13920Date: October 9, 2019
Minimum Rise Time Test, No DUT, Positive
Top = +1.5 and +1.0 kV HV out (stored - with signal disconnected before recording logic waveform).
Bottom = Logic “A” out for +1.5 kV, VCC2 = +5V, using P6246, and no DUT, R2 = 1 kΩ. (This shows the parasitic capacitive coupling onto the Logic “A” out.)
Minimum Rise Time Test, No DUT, Negative
a) Output Signal Amplitude: ±1 to ±1.5 kV
b) Rise Time (10%-90%): < 10 to > 50 ns
c) PRF: 1 Hz - 10 Hz
d) Jitter, Stability: OK
e) Prime Power: 100-240V AC, 50-60 Hz.
Daughterboard installedin positive position (with no DUT IC)
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt
A V T E C H E L E C T R O S Y S T E M S L T D .N A N O S E C O N D W A V E F O R M E L E C T R O N I C S
S I N C E 1 9 7 5
[email protected]://www.avtechpulse.com/
Tel: 888-670-8729 (USA & Canada) or +1-613-686-6675 (Intl)Fax: 800-561-1970 (USA & Canada) or +1-613-686-6679 (Intl)
BOX 5120, LCD MERIVALEOTTAWA, CANADA K2C3H5
Positive Rise Time, capacitive load = 0 pF
Top = HV out (stored - with signal disconnected before recording logic waveform)Bottom = Logic “A” out, VCC2 = +5V, using P6246 probe, and no DUT, R2 = 1 kΩ
Positive Rise Time, capacitive load = 75 pF
Positive Rise Time, capacitive load = 150 pF
Positive Rise Time, capacitive load = 300 pF
Positive Rise Time, capacitive load = 600 pF
150 pF capacitor (orange) on daughterboard
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt
Negative Rise Time, capacitive load = 0 pF
Top = HV out (stored - with signal disconnected before recording logic waveform)Bottom = Logic “A” out, VCC2 = +5V, using P6246 probe, and no DUT, R2 = 1 kΩ
Negative Rise Time, capacitive load = 75 pF
Negative Rise Time, capacitive load = 150 pF
Negative Rise Time, capacitive load = 300 pF
Negative Rise Time, capacitive load = 600 pF
Daughterboard installedin negative position (with no DUT IC)
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt
VO3120 Test, Fast, 0 mA input, +1.5 kV pulse
Top = HV out (stored - with signal disconnected before recording logic waveformBot = Logic “A” out, +32V VCC2. P6139A probe.
VO3120 Test, Fast, 0 mA input, -1.5 kV pulse
Top side of daughterboard with VO3120 configured for 10 mA bias.
VO3120 Test, Fast, 10 mA input, +1.5 kV pulse
VO3120 Test, Fast, 10 mA input, -1.5 kV pulse
Bottom side of daughterboard with VO3120 configured for 10 mA bias.
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt
VO3120 Test, Slow, 0 mA input, +1.5 kV pulse
Top = HV out (stored - with signal disconnected before recording logic waveformBot = Logic “A” out, +32V VCC2. P6139A probe.
VO3120 Test, Slow, 0 mA input, -1.5 kV pulse
For these tests, 300 pF of capacitance was used.
VO3120 Test, Slow, 10 mA input, +1.5 kV pulse
VO3120 Test, Slow, 10 mA input, -1.5 kV pulse
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt
HCPL-7721, 0V input, +1.5 kV, 150 pF added
Top = high voltage pulse (stored - with signal disconnected before recording logic waveform).
Bot = Logic “A” out (with 0V input) using P6246.
HCPL-7721, 0V input, -1.5 kV, 150 pF added
Top side of daughterboard with HCPL-7721 configured for 5V bias.
HCPL-7721, 5V input, +1.5 kV, 150 pF added
HCPL-7721, 5V input, -1.5 kV, 150 pF added
Bottom side of daughterboard with HCPL-7721 configured for 5V bias.
/fileserver2/production/check-sheets/sn13920,AVRQ-5-B-AC22-AHV-CC1-ID1-VXI-HF-V2-X2.odt