A study of channel avalanche breakdown in scaled n-MOSFET's

3066 IE'!? TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 5, MAY 1987

A Study of Channel Avalanche Breakdown in Scaled n-MOSFET's

Abstract-The behavior of channel avalanche breakdown in n-MOS. FET's miniaturized by isothermal constant field scaling is examined. Both a first-order analytical estimate and a rigorous two-dimensional numerical simulation of electrically wide devices are used to understand the scaling of channel breakdown. A sublinear dependence of snapback and sustaining voltages on channel length is found and explained. In practical terms, this sublinear dependence means that the relative MOS channel breakdown behavior improves for scaled-dowll devices. The breakdown behavior was verified against experimental data taken on a 1.3-pn n-channel device. In addition, a model is proposed for channel breakdown on unscaled devices that differ only in channel length.

I. INTRODUCTION

C ONSTANT field.scaling has been a guiding force ill MOSFET miniaturization for over ten years [I] , [2].

As originally proposed, this principle is valid for abovc: threshold and below channel breakdown device operation. Although the virtual invariance of the subthreshold slope with respect to constant field scaling is well understood, the behavior of breakdown in scaled devices is less clear. This study in particular is directed toward the avalanchl; channel breakdown in electrically wide n-MOSFET's. The study's qualitative findings, however, apply also to p-MOS devices but are not as important in quantitativl: terms due to a lower ionization coefficient and substratf: resistivity.

Two approaches to understanding the behavior of channel breakdown under the assumption of isothermal constant field scaling are presented. The first approach is ti, examine the first-order expectations of breakdown scalin ; using variable transformation of the transport equations. The second approach uses the two-dimensional numerical device simulation program FIELDAY [ 3 ] , [4] to rigor- ously compare breakdown characteristics of three n - MOSFET's. In practical terms, it will be shown that the relative MOS channel breakdown behavior improves fcs scaled-down devices.

Although great care was taken with the experimentz.1 verification of the breakdown model, subtle remaining dil-. ferences are discussed. As an outgrowth of this work, a. new and simple model is devised that can explain tlbe

Manuscript received August 25, 1986; revised November 14, 1986. TI is paper is an expanded version of talk 4.2 given at the 1984 Internaticnal Electron Devices Meeting, San Francisco, CA, December 9-12, 1984.

The authors Are with the IBM Thomas J. Watson Research Centc:r, Yorktown Heights, NY 10598.

IEEE Log Number 8613266.

channel breakdown behavior of unscaled devices that differ only in channel length.

11. SCALED DEVICE DESIGNS The three n-MOSFET designs have channel lengths of

2.0, 1.0, and 0.5 pm and are related by strict adherence to the constant field scaling algorithm. The scaling factors K [l], [2] for the 0.5- and 2.0-pm devices are K = 2 and K = 0.5, respectively. In order to simplify comparisons between devices, results will be ultimately normalized to the 1 .O-pm reference device ( K = 1 ). Note that increasing K implies device miniaturization. The channel lengths of the three devices are L = 1.0/ K pm. Similarly, device width W = 10 / K pm and oxide thickness lox = 25 /; nm. The substrate dopings are NA = 3 X 1015 K cm- . All three devices have a scaled Gaussian channel implant peaked at the Si-Si02 interface with straggles (T = 80 / K

nm resulting in acceptor doping concentrations of 1 X 1017 K cmF3 at the silicon surface. The source-drain dif- fusion is also scaled, although this is noncritical to the results presented here. Scaled Gaussian implants with peak source-drain doping values of No = 2 X IO2' K cmP3 and junction depths xj = 0.25 / K pm are used.

The generic two-dimensional cross section of the devices as modeled is shown in Fig. l . Table I summarizes design and modeling parameters for the three devices. The domain dimensions 0, and Dy define the actual region simulated in two dimensions by FIELDAY; the remaining substrate resistance is modeled as a lumped resistor. The RsuB value given in Table I is calculated according to [ 5 ] , [GI

where psuB is the bulk resistivity of the substrate and RsUB is defined for a unit device width. Slight deviations from constancy in K R S U B occur due to the change in bulk hole mobility as substrate doping is scaled.

The backside bias of the three n-MOSFET's is adjusted to guarantee K - ~ scaling behavior of the substrate deple- tion region below the gate. The three backside bias values chosen are V, = -2.669, -1.0, and -0.1475 V for device channel lengths L = 2.0, 1.0, and 0.5 pm, respectively. The source terminal is grounded in all cases. Using a fixed value of interface charge Q,,/q = 5 X 10" ern-', the threshold voltage is determined for each device using

0018-9383/87/0500-1066$01.00 O 1987 IEEE

LAUX AND GAENSSLEN: AVALANCHE BREAKDOWN IN SCALED n-MOSFET’S 1067

TABLE I DEVICE MODELING PARAMETERS

. . _~___ ~ . .

K I L K ! J’=(J? RSljB Wcm) D, (lyn) D. (pun) *-tvm) L (lynl

0.5

-2.669 2.266 9 216 1.25 1.15 5 0.5 2.0

-1.0 1.064 17.446 2.50 2.30 10 1 .o 1 .o

-0.1475 0.4814 33.776 5.00 4 60 20 2.0

BACK

Fig. 1 . n-MOSFET cross section used for FIELDAY simulation. The 01% entation of the x- and y-axes are shown; the domain of simulation is defined by DX and Dy.

VD = 0.1 /K V. The voltage intercept of the tangent through the point of inflection of the FIELDAY ZD versus VG characteristic minus 0.5 V, defines the device threshold. The threshold voltages are VT = 2.266, 1.064, and 0.4814 V for L = 2.0, 1.0, and 0.5 pm, respectively.

DI. TRANSFORMATION BY SCALED VARIABLES

The use of variable transformation of the transport equations provides a first approach to understanding the scaling of channel breakdown in n-MOSFET’s. Although this approach is only approximate, the predictions are in qualitative agreement with more rigorous numerical solutions of the two-dimensional transport equations to be discussed subsequently. The n-MOSFET channels stud- ied here ultimately break down due to unwanted electron injection from the n+ source into the substrate. As previously discussed [5] - [8] , this injection occurs when the potential barrier at the source is lowered. This barrier lowers as a result of hole current flowing from the impact ionization region at the drain end of the channel to the backside of the device. Due to resistive drops in the substrate, the source-substrate barrier is lowered. In electrically short channels, this barrier is further lowered by the shear proximity of excess holes to the source. This can become a dominant mechanism in electrically short channels. In this paper, essentially only electrically long channels are considered rendering the proximity mechanism a second-order effect. For this analysis based on transformation by scaled variables, this second-order effect is ne- glected. Here, breakdown occurs when the source-substrate junction becomes forward biased and the substrate

current I B exceeds

where V, is the built-in forward voltage of a junction ( = 0.6 V ) and RB is the total resistance (lumped and distributed) between the backside. bias generator and the source.

To proceed with the transformation by scaled variables, let primes denote scaled quantities corresponding to a scale factor of K. Unprimed quantities indicate the unscaled reference device. Using the previously assumed device design parameters, direct calculation shows ( Vo - VB) 6i K-’. Furthermore, since RB is the sum of RsUB and distributed bulk resistances, R B K - ~ , where R B is defined for a unit device width (in ohms times centime- ters). From (2), at the onset of breakdown

1; E ZB (3)

where these currents are expressed per unit device width. Substrate current is due to holes generated by impact

ionization at the drain end of the channel. Prior to breakdown, all hole current flows out the backside contact of the device. By integrating the steady-state hole current continuity equation over the device cross section and transforming the divergence term to a line integral, a relationship between substrate current per unit width and integrated hole generation rate is established. Using (3), hole generation rates G and G’ are related by

Z ~ = q S S G d x d y = Z b = q SS G f & ’ d y t n n

= 3 3 G ’ d x d y (4) 2 since dx = dx / K and dy = dy / K. Although this integral equation has many possible solutions, G’ = G is most obviously suggested. This implies as the device is scaled down in size, hole density generation must become more intense at the corresponding onset of breakdown as compared to the reference device to compensate for a smaller generation region. This is a prime cause of the sublinear scaling of breakdown behavior that will now be deduced in more detail.

Hole density generation rate G is given approximately by G = orJ, where Q is the electron impact ionization coefficient and J is the electron current density magni-

1068 TEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 5 , MAY 1987

tude. Using this definition of G it is found that

where y = J/J’. The predominate channel current is d.riift current; drift current density in the inversion region does not scale and stays essentially constant ( y = 1 ). Sincc: it is anticipated that a large increase in generation rate <:an be obtained with a small increase in drain voltage due to the exponential dependence of a on the electric field, 1:he scaled ionization coefficient is written as a first-order Thy- lor’s series about the unscaled electric field E: a‘ = a .-

( E - E ‘ ) aa / aE. Define the function F ( E ) as the fractional increase in a per fractional increase in electric fit:ld E, that is,

F ( E ) = ( A a ( E ) / a ( E ) ) / ( M I E ) . ( 6 ) F is a unitless quantity, which indicates how small changes in field reflect into large changes in a; F increases from approximately 1 to over 100 as E decreases. Combini lg (5) , (6), and the expansion of a’

( E - E ’ ) 1 E F

= - - ( K 2 - 1 ) .

Let VsNp and ViNp be the unscaled and scaled drain voltage present when the source becomes forward biased. If the drain field at the onset of saturation is much less than the drain field at the onset of breakdown, E ij; VsNp and ,5’ E K L & ~ [9]. Equation (7) thus can be rewritten in terms of voltage as

Solving (8) for the scaled breakdown voltage ViNp gives the result

Equation (9) quantifies the expectation that breakdowm does not scale linearly as VsNp/~ but rather sublinearly. At low gate drive, the drain field at breakdown can be quite large resulting in a small value for F and a markd deviation from linear scaling in VsNp as indicated in (9). At high gate drive, the drain field at breakdown is d e creased relative to the low gate drive case resulting in a larger value for F. This implies VsNp approaches a more linear scaling behavior as gate drive is increased. This is seen in Fig. 2, which shows a plot of ( V&/VsNp) versus L given by (9), where L = 1 .O / K pm. The function : s displayed for three values of drain field: E = 20, 30, and 40 V /pm with corresponding F = 13, 6.6, and 4.2, re:- spectively. F is calculated directly from the electron ior,- ization coefficient as a function of field [ 101. The sub11 - near nature of scaled breakdown is most easily summarized by finding an effective power law dependence for ( ViNp/VsNP) in channel length L. Using a leas$ squares fit to the data of Fig. 2, the three curves are aF-

2.0

2 I=, 1.0 2

9 0.8

0.6

-. . 0.4 0.6 0.8 1.0 2.0

CHANNEL LENGTH L (pm)

Fig. 2. Ratio of the scaled breakdown voltage ViNp to VsNpfrom the transformation by scaled variables analysis versus channel length. VsNpis defined for a l .O-pm channel. A drain field of 20, 30, and 40 V / pm is shown as a parameter.

proximated by ( VhNp/VsNp) Lr, with the exponent = 0.81, 0.63, and 0.45, respectively.

The deviation from linearity in scaled breakdown predicted from this variable transformation argument turns out to be overly severe compared to the predictions of two-dimensional numerical simulation as discussed in the following section. This occurs because the path taken by channel electrons through the avalanche region does not scale and this has yet to be taken into account. However, variable transformation has properly predicted a sublinear dependence of breakdown with the deviation from linearity increasing for increasing drain field at breakdown.

IV. NUMERICAL SIMULATION OF SCALED DEVICES Steady-state two-dimensional FIELDAY simulations

were performed to ascertain in detail the behavior of breakdown in the three constant field scaled n-MOSFET’s previously described. The computational mesh used for this calculation has 962 nodes and 1822 triangular finite elements. The-overall mesh size’is scaled according to K - ~

as seen from the domain dimensions DX and Dy listed in Table I. Rigorous scaling is also followed throughout the interior of the mesh with one exception: at the Si-Si02 interface, the mesh in the channel region is left unscaled in accordance with the well known nonscaling quality of inversion layer charge in MOSFET’s. The inversion layer mobility used is based on Baccarani and Wordeman [ 111. The formulation of impact ionization on triangular finite elements has been recently discussed [4] and is based on the following expression for the electron/hole generation rate G:

G = a , \ T n I + a p l ? p l . (10)

Ionization coefficients an(p) as a functio$of l y a l fie@ [ 101 are evaluated with the arguments max ( E - Jncp, / I Jn(p ) 1 , 0). Boltzmann statistics are used by FIELDAY and are known to give correct terminal behavior at T = 300 K.

The output characteristics of the three scaled MOS- FET’s described in Table I obtained from FIELDAY simulation are shown in Fig. 3. Three values of gate drive V, - V, are shown for each device. Note that gate drive for

LAUX AND GAENSSLEN: AVALANCHE BREAKDOWN IN SCALED n-MOSFET'S 1069

DRAIN VOLTAGE V, (V)

Fig. 3 . Drain current versus drain voltage for the three scaled n-MOS- FET's under consideration. The device designs are summarized in Table I. The three gate drive values displayed per device are given in the text.

0 2 4 6 8 NORMALIZED DRAIN VOLTAGE KV, (V)

Fig. 4. The same data as displayed in Fig. 3 but with normalized drain current and drain voltage axes to facilitate an evenhanded comparison. The data clearly shows the relative improvement of breakdown for de- creasing channel length.

a given channel length is based on the threshold voltage for that same channel length. For the three devices, the largest gate drive is VG - V, = 3 .O / K V , the middle gate drive is V G - V, = 1.5 /; V and the lowest gate drive shown is VG - VT = 0 V. Current drive boundary con- ditions were used at the drain to permit simulation in the post-breakdown region characterized by negative differential resistance. To highlight deviations from scaling, a better way to display the same data is shown in Fig. 4. Drain current and drain voltage are plotted on normalized axes that correspond to values present at the L = 1 .O-pm level. If voltage and current scale exactly as K - ~ , then the curves in Fig. 4 would overlay.

Two regions of nonscaling are evident in Fig. 4. First, less normalized drain current flows in saturation as the device is miniaturized. This is a consequence of the nonscaling of the inversion layer charge; the electron distribution in depth below the silicon surface changes little as the device is scaled. This occurs because the surface electron concentration is set by the gate field (which is assumed constant in scaling) and the decay of electrons below the surface is established by the extrinsic Debye length at the surface (necessarily also constant). Thus, in normalized spatial coordinates the inversion layer charge appears less tightly bound to the silicon surface as the device dimensions are scaled.

CHANNEL LENGTH L (pm)

Fig. 5. The snapback and sustaining voltages versus channel length obtained from FIELDAY simulations are shown as dots. The solid lines are least square fits to these data with a power law as given in the text. A dotted line of unity slope is shown for comparison.

The second regime of nonsca€ing in Fig. 4 is the breakdown region. Two features are evident. First, for a fixed normalized gate'drive, breakdown occurs at a higher normalized drain voltage as the device size decreases. Sec- ondly, over the three devices simulated, the high current breakdown behavior varies, as is seen more clearly in Fig. 3. For the shortest device with L = 0.5 pm, the three gate-drive curves do not cross; for the device with L = 1.0 pm, the three curves just cross; and for the largest device with L = 2.0 pm, the curves cross convincingly. The cause of these two nonscaling features of breakdown will now be discussed.

The sublinear behavior of scaled channel breakdown found here agrees with the qualitative predictions of the variable transformation argument given in the previous section. Fig. 5 quantifies the behavior of breakdown obtained from FIELDAY by plotting snapback and sustaining voltages versus channel length extracted from Fig. 3. The snapback voltage VsNp is defined as the highest drain voltage achieved at VG - VT = 0 V. The sustaining voltage V , , is defined as the lowest drain voltage achieved at ID = 3 / K mA for the set of gate drives simulated. These data can be fit to a power law with the result VsNp oc and V,, oc which are shown as lines in Fig. 5 . These exponents correspond to a more linear behavior than the variable transformation results shown in Fig. 2. In fact, FIELDAY simulations indicate that a drain field of = 55 V / pm should have been used in the variable transformation estimate for VsNp given by (9). Using this drain field would have yielded a corresponding power law for VSNp with exponent c = 0.17, which is in quantitative disagreement with the FIELDAY result of c = 0.69. This substantial disagreement stems primarily from the failure of the variable transformation estimate to account for the nonscaling of electron paths through the avalanche region. This ingredient was missing in the variable transformation analysis. The nonscaling electron paths also account for the cross-over behavior as seen in Fig. 3.

As shown by its inset, Fig. 6 provides an enlarged view of the electron paths at the drain end of the channel for

1070 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 5 , MAY 1987

S O D

I AEx(V/pm)= I x P

L=2pm - L=0.5pm - - -

\ l i . *-~---.-.-----00.18/Kpm +

Fig. 6. An enlargement of the drain end of the channel for the 0.5- a n c 2.0-pm devices as indicated in the inset. The data for these two device:. are superimposed in normalized form. For each of the two devices, thr: total electron flux is subdivided into four equal portions by three^ flow lines. In this way both the direction and the breadth of the electron flow can be visualized. For a normalized increase in drain bias for each de. vice, the corresponding change in x-directed field is Calculated. These two results are shown as contours and overlay exactly.

two channel lengths as given by FlELDAY simulation. The electron paths are shown at the same normalized bias for a channel length of L = 0.5 and 2.0 pm. To enable s. proper comparison, the two sets of electron paths are. mapped into normalized spatial coordinates; if distance scales as K - ~ , electron paths for the two devices would exactly overlay. The paths correspond to device so1ution.s with identical normalized device biases: V, = 4.4/K V and VG - VT = 0 V. For each of the two devices, t h e : total electron flux is subdivided into four equal portions by three flow lines. In this way both the direction anc. breadth of the electron flow can be visualized. Electrons’ enter from the left and move toward the drain on the right the drain metallurgical junction xj is also shown. The: electron paths are nearly horizontal; thus, essentially on14 the x-directed electric field determines the ionization coeff., ficients. Within the confines of Fig. 6, the horizontal fielc. is virtually identical for the two channel lengths as pre., dicted by constant field scaling. Since the electron paths, for the two devices are different, different field strengths, will be experienced by the two channel electron fluxes Mind that Fig. 6 is a normalized representation of the d e , vice cross sections, which means that the actual generation regions are significantly different in size; this con.. stituent was identified in Section I11 as a prime cause of the scaling behavior of breakdown.

Because the two equal electron fluxes in Fig. 6 arc spread out differently in depth but interact with the same: x-directed field pattern, a vastly different yield of generated holes results. To further investigate this relationship the total field pattern for one device was calculated at two different drain voltages. The magnitude of the difference in x-directed field pattern AE, was calculated resulting in a localized increase at the drain end of the channel. This

same calculation was done for the second device for a corresponding set of normalized drain voltages and the two resulting differential field distributions exactly overlay as shown in Fig. 6. This is proof that, in a saturated channel, an increase in drain voltage essentially only af- fects the field in a pinched off high-field region at the drain end of the channel. The linear channel region does not absorb any increase in drain voltage. The difference in paths is a direct result of the nonscaling of the inversion charge distribution below the Si-Si02 interface. For the smaller of the two devices the generated hole density lies farther below the interface and is more diffuse as well. Clearly the generation region does not scale in shape and magnitude; the estimate G’ = K’G for scaled generation rate used in the variable transformation analysis is an im- proper estimate and accounts for the inaccuracy of the estimate of sublinear breakdown.

Up to this point, the gate drive was assumed to be zero, that is, VG = V,, which implies a minute channel current flow. Now this is changed by driving the gate more heav- ily so that the mobile charge carrier density at the drain end of the channel becomes a significant portion of the total charge density. With the gate-drive-dependent increase of inversion layer charge, the constancy of the field pattern in normalized spatial coordinates is gradually de- stroyed. The normalized electron flow-path patterns are still different; however, the electrons now experience less different field strengths. The changed electric field pattern virtually cancels the nonscaling of electron paths and would cause by itself a more linear behavior of scaled breakdown at high gate drive. But if the identified prime cause is also included, namely, the requirement for a more intense hole generation, then the combined behavior of breakdown scaling at high gate drive is sublinear, but to a lesser degree than for a low gate drive. The different cross-over behavior at high currents in the output characteristics of the three devices is simply a consequence of this gate drive dependence of the non-scaling of breakdown and can be identified in Figs. 3 and 4.

V. EXPERIMENTAL VERIFICATION OF THE BREAKDOWN MODEL

Although the sublinear dependence of V,,, and Vsus on the channel length for the scaled devices as shown in Fig. 5 is well explained by transformation of scaled variables and two-dimensional numerical device simulations, the absolute values of VsNp and Vsus obtained by simulation seem too low. For example, Vsus for a 1-pm n-MOSFET is more like 8 V instead of the 6.5 V shown in Fig. 5 . For this reason, experimental verification of the breakdown model was undertaken using a 1.3-pm n-MOSFET. Be- fore the influence of the breakdown model can be iso- lated, however, careful extraction of the relevant device parameters needed for two-dimensional simulation must be undertaken. The device doping profile and metallurgical channel length were ascertained by combining channel doping specification and repeated two-dimensional simulation until device threshold voltage as a function of

LAUX AND GAENSSLEN: AVALANCHE BREAKDOWN IN SCALED n-MOSFET'S 107 1

Fig. 7. Comparison of experimental and simulated output characteristics for a 1.3-pm channel length device. The gate voltages simulated are in- cremented in a nonconstant fashion as indicated. Although the agreement is excellent, remaining subtle differences can be seen and are explained in the text.

substrate bias and channel length showed exceptional agreement with the experimental data (absolute V, errors of 0-5 mV typical for 1.3 I L I 4.3 pm and -6 5 V, I 0 V). Next, the parameters present in the previously mentioned channel mobility model were tuned slightly to extend the agreement between experiment and simulation into the triode and saturation regions of device operation. Having secured these various device parameters, the full output characteristic of the 1.3-pm device including breakdown was simulated.

Instead of maintaining the values for electron and hole mean free paths for optical phonon generation X, and X, as given for bulk silicon [ 101, X, and X, were used as free parameters to allow V,, as simulated to agree with V,, obtained from experiment. However, the ratio of X, /X, was kept constant at the bulk silicon values. Good agreement between model and data was found for X, = 55 A and X, = 34 A. These values are 14 percent lower than the bulk values X, = 64 A and X, = 39 at T = 300 K. The output characteristics obtained using this modified impact ionization parameter set is seen in Fig. 7 together with the experimentally obtained output characteristic. Two issues require explanation: first, why is a decreased mean free path required to get good agreement between the model and the data? Secondly, what is the origin of a less abrupt transition from the saturation to breakdown region for the experimental device compared to the simulated device?

Impact ionization coefficients parameterized by the lo- cal electric field are inappropriate in the presence of high electric field gradients. This model presumes carrier energy can change markedly on the distance scale of the field gradient. Such a model will overemphasize impact ionization and generate too many electron-hole pairs via impact ionization [ 121, [ 131. This exaggerated substrate current will cause the model to predict channel breakdown at lower voltages than experimentally measured. The gen- ration of electron-hole pairs needs to be reduced accord- ingly in order to get agreement between experiment and simulation for short-channel MOSFET's with abrupt

source and drain doping profiles as treated here. Lowering X, and X, in concert is one ad hoc way to reduce the ionization coefficients. By reducing the carrier mean free path, the carrier experiences collisions more frequently. Since collisions bleed off energy from the carriers and work against the buildup of sufficient energy to undergo impact ionization, reducing the carrier mean free path serves to reduce the substrate current generation and the channel breakdown occurs at a'higher drain voltage. This adjustment of carrier mean free paths necessarily depends upon the electric field and its gradient in the vicinity of the drain. For MOSFET's related by constant field scaling, the field is essentially unchanged, but the field gradient would scale as K . This suggests different values of the mean free paths are required for different scaling factors; however, these adjustments to X, and X, work in sup- port of the sublinear dependence of VSNp and Vsus on channel length. As a result, use of a constant X, and X p over the scaling range K = 0.5-2 .O does not alter the qualitative behavior of V,,, and V,, given in Sections I11 and IV .

The less abrupt transition from the saturation to the breakdown region observed for the experimental device compared to the simulated device can be accounted for in two ways. First, the simulated device is a two-dimensional cross section representing an electrically wide device, whereas the experimental device is a three-dimensional structure. Although W / L = 15.5 for the 1.3-pm device, the enhanced electric field and nonuniform locus of the pinchoff point across the width of the channel [14] would cause the edges of the device channel to experience breakdown sooner than the center of the channel. This nonuniformity of channel breakdown could explain the deviation between data and simulation at the knee of the breakdown region. Secondly, the experimental device is characterized under essentially dc operation. However, the simulated device maintains a constant lattice temper- ature (300 K) and is based upon a transport model that precludes carrier heating. As a result, the simulated device result is perhaps more analogous to a pulsed measurement than to a dc measurement. This discrepancy could also cause a deviation between data and simulation at the knee of the breakdown region.

VI. AVALANCHE BREAKDOWN FOR CHANNELS VARYING ONLY IN LENGTH

Now, since channel avalanche breakdown behavior of scaled MOS devices is well understood, another equally important question arises: how does the breakdown behavior of a device change, when only its channel length is varied? Answering this question allows the breakdown behavior of all devices with differing channel lengths within the confines of a given technology to be predicted, as long as they are of sufficient electrical length.

A simple model shown in Fig. 8 helps to explain the variation in breakdown behavior between two pinched off devices with differing channel lengths L and L I . Both channels, as shown, are composed of two portions sepa-

1.072 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. ED-34, NO. 5, MAY 1987

V,‘=V,-AV

V~ZVD-AV

FOR AV: Io=I’o Vp = VG-VT , V i = V p - A V

Fig. 8. A model for the channel breakdown of unscaled devices which differ only in channel length. The two device cross sections differ in cha11- ne1 length by AL. The currents ID and I; are forced constant by a voltage offset of AV between the two devices. As a result of this, the channsl end-portions within the dotted boxes that determine the breakdown show an identical response.

rated by a pinchoff point. Those portions to the left of the pinchoff point can be considered essentially linear in nature, funneling carriers into their respective pinchaff points P or P ’ . The channel portions to the right are pinched off and respond only to their current influx h- beled ID and 16. As long as the incoming current drive and the relative potentials are the same, the two channel end portions will respond identically. The internal properties of the dashed boxes in Fig. 8 certainly have not changed by only changing the overall channel length. With ID arid It, being equal, the developing primary and secondary carrier flow patterns in the pinched off regions should be exactly the same. To force this equal current condition on the left side of the boxes, the gate potential of the shorter device, for example, has to be lowered by AVas indicated in Fig. 8. Maintaining the relative potentials for the dashed box of the shorter device, as shown, also requirzs the drain and substrate potentials to be lowered by the same amount. Consequently, the overall terminal chs.r- acteristics of the two devices differ only by the vo1ta:e AV dropped along AL, which is the difference in channel length of the two devices considered as shown in the fig- ure.

The similarity between the dotted boxes of Fig. 8 a:ld the area depicted in Fig. 6 is not accidental. In both cases, the high field region controls the device behavior. In Fig. 6 , scaled potentials are maintained in scaled spatial CQ-

ordinates to understand scaled device breakdown behavior. In Fig. 8, absolute potentials are maintained in absolute spatial coordinates to yield equal device breakdown behavior except for the voltage offset AV. The model b a s verified by several FIELDAY simulations. These sirnu- lations show that AV is not a constant over the entire output characteristic; rather, A V is a weak linear function of the gate drive. Consequently, for devices varying only in channel length, this model can be used to predict th,sir breakdown behavior.

VII. SUMMARY Channel breakdown in constant field scaled n-MOS-

FET’s has been examined by two methods taking different perspectives: simple analytic arguments based on transformation by scaled variables and rigorous two-dimensional numerical device simulation. Both approaches predict a sublinear dependence of breakdown on channel length with the practical meaning that the relative breakdown behavior of a scaled MOSFET improves. As the device is scaled down, hole density generation must become more intense at the corresponding onset of breakdown to compensate for a smaller generation region. This prime cause of the sublinear scaling of breakdown behavior was deduced from arguments based upon the transformation by scaled variables. This basic fact is supported by the more rigorous two-dimensional numerical simulation of electrically wide devices. Furthermore , at low gate drive, these simulations show a considerable effect due to the nonscaling of the electron current paths through the high field region for scaled devices. By enhancing the gate drive this second effect is weakened relative to the identified prime cause. This gate drive dependence of the breakdown behavior is responsible for the difference in cross-overs in the output characteristics of the three simulated devices.

Great care was taken in the experimental verification of the FIELDAY breakdown model. For a best possible fit between experiment and simulation, it was necessary to reduce the mean free paths for electrons and holes by 14 percent over the established bulk values as also suggested by others [ 121, [ 131. The subtle differences that remained can be accounted for by realizing the experimental device is three-dimensional while the simulation is only two-dimensional and the simulation does not include heating ef- fects as are present in the measurement. Finally, as an outgrowth of this work, a new and simple model is devised that can explain the channel breakdown behavior of unscaled devices that differ only in channel length.

ACKNOWLEDGMENT The authors wish to thank R. P. Havreluk very much

for providing the experimental data.

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LAUX AND GAENSSLEN: AVALANCHE BREAKDOWN IN SCALED n-MOSFET'S 1073

the semiconductor physics and devices department. His interests include device physics and modeling, large-scale computing, and applied mathe- matics.

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Documents

A study of channel avalanche breakdown in scaled n-MOSFET's