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8/7/2019 A Rec Ti Fiery Free Piezoelectric Energy Harvester Circuit
http://slidepdf.com/reader/full/a-rec-ti-fiery-free-piezoelectric-energy-harvester-circuit 1/4
A Rectifier-Free Piezoelectric Energy Harvester CDongwon Kwon,Graduate Student Member, IEEE , and Gabriel A. Rincón-Mora,Senior Member, IEEE
Georgia Tech Analog, Power, and Energy IC ResearchE-mail: [email protected], [email protected]
Abstract —Although the benefits of incorporating noninvasiveintelligence (e.g. wireless micro-sensors) to state-of-the-art anddifficult-to-replace technologies are undeniable, micro-scaleintegration constrains energy and power to the point lifetimeand functionality fall below practical expectations, forcingtechnologists to seek energy and power from the surroundingenvironment. To this end, a piezoelectric energy harvestercircuit is proposed. The 2 m CMOS design circumvents theneed for (and losses and low-voltage restrictions associated with)a rectifier by extracting and transferring energy directly fromthe piezoelectric transducer to the battery via a switchedinductor. Simulation results show that the proposed system canharvest 45nJ and 10nJ per period at 71% and 69% efficiencyfrom 3V and 1.5V peak piezoelectric voltages, respectively.
I. HARVESTINGPIEZOELECTRICE NERGY Wireless micro-sensors, biomedical implants, and other miniaturized devices that can add noninvasive intelligencesuffer from limited lifetime performance because the energyand power available in micro-scale sources such as thin-filmLi Ions and micro-fuel cells are insufficient [1]. Harvestingenergy from the surrounding environment in the form of heat,vibration, and/or light is therefore one of the most promisingmeans of overcoming this shortage. Of these, vibration energyfrom piezoelectric materials is appealing because they, likesolar energy, produce moderate power densities, which is notthe case for energy derived from heat, internal lighting, andvibration via electromagnetic and electrostatic means [1-3].
Generally, a harvester system extracts and transfers energyfrom a source to a power cache such as a large capacitor or LiIon so that a load may later draw whatever power it needs ondemand. A piezoelectric material, for example, when affixedto a stationary base (Fig. 1), generates ac charge (and energyEIN) in response to oscillating mechanical displacements (i.e.,energy EME in vibrations) [4]. The harvester circuit conditionsand steers this charge into a battery, trickle-charging it to power and extend the life of electronic devices such aswireless micro-sensors [5].
Fig. 1. Piezoelectric harvester system.
The aim of the harvester is to generate a net energy gainEOUTfrom a small-footprint solution so EIN, energy losses, and printed-circuit-board (PCB) real estate must be as high, low,and small, respectively, as possible. In light of these, SectionsII-III review the state of the art in harvesting microelectronicsand discuss how the proposed piezoelectric harvester circuitoptimally induces more EIN from the piezoelectric device;
employs a tuned, rectifier-free power-efficient switchconverter; and uses only one inductor as the low-loss enetransfer medium. Section IV then presents and discussescircuit designed to achieve these objectives along withsimulation results, drawing conclusions in Section V.
II. HARVESTINGCIRCUITS A. Rectifier Harvesting electrical energy from an ac source like piezoelectric transducer into a dc energy-storage device the Li Ion requires ac-dc conversion, for which diode diode-configured transistor rectifiers are popular. Althodiode and diode-connected transistors (Fig. 2(a)) [6] simple and robust, they require 0.7-1V to conduct current.main problem with this approach is micro-scale piezoelecharvesters produce low voltages (vIN) when constrained tomicro-scale dimensions so the resulting rectifier (Fig. 2can only process a fraction of EIN. Additionally, the forwardvoltage drops (vD) across each diode and diode-connectedevices incur considerable conduction power losses.
Fig. 2. (a) Diode-connected, (b) VT-cancelled, and (c) feedback-enhancedtransistors used in full-wave (d) diode-based and (e) cross-coupled recti
One way of reducing vD is to superimpose a bias voltagvB onto the gate of the MOSFET that effectively cancels drop associated with threshold voltage VT (Fig. 2(b)) [7].Doing so, however, requires processing energy and induhigher off-state leakage current, given the device is on verge of conduction in its off state. Sensing and feedingamplified version of the voltage across the transistor bacthe gate (Fig. 2(c)) also reduces vD [8], except the comparatorused requires energy. Nevertheless, if the comparaconsumes less energy than the conduction energy otherwlost through a more conventional diode, a full-wave rect(Fig. 2(d)) reaps some benefits from replacing its diodes wfeedback-enhanced transistors. Still, satisfying comparator’s input common-mode range, bandwidth, drive requirements with little energy is challenging.
On the other hand, given the ac characteristic of the involtage, cross-coupling vIN’s complementary inputs can driv
This research is supported by Linear Technology Corporation., Milpitas, CA.
978-1-4244-3828-0/09/$25.00 ©2009 IEEE 1085
8/7/2019 A Rec Ti Fiery Free Piezoelectric Energy Harvester Circuit
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and enhance the gates of the rectifying transistors (Fig. 2(e))[6, 9]. Diodes in the positive and negative conduction pathsremain because they must block reverse current, for whichfeedback-enhanced transistors (Fig. 2(c)) may be used. Thetechnique ultimately reduces the number of comparatorsneeded and the losses they incur. Still, the efficiency benefitsassociated with higher output voltage swings do not relax thecircuit’s input voltage requirements, as vIN must exceed VT to
engage the MOSFETs. B. Power Conditioner A rectifier alone cannot charge a battery or generally supply aload because its output voltage is neither flexible nor regulated.As in [10] (Fig. 3(a)), conditioning the rectified outputamounts to inserting a dc-dc converter and regulating itscharging current by modulating the duty cycle of theswitching network. The conditioner and its control circuitry,however, require energy to operate, not to mentionconsiderable excess (i.e., unharvested) energy generated fromvibrations remains in the piezoelectric material’s equivalentcapacitance [13], as the circuit is not able to fully extract it.
C R E C T V
B A T
V B A T
Fig. 3. (a) Feedback and (b) feed-forward power conditioners.
A way to fully deplete the piezoelectric material of itsenergy (and harvest more energy [12]) is to sense its state anddrive whatever current is possible to the battery, as in [11](Fig. 3(b)). The idea is to monitor the rectified voltage, whoselevel is an indicator of how much energy is available, andcontrol a switching converter to transfer all energy present inthe source capacitor (i.e., piezoelectric material) into aninductor so that it may later drive energy into a battery or load.Though the system is now optimized, the rectifier consumesenergy and superimposes input-voltage constraints on the piezoelectric device, which limit energy and integration.
III. PROPOSEDHARVESTER A. System OperationThe objectives of the proposed harvester are to (1) reduce theinput voltage requirements of the rectifier, (2) extract as muchenergy as possible from the piezoelectric material, and (3)reduce the energy lost in the system. One way to reduce thevoltage constraints and energy overhead associated with therectifier is to eliminate the block altogether and connect asmarter conditioner directly to the piezoelectric material, as proposed in Fig. 4. The conditioner is a magnetic basedswitching converter because neither a capacitor-based nor thelinear counterpart can fully deplete the source. What is more,to conform to micro-scale dimensions, the circuit employsonly one off-chip inductor.
V B A T
C P I E Z O
i P I E Z O
L H i L
Fig. 4. Proposed rectifier-free piezoelectric harvester.
The converter offers two energy-flow paths to the out(i.e., battery voltage VBAT): one for positive piezoelectricvoltages (vPIEZO
+) and another for the negative counterpar(vPIEZO
-). In Fig. 4, non-inverting boost converter LHS ND N processes vPIEZO
+, transferring piezoelectric energy to VBAT.Similarly, inverting boost converter LHSIDI processes vPIEZO
-,likewise driving energy to VBAT. A boost converter is used in both cases because |vPIEZO| is below its average Li Ion targeof 3.6V, allowing the harvester to process the lo piezoelectric voltages a rectifier would otherwise be unabhandle.
Each converter operates in alternating cycles, transferrenergy from piezoelectric capacitor CPIEZO to VBAT byenergizing and de-energizing the harvesting inductor LH inalternating phases. For each cycle (positive and negative),harvester extracts all the generated charge in CPIEZO andtransfers to the output. The converter controls the cycles their respective phases by synchronizing them to vPIEZO’s positive and negative peaks. To reduce conduction losfeedback-enhanced switching transistors (Fig. 2(implement D N and DI.
B. Energy Flow and Timing DiagramThe energy-flow paths highlighted on the schematic of Fiand the ensuing timing diagram that results (Fig. 6) illusthe cycle-by-cycle and phase-by-phase operation of proposed harvester. First, at the onset of a positive cycle, I isoff and vibrations charge CPIEZO (i.e., vPIEZO increases) withtransduced energy EC
+ for a duration of τC+. When vPIEZO
reaches its positive peak, SI and S N engage, drawing energyEL
+ from CPIEZOto energize LH for duration τL+, during whichtime vPIEZOdecreases and inductor current iL increases. WheniL reaches its peak, S N disengages, allowing freewheeling D N to steer output energy EB
+ into VBAT for time τB+. Note that inde-energizing LH via SI, LH also energizes CPIEZO, but withnegative charge (i.e., vPIEZO decreases below ground), whichmeans CPIEZOdiverts part of EL+ away from VBAT. The purposeof this investment in CPIEZO is to induce more electricaldamping on the piezoelectric material so that more energy be harvested in the negative cycle [12, 14].
R B A T
V B A T
C P I E Z O
i P I E Z O
L H
R E S R
R S N C
S NE O
U T
Fig. 5. Energy-flow paths and parasitic devices present in the harveste
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8/7/2019 A Rec Ti Fiery Free Piezoelectric Energy Harvester Circuit
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vPIEZO iL
vPIEZOP+
ILP+
vINVESTt
τB+
τC+
τL+
v P I E Z O
, i L
(a)
Energizing C PIEZO
Energizing LDe-energizing L
De-energizing C PIEZO
vPIEZO iL
vPIEZOP-
ILP-
vINVESTt
v P I E Z O
, i L
τB-
τC-
τL-
(b)
Energizing C PIEZO
Energizing LDe-energizing L
De-energizing C PIEZO
Fig. 6. (a) Positive- and (b) negative-cycle timing diagrams.
When iL reaches zero, D N shuts off, disconnecting CPIEZO from all low-impedance points and consequently allowingvibrations to energize CPIEZO with negative charge so thatvPIEZOdecreases further below ground. When vPIEZOreaches itsnegative peak, SI and S N again engage, energizing LH withenergy stored in CPIEZO. When CPIEZO is completelydischarged, SI shuts off, allowing freewheeling DI to channelenergy to VBAT. DI disengages when iL reaches zero, at which point the system is ready for another positive cycle.
The system must only sense and synchronize the circuit tovPIEZO’s positive and negative peaks. Additionally, becauseLHCPIEZO tank requires one fourth its resonant period toenergize LH with CPIEZO’s energy (in τL+ and τL-), thecorresponding switches need only derive its control from adelay block, not a current sensor. Simplifying the control of these switches in this way decreases the total energy lost.C. Energy Losses and EfficiencyEnergy losses through the system fall in one of threecategories: conduction, switching, and quiescent. Parasiticresistances and diode drops through the conduction path, for example, dissipate Ohmic power when iL is non-zero: during positive and negative inductor energizing and de-energizing phases τL+, τB
+, τL-, and τB-. Since iL ramps linearly during LH’s
de-energizing phases, given the voltage across LH is constantat VBAT, iL’s RMS values during positive and negative cyclesare ILP
+/√3 and ILP-/√3, respectively, where ILP refers to peak
currents. As a result, parasitic resistors dissipate RMS lossesand D N and DI, because they drop constant voltages VDN andVDI, dissipate power with average currents 0.5ILP
+ and 0.5ILP-,
the sum of which yields de-energizing positive- and negative-
cycle conduction losses ECD
+
and ECD
-
:( ) +
++
++
+
++≈ B
LPDIB
2LP
BATESR SICD τ2
IVτ3
IR R R E (1)
and ( ) −−
−−
−
+
++≈ B
LPDNB
2LP
BATESR SNCD τ2
IVτ3
IR R R E . (2)
LH’s de-energizing phases τB+ and τB- depend on ILP
+ and ILP-,
which in turn depend on LHCPIEZO’s resonance period duringthe previous cycle and peak voltages vPIEZOP
+ and vPIEZOP-:
++++
+
=
=
≈ L
BAT
PIEZOP
BAT
PIEZOPPIEZOH
BAT
LPHB τ
Vv
π2
VvCL
VILτ (3)
and −−−−
−
=
=
≈ LBAT
PIEZOP
BAT
PIEZOPPIEZOH
BAT
LPHB τ
Vv
π2
VvCL
VILτ . (4)
Although iL is sinusoidal through LH’s energizing phases,given LHCPIEZO’s resonance, a linear approximation producsufficiently accurate results so iL’s RMS values remainunchanged and the resistors dissipate similar positive negative energizing conduction losses ECE
+ and ECE-:
( ) ++
+
++≈ L
2LP
SNESR SICE τ3
IR R R E (5)
and ( ) −−
−
++≈ L
2LP
SNESR SICE τ3
IR R R E , (6)
where LH’s energizing phases τL+ and τL-, as stated earlier, are
one fourth LHCPIEZO’s resonance period. Parasitic capacitances in the switches also require energ
charge and discharge. In the proposed harvester, transisengage and disengage only once per vibration period so t
switching gate-drive loss ESGD is the linear sum of theconstituent one-time CV2 losses. Because SI, DI, and D N’s gatecapacitances CSI, CDI, and CDN transition supply voltage VBAT and S N’s gate capacitance CSN transitions 2VBAT, ESGDreducesto ( ) 2
BATDN2
BATDI2
BATSN2
DDSISGD VCVC2VCVCE +++= , (7)
where gate capacitances depend on transistor dimensions.Ultimately, system efficiency is the ratio of harves
energy EOUT to input piezoelectric energy EIN, the former of which is EIN minus all the aforementioned losses, includithe quiescent energy (EQ) required to control the circuit:
IN
QSGDCIN
IN
OUTE
EEEEE
Eη−−−
== , (8)
where EC includes all conduction losses ECD+, ECD
-, ECE+, and
ECE-. EIN is the mechanically transduced energy i piezoelectric capacitance CPIEZO, which can be described interms of vPIEZOP
+ and vPIEZOP-:
( ) ( )2PIEZOPPIEZO
2PIEZOPPIEZOIN vC
21vC
21E −+ += , (9)
where the absolute value of vPIEZOP- equals the sum of the
absolute value of vPIEZOP+ and the absolute value of vINVEST,
the latter of which can be derived by dividing the divercharge during τB
+ by CPIEZO:
+−=−−≈
++
+++−
BAT
PIEZOPPIEZOP
PIEZO
BLPPIEZOPPIEZOP V2
v1vC2
τIvv . (10)
IV. CIRCUIT ANDSIMULATIONR ESULTS Fig. 7 illustrates the CMOS circuit embodiment of the sys proposed in Fig. 4. The 100 H inductor with 3.4 seresistance emulates a 3x3x1.5mm3 off-chip inductor. Back-to- back transistors implement SI and S N because their otherwiseunblocked body diodes would conduct current away from tintended destinations (i.e., lose energy). To reduce EQ, DI andD N’s sensing comparators remain off (i.e., lossless) ucurrent reaches their respective negative input terminduring which time the rising voltage enables the comparat
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keeping them engaged only through τB+and τB-, which will be
very short, and therefore consume less energy.
3 . 4
1 0 0 m
V B A T
C P I E Z O
R P I E Z O
1 0 0 µ H i L
1 M
6 n F
R E S R
L H
R B A T
2 0 0 0 µ m
2 µ m
3 0 0 0 µ m
2 µ m
I P s i n ( 2 π 1 0 0 t )
I P = 1 .
5 - 6 A
Fig. 7. Circuit embodiment of the proposed harvester system.
Fig. 8 illustrates simulation results showing the harvestedenergy (EOUT) over multiple 10ms vibration periods (TVIB).EOUT increases twice with every period in stepwise fashion because charge is momentarily driven into VBAT only duringLH’s two de-energizing phases (τB
+ and τB-). As a result, EOUT increases at rates of 45, 10, 4, and 1.5 nJ per period under piezoelectric peak voltages of 3, 1.5, 1, and 0.75 V,respectively. It is important to note that the quiescent energyloss of the peak detection block is not included in thesesimulation results. In fact, results show that the peak detection block should consume no more than 1.5nJ per period to produce a net energy gain from slow (e.g., 100Hz), low-amplitude (e.g., vPIEZOP
+ is 0.75V) low-energy vibrations.
E O U T
[ n J ]
Fig. 8. Simulation results showing energy harvested.
TABLE I. THEORETICAL AND SIMULATED ENERGY LOSSES PER PERIOD.
vPIEZOP+=0.75V v PIEZOP
+=1.5V v PIEZOP+=3VEnergy [nJ]
The. Sim. The. Sim. The. Sim.E IN 3.72 3.86 16.3 16.0 72.7 67.2
SI & S N’s E C 0.70 0.68 2.42 2.41 10.25 11.5R ESR & R BAT ’s E C 0.10 0.17 0.5 0.72 2.89 3.29
D I & D N’s E C 0.05 0.20 0.49 0.60 4.43 3.21SI & S N’s E SGD 1.20 0.83 1.34 0.77 1.64 0.66D I& D N’s E SGD 0.16 0.23 0.16 0.20 0.16 0.19
D I & D N’s cp’s E Q 0.20 0.19 0.4 0.3 0.5 0.57E OUT 1.31 1.56 11.0 11.0 52.8 47.8
η [%] 35.2 40.4 67.4 68.8 72.6 71.1
Table I tabulates the theoretical (as derived from the previous section) and simulated losses and resultingefficiencies through the system. Efficiency increases with EIN
(and EOUT) from 35% to 71% because conduction losses scwith EIN (and EOUT) and switching gate-drive losses do not. other words, efficiency performance increases with risingIN (and EOUT) values and peak piezoelectric voltages vPIEZOP.
V. CONCLUSIONS The proposed piezoelectric CMOS harvester circuit produ45, 10, 4, and 1.5 nJ from peak piezoelectric voltages 3, 1and 0.75V at efficiencies of 71, 69, 58, and 40%. The features of the design are simplicity and scalability, a bypasses the input-voltage requirements and saves the eneand silicon real estate associated with an ac-dc rectifieraddition to only using one off-chip inductor. The system invests (and recovers) some of its energy to increase electrical damping during negative piezoelectric voltaultimately increasing the overall energy extracted during phase and scavenging all the energy available in piezoelectric material. The significance of harvestingavailable energy with low piezoelectric voltages is micro-sintegration because the market space wireless micro-senenjoy in biomedical, commercial, industrial, military, space applications may be as vast as the cellular phone’snot larger.
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