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2013 3rd International Conference on Electric Power and Energy Conversion Systems, Yildiz Technical University, Istanbul, Turkey, October 2-4, 2013
A Novel Single-Phase Soft Switching Microinverter
for Photovoltaic Applications
Saad Pervaiz, Muneeb Ur Rehman, Ahmed Bilal Asghar, Nauman Zaffar SBA School of Science & Engineering, LUMS
Email: (saad.pervaiz.muneeb.rehman.bilal.asghar.nauman.zaffar)@lums.edu.pk
Abstract-Microinverters provide a direct way to integrate an individual PV panel to the AC grid. We introduce a novel microinverter design comprising a high frequency full-bridge converter, a pseudo dc link filter, and a line commutated inverter. The approach is well matched to the requirements for high efficiency DC to AC grid-tied and stand-alone converters. We present a detailed working analysis of the proposed design in continuous, boundary, and discontinuous conduction mode. We also show that our design enables reduced device losses, flexible control, and low current harmonic distortion. We present a soft switching scheme for the high frequency full bridge converter stage. Results for design simulation in PSIMT M and implementation in hardware are presented.
Index Terms-Module integrated converter, photovoItaic, fullbridge, soft-switching.
I. INTRODUCTION
Photovoltaic (PV) provide a clean source of energy and are
capable of satisfying our growing electricity demand. They are
expected to become major contributor to electricity generation
among all renewable energy candidates by 2040 [1]. Grid
parallel inverters are a key component required to integrate PV
systems in electric grid. Various inverter system architectures
have been studied for PV applications over the course of past
few decades [2], [3], [4]. One approach to PV integration is the
use of module integrated converters or microinverters. These
converters provide a direct way to integrate an individual PV
panel to the AC grid. Such integration allows MPPT of indi
vidual solar panels which yields greater energy extraction than
centralized MPPT of series-connected string of PV modules
[5], [6]. Microinverters also provide system scalability and
better performance in partially shaded regions [7].
Multiple microinverter topologies are possible depending
upon the dc link configuration. These topologies are classified
in three different arrangements [6]:
• Microinverter with a DC link
• Microinverter with a pseudo DC link
• Microinverter without a DC link
A micro inverter interfaced with a single PV panel needs
to provide high voltage transformation under varying input
voltage conditions. A single PV panel provides a low voltage
(20-40 V) at input which needs to be transfonned to AC grid
voltage (220 V, rms). In such applications, efficiency, size and
cost are the driving design considerations for microinverters.
High efficiency can be achieved through soft switching and
reduced reverse recovery losses in rectifier diodes. Cost of in
verter is proportional to the size of energy storage components
Yin ±
Full· bridge Converter Line Com mutated Inverter
Fig. 1. Proposed DC-AC Inverter Design
and transfonner. High switching frequency design is one way
to bring down the size and cost of inverter.
In this paper, we investigate a microinverter based on the
architecture of Figure 1, comprising a high frequency full
bridge converter, a pseudo dc link filter, and a line cOlmnutated
inverter. Similar general architectures ([8], [9]) have long
been known but this specific design has not been explored
in previous work (e.g. see topology review in [3], [4]). We
propose a novel design that reduces device losses, enables
flexible control, and low current harmonic distortion. All
switching devices operate under zero voltage/zero current
switching enabling high efficiencies to be achieved. A trailing
edge pulse width modulation scheme is employed for the high
frequency full bridge converter stage.
Rest of paper is organized as follows: Section II provides
converter design and working. Section III and IV provide
simulation and experimental results to validate the working of
proposed converter. We conclude in Section V by discussing
the benefits of our inverter design.
II . PROPOSED DC-AC INV ERTER
A. Design The proposed inverter topology consists of a full bridge con
verter cascaded with a line commutated inverter, as illustrated
in Figure 1. The design consists of an active H-bridge, S 1-
S4, on the low voltage side of a transformer 'T'. A full-wave
rectifier, D5-D8, on the high voltage side of the transformer
is cascaded with another active H-bridge, S9-S12, which is
connected to the grid supply. The body diodes, D I-D4, of
MOSFETs, S I-S4, are explicitly shown. Cin and C1 are filter
capacitors at the input and pseudo DC link respectively. V in
978-1-4799-0688-8/13/$31.00 ©2013 IEEE
2013 3rd International Conference on Electric Power and Energy Conversion Systems, Yildiz Technical University, Istanbul, Turkey, October 2-4, 2013
and V 9 mark the input PV voltage and grid supply at output
respectively.
B. Working & Analysis
The proposed converter, shown in Figure 1, consists of two
stages: boost full-bridge stage and line commutated inverter
stage. The full-bridge stage operates at high frequency and pro
duces a rectified sinusoidal PWM waveform which is filtered
by the pseudo-dc link capacitor. This stage is responsible for
providing the required boost in dc voltage for grid integration.
The second stage operates at line frequency (50/60 Hz) and
opens the rectified output waveform of previous stage. Since
this stage operates at line frequency which is much smaller
than operating frequency of first stage (2:: 40 kHz), we can
divide the inverter operation into two steps; positive half cycle
of grid voltage during which S5 and S8 are closed and negative
half cycle during which S6 and S7 are closed. Without any loss
of generality, complete inverter operation can be explained by
just considering the positive half cycle of grid voltage and the
working principle of full-bridge converter during this cycle.
PWM waveforms for the operation of full-bridge converter
are given in figure 12. In this scheme, the lower switches
(S3, S4) are operated at fixed (50%) duty cycle while the top
switches (S I, S2) are trailing edge pulse width modulated.
The converter produces a sinusoidal PWM waveform which
is rectified and filtered at the pseudo-dc link stage. At this
link, a rectified line frequency AC waveform is produced. We
can assume the converter to be operating as a dc-dc converter
for small signal analysis since the operating frequency of full
bridge converter is much higher than line frequency (in other
words change in line frequency waveform is approximately
very small when viewed at 2:: 40 kHz operating frequency of
full-bridge converter).
The full-bridge converter can be operating in Continu
ous Conduction Mode (CCM), Boundary Conduction Mode
(BCM) or Discontinuous Conduction Mode (DCM). The cir
cuit operation in CCM, BCM, and DCM depends on the value
of duty cycle. Duty cycle is a function of output load, however
in our proposed technique, the duty cycle also depends on
grid voltage at output and therefore varies continuously as it
is being modulated by the grid voltage. Using steady state
analysis, it can be shown that converter might be working
in CCM, BCM and DCM during one complete cycle of grid
voltage, even for a fixed amount of output power delivered.
The converter operation can be divided in three operat
ing intervals for positive half cycle of grid voltage. These
intervals are determined by the on/off states of the four
primary switches (S I-S4). During the negative half cycle
of grid voltage, the operation of full-bridge stage remains
unchanged while the line commutated inverter flips the states
of diagonal bridge switches. In the analysis that follows,
MOSFET switches have been modeled with parallel diodes
and parasitic capacitances. The transformer leakage inductance
is shown explicitly, as it is fundamental to circuit operation.
Gl
G4
G2
G3
D
�
D
- Vin
r------I--.......
� l..---I--to t1 t2 t3 t4
(a) Continuous Conduction Mode
Gl
G4
G2
G3
D
f :
I---
V
--- Vin
� to t1
� p==.-
I---
I--
I� V t2 t3 t4
(b) Discontinuous Conduction Mode
tS t6
tS t6
Fig. 2. PWM Gate Signals (GI-G4) of Switches (Sl-S4), Voltage waveform across transformer primary winding, and current through leakage inductance of transformer in CCM & DCM mode
The detailed circuit operation in all three modes is as
follows:
[to-tl] - Energizing Leakage Inductance
to-tl marks the period when S 1 and S4 are closed till the
opening of Sl. In this time period voltage, Yin, appears
across the primary side of the transformer and a current
starts building in the leakage inductance. The corresponding
secondary current completes its path through the grid/load and
thus transfers power to the output. The path of current for this
time period is shown in Figure 3. During this interval, current
builds in the leakage inductance and power is transferred to
output. The circuit operation is similar in CCM, BCM, and
DCM for this interval.
[tl-t2] - De-energizing leakage inductance
During tl-t2, switch S I is opened while S4 remains closed.
Since the current at the primary cannot stop instantly due
to transformer leakage inductance, the inductor current dis
charges switch S3 capacitor until diode D3 is turned on and
makes an alternate freewheeling path. During this time interval
2013 3rd International Conference on Electric Power and Energy Conversion Systems, Yildiz Technical University, Istanbul, Turkey, October 2-4, 2013
+ DS
'--_---' '--rrrr.----=-l.: N
S3
)7 D8
Fig. 3. [to-tIl - Energizing Leakage Inductance
+ DS
v,
)7 D8
Fig. 4. [tl-t2] - De-energizing leakage inductance
rv Vgrid
the input is disconnected, therefore current dies out as energy
stored in leakage inductance is transferred to the output. The
circuit operation differs depending on the conduction mode
(CCM, BCM, DCM). In CCM and BCM, the current is still
non-zero at the end of this interval; therefore a corresponding
current is flowing through the secondary side as well. In
DCM, the inductor is completely de-energized and the current
becomes zero before the end of this interval. This interval ends
when S4 is opened.
[t2-t3] Dead band mode
This mode begins when S4 is opened at time t2. In DCM, the
current is already zero so this interval is not eventful for DCM.
However, in CCM the current through the leakage inductance
is not zero. So the inductor current discharges capacitor C2
and turns diode D2 on. The current flows through D3 and D2
during this interval. The rectifier current on secondary side is
zero as there is no current through the primary winding of
transformer. Therefore no power is transferred to the output
during this mode. The circuit operation is similar in BCM as
compared to CCM, however the current becomes zero at the
end of this interval in BCM.
[t3-t6] Complementary Intervals
These intervals are similar in operation to those of [to-t3].
The transformer leakage inductance is energized in opposite
direction as compared to the first interval [to-t1]. Complimen
tary diagonal rectifier diodes are turned on during these three
intervals.
The full-bridge converter DC gain in DCM and BCM is
given by equation 1 and 2, respectively. These equations have
been derived in [10]. Here n is the transformer turn ratio, D
is the duty cycle of top switches (S 1, S2), k is the normalized
time constant of the converter, L is the leakage inductance of
)1
Fig. 5. [t2-t3] Dead band mode
+
Dil
transformer, R is the load resistance corresponding to current
delivered to the grid, and T s is switching period.
Vo 2n MDCM = - =
--V-===4=k Yin
1 + 1 + D2
The normalized time constant of converter is given by:
4n2L
(1)
(2)
k = RTs
(3)
C. Device stresses and Switching Losses
All full-bridge converter switches are zero voltage turned
off due to the drain-to-source capacitance of the MOSFET
switches. So turn off losses for all the switches are minimal.
Furthermore, in discontinuous conduction mode, during the
interval tl-t2, the inductor current falls to zero so all the
switches turn on at zero current. The switches S3 and S4 turn
off at zero current in DCM. In CCM, all the switches achieve
zero voltage switching.
The line comrnutated inverter stage has minimal losses due
to following reasons:
• It is being switched at line frequency. So the switching
losses are negligible.
• The switching takes place at zero crossings of the grid
voltage/current. The voltage at dc-link is very small (close
to OV). Therefore the switching takes place at very low
voltage.
At turn on, the only losses are the conduction losses that can
be reduced by using devices with low on resistance or by
paralleling switching devices.
I I I. RESULT S
The proposed design was validated in simulation exper
iments and hardware prototype testing. The converter was
designed to meet the specifications given in Table I. The
components used in making hardware prototype are listed in
Table II.
2013 3rd International Conference on Electric Power and Energy Conversion Systems, Yildiz Technical University, Istanbul, Turkey, October 2-4, 2013
Pseudo DC link
DC Full bridge Full wave rectifier Unfolding h-bridge Grid "v
Grid Voltage
x)-------'--------'------------' Current demand constant
Fig. 6. Block Diagram of Feedback Control Blocks for Proposed Converter
TABLE I SIMULATION AND HARDWARE CONVERTER DESIGN SPECIFICATIONS
No. Parameter Value
1 Input Voltage (DC) 20-40 (V )
2 Output Voltage (AC) 220 (V rms)
3 Rated Output Current 2.8 A
4 Rated Output Power 600 W
5 Switching Frequency (FuU-bridge) 48 kHz
TABLE II COMPONENTS USED IN HARDWARE PROTOTYPE
Component Part #
MOSFET (Low Voltage side) IRF3710
MOSFET (High Voltage side) IRF740
Power Rectifier Diodes RHR15120
Input Filter Capacitor 10,000 uFIlOO V
Pseudo-dc Link Capacitor 7.5 J.LF
Transformer Ferrite Core (L=2.5 J.LH)
A. Simulation Experiments PSIMT M was used for simulating the proposed converter
design. The model parameters used in simulation were actual
component parameter that are given in table II. The simulation
was done both for stand-alone and grid tied system. Here,
we discuss the results for grid connected circuit simulation.
Feedback control for grid connected operation is shown in
figure 6. A number of test case experiments were done in
simulation experiments.
We varied the input voltage to see the behavior of inverter.
Figure 7 shows the output current waveform of the inverter
at an input voltage of 26 V. The converter was operating in
grid-parallel mode in this simulation experiment. Figure 8 and
9 show similar waveforms for input voltage of 30 V and 36 V
respectively. The output current was fixed at 2 A in all three
cases. % THD of the current fed to the grid was less than 4%
even in all experiments.
We also changed the output current fed to the grid during
3 -------------�-------------�------------, , , ,
-3 - - ------- - ---�--- - ------- - -:_----- - -------:_------- - -----, , , 0.0 1 0.02
T i m e (s) 0.03 0.04
Fig. 7. Test Case 1: Input Voltage 26V; Output Current 2 A; Grid Voltage 220 V
3 -------------�-------------�-------------�-------------
� 1
� 0
8 ·1
, , , , , ,
-3 -------------:--------------:--------------;.. -------------, , , 0 .01 0.02
T i me(s) 0.03 0.04
Fig. 8. Test Case 2: Input Voltage 30V; Output Current 2 A; Grid Voltage 220 V
online operation. Output current could be changed at zero
crossings to minimize current THD. Figure 10 shows the
results for output current change. The smooth transition in
output current shows the agility of feedback loop.
B. Hardware Prototype A 600 Watt prototype, of the proposed converter, was made
to validate the working of proposed converter topology and
control scheme. The components values are listed in Table II.
MOSFETs are used in the line-commutated stage because of
the low power levels, ease of control and low conduction losses
as compared to thyristors. The hardware prototype picture is
shown in figure 11.
The prototype inverter was built and tested for stand
alone systems. The predicted and simulated waveforms were
confirmed. Some of the operating waveforms are given in
2013 3rd International Conference on Electric Power and Energy Conversion Systems, Yildiz Technical University, Istanbul, Turkey, October 2-4, 2013
3
� 2
'p' C � 0 ... 8 -1
-2 -3
o
I I I I I I - - - - -� - - - - -,- - - - - -.- - - - - -.- - - - -, - - - - - T -----I I I I I I
0.01 0.02 T i me (s )
0.03
Fig. 9. Test Case 3: Input Voltage 36V; Output Current 2 A; Grid Voltage 220 V
, , , 3 ··············;. ·············· T ·------------- ,. --------------
$1 c: 0 � (3 -1
, , , , , , , ,
0.01 0.02 Time(s)
0.03 0.04
Fig. 10. Test Case 4: Output Current changed from 2.8 A to 2 A; Input Voltage 30V; Grid Voltage 220 V
Figure I2(b) and I2(a). The voltage waveform at pseudo dc
link is shown in figure I2(a). The experimental results of
converter are given in stand-alone and open loop configuration
with a first order filter. Because of the absence of the control
loop, the pseudo-dc link voltage is not sinusoidal. The output
current and voltage waveforms are shown in figure I2(b).
IV. CONCLUSION
A new design topology and control scheme is proposed for
a grid-tied photovoltaic micro inverter. The proposed inverter
can be utilized in grid-tied and stand-alone configurations for
PV systems. The topology is based on a high frequency full
bridge converter, a pseudo dc link filter, and a line commutated
inverter. The operational characteristics of the converter are
analyzed in detail for continuous, boundary, and discontinuous
conduction mode. A soft switching technique is presented for
the proposed converter. Simulation and experimental results
are demonstrated for proof-of-concept design specifications.
REFERENCES
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Fig. 11. Hardware Prototype
(a) Voltage waveform at pseudo dc-link (100 VI division)
(b) Yellow: Output Voltage (scale 100 V I division); Blue: Output Current (Sensed via 0.1 Resistor) (scale 2 A I division)
Fig. 12. Hardware Prototype Results
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