A New Modulation Strategy For The Grid ConnectedCascaded Multi-Level PV Inverter To Minimize The

Leakage Current1Venu Sonti 2Sachin Jain 3Subhashish Bhattacharya

Department of Electrical Engineering Department of Electrical Engineering Department of ECENational Institute of Technology-Warangal National Institute of Technology-Warangal North Carolina State University

Warangal-506 004, INDIA Warangal-506 004, INDIA Raleigh- 27695, USAEmail: venu312@nitw.ac.in Email: jsachin@nitw.ac.in Email: sbhatta4@ncsu.edu

Abstract— This paper presents a new pulse width modulation(PWM) technique for the minimization of leakage current in thetransformer-less grid connected photovoltaic (PV) invertersystem. The proposed PWM technique is applied to cascadedMulti Level Inverter (MLI) which has the advantages likerequirement of reduced number of switches, high efficiency, lowcost etc. The other advantage of proposed PWM technique is thatit minimizes the leakage current of PV panels without addition ofany extra switches. Also, the proposed PWM technique requiresreduced number of carrier waves when compared to theconventional sinusoidal pulse width modulation technique(SPWM) for the given MLI. Complete details of the workingprinciple with simulation and experimental results for theproposed PWM technique are presented in this paper.

Keywords— Cascaded multilevel inverter, leakage current,pulse width modulation technique.

I. INTRODUCTION

Photovoltaic (PV) systems are popular now-a-days due totheir renewable, zero maintenance and zero pollution nature.Also, PV systems requires sunlight which is abundant intropical countries like India for production of electricity. ThePV systems are mainly classified into two types: the gridconnected systems and the standalone systems. In the gridconnected PV systems, the generated PV power is fed into grid.For the standalone systems, the generated PV power meets therequirement of independent or standalone load. Again, the gridconnected PV systems can be further classified based oninclusion or non-inclusion of transformer in the grid system.Presence of the transformer in the system provides galvanicisolation between the two sources. In the category withinclusion of transformer can be in the form of high frequencylink or low frequency link between inverter output and the grid[1-3]. The configuration with high frequency link usuallyrequire more than two stages which effects the efficiency ofsystem. For configuration with low frequency transformersuffers with disadvantage of high losses, weight and cost. Toovercome these drawbacks in grid connected system,transformer-less PV inverters were proposed [4-6]. Thetransformer-less PV systems have all the advantages related toweight, size, loss and cost but they do not provide any galvanicisolation between the grid and PV panel. This had led todevelopment of safety standards like VDE 0126-1-1, IEEE1547 etc. One such standard VDE 0126-1-1 limits the leakage

current between PV cell and frame. Because of dielectricbetween the PV cell and frame, a parasitic capacitance isformed in the PV panel. A leakage current flows through theparasitic capacitor if there is voltage transient at PV terminals.The leakage current creates many issues related to the safety ofthe person touching the PV module, degrades the panelcharacteristics etc. [7]. To minimize the leakage current manytransformerless inverter topologies like HERIC, H5, H6 wereproposed. The leakage current in the PV systems is minimizedmainly by reducing the high frequency noise at the PVterminals by modifying the PWM technique.

This paper presents a new PWM strategy for the cascadedfive level inverter which minimizes the leakage current in thegrid connected PV system. The proposed PWM techniquereduces the leakage current by decreasing the rate of change ofhigh frequency transitions in the common mode voltage. Theproposed PWM technique requires only two carrier waves forgeneration of PWM pulses for five level inverter. Themanuscript is divided into six sections. Section II gives thedetail related to operation of cascaded five level MLI. SectionIII describes the PWM strategy proposed for the minimizationof leakage current. Section IV deals with the analysis of thecommon mode voltages in the cascaded MLI with conventionalSPWM and proposed modulation techniques. Sections V andVI shows the simulation and experimental results of cascadedfive level MLI with conventional SPWM and proposed PWMtechniques.

II. OPERATION OF CASCADED FIVE LEVEL MLI

The circuit schematic of single phase grid connectedcascaded five level MLI [8] is shown in Fig. 1, where the fivelevels inversion is achieved by cascading a modified halfbridge with the full bridge inverter. The positive, negative andzero levels of the states VPV and VPV/2 are generated by usingfull bridge inverter. The modified half bridge in the systemconsists of the switch S1 and bi directional switches S2 and S3

which are used to generate the voltage states VPV and VPV/2.The switches S2 and S3 in the half bridge are operatedsimultaneously. There are three pairs of complementaryswitches (S1, S2 (S3)), (S4, S5) and (S6, S7). The switchingstates and their respective voltage levels are shown in table I.The filter taken for the configuration [9] have two separatepaths: one path is used to filter the switching ripple at 10kHz

Fig. 1 Single Phase five-level grid connected cascaded MLI.

TABLE I. SWITCHING STAES AND THEIR RESPECTVE VOLTAGE LEVELS

S1 S4 S6 Phase voltage level

1 1 0 + VPV

0 1 0 + VPV/2

0 1 1 0

0 0 1 + VPV/2

1 0 1 + VPV

and the other path through the damping resistor is used todamp out the load and supply induced resonances.

III. PROPOSED PWM STRATEGY FOR MINIMIZATION OF THE

LEAKAGE CURRENT

In the proposed PWM technique, the complementaryaction of switches S1 and S2 (S3) in the half bridge inverter isremoved. With the removal of the complementary action,during zero state the PV source is isolated from the grid andthere is no closed path for the PV panel leakage current toflow. This case is similar to a H5 inverter topology. Fig. 2shows the operation of inverter during zero state.

Fig. 2 Operation of inverter during zero state.

Apart from zero state as described above, there is furtherpossibility for leakage current to flow when there is switchingbetween the states VPV/2 to VPV. Thus to minimize leakagecurrent, switching between the states VPV/2 to VPV is avoidedand switching is made between the states 0 to VPV/2 and 0 toVPV. To accommodate the VPV bus voltage change inswitching between states VPV to 0, the modulation strategywas modified as shown in fig. 3. The magnitude of modifiedreference wave is reduced to half when the switching statechanges from 0 to Vpv. Thus, the given PWM includes zerostate vector instead of Vpv/2 to minimize the leakage current.

The expression for modified reference wave is shown in theeqn. 1.

aref ref

ref_modifiedref a

ref a

mV for 0 < |V | <

2V =V m

for < |V | < m2 2

(1)

where Vref = maVPV sinωt

0

0.5

-0.5

01

01

01

01

S1

S2 & S3

S4

S6

wt

wt

wt

wt

wt

Modified reference waveCarriers waves

Fig. 3 Modified reference wave and the switching strategy of the proposedmodulation technique.

IV. ANALYSIS OF COMMON MODE VOLTAGES IN THE FIVE

LEVEL INVERTER

To analyze leakage current in the cascaded five levelinverter, the expressions for the common mode voltage of theboth PV sources are derived using the switching functions.The expression for the common mode voltage between nodesP and G is given by,

g PV 4 6PG 1

4 1 6 1

PVg 4 6

PV2 3

4 2 3 6 2 3

E +V 2-S -SV = S

S S -1 +S S -1 +2

VE + 2-S -S V2 + + S S

S S S -1 +S S S -1 +2 2

(2)

The expression for the common mode voltage betweennodes O and G is given by,

g PV 4 6 PVOG 1

4 1 6 1

PVg 4 6

2 34 2 3 6 2 3

E +V 2-S -S VV = - S

S S -1 +S S -1 +2 2

VE + 2-S -S

2 + S SS S S -1 +S S S -1 +2

(3)

where Sx, x=1, 2,..6 are the switching states of the switcheswhose value is 1 if switch is ON else 0.

S1

S2

S3

S4

S5

S6

S7

L2

R2

R2

LT

C1

RT RD

C2

Vac

Ig

RG

P

O

N

VPV

2

+

-

VPV

2

+

-

2RP

2RP

VOG

VPG

+

+

-

-

Ileak

Ileak

CP2

CP2

Lf2

Lf2

L2 G

AB

S1

S2

S3

S4

S5

S6

S7

P

O

N

AB

VPV

2

+

-

VPV

2

+

-

0

200

400

-200

0

200

VPG

VOG

Fig. 4 Waveforms of common mode voltages formed by using switchingfunctions for the cascaded five level with the conventional sine PWMtechnique (Discontinuity in the waveforms is due to existence of indefinitestates in the expression).

Fig. 4 shows the waveforms of common mode voltageformed using switching functions for conventional SPWMtechnique. With the conventional SPWM technique, thenumber of transitions in the common mode voltages are moreso that a high frequency switching ripple is present in thecommon mode voltage. As the PV panel parasitic capacitanceoffers low impedance to these high frequency switchingripple, the magnitude of leakage current is high in case ofconventional SPWM technique. But with the proposed PWMtechnique, the number of transitions within one cycle of gridvoltage in the common mode voltages are less so that there isno high frequency switching ripple. The parasitic capacitancein the PV panel offers high impedance so that the magnitudeof leakage current flowing is les in case of proposed PWM.The waveforms of common mode voltage formed usingswitching functions for proposed PWM is shown in fig. 5. Forobtaining the waveforms of VPG and VOG in the figs. 4 and 5,the values of VPV=250V, Eg= 162.63 V and Fg= 50 Hz aretaken. Also, the proposed strategy can be applied to higherorder multi-level inverter when used with grid tie PV systems.

0

200

400

-200

0

200

VPG

VOG

Fig. 5 Waveforms of common mode voltages formed by using switchingfunctions for the cascaded five level with the proposed modulation technique(Discontinuity in the waveforms is due to existence of indefinite states in theexpression).

V. SIMULATION RESULTS

The simulation of the proposed modulation technique wasconducted in the MATLAB/ SIMULINK environment. The

TABLE II. PARAMETERS USED IN THE SIMULATION OF CASCADED MLI

Parameter Value Parameter Value

P 5000W Lf 4mH

VPV 250V C1 2µF

Fsw 10KHz RT 50mΩ

Eg 162.63V LT 900µF

Fg 50Hz C2 0.329µF

L 1.4mH Rd 2Ω

R 0.01Ω Rp 0.01Ω

Rg 0.1Ω Cp 10nF

SPWM and proposed PWM technique were applied to thefive level inverter configuration. The parameters used in thesimulation for proposed system are given in the table II.

To pump active power ‘P’ into the grid, the inverter needsto generate a voltage Vr with an angle δr. The magnitude ofangle δr and voltage Vr can be calculated as

g fr 2

g

2Πf L +L Pδ =arctan

E +RP

(4)

r gg r

RP 1V = E +

E cosδ

(5)

A system with P=5KW, then Vr = 233V and δ=0.158 rad wasconsidered.

Fig. 6 show the simulation results of cascaded five levelMLI with conventional SPWM technique. The sub plot (a) offig. 6 shows the five level inversion in output voltage of theinverter with the change in levels from 0 to Vdc/ 2 andVdc/2 to Vdc. The common mode voltage of top and bottomDC sources are shown in the subplot (c) and (d) of fig. 6. Itcan be observed that a high frequency switching ripple ispresent in the common mode voltage due to the conventionalSPWM technique. With the conventional SPWM technique,the magnitude of leakage current is around is 0.2 Amps whichis shown in the subplot (e).

The simulation results of the cascaded five level MLI withproposed PWM technique is shown in fig. 7. The sub plot (a)in fig. 7 shows the five level inversion in output voltage of theinverter with the change in levels from 0 to Vdc/ 2 and 0 to Vdc.It can be observed that there is no high frequency switchingripple in the common mode voltage of top and bottom DCsources which was observed from subplots (c) and (d) offig. 7.

From the subplot (e) of fig. 7, the magnitude of leakagecurrent is around 0.1 Amps. The value is less than the standardVDE0126-1-1 standard. The FFT analysis of common modevoltage of the cascaded five level inverter with conventionalSPWM and proposed PWM technique is shown in Fig. 8. It

0

250

-250

VA

B(V

olts

) (a)

0

-25

25

I g(A

mps

) (b)

0

200400

-200

(c)

VP

G(V

olts

)

0

200

-200

(d)

VN

G(V

olts

)

400

0.080.06 0.1

0.2

0.4

0

- 0.2

- 0.4

(e)

I lea

k(A

mps

)

Time (Sec)

Fig. 6 Simulation waveforms of cascaded five level inverter with conventionalSPWM technique (a) Output voltage (b) Grid current (c) Voltage between topPV source and ground (d) Voltage between bottom PV source and ground (e)Leakage current in the parasitic capacitance.

can be observed that high frequency components are absentin the proposed PWM scheme so the magnitude of leakagecurrent is less. The parasitic capacitor in the PV panel forms aresonance circuit with the filter, inverter and impedance of thegrid and the expression for that resonance frequency is givenby

r

f P

1f =

12Π (L +L)C

4

(6)

In our case the resonance frequency is around 43.316 kHz.At this frequency the circuit offers minimum impedance sohigh current will flow. But with the proposed PWM techniquethere is no ripple even at resonant frequency. The totalharmonic distortion of the grid current in both cases meet thestandard IEEE 1547.

VI. HARDWARE RESULTS

To validate the proposed PWM technique, a prototype modelwas developed in the laboratory. The modulation techniquewas implemented using DSP processorTMS320F28335. TheMOSFETs AOT10T60PLF were used as switching device and theIC HCPL316J is used for driving these switches. For thehardware implementation, resistive load was considered instead

-250

0

250(a)

VA

B(V

olts

)

(b)

0

-25

25

I g(A

mps

)

100

200

300

0

(c)

VP

G(V

olts

)

-100

0

100

200(d)

VN

G(V

olts

)0

0.1

0.08 0.10.06

(e)

Time (sec)

-0.1

I lea

k(A

mps

)

Fig. 7 Simulation waveforms of cascaded five level inverter with proposedPWM technique (a) Output voltage (b) Grid current (c) Voltage between topPV source and ground (d) Voltage between bottom PV source and ground (e)Leakage current in the parasitic capacitance.

100e3Frequency

0 20e3 40e3 60e3 80e30

20

40

60

80

100

Mag

nit

ude

0

20

40

60

80

100

120

100e3Frequency

0 20e3 40e3 60e3 80e3

Mag

nit

ude

(a) (b)

Fig. 8 FFT analysis of common mode voltage of the cascaded five levelinverter with (a) conventional SPWM technique (b) proposed PWMtechnique.

of grid. The parameters used in experimental setup is shown intable III. All the waveforms are taken using TektronixTDS2024b oscilloscope and the programmable DC sourceTDK LAMBDA ZUP120-1.8 is used for DC supply. Fig. 9shows the experimental setup for the measurement of leakagecurrent. The PV panel positive and negative leads are shortedand connected to node ‘P’ of inverter. The node ‘G’ ofinverter is connected to the metallic frame or ground point ofPV panel. Current flowing through between metallic frameand node ‘G’ is measured using current probe.

Fig. 9 Photograph of five level inverter with the driver circuit

Fig. 10 Experimental setup of five level cascaded multilevel inverter.

TABLE III. PARAMETERS USED IN THE EXPERIMENTAL SETUP

Parameter P VPV Fsw L C Rload

Value 25W 50V 10KHz 2mH 5µF 100Ω

Fig. 10 shows the experimental results obtained using (i)conventional SPWM and (ii) proposed modulation techniques.It can be easily observed from experimental result thatmagnitude of leakage current in proposed modulationtechnique is lower in comparison with conventional SPWM.

(i) (ii)Vload

VPG

Ileak

VOG

Vload

VPG

Ileak

VOG

Fig. 10 Experimental waveforms of voltage across load Vload in Volts,common mode voltage VPG in Volts, common mode voltage VOG in Volts andcurrent flowing through parasitic capacitance of PV test panel ileak (mA) forfive level CMLI with (i) conventional SPWM technique (ii) proposed PWMtechnique.

VII. CONCLUSION

This paper presents a new modulation technique for theminimization of the leakage current in transformer-less grid tiePV inverter. Using proposed PWM technique, the leakagecurrent is minimized without addition of any extra switches.The proposed PWM technique avoids high frequencyswitching ripple in common mode voltage. The THD of thegrid current also meet IEEE 1547 standard with the proposedPWM technique. Also the proposed PWM technique requiresreduced number of carrier waves when compared to theconventional SPWM technique.

ACKNOWLEDGMENT

I would like to thank Department of Science andTechnology (DST), Govt of INDIA and Indo US Science andTechnology Forum (IUSSTF) for providing me opportunity towork in US where this work was done. I would also thankFREEDM center for providing me the necessary equipment forcarrying out the experiment.

REFERENCES

[1] Byung-Duk Min; Jong-Pil Lee; Jong-Hyun Kim; Tae-Jin Kim; Dong-Wook Yoo; Eui-Ho Song, "A New Topology With High EfficiencyThroughout All Load Range for Photovoltaic PCS," IndustrialElectronics, IEEE Transactions on , vol.56, no.11, pp.4427,4435, Nov.2009.

[2] Bangyin Liu; Shanxu Duan; Tao Cai, "Photovoltaic DC-Building-Module-Based BIPV System—Concept and Design Considerations,"Power Electronics, IEEE Transactions on , vol.26, no.5, pp.1418,1429,May 2011

[3] Cacciato, M.; Consoli, A.; Attanasio, R.; Gennaro, F., "Soft-SwitchingConverter With HF Transformer for Grid-Connected PhotovoltaicSystems," Industrial Electronics, IEEE Transactions on , vol.57, no.5,pp.1678,1686, May 2010.

[4] Kerekes, T.; Teodorescu, R.; Borup, U., "Transformerless PhotovoltaicInverters Connected to the Grid," Applied Power Electronics Conference(APEC) 2007 IEEE , vol., no., pp.1733,1737, Feb. 2007.

[5] Bo Yang; Wuhua Li; Yi Zhao; Xiangning He, "Design and Analysis of aGrid-Connected Photovoltaic Power System," Power Electronics, IEEETransactions on , vol.25, no.4, pp.992,1000, Apr. 2010.

[6] Huafeng Xiao; Shaojun Xie; Chen Yang, "Transformerless split-inductorneutral point clamped three-level PV grid-connected inverter," EnergyConversion Congress and Exposition (ECCE), 2010 IEEE , vol., no.,pp.2929,2936, Sep. 2010.

[7] Eisner Safety Consultants; "Leakage Current (Part 1)"; May 2002.

[8] Ebrahim Babaei, Mohammad Farhadi Kangarla, Mehram Sabahi,Mohammad Reza Alizadeh Pahlavani, ”Cascaded multilevel Inverterusing Sub-multilevel cells|,” in Electric Power System Research vol.96,pp.101-110, March 2013.

[9] Bhattacharya, S.; Frank, T.M.; Divan, D.M.; Banerjee, B., "Active filtersystem implementation," Industry Applications IEEE Magazine , vol.4,no.5, pp.47,63, Sep/Oct 1998.

[10] Lopez, O.; Teodorescu, R.; Doval-Gandoy, J., "Multileveltransformerless topologies for single-phase grid-connected converters,"Industrial Electronics (IECON) 2006 IEEE Conference, vol., no.,pp.5191,5196, Nov. 2006.

[11] Woo-Jun Cha; Kyu-Tae Kim; Yong-Won Cho; Sung-Ho Lee; Bong-Hwan Kwon, "Evaluation and analysis of transformerless photovoltaicinverter topology for efficiency improvement and reduction of leakagecurrent," Power Electronics, IET , vol.8, no.2, pp.255,267, 2015.

Five-levelInverter withdriver circuit

Five-levelInverter CRO

DC Sources

PV Panel